|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/X86/X86GenInstrInfo.inc17900 { 212, 1, 1, 0, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, ImplicitList1, OperandInfo62, -1 ,nullptr }, // Inst #212 = MOV32r0
17901 { 213, 1, 1, 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable), 0x0ULL, nullptr, ImplicitList1, OperandInfo62, -1 ,nullptr }, // Inst #213 = MOV32r1
17902 { 214, 1, 1, 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable), 0x0ULL, nullptr, ImplicitList1, OperandInfo62, -1 ,nullptr }, // Inst #214 = MOV32r_1
17905 { 217, 1, 0, 0, 7, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #217 = RETPOLINE_CALL32
17919 { 231, 1, 1, 0, 1, 0|(1ULL<<MCID::Pseudo), 0x0ULL, ImplicitList1, ImplicitList1, OperandInfo62, -1 ,nullptr }, // Inst #231 = SETB_C32r
18283 { 595, 1, 0, 0, 951, 0|(1ULL<<MCID::Call), 0x3fc000013aULL, ImplicitList17, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #595 = CALL32r
18284 { 596, 1, 0, 0, 951, 0|(1ULL<<MCID::Call), 0x20003fc000013aULL, ImplicitList17, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #596 = CALL32r_NT
18548 { 860, 1, 0, 0, 116, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3dc000013eULL, ImplicitList21, ImplicitList29, OperandInfo62, -1 ,nullptr }, // Inst #860 = DIV32r
18610 { 922, 1, 0, 0, 8, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x30c0000001ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #922 = EH_RETURN
18722 { 1034, 1, 0, 0, 147, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3dc000013fULL, ImplicitList21, ImplicitList29, OperandInfo62, -1 ,nullptr }, // Inst #1034 = IDIV32r
18748 { 1060, 1, 0, 0, 159, 0, 0x3dc000013dULL, ImplicitList7, ImplicitList29, OperandInfo62, -1 ,nullptr }, // Inst #1060 = IMUL32r
18781 { 1093, 1, 0, 0, 8, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x2b8000303dULL, ImplicitList23, ImplicitList23, OperandInfo62, -1 ,nullptr }, // Inst #1093 = INCSSPD
18846 { 1158, 1, 0, 0, 816, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x3fc000013cULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #1158 = JMP32r
18847 { 1159, 1, 0, 0, 816, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x20003fc000013cULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #1159 = JMP32r_NT
18983 { 1295, 1, 0, 0, 8, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x4a000a038ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #1295 = LLWPCB
19531 { 1843, 1, 0, 0, 159, 0, 0x3dc000013cULL, ImplicitList7, ImplicitList29, OperandInfo62, -1 ,nullptr }, // Inst #1843 = MUL32r
19585 { 1897, 1, 0, 0, 80, 0, 0x7c0002137ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #1897 = NOOPLr
19875 { 2187, 1, 1, 0, 837, 0|(1ULL<<MCID::MayLoad), 0x1600000102ULL, ImplicitList73, ImplicitList73, OperandInfo62, -1 ,nullptr }, // Inst #2187 = POP32r
19877 { 2189, 1, 1, 0, 593, 0|(1ULL<<MCID::MayLoad), 0x23c0000138ULL, ImplicitList73, ImplicitList73, OperandInfo62, -1 ,nullptr }, // Inst #2189 = POP32rmr
19978 { 2290, 1, 0, 0, 8, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x2b8000303cULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #2290 = PTWRITEr
20000 { 2312, 1, 0, 0, 841, 0|(1ULL<<MCID::MayStore), 0x1400000102ULL, ImplicitList73, ImplicitList73, OperandInfo62, -1 ,nullptr }, // Inst #2312 = PUSH32r
20002 { 2314, 1, 0, 0, 732, 0|(1ULL<<MCID::MayStore), 0x3fc000013eULL, ImplicitList73, ImplicitList73, OperandInfo62, -1 ,nullptr }, // Inst #2314 = PUSH32rmr
20085 { 2397, 1, 1, 0, 288, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList73, ImplicitList73, OperandInfo62, -1 ,nullptr }, // Inst #2397 = RDFLAGS32
20087 { 2399, 1, 1, 0, 8, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x2b80003038ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #2399 = RDFSBASE
20089 { 2401, 1, 1, 0, 8, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x2b80003039ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #2401 = RDGSBASE
20092 { 2404, 1, 1, 0, 8, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x31c000303fULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #2404 = RDPID32
20097 { 2409, 1, 1, 0, 799, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x31c000213eULL, nullptr, ImplicitList1, OperandInfo62, -1 ,nullptr }, // Inst #2409 = RDRAND32r
20100 { 2412, 1, 1, 0, 8, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x31c000213fULL, nullptr, ImplicitList1, OperandInfo62, -1 ,nullptr }, // Inst #2412 = RDSEED32r
20392 { 2704, 1, 1, 0, 760, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2138ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #2704 = SLDT32r
20394 { 2706, 1, 1, 0, 8, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x4a000a039ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #2706 = SLWPCB
20398 { 2710, 1, 1, 0, 8, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4000213cULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #2710 = SMSW32r
20428 { 2740, 1, 1, 0, 891, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2139ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #2740 = STR32r
20591 { 2903, 1, 0, 0, 8, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2b8000283eULL, ImplicitList21, ImplicitList1, OperandInfo62, -1 ,nullptr }, // Inst #2903 = TPAUSE
20628 { 2940, 1, 0, 0, 8, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x2b8000343eULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #2940 = UMONITOR32
20630 { 2942, 1, 0, 0, 8, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2b8000383eULL, ImplicitList21, ImplicitList1, OperandInfo62, -1 ,nullptr }, // Inst #2942 = UMWAIT
32828 { 15140, 1, 0, 0, 8, 0, 0x0ULL, ImplicitList73, ImplicitList96, OperandInfo62, -1 ,nullptr }, // Inst #15140 = WIN_ALLOCA_32
32830 { 15142, 1, 0, 0, 288, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList73, ImplicitList76, OperandInfo62, -1 ,nullptr }, // Inst #15142 = WRFLAGS32
32832 { 15144, 1, 0, 0, 8, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x2b8000303aULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #15144 = WRFSBASE
32834 { 15146, 1, 0, 0, 8, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x2b8000303bULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #15146 = WRGSBASE
32852 { 15164, 1, 1, 0, 8, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #15164 = XBEGIN