|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/X86/X86GenInstrInfo.inc22476 { 4788, 4, 1, 0, 0, 0, 0x20094b0005031ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #4788 = VDPBF16PSZ128r
22721 { 5033, 4, 1, 0, 420, 0|(1ULL<<MCID::Commutable), 0x200e638004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #5033 = VFMADD132PDZ128r
22755 { 5067, 4, 1, 0, 420, 0|(1ULL<<MCID::Commutable), 0x200a634004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #5067 = VFMADD132PSZ128r
22786 { 5098, 4, 1, 0, 426, 0|(1ULL<<MCID::Commutable), 0x100e678004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #5098 = VFMADD132SDZr_Int
22802 { 5114, 4, 1, 0, 426, 0|(1ULL<<MCID::Commutable), 0x80a674004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #5114 = VFMADD132SSZr_Int
22821 { 5133, 4, 1, 0, 420, 0|(1ULL<<MCID::Commutable), 0x200ea38004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #5133 = VFMADD213PDZ128r
22855 { 5167, 4, 1, 0, 420, 0|(1ULL<<MCID::Commutable), 0x200aa34004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #5167 = VFMADD213PSZ128r
22886 { 5198, 4, 1, 0, 426, 0|(1ULL<<MCID::Commutable), 0x100ea78004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #5198 = VFMADD213SDZr_Int
22902 { 5214, 4, 1, 0, 426, 0|(1ULL<<MCID::Commutable), 0x80aa74004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #5214 = VFMADD213SSZr_Int
22921 { 5233, 4, 1, 0, 420, 0|(1ULL<<MCID::Commutable), 0x200ee38004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #5233 = VFMADD231PDZ128r
22955 { 5267, 4, 1, 0, 420, 0|(1ULL<<MCID::Commutable), 0x200ae34004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #5267 = VFMADD231PSZ128r
22986 { 5298, 4, 1, 0, 426, 0|(1ULL<<MCID::Commutable), 0x100ee78004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #5298 = VFMADD231SDZr_Int
23002 { 5314, 4, 1, 0, 426, 0|(1ULL<<MCID::Commutable), 0x80ae74004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #5314 = VFMADD231SSZr_Int
23053 { 5365, 4, 1, 0, 420, 0|(1ULL<<MCID::Commutable), 0x200e5b8004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #5365 = VFMADDSUB132PDZ128r
23087 { 5399, 4, 1, 0, 420, 0|(1ULL<<MCID::Commutable), 0x200a5b4004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #5399 = VFMADDSUB132PSZ128r
23121 { 5433, 4, 1, 0, 420, 0|(1ULL<<MCID::Commutable), 0x200e9b8004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #5433 = VFMADDSUB213PDZ128r
23155 { 5467, 4, 1, 0, 420, 0|(1ULL<<MCID::Commutable), 0x200a9b4004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #5467 = VFMADDSUB213PSZ128r
23189 { 5501, 4, 1, 0, 420, 0|(1ULL<<MCID::Commutable), 0x200edb8004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #5501 = VFMADDSUB231PDZ128r
23223 { 5535, 4, 1, 0, 420, 0|(1ULL<<MCID::Commutable), 0x200adb4004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #5535 = VFMADDSUB231PSZ128r
23273 { 5585, 4, 1, 0, 420, 0|(1ULL<<MCID::Commutable), 0x200e6b8004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #5585 = VFMSUB132PDZ128r
23307 { 5619, 4, 1, 0, 420, 0|(1ULL<<MCID::Commutable), 0x200a6b4004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #5619 = VFMSUB132PSZ128r
23338 { 5650, 4, 1, 0, 426, 0|(1ULL<<MCID::Commutable), 0x100e6f8004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #5650 = VFMSUB132SDZr_Int
23354 { 5666, 4, 1, 0, 426, 0|(1ULL<<MCID::Commutable), 0x80a6f4004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #5666 = VFMSUB132SSZr_Int
23373 { 5685, 4, 1, 0, 420, 0|(1ULL<<MCID::Commutable), 0x200eab8004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #5685 = VFMSUB213PDZ128r
23407 { 5719, 4, 1, 0, 420, 0|(1ULL<<MCID::Commutable), 0x200aab4004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #5719 = VFMSUB213PSZ128r
23438 { 5750, 4, 1, 0, 426, 0|(1ULL<<MCID::Commutable), 0x100eaf8004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #5750 = VFMSUB213SDZr_Int
23454 { 5766, 4, 1, 0, 426, 0|(1ULL<<MCID::Commutable), 0x80aaf4004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #5766 = VFMSUB213SSZr_Int
23473 { 5785, 4, 1, 0, 420, 0|(1ULL<<MCID::Commutable), 0x200eeb8004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #5785 = VFMSUB231PDZ128r
23507 { 5819, 4, 1, 0, 420, 0|(1ULL<<MCID::Commutable), 0x200aeb4004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #5819 = VFMSUB231PSZ128r
23538 { 5850, 4, 1, 0, 426, 0|(1ULL<<MCID::Commutable), 0x100eef8004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #5850 = VFMSUB231SDZr_Int
23554 { 5866, 4, 1, 0, 426, 0|(1ULL<<MCID::Commutable), 0x80aef4004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #5866 = VFMSUB231SSZr_Int
23573 { 5885, 4, 1, 0, 420, 0|(1ULL<<MCID::Commutable), 0x200e5f8004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #5885 = VFMSUBADD132PDZ128r
23607 { 5919, 4, 1, 0, 420, 0|(1ULL<<MCID::Commutable), 0x200a5f4004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #5919 = VFMSUBADD132PSZ128r
23641 { 5953, 4, 1, 0, 420, 0|(1ULL<<MCID::Commutable), 0x200e9f8004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #5953 = VFMSUBADD213PDZ128r
23675 { 5987, 4, 1, 0, 420, 0|(1ULL<<MCID::Commutable), 0x200a9f4004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #5987 = VFMSUBADD213PSZ128r
23709 { 6021, 4, 1, 0, 420, 0|(1ULL<<MCID::Commutable), 0x200edf8004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #6021 = VFMSUBADD231PDZ128r
23743 { 6055, 4, 1, 0, 420, 0|(1ULL<<MCID::Commutable), 0x200adf4004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #6055 = VFMSUBADD231PSZ128r
23825 { 6137, 4, 1, 0, 420, 0|(1ULL<<MCID::Commutable), 0x200e738004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #6137 = VFNMADD132PDZ128r
23859 { 6171, 4, 1, 0, 420, 0|(1ULL<<MCID::Commutable), 0x200a734004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #6171 = VFNMADD132PSZ128r
23890 { 6202, 4, 1, 0, 426, 0|(1ULL<<MCID::Commutable), 0x100e778004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #6202 = VFNMADD132SDZr_Int
23906 { 6218, 4, 1, 0, 426, 0|(1ULL<<MCID::Commutable), 0x80a774004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #6218 = VFNMADD132SSZr_Int
23925 { 6237, 4, 1, 0, 420, 0|(1ULL<<MCID::Commutable), 0x200eb38004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #6237 = VFNMADD213PDZ128r
23959 { 6271, 4, 1, 0, 420, 0|(1ULL<<MCID::Commutable), 0x200ab34004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #6271 = VFNMADD213PSZ128r
23990 { 6302, 4, 1, 0, 426, 0|(1ULL<<MCID::Commutable), 0x100eb78004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #6302 = VFNMADD213SDZr_Int
24006 { 6318, 4, 1, 0, 426, 0|(1ULL<<MCID::Commutable), 0x80ab74004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #6318 = VFNMADD213SSZr_Int
24025 { 6337, 4, 1, 0, 420, 0|(1ULL<<MCID::Commutable), 0x200ef38004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #6337 = VFNMADD231PDZ128r
24059 { 6371, 4, 1, 0, 420, 0|(1ULL<<MCID::Commutable), 0x200af34004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #6371 = VFNMADD231PSZ128r
24090 { 6402, 4, 1, 0, 426, 0|(1ULL<<MCID::Commutable), 0x100ef78004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #6402 = VFNMADD231SDZr_Int
24106 { 6418, 4, 1, 0, 426, 0|(1ULL<<MCID::Commutable), 0x80af74004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #6418 = VFNMADD231SSZr_Int
24157 { 6469, 4, 1, 0, 420, 0|(1ULL<<MCID::Commutable), 0x200e7b8004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #6469 = VFNMSUB132PDZ128r
24191 { 6503, 4, 1, 0, 420, 0|(1ULL<<MCID::Commutable), 0x200a7b4004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #6503 = VFNMSUB132PSZ128r
24222 { 6534, 4, 1, 0, 426, 0|(1ULL<<MCID::Commutable), 0x100e7f8004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #6534 = VFNMSUB132SDZr_Int
24238 { 6550, 4, 1, 0, 426, 0|(1ULL<<MCID::Commutable), 0x80a7f4004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #6550 = VFNMSUB132SSZr_Int
24257 { 6569, 4, 1, 0, 420, 0|(1ULL<<MCID::Commutable), 0x200ebb8004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #6569 = VFNMSUB213PDZ128r
24291 { 6603, 4, 1, 0, 420, 0|(1ULL<<MCID::Commutable), 0x200abb4004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #6603 = VFNMSUB213PSZ128r
24322 { 6634, 4, 1, 0, 426, 0|(1ULL<<MCID::Commutable), 0x100ebf8004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #6634 = VFNMSUB213SDZr_Int
24338 { 6650, 4, 1, 0, 426, 0|(1ULL<<MCID::Commutable), 0x80abf4004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #6650 = VFNMSUB213SSZr_Int
24357 { 6669, 4, 1, 0, 420, 0|(1ULL<<MCID::Commutable), 0x200efb8004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #6669 = VFNMSUB231PDZ128r
24391 { 6703, 4, 1, 0, 420, 0|(1ULL<<MCID::Commutable), 0x200afb4004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #6703 = VFNMSUB231PSZ128r
24422 { 6734, 4, 1, 0, 426, 0|(1ULL<<MCID::Commutable), 0x100eff8004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #6734 = VFNMSUB231SDZr_Int
24438 { 6750, 4, 1, 0, 426, 0|(1ULL<<MCID::Commutable), 0x80aff4004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #6750 = VFNMSUB231SSZr_Int
27266 { 9578, 4, 1, 0, 262, 0, 0x2009470004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #9578 = VPDPBUSDSZ128r
27293 { 9605, 4, 1, 0, 262, 0, 0x2009430004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #9605 = VPDPBUSDZ128r
27320 { 9632, 4, 1, 0, 262, 0|(1ULL<<MCID::Commutable), 0x20094f0004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #9632 = VPDPWSSDSZ128r
27347 { 9659, 4, 1, 0, 262, 0|(1ULL<<MCID::Commutable), 0x20094b0004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #9659 = VPDPWSSDZ128r
27413 { 9725, 4, 1, 0, 360, 0|(1ULL<<MCID::Commutable), 0x2009d7c004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #9725 = VPERMI2B128rr
27434 { 9746, 4, 1, 0, 360, 0|(1ULL<<MCID::Commutable), 0x2009dbc004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #9746 = VPERMI2D128rr
27461 { 9773, 4, 1, 0, 495, 0|(1ULL<<MCID::Commutable), 0x200ddf8004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #9773 = VPERMI2PD128rr
27488 { 9800, 4, 1, 0, 495, 0|(1ULL<<MCID::Commutable), 0x2009df4004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #9800 = VPERMI2PS128rr
27515 { 9827, 4, 1, 0, 360, 0|(1ULL<<MCID::Commutable), 0x200ddbc004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #9827 = VPERMI2Q128rr
27539 { 9851, 4, 1, 0, 1164, 0|(1ULL<<MCID::Commutable), 0x200dd7c004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #9851 = VPERMI2W128rr
27793 { 10105, 4, 1, 0, 360, 0|(1ULL<<MCID::Commutable), 0x2009f7c004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #10105 = VPERMT2B128rr
27814 { 10126, 4, 1, 0, 360, 0|(1ULL<<MCID::Commutable), 0x2009fbc004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #10126 = VPERMT2D128rr
27841 { 10153, 4, 1, 0, 495, 0|(1ULL<<MCID::Commutable), 0x200dff8004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #10153 = VPERMT2PD128rr
27868 { 10180, 4, 1, 0, 495, 0|(1ULL<<MCID::Commutable), 0x2009ff4004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #10180 = VPERMT2PS128rr
27895 { 10207, 4, 1, 0, 360, 0|(1ULL<<MCID::Commutable), 0x200dfbc004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #10207 = VPERMT2Q128rr
27919 { 10231, 4, 1, 0, 1164, 0|(1ULL<<MCID::Commutable), 0x200df7c004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #10231 = VPERMT2W128rr
28218 { 10530, 4, 1, 0, 262, 0|(1ULL<<MCID::Commutable), 0x200ed7c004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #10530 = VPMADD52HUQZ128r
28245 { 10557, 4, 1, 0, 262, 0|(1ULL<<MCID::Commutable), 0x200ed3c004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #10557 = VPMADD52LUQZ128r
30015 { 12327, 4, 1, 0, 262, 0, 0x2009c7c004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #12327 = VPSHLDVDZ128r
30042 { 12354, 4, 1, 0, 262, 0, 0x200dc7c004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #12354 = VPSHLDVQZ128r
30066 { 12378, 4, 1, 0, 262, 0, 0x200dc3c004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #12378 = VPSHLDVWZ128r
30171 { 12483, 4, 1, 0, 262, 0, 0x2009cfc004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #12483 = VPSHRDVDZ128r
30198 { 12510, 4, 1, 0, 262, 0, 0x200dcfc004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #12510 = VPSHRDVQZ128r
30222 { 12534, 4, 1, 0, 262, 0, 0x200dcbc004831ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #12534 = VPSHRDVWZ128r