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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/X86/X86GenInstrInfo.inc21343 { 3655, 8, 1, 0, 369, 0|(1ULL<<MCID::MayLoad), 0x969cbc005821ULL, nullptr, nullptr, OperandInfo506, -1 ,nullptr }, // Inst #3655 = VCVTNE2PS2BF16Z128rmbkz
21345 { 3657, 8, 1, 0, 369, 0|(1ULL<<MCID::MayLoad), 0x2069cbc005821ULL, nullptr, nullptr, OperandInfo506, -1 ,nullptr }, // Inst #3657 = VCVTNE2PS2BF16Z128rmkz
26123 { 8435, 8, 1, 0, 238, 0|(1ULL<<MCID::MayLoad), 0x969afc002821ULL, nullptr, nullptr, OperandInfo506, -1 ,nullptr }, // Inst #8435 = VPACKSSDWZ128rmbkz
26125 { 8437, 8, 1, 0, 238, 0|(1ULL<<MCID::MayLoad), 0x2069afc002821ULL, nullptr, nullptr, OperandInfo506, -1 ,nullptr }, // Inst #8437 = VPACKSSDWZ128rmkz
26176 { 8488, 8, 1, 0, 238, 0|(1ULL<<MCID::MayLoad), 0x968afc004821ULL, nullptr, nullptr, OperandInfo506, -1 ,nullptr }, // Inst #8488 = VPACKUSDWZ128rmbkz
26178 { 8490, 8, 1, 0, 238, 0|(1ULL<<MCID::MayLoad), 0x2068afc004821ULL, nullptr, nullptr, OperandInfo506, -1 ,nullptr }, // Inst #8490 = VPACKUSDWZ128rmkz
26334 { 8646, 8, 1, 0, 141, 0|(1ULL<<MCID::MayLoad), 0x206bb7c002821ULL, nullptr, nullptr, OperandInfo506, -1 ,nullptr }, // Inst #8646 = VPADDSWZ128rmkz
26378 { 8690, 8, 1, 0, 141, 0|(1ULL<<MCID::MayLoad), 0x206b77c002821ULL, nullptr, nullptr, OperandInfo506, -1 ,nullptr }, // Inst #8690 = VPADDUSWZ128rmkz
26400 { 8712, 8, 1, 0, 1162, 0|(1ULL<<MCID::MayLoad), 0x206bf7c002821ULL, nullptr, nullptr, OperandInfo506, -1 ,nullptr }, // Inst #8712 = VPADDWZ128rmkz
26582 { 8894, 8, 1, 0, 141, 0|(1ULL<<MCID::MayLoad), 0x206b8fc002821ULL, nullptr, nullptr, OperandInfo506, -1 ,nullptr }, // Inst #8894 = VPAVGWZ128rmkz
26677 { 8989, 8, 1, 0, 1163, 0|(1ULL<<MCID::MayLoad), 0x202d9bc004821ULL, nullptr, nullptr, OperandInfo506, -1 ,nullptr }, // Inst #8989 = VPBLENDMWZ128rmk
26678 { 8990, 8, 1, 0, 1163, 0|(1ULL<<MCID::MayLoad), 0x206d9bc004821ULL, nullptr, nullptr, OperandInfo506, -1 ,nullptr }, // Inst #8990 = VPBLENDMWZ128rmkz
27936 { 10248, 8, 1, 0, 1239, 0|(1ULL<<MCID::MayLoad), 0x206e37c004821ULL, nullptr, nullptr, OperandInfo506, -1 ,nullptr }, // Inst #10248 = VPERMWZ128rmkz
28270 { 10582, 8, 1, 0, 261, 0|(1ULL<<MCID::MayLoad), 0x206813c004821ULL, nullptr, nullptr, OperandInfo506, -1 ,nullptr }, // Inst #10582 = VPMADDUBSWZ128rmkz
28402 { 10714, 8, 1, 0, 141, 0|(1ULL<<MCID::MayLoad), 0x206bbbc002821ULL, nullptr, nullptr, OperandInfo506, -1 ,nullptr }, // Inst #10714 = VPMAXSWZ128rmkz
28504 { 10816, 8, 1, 0, 141, 0|(1ULL<<MCID::MayLoad), 0x2068fbc004821ULL, nullptr, nullptr, OperandInfo506, -1 ,nullptr }, // Inst #10816 = VPMAXUWZ128rmkz
28606 { 10918, 8, 1, 0, 141, 0|(1ULL<<MCID::MayLoad), 0x206babc002821ULL, nullptr, nullptr, OperandInfo506, -1 ,nullptr }, // Inst #10918 = VPMINSWZ128rmkz
28708 { 11020, 8, 1, 0, 141, 0|(1ULL<<MCID::MayLoad), 0x2068ebc004821ULL, nullptr, nullptr, OperandInfo506, -1 ,nullptr }, // Inst #11020 = VPMINUWZ128rmkz
29321 { 11633, 8, 1, 0, 261, 0|(1ULL<<MCID::MayLoad), 0x20682fc004821ULL, nullptr, nullptr, OperandInfo506, -1 ,nullptr }, // Inst #11633 = VPMULHRSWZ128rmkz
29343 { 11655, 8, 1, 0, 261, 0|(1ULL<<MCID::MayLoad), 0x206b93c002821ULL, nullptr, nullptr, OperandInfo506, -1 ,nullptr }, // Inst #11655 = VPMULHUWZ128rmkz
29365 { 11677, 8, 1, 0, 261, 0|(1ULL<<MCID::MayLoad), 0x206b97c002821ULL, nullptr, nullptr, OperandInfo506, -1 ,nullptr }, // Inst #11677 = VPMULHWZ128rmkz
29445 { 11757, 8, 1, 0, 261, 0|(1ULL<<MCID::MayLoad), 0x206b57c002821ULL, nullptr, nullptr, OperandInfo506, -1 ,nullptr }, // Inst #11757 = VPMULLWZ128rmkz
30550 { 12862, 8, 1, 0, 528, 0|(1ULL<<MCID::MayLoad), 0x206c4bc004821ULL, nullptr, nullptr, OperandInfo506, -1 ,nullptr }, // Inst #12862 = VPSLLVWZ128rmkz
30577 { 12889, 8, 1, 0, 275, 0|(1ULL<<MCID::MayLoad), 0x206bc7c002821ULL, nullptr, nullptr, OperandInfo506, -1 ,nullptr }, // Inst #12889 = VPSLLWZ128rmkz
30764 { 13076, 8, 1, 0, 528, 0|(1ULL<<MCID::MayLoad), 0x206c47c004821ULL, nullptr, nullptr, OperandInfo506, -1 ,nullptr }, // Inst #13076 = VPSRAVWZ128rmkz
30791 { 13103, 8, 1, 0, 275, 0|(1ULL<<MCID::MayLoad), 0x206b87c002821ULL, nullptr, nullptr, OperandInfo506, -1 ,nullptr }, // Inst #13103 = VPSRAWZ128rmkz
30996 { 13308, 8, 1, 0, 528, 0|(1ULL<<MCID::MayLoad), 0x206c43c004821ULL, nullptr, nullptr, OperandInfo506, -1 ,nullptr }, // Inst #13308 = VPSRLVWZ128rmkz
31023 { 13335, 8, 1, 0, 275, 0|(1ULL<<MCID::MayLoad), 0x206b47c002821ULL, nullptr, nullptr, OperandInfo506, -1 ,nullptr }, // Inst #13335 = VPSRLWZ128rmkz
31164 { 13476, 8, 1, 0, 141, 0|(1ULL<<MCID::MayLoad), 0x206ba7c002821ULL, nullptr, nullptr, OperandInfo506, -1 ,nullptr }, // Inst #13476 = VPSUBSWZ128rmkz
31208 { 13520, 8, 1, 0, 141, 0|(1ULL<<MCID::MayLoad), 0x206b67c002821ULL, nullptr, nullptr, OperandInfo506, -1 ,nullptr }, // Inst #13520 = VPSUBUSWZ128rmkz
31230 { 13542, 8, 1, 0, 1162, 0|(1ULL<<MCID::MayLoad), 0x206be7c002821ULL, nullptr, nullptr, OperandInfo506, -1 ,nullptr }, // Inst #13542 = VPSUBWZ128rmkz
31514 { 13826, 8, 1, 0, 238, 0|(1ULL<<MCID::MayLoad), 0x2069a7c002821ULL, nullptr, nullptr, OperandInfo506, -1 ,nullptr }, // Inst #13826 = VPUNPCKHWDZ128rmkz
31620 { 13932, 8, 1, 0, 238, 0|(1ULL<<MCID::MayLoad), 0x206987c002821ULL, nullptr, nullptr, OperandInfo506, -1 ,nullptr }, // Inst #13932 = VPUNPCKLWDZ128rmkz