|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/X86/X86GenInstrInfo.inc21257 { 3569, 2, 1, 0, 1138, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80862bc004830ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #3569 = VCOMPRESSPDZrr
21272 { 3584, 2, 1, 0, 1138, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80822bc004830ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #3584 = VCOMPRESSPSZrr
21332 { 3644, 2, 1, 0, 1116, 0, 0x80816f0002031ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #3644 = VCVTDQ2PSZrr
21486 { 3798, 2, 1, 0, 1117, 0, 0x8085ef0002831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #3798 = VCVTPD2QQZrr
21546 { 3858, 2, 1, 0, 1117, 0, 0x8085e70002831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #3858 = VCVTPD2UQQZrr
21603 { 3915, 2, 1, 0, 1118, 0, 0x80816f0002831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #3915 = VCVTPS2DQZrr
21721 { 4033, 2, 1, 0, 1118, 0, 0x8081e70002031ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #4033 = VCVTPS2UDQZrr
21781 { 4093, 2, 1, 0, 1119, 0, 0x80879b0003031ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #4093 = VCVTQQ2PDZrr
21972 { 4284, 2, 1, 0, 1117, 0, 0x8085eb0002831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #4284 = VCVTTPD2QQZrr
21973 { 4285, 2, 1, 0, 379, 0, 0x1185eb0002831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #4285 = VCVTTPD2QQZrrb
22032 { 4344, 2, 1, 0, 1117, 0, 0x8085e30002831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #4344 = VCVTTPD2UQQZrr
22033 { 4345, 2, 1, 0, 379, 0, 0x1185e30002831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #4345 = VCVTTPD2UQQZrrb
22064 { 4376, 2, 1, 0, 1118, 0, 0x80816f0003031ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #4376 = VCVTTPS2DQZrr
22065 { 4377, 2, 1, 0, 389, 0, 0x9816f0003031ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #4377 = VCVTTPS2DQZrrb
22126 { 4438, 2, 1, 0, 1118, 0, 0x8081e30002031ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #4438 = VCVTTPS2UDQZrr
22127 { 4439, 2, 1, 0, 389, 0, 0x981e30002031ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #4439 = VCVTTPS2UDQZrrb
22269 { 4581, 2, 1, 0, 1116, 0, 0x8081eb0003831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #4581 = VCVTUDQ2PSZrr
22299 { 4611, 2, 1, 0, 1119, 0, 0x8085eb0003031ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #4611 = VCVTUQQ2PDZrr
22513 { 4825, 2, 1, 0, 331, 0, 0x8087238004831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #4825 = VEXP2PDZr
22514 { 4826, 2, 1, 0, 331, 0, 0x1187238004831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #4826 = VEXP2PDZrb
22525 { 4837, 2, 1, 0, 331, 0, 0x8083234004831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #4837 = VEXP2PSZr
22526 { 4838, 2, 1, 0, 331, 0, 0x983234004831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #4838 = VEXP2PSZrb
22546 { 4858, 2, 1, 0, 1120, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x808623c004831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #4858 = VEXPANDPDZrr
22564 { 4876, 2, 1, 0, 1120, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x808223c004831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #4876 = VEXPANDPSZrr
24589 { 6901, 2, 1, 0, 434, 0, 0x80850b8004831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #6901 = VGETEXPPDZr
24590 { 6902, 2, 1, 0, 434, 0, 0x11850b8004831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #6902 = VGETEXPPDZrb
24619 { 6931, 2, 1, 0, 434, 0, 0x80810b4004831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #6931 = VGETEXPPSZr
24620 { 6932, 2, 1, 0, 434, 0, 0x9810b4004831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #6932 = VGETEXPPSZrb
25294 { 7606, 2, 1, 0, 456, 0|(1ULL<<MCID::MoveReg), 0x8084a38002831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #7606 = VMOVAPDZrr
25295 { 7607, 2, 1, 0, 456, 0|(1ULL<<MCID::MoveReg), 0x8084a78002830ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #7607 = VMOVAPDZrr_REV
25335 { 7647, 2, 1, 0, 456, 0|(1ULL<<MCID::MoveReg), 0x8080a34002031ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #7647 = VMOVAPSZrr
25336 { 7648, 2, 1, 0, 456, 0|(1ULL<<MCID::MoveReg), 0x8080a74002030ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #7648 = VMOVAPSZrr_REV
25362 { 7674, 2, 1, 0, 460, 0, 0x80844b8003831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #7674 = VMOVDDUPZrr
25400 { 7712, 2, 1, 0, 462, 0|(1ULL<<MCID::MoveReg), 0x8081bfc002831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #7712 = VMOVDQA32Zrr
25401 { 7713, 2, 1, 0, 462, 0|(1ULL<<MCID::MoveReg), 0x8081ffc002830ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #7713 = VMOVDQA32Zrr_REV
25433 { 7745, 2, 1, 0, 462, 0|(1ULL<<MCID::MoveReg), 0x8085bfc002831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #7745 = VMOVDQA64Zrr
25434 { 7746, 2, 1, 0, 462, 0|(1ULL<<MCID::MoveReg), 0x8085ffc002830ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #7746 = VMOVDQA64Zrr_REV
25474 { 7786, 2, 1, 0, 462, 0|(1ULL<<MCID::MoveReg), 0x8085bfc003831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #7786 = VMOVDQU16Zrr
25475 { 7787, 2, 1, 0, 462, 0|(1ULL<<MCID::MoveReg), 0x8085ffc003830ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #7787 = VMOVDQU16Zrr_REV
25507 { 7819, 2, 1, 0, 462, 0|(1ULL<<MCID::MoveReg), 0x8081bfc003031ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #7819 = VMOVDQU32Zrr
25508 { 7820, 2, 1, 0, 462, 0|(1ULL<<MCID::MoveReg), 0x8081ffc003030ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #7820 = VMOVDQU32Zrr_REV
25540 { 7852, 2, 1, 0, 462, 0|(1ULL<<MCID::MoveReg), 0x8085bfc003031ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #7852 = VMOVDQU64Zrr
25541 { 7853, 2, 1, 0, 462, 0|(1ULL<<MCID::MoveReg), 0x8085ffc003030ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #7853 = VMOVDQU64Zrr_REV
25573 { 7885, 2, 1, 0, 462, 0|(1ULL<<MCID::MoveReg), 0x8081bfc003831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #7885 = VMOVDQU8Zrr
25574 { 7886, 2, 1, 0, 462, 0|(1ULL<<MCID::MoveReg), 0x8081ffc003830ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #7886 = VMOVDQU8Zrr_REV
25681 { 7993, 2, 1, 0, 460, 0, 0x80805b4003031ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #7993 = VMOVSHDUPZrr
25703 { 8015, 2, 1, 0, 460, 0, 0x80804b4003031ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #8015 = VMOVSLDUPZrr
25758 { 8070, 2, 1, 0, 456, 0|(1ULL<<MCID::MoveReg), 0x8084438002831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #8070 = VMOVUPDZrr
25759 { 8071, 2, 1, 0, 456, 0|(1ULL<<MCID::MoveReg), 0x8084478002830ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #8071 = VMOVUPDZrr_REV
25799 { 8111, 2, 1, 0, 456, 0|(1ULL<<MCID::MoveReg), 0x8080434002031ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #8111 = VMOVUPSZrr
25800 { 8112, 2, 1, 0, 456, 0|(1ULL<<MCID::MoveReg), 0x8080474002030ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #8112 = VMOVUPSZrr_REV
26033 { 8345, 2, 1, 0, 442, 0, 0x808073c004831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #8345 = VPABSBZrr
26064 { 8376, 2, 1, 0, 442, 0, 0x80807bc004831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #8376 = VPABSDZrr
26093 { 8405, 2, 1, 0, 442, 0, 0x80847fc004831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #8405 = VPABSQZrr
26113 { 8425, 2, 1, 0, 442, 0, 0x808077c004831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #8425 = VPABSWZrr
27146 { 9458, 2, 1, 0, 360, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80818fc004830ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #9458 = VPCOMPRESSBZrr
27161 { 9473, 2, 1, 0, 1138, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80822fc004830ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #9473 = VPCOMPRESSDZrr
27176 { 9488, 2, 1, 0, 1138, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80862fc004830ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #9488 = VPCOMPRESSQZrr
27191 { 9503, 2, 1, 0, 360, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80858fc004830ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #9503 = VPCOMPRESSWZrr
27230 { 9542, 2, 1, 0, 1267, 0, 0x808313c004831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #9542 = VPCONFLICTDZrr
27257 { 9569, 2, 1, 0, 1264, 0, 0x808713c004831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #9569 = VPCONFLICTQZrr
27967 { 10279, 2, 1, 0, 360, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80818bc004831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #10279 = VPEXPANDBZrr
27985 { 10297, 2, 1, 0, 1120, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x808227c004831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #10297 = VPEXPANDDZrr
28003 { 10315, 2, 1, 0, 1120, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x808627c004831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #10315 = VPEXPANDQZrr
28021 { 10333, 2, 1, 0, 360, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80858bc004831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #10333 = VPEXPANDWZrr
28158 { 10470, 2, 1, 0, 438, 0, 0x808113c004831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #10470 = VPLZCNTDZrr
28185 { 10497, 2, 1, 0, 438, 0, 0x808513c004831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #10497 = VPLZCNTQZrr
29536 { 11848, 2, 1, 0, 442, 0, 0x808153c004831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #11848 = VPOPCNTBZrr
29563 { 11875, 2, 1, 0, 442, 0, 0x808157c004831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #11875 = VPOPCNTDZrr
29590 { 11902, 2, 1, 0, 442, 0, 0x808557c004831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #11902 = VPOPCNTQZrr
29608 { 11920, 2, 1, 0, 442, 0, 0x808553c004831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #11920 = VPOPCNTWZrr
31798 { 14110, 2, 1, 0, 550, 0, 0x8085338004831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #14110 = VRCP14PDZr
31825 { 14137, 2, 1, 0, 550, 0, 0x8081334004831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #14137 = VRCP14PSZr
31846 { 14158, 2, 1, 0, 550, 0, 0x80872b8004831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #14158 = VRCP28PDZr
31847 { 14159, 2, 1, 0, 550, 0, 0x11872b8004831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #14159 = VRCP28PDZrb
31858 { 14170, 2, 1, 0, 550, 0, 0x80832b4004831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #14170 = VRCP28PSZr
31859 { 14171, 2, 1, 0, 550, 0, 0x9832b4004831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #14171 = VRCP28PSZrb
32090 { 14402, 2, 1, 0, 557, 0, 0x80853b8004831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #14402 = VRSQRT14PDZr
32117 { 14429, 2, 1, 0, 557, 0, 0x80813b4004831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #14429 = VRSQRT14PSZr
32138 { 14450, 2, 1, 0, 557, 0, 0x8087338004831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #14450 = VRSQRT28PDZr
32139 { 14451, 2, 1, 0, 557, 0, 0x1187338004831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #14451 = VRSQRT28PDZrb
32150 { 14462, 2, 1, 0, 557, 0, 0x8083334004831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #14462 = VRSQRT28PSZr
32151 { 14463, 2, 1, 0, 557, 0, 0x983334004831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #14463 = VRSQRT28PSZrb
32440 { 14752, 2, 1, 0, 566, 0, 0x8085478002831ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #14752 = VSQRTPDZr
32474 { 14786, 2, 1, 0, 572, 0, 0x8081474002031ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #14786 = VSQRTPSZr