|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/X86/X86GenInstrInfo.inc21086 { 3398, 2, 1, 0, 175, 0, 0x200167c004831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #3398 = VBROADCASTI32X2Z128r
21138 { 3450, 2, 1, 0, 351, 0, 0x2000634004831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #3450 = VBROADCASTSSZ128r
21230 { 3542, 2, 0, 0, 77, 0, 0x1004bf0002831ULL, nullptr, ImplicitList1, OperandInfo431, -1 ,nullptr }, // Inst #3542 = VCOMISDZrr_Int
21231 { 3543, 2, 0, 0, 77, 0, 0x1104bf8022831ULL, nullptr, ImplicitList1, OperandInfo431, -1 ,nullptr }, // Inst #3543 = VCOMISDZrrb
21239 { 3551, 2, 0, 0, 77, 0, 0x800bf0002031ULL, nullptr, ImplicitList1, OperandInfo431, -1 ,nullptr }, // Inst #3551 = VCOMISSZrr_Int
21240 { 3552, 2, 0, 0, 77, 0, 0x900bf4022031ULL, nullptr, ImplicitList1, OperandInfo431, -1 ,nullptr }, // Inst #3552 = VCOMISSZrrb
21247 { 3559, 2, 1, 0, 1138, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20062bc004830ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #3559 = VCOMPRESSPDZ128rr
21262 { 3574, 2, 1, 0, 1138, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20022bc004830ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #3574 = VCOMPRESSPSZ128rr
21283 { 3595, 2, 1, 0, 1123, 0, 0x10039b0003031ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #3595 = VCVTDQ2PDZ128rr
21314 { 3626, 2, 1, 0, 1107, 0, 0x20016f0002031ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #3626 = VCVTDQ2PSZ128rr
21373 { 3685, 2, 1, 0, 88, 0, 0x2001cb0005031ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #3685 = VCVTNEPS2BF16Z128rr
21402 { 3714, 2, 1, 0, 1124, 0, 0x20079b0003831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #3714 = VCVTPD2DQZ128rr
21436 { 3748, 2, 1, 0, 1125, 0, 0x20056b0002831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #3748 = VCVTPD2PSZ128rr
21468 { 3780, 2, 1, 0, 1109, 0, 0x2005ef0002831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #3780 = VCVTPD2QQZ128rr
21498 { 3810, 2, 1, 0, 1124, 0, 0x2005e70002031ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #3810 = VCVTPD2UDQZ128rr
21528 { 3840, 2, 1, 0, 1109, 0, 0x2005e70002831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #3840 = VCVTPD2UQQZ128rr
21557 { 3869, 2, 1, 0, 383, 0, 0x10004f0004831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #3869 = VCVTPH2PSZ128rr
21585 { 3897, 2, 1, 0, 1112, 0, 0x20016f0002831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #3897 = VCVTPS2DQZ128rr
21619 { 3931, 2, 1, 0, 1126, 0, 0x10016b0002031ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #3931 = VCVTPS2PDZ128rr
21673 { 3985, 2, 1, 0, 1127, 0, 0x1001ef0002831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #3985 = VCVTPS2QQZ128rr
21703 { 4015, 2, 1, 0, 1112, 0, 0x2001e70002031ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #4015 = VCVTPS2UDQZ128rr
21733 { 4045, 2, 1, 0, 1127, 0, 0x1001e70002831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #4045 = VCVTPS2UQQZ128rr
21763 { 4075, 2, 1, 0, 1114, 0, 0x20079b0003031ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #4075 = VCVTQQ2PDZ128rr
21793 { 4105, 2, 1, 0, 1128, 0, 0x20056f0002031ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #4105 = VCVTQQ2PSZ128rr
21922 { 4234, 2, 1, 0, 1124, 0, 0x20079b0002831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #4234 = VCVTTPD2DQZ128rr
21954 { 4266, 2, 1, 0, 1109, 0, 0x2005eb0002831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #4266 = VCVTTPD2QQZ128rr
21984 { 4296, 2, 1, 0, 1124, 0, 0x2005e30002031ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #4296 = VCVTTPD2UDQZ128rr
22014 { 4326, 2, 1, 0, 1109, 0, 0x2005e30002831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #4326 = VCVTTPD2UQQZ128rr
22046 { 4358, 2, 1, 0, 1112, 0, 0x20016f0003031ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #4358 = VCVTTPS2DQZ128rr
22078 { 4390, 2, 1, 0, 1127, 0, 0x1001eb0002831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #4390 = VCVTTPS2QQZ128rr
22108 { 4420, 2, 1, 0, 1112, 0, 0x2001e30002031ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #4420 = VCVTTPS2UDQZ128rr
22138 { 4450, 2, 1, 0, 1127, 0, 0x1001e30002831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #4450 = VCVTTPS2UQQZ128rr
22224 { 4536, 2, 1, 0, 1123, 0, 0x1001eb0003031ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #4536 = VCVTUDQ2PDZ128rr
22251 { 4563, 2, 1, 0, 1107, 0, 0x2001eb0003831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #4563 = VCVTUDQ2PSZ128rr
22281 { 4593, 2, 1, 0, 1114, 0, 0x2005eb0003031ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #4593 = VCVTUQQ2PDZ128rr
22311 { 4623, 2, 1, 0, 1128, 0, 0x2005eb0003831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #4623 = VCVTUQQ2PSZ128rr
22534 { 4846, 2, 1, 0, 1120, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x200623c004831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #4846 = VEXPANDPDZ128rr
22552 { 4864, 2, 1, 0, 1120, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x200223c004831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #4864 = VEXPANDPSZ128rr
24571 { 6883, 2, 1, 0, 292, 0, 0x20050b8004831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #6883 = VGETEXPPDZ128r
24601 { 6913, 2, 1, 0, 292, 0, 0x20010b4004831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #6913 = VGETEXPPSZ128r
25272 { 7584, 2, 1, 0, 213, 0|(1ULL<<MCID::MoveReg), 0x2004a38002831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #7584 = VMOVAPDZ128rr
25273 { 7585, 2, 1, 0, 213, 0|(1ULL<<MCID::MoveReg), 0x2004a78002830ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #7585 = VMOVAPDZ128rr_REV
25313 { 7625, 2, 1, 0, 213, 0|(1ULL<<MCID::MoveReg), 0x2000a34002031ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #7625 = VMOVAPSZ128rr
25314 { 7626, 2, 1, 0, 213, 0|(1ULL<<MCID::MoveReg), 0x2000a74002030ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #7626 = VMOVAPSZ128rr_REV
25350 { 7662, 2, 1, 0, 173, 0, 0x20044b8003831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #7662 = VMOVDDUPZ128rr
25378 { 7690, 2, 1, 0, 190, 0|(1ULL<<MCID::MoveReg), 0x2001bfc002831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #7690 = VMOVDQA32Z128rr
25379 { 7691, 2, 1, 0, 190, 0|(1ULL<<MCID::MoveReg), 0x2001ffc002830ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #7691 = VMOVDQA32Z128rr_REV
25411 { 7723, 2, 1, 0, 190, 0|(1ULL<<MCID::MoveReg), 0x2005bfc002831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #7723 = VMOVDQA64Z128rr
25412 { 7724, 2, 1, 0, 190, 0|(1ULL<<MCID::MoveReg), 0x2005ffc002830ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #7724 = VMOVDQA64Z128rr_REV
25452 { 7764, 2, 1, 0, 190, 0|(1ULL<<MCID::MoveReg), 0x2005bfc003831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #7764 = VMOVDQU16Z128rr
25453 { 7765, 2, 1, 0, 190, 0|(1ULL<<MCID::MoveReg), 0x2005ffc003830ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #7765 = VMOVDQU16Z128rr_REV
25485 { 7797, 2, 1, 0, 190, 0|(1ULL<<MCID::MoveReg), 0x2001bfc003031ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #7797 = VMOVDQU32Z128rr
25486 { 7798, 2, 1, 0, 190, 0|(1ULL<<MCID::MoveReg), 0x2001ffc003030ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #7798 = VMOVDQU32Z128rr_REV
25518 { 7830, 2, 1, 0, 190, 0|(1ULL<<MCID::MoveReg), 0x2005bfc003031ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #7830 = VMOVDQU64Z128rr
25519 { 7831, 2, 1, 0, 190, 0|(1ULL<<MCID::MoveReg), 0x2005ffc003030ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #7831 = VMOVDQU64Z128rr_REV
25551 { 7863, 2, 1, 0, 190, 0|(1ULL<<MCID::MoveReg), 0x2001bfc003831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #7863 = VMOVDQU8Z128rr
25552 { 7864, 2, 1, 0, 190, 0|(1ULL<<MCID::MoveReg), 0x2001ffc003830ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #7864 = VMOVDQU8Z128rr_REV
25636 { 7948, 2, 1, 0, 174, 0, 0x20075bc002830ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #7948 = VMOVPQI2QIZrr
25669 { 7981, 2, 1, 0, 173, 0, 0x20005b4003031ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #7981 = VMOVSHDUPZ128rr
25691 { 8003, 2, 1, 0, 173, 0, 0x20004b4003031ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #8003 = VMOVSLDUPZ128rr
25736 { 8048, 2, 1, 0, 213, 0|(1ULL<<MCID::MoveReg), 0x2004438002831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #8048 = VMOVUPDZ128rr
25737 { 8049, 2, 1, 0, 213, 0|(1ULL<<MCID::MoveReg), 0x2004478002830ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #8049 = VMOVUPDZ128rr_REV
25777 { 8089, 2, 1, 0, 213, 0|(1ULL<<MCID::MoveReg), 0x2000434002031ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #8089 = VMOVUPSZ128rr
25778 { 8090, 2, 1, 0, 213, 0|(1ULL<<MCID::MoveReg), 0x2000474002030ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #8090 = VMOVUPSZ128rr_REV
25809 { 8121, 2, 1, 0, 174, 0, 0x2005fbc003031ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #8121 = VMOVZPQILo2PQIZrr
26021 { 8333, 2, 1, 0, 137, 0, 0x200073c004831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #8333 = VPABSBZ128rr
26046 { 8358, 2, 1, 0, 137, 0, 0x20007bc004831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #8358 = VPABSDZ128rr
26075 { 8387, 2, 1, 0, 137, 0, 0x20047fc004831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #8387 = VPABSQZ128rr
26101 { 8413, 2, 1, 0, 137, 0, 0x200077c004831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #8413 = VPABSWZ128rr
26707 { 9019, 2, 1, 0, 175, 0, 0x2001e3c004831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #9019 = VPBROADCASTBZ128r
26738 { 9050, 2, 1, 0, 175, 0, 0x200163c004831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #9050 = VPBROADCASTDZ128r
26775 { 9087, 2, 1, 0, 175, 0, 0x200567c004831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #9087 = VPBROADCASTQZ128r
26806 { 9118, 2, 1, 0, 175, 0, 0x2001e7c004831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #9118 = VPBROADCASTWZ128r
27136 { 9448, 2, 1, 0, 360, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20018fc004830ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #9448 = VPCOMPRESSBZ128rr
27151 { 9463, 2, 1, 0, 1138, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20022fc004830ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #9463 = VPCOMPRESSDZ128rr
27166 { 9478, 2, 1, 0, 1138, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20062fc004830ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #9478 = VPCOMPRESSQZ128rr
27181 { 9493, 2, 1, 0, 360, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20058fc004830ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #9493 = VPCOMPRESSWZ128rr
27212 { 9524, 2, 1, 0, 1256, 0, 0x200313c004831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #9524 = VPCONFLICTDZ128rr
27239 { 9551, 2, 1, 0, 1133, 0, 0x200713c004831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #9551 = VPCONFLICTQZ128rr
27955 { 10267, 2, 1, 0, 360, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20018bc004831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #10267 = VPEXPANDBZ128rr
27973 { 10285, 2, 1, 0, 1120, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x200227c004831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #10285 = VPEXPANDDZ128rr
27991 { 10303, 2, 1, 0, 1120, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x200627c004831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #10303 = VPEXPANDQZ128rr
28009 { 10321, 2, 1, 0, 360, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20058bc004831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #10321 = VPEXPANDWZ128rr
28140 { 10452, 2, 1, 0, 262, 0, 0x200113c004831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #10452 = VPLZCNTDZ128rr
28167 { 10479, 2, 1, 0, 262, 0, 0x200513c004831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #10479 = VPLZCNTQZ128rr
28734 { 11046, 2, 1, 0, 1121, 0, 0x800c7c005030ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #11046 = VPMOVDBZ128rr
28749 { 11061, 2, 1, 0, 1121, 0, 0x1000cfc005030ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #11061 = VPMOVDWZ128rr
28781 { 11093, 2, 1, 0, 1121, 0, 0x400cbc005030ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #11093 = VPMOVQBZ128rr
28796 { 11108, 2, 1, 0, 349, 0, 0x1000d7c005030ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #11108 = VPMOVQDZ128rr
28811 { 11123, 2, 1, 0, 1121, 0, 0x800d3c005030ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #11123 = VPMOVQWZ128rr
28826 { 11138, 2, 1, 0, 1121, 0, 0x80087c005030ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #11138 = VPMOVSDBZ128rr
28841 { 11153, 2, 1, 0, 1121, 0, 0x10008fc005030ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #11153 = VPMOVSDWZ128rr
28856 { 11168, 2, 1, 0, 1121, 0, 0x4008bc005030ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #11168 = VPMOVSQBZ128rr
28871 { 11183, 2, 1, 0, 1121, 0, 0x100097c005030ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #11183 = VPMOVSQDZ128rr
28886 { 11198, 2, 1, 0, 1121, 0, 0x80093c005030ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #11198 = VPMOVSQWZ128rr
28901 { 11213, 2, 1, 0, 1121, 0, 0x100083c005030ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #11213 = VPMOVSWBZ128rr
28919 { 11231, 2, 1, 0, 349, 0, 0x80087c004831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #11231 = VPMOVSXBDZ128rr
28941 { 11253, 2, 1, 0, 349, 0, 0x4008bc004831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #11253 = VPMOVSXBQZ128rr
28963 { 11275, 2, 1, 0, 349, 0, 0x100083c004831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #11275 = VPMOVSXBWZ128rr
28985 { 11297, 2, 1, 0, 349, 0, 0x100097c004831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #11297 = VPMOVSXDQZ128rr
29007 { 11319, 2, 1, 0, 349, 0, 0x10008fc004831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #11319 = VPMOVSXWDZ128rr
29029 { 11341, 2, 1, 0, 349, 0, 0x80093c004831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #11341 = VPMOVSXWQZ128rr
29048 { 11360, 2, 1, 0, 1121, 0, 0x80047c005030ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #11360 = VPMOVUSDBZ128rr
29063 { 11375, 2, 1, 0, 1121, 0, 0x10004fc005030ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #11375 = VPMOVUSDWZ128rr
29078 { 11390, 2, 1, 0, 1121, 0, 0x4004bc005030ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #11390 = VPMOVUSQBZ128rr
29093 { 11405, 2, 1, 0, 1121, 0, 0x100057c005030ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #11405 = VPMOVUSQDZ128rr
29108 { 11420, 2, 1, 0, 349, 0, 0x80053c005030ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #11420 = VPMOVUSQWZ128rr
29123 { 11435, 2, 1, 0, 1121, 0, 0x100043c005030ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #11435 = VPMOVUSWBZ128rr
29141 { 11453, 2, 1, 0, 1121, 0, 0x1000c3c005030ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #11453 = VPMOVWBZ128rr
29159 { 11471, 2, 1, 0, 349, 0, 0x800c7c004831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #11471 = VPMOVZXBDZ128rr
29181 { 11493, 2, 1, 0, 349, 0, 0x400cbc004831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #11493 = VPMOVZXBQZ128rr
29203 { 11515, 2, 1, 0, 349, 0, 0x1000c3c004831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #11515 = VPMOVZXBWZ128rr
29225 { 11537, 2, 1, 0, 349, 0, 0x1000d7c004831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #11537 = VPMOVZXDQZ128rr
29247 { 11559, 2, 1, 0, 349, 0, 0x1000cfc004831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #11559 = VPMOVZXWDZ128rr
29269 { 11581, 2, 1, 0, 349, 0, 0x800d3c004831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #11581 = VPMOVZXWQZ128rr
29524 { 11836, 2, 1, 0, 137, 0, 0x200153c004831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #11836 = VPOPCNTBZ128rr
29545 { 11857, 2, 1, 0, 137, 0, 0x200157c004831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #11857 = VPOPCNTDZ128rr
29572 { 11884, 2, 1, 0, 137, 0, 0x200557c004831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #11884 = VPOPCNTQZ128rr
29596 { 11908, 2, 1, 0, 137, 0, 0x200553c004831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #11908 = VPOPCNTWZ128rr
31780 { 14092, 2, 1, 0, 284, 0, 0x2005338004831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #14092 = VRCP14PDZ128r
31807 { 14119, 2, 1, 0, 284, 0, 0x2001334004831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #14119 = VRCP14PSZ128r
32072 { 14384, 2, 1, 0, 295, 0, 0x20053b8004831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #14384 = VRSQRT14PDZ128r
32099 { 14411, 2, 1, 0, 295, 0, 0x20013b4004831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #14411 = VRSQRT14PSZ128r
32422 { 14734, 2, 1, 0, 309, 0, 0x2005478002831ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #14734 = VSQRTPDZ128r
32456 { 14768, 2, 1, 0, 311, 0, 0x2001474002031ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #14768 = VSQRTPSZ128r
32622 { 14934, 2, 0, 0, 77, 0, 0x1004bb0002831ULL, nullptr, ImplicitList1, OperandInfo431, -1 ,nullptr }, // Inst #14934 = VUCOMISDZrr_Int
32623 { 14935, 2, 0, 0, 77, 0, 0x1104bb8022831ULL, nullptr, ImplicitList1, OperandInfo431, -1 ,nullptr }, // Inst #14935 = VUCOMISDZrrb
32631 { 14943, 2, 0, 0, 77, 0, 0x800bb0002031ULL, nullptr, ImplicitList1, OperandInfo431, -1 ,nullptr }, // Inst #14943 = VUCOMISSZrr_Int
32632 { 14944, 2, 0, 0, 77, 0, 0x900bb4022031ULL, nullptr, ImplicitList1, OperandInfo431, -1 ,nullptr }, // Inst #14944 = VUCOMISSZrrb