reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/X86/X86GenInstrInfo.inc
21046   { 3358,	4,	1,	0,	45,	0, 0x92d8066831ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #3358 = VBLENDVPDrr
21050   { 3362,	4,	1,	0,	45,	0, 0x9294066831ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #3362 = VBLENDVPSrr
23019   { 5331,	4,	1,	0,	420,	0|(1ULL<<MCID::Commutable), 0xda58066833ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #5331 = VFMADDPD4rr
23020   { 5332,	4,	1,	0,	420,	0, 0x9a58066831ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #5332 = VFMADDPD4rr_REV
23027   { 5339,	4,	1,	0,	420,	0|(1ULL<<MCID::Commutable), 0xda14066833ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #5339 = VFMADDPS4rr
23028   { 5340,	4,	1,	0,	420,	0, 0x9a14066831ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #5340 = VFMADDPS4rr_REV
23034   { 5346,	4,	1,	0,	426,	0, 0xdad8066833ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #5346 = VFMADDSD4rr_Int
23035   { 5347,	4,	1,	0,	426,	0, 0x9ad8066831ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #5347 = VFMADDSD4rr_Int_REV
23042   { 5354,	4,	1,	0,	426,	0, 0xda94066833ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #5354 = VFMADDSS4rr_Int
23043   { 5355,	4,	1,	0,	426,	0, 0x9a94066831ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #5355 = VFMADDSS4rr_Int_REV
23255   { 5567,	4,	1,	0,	420,	0|(1ULL<<MCID::Commutable), 0xd758066833ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #5567 = VFMADDSUBPD4rr
23256   { 5568,	4,	1,	0,	420,	0, 0x9758066831ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #5568 = VFMADDSUBPD4rr_REV
23263   { 5575,	4,	1,	0,	420,	0|(1ULL<<MCID::Commutable), 0xd714066833ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #5575 = VFMADDSUBPS4rr
23264   { 5576,	4,	1,	0,	420,	0, 0x9714066831ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #5576 = VFMADDSUBPS4rr_REV
23775   { 6087,	4,	1,	0,	420,	0|(1ULL<<MCID::Commutable), 0xd7d8066833ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #6087 = VFMSUBADDPD4rr
23776   { 6088,	4,	1,	0,	420,	0, 0x97d8066831ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #6088 = VFMSUBADDPD4rr_REV
23783   { 6095,	4,	1,	0,	420,	0|(1ULL<<MCID::Commutable), 0xd794066833ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #6095 = VFMSUBADDPS4rr
23784   { 6096,	4,	1,	0,	420,	0, 0x9794066831ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #6096 = VFMSUBADDPS4rr_REV
23791   { 6103,	4,	1,	0,	420,	0|(1ULL<<MCID::Commutable), 0xdb58066833ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #6103 = VFMSUBPD4rr
23792   { 6104,	4,	1,	0,	420,	0, 0x9b58066831ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #6104 = VFMSUBPD4rr_REV
23799   { 6111,	4,	1,	0,	420,	0|(1ULL<<MCID::Commutable), 0xdb14066833ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #6111 = VFMSUBPS4rr
23800   { 6112,	4,	1,	0,	420,	0, 0x9b14066831ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #6112 = VFMSUBPS4rr_REV
23806   { 6118,	4,	1,	0,	426,	0, 0xdbd8066833ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #6118 = VFMSUBSD4rr_Int
23807   { 6119,	4,	1,	0,	426,	0, 0x9bd8066831ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #6119 = VFMSUBSD4rr_Int_REV
23814   { 6126,	4,	1,	0,	426,	0, 0xdb94066833ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #6126 = VFMSUBSS4rr_Int
23815   { 6127,	4,	1,	0,	426,	0, 0x9b94066831ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #6127 = VFMSUBSS4rr_Int_REV
24123   { 6435,	4,	1,	0,	420,	0|(1ULL<<MCID::Commutable), 0xde58066833ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #6435 = VFNMADDPD4rr
24124   { 6436,	4,	1,	0,	420,	0, 0x9e58066831ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #6436 = VFNMADDPD4rr_REV
24131   { 6443,	4,	1,	0,	420,	0|(1ULL<<MCID::Commutable), 0xde14066833ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #6443 = VFNMADDPS4rr
24132   { 6444,	4,	1,	0,	420,	0, 0x9e14066831ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #6444 = VFNMADDPS4rr_REV
24138   { 6450,	4,	1,	0,	426,	0, 0xded8066833ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #6450 = VFNMADDSD4rr_Int
24139   { 6451,	4,	1,	0,	426,	0, 0x9ed8066831ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #6451 = VFNMADDSD4rr_Int_REV
24146   { 6458,	4,	1,	0,	426,	0, 0xde94066833ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #6458 = VFNMADDSS4rr_Int
24147   { 6459,	4,	1,	0,	426,	0, 0x9e94066831ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #6459 = VFNMADDSS4rr_Int_REV
24455   { 6767,	4,	1,	0,	420,	0|(1ULL<<MCID::Commutable), 0xdf58066833ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #6767 = VFNMSUBPD4rr
24456   { 6768,	4,	1,	0,	420,	0, 0x9f58066831ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #6768 = VFNMSUBPD4rr_REV
24463   { 6775,	4,	1,	0,	420,	0|(1ULL<<MCID::Commutable), 0xdf14066833ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #6775 = VFNMSUBPS4rr
24464   { 6776,	4,	1,	0,	420,	0, 0x9f14066831ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #6776 = VFNMSUBPS4rr_REV
24470   { 6782,	4,	1,	0,	426,	0, 0xdfd8066833ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #6782 = VFNMSUBSD4rr_Int
24471   { 6783,	4,	1,	0,	426,	0, 0x9fd8066831ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #6783 = VFNMSUBSD4rr_Int_REV
24478   { 6790,	4,	1,	0,	426,	0, 0xdf94066833ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #6790 = VFNMSUBSS4rr_Int
24479   { 6791,	4,	1,	0,	426,	0, 0x9f94066831ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #6791 = VFNMSUBSS4rr_Int_REV
26697   { 9009,	4,	1,	0,	242,	0, 0x931c066831ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #9009 = VPBLENDVBrr
26848   { 9160,	4,	1,	0,	239,	0, 0xa8ac068031ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #9160 = VPCMOVrrr
26849   { 9161,	4,	1,	0,	239,	0, 0xe8ac068033ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #9161 = VPCMOVrrr_REV
28189   { 10501,	4,	1,	0,	266,	0|(1ULL<<MCID::Commutable), 0xa7ac068031ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #10501 = VPMACSDDrr
28191   { 10503,	4,	1,	0,	1035,	0|(1ULL<<MCID::Commutable), 0xa7ec068031ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #10503 = VPMACSDQHrr
28193   { 10505,	4,	1,	0,	1035,	0|(1ULL<<MCID::Commutable), 0xa5ec068031ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #10505 = VPMACSDQLrr
28195   { 10507,	4,	1,	0,	266,	0|(1ULL<<MCID::Commutable), 0xa3ac068031ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #10507 = VPMACSSDDrr
28197   { 10509,	4,	1,	0,	1035,	0|(1ULL<<MCID::Commutable), 0xa3ec068031ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #10509 = VPMACSSDQHrr
28199   { 10511,	4,	1,	0,	1035,	0|(1ULL<<MCID::Commutable), 0xa1ec068031ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #10511 = VPMACSSDQLrr
28201   { 10513,	4,	1,	0,	262,	0|(1ULL<<MCID::Commutable), 0xa1ac068031ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #10513 = VPMACSSWDrr
28203   { 10515,	4,	1,	0,	262,	0|(1ULL<<MCID::Commutable), 0xa16c068031ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #10515 = VPMACSSWWrr
28205   { 10517,	4,	1,	0,	262,	0|(1ULL<<MCID::Commutable), 0xa5ac068031ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #10517 = VPMACSWDrr
28207   { 10519,	4,	1,	0,	262,	0|(1ULL<<MCID::Commutable), 0xa56c068031ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #10519 = VPMACSWWrr
28209   { 10521,	4,	1,	0,	262,	0|(1ULL<<MCID::Commutable), 0xa9ac068031ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #10521 = VPMADCSSWDrr
28211   { 10523,	4,	1,	0,	262,	0|(1ULL<<MCID::Commutable), 0xadac068031ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #10523 = VPMADCSWDrr
29671   { 11983,	4,	1,	0,	1037,	0, 0xa8ec068031ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #11983 = VPPERMrrr
29672   { 11984,	4,	1,	0,	1037,	0, 0xe8ec068033ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr },  // Inst #11984 = VPPERMrrr_REV