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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/X86/X86GenInstrInfo.inc21045 { 3357, 8, 1, 0, 347, 0|(1ULL<<MCID::MayLoad), 0x92d8066821ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #3357 = VBLENDVPDrm
21049 { 3361, 8, 1, 0, 347, 0|(1ULL<<MCID::MayLoad), 0x9294066821ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #3361 = VBLENDVPSrm
23017 { 5329, 8, 1, 0, 429, 0|(1ULL<<MCID::MayLoad), 0x9a58066821ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #5329 = VFMADDPD4mr
23025 { 5337, 8, 1, 0, 429, 0|(1ULL<<MCID::MayLoad), 0x9a14066821ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #5337 = VFMADDPS4mr
23030 { 5342, 8, 1, 0, 430, 0|(1ULL<<MCID::MayLoad), 0x9ad8066821ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #5342 = VFMADDSD4mr_Int
23038 { 5350, 8, 1, 0, 430, 0|(1ULL<<MCID::MayLoad), 0x9a94066821ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #5350 = VFMADDSS4mr_Int
23253 { 5565, 8, 1, 0, 429, 0|(1ULL<<MCID::MayLoad), 0x9758066821ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #5565 = VFMADDSUBPD4mr
23261 { 5573, 8, 1, 0, 429, 0|(1ULL<<MCID::MayLoad), 0x9714066821ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #5573 = VFMADDSUBPS4mr
23773 { 6085, 8, 1, 0, 429, 0|(1ULL<<MCID::MayLoad), 0x97d8066821ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #6085 = VFMSUBADDPD4mr
23781 { 6093, 8, 1, 0, 429, 0|(1ULL<<MCID::MayLoad), 0x9794066821ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #6093 = VFMSUBADDPS4mr
23789 { 6101, 8, 1, 0, 429, 0|(1ULL<<MCID::MayLoad), 0x9b58066821ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #6101 = VFMSUBPD4mr
23797 { 6109, 8, 1, 0, 429, 0|(1ULL<<MCID::MayLoad), 0x9b14066821ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #6109 = VFMSUBPS4mr
23802 { 6114, 8, 1, 0, 430, 0|(1ULL<<MCID::MayLoad), 0x9bd8066821ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #6114 = VFMSUBSD4mr_Int
23810 { 6122, 8, 1, 0, 430, 0|(1ULL<<MCID::MayLoad), 0x9b94066821ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #6122 = VFMSUBSS4mr_Int
24121 { 6433, 8, 1, 0, 429, 0|(1ULL<<MCID::MayLoad), 0x9e58066821ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #6433 = VFNMADDPD4mr
24129 { 6441, 8, 1, 0, 429, 0|(1ULL<<MCID::MayLoad), 0x9e14066821ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #6441 = VFNMADDPS4mr
24134 { 6446, 8, 1, 0, 430, 0|(1ULL<<MCID::MayLoad), 0x9ed8066821ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #6446 = VFNMADDSD4mr_Int
24142 { 6454, 8, 1, 0, 430, 0|(1ULL<<MCID::MayLoad), 0x9e94066821ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #6454 = VFNMADDSS4mr_Int
24453 { 6765, 8, 1, 0, 429, 0|(1ULL<<MCID::MayLoad), 0x9f58066821ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #6765 = VFNMSUBPD4mr
24461 { 6773, 8, 1, 0, 429, 0|(1ULL<<MCID::MayLoad), 0x9f14066821ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #6773 = VFNMSUBPS4mr
24466 { 6778, 8, 1, 0, 430, 0|(1ULL<<MCID::MayLoad), 0x9fd8066821ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #6778 = VFNMSUBSD4mr_Int
24474 { 6786, 8, 1, 0, 430, 0|(1ULL<<MCID::MayLoad), 0x9f94066821ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #6786 = VFNMSUBSS4mr_Int
26696 { 9008, 8, 1, 0, 489, 0|(1ULL<<MCID::MayLoad), 0x931c066821ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #9008 = VPBLENDVBrm
26846 { 9158, 8, 1, 0, 492, 0|(1ULL<<MCID::MayLoad), 0xa8ac068021ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #9158 = VPCMOVrmr
28188 { 10500, 8, 1, 0, 265, 0|(1ULL<<MCID::MayLoad), 0xa7ac068021ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #10500 = VPMACSDDrm
28190 { 10502, 8, 1, 0, 265, 0|(1ULL<<MCID::MayLoad), 0xa7ec068021ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #10502 = VPMACSDQHrm
28192 { 10504, 8, 1, 0, 265, 0|(1ULL<<MCID::MayLoad), 0xa5ec068021ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #10504 = VPMACSDQLrm
28194 { 10506, 8, 1, 0, 265, 0|(1ULL<<MCID::MayLoad), 0xa3ac068021ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #10506 = VPMACSSDDrm
28196 { 10508, 8, 1, 0, 265, 0|(1ULL<<MCID::MayLoad), 0xa3ec068021ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #10508 = VPMACSSDQHrm
28198 { 10510, 8, 1, 0, 265, 0|(1ULL<<MCID::MayLoad), 0xa1ec068021ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #10510 = VPMACSSDQLrm
28200 { 10512, 8, 1, 0, 261, 0|(1ULL<<MCID::MayLoad), 0xa1ac068021ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #10512 = VPMACSSWDrm
28202 { 10514, 8, 1, 0, 261, 0|(1ULL<<MCID::MayLoad), 0xa16c068021ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #10514 = VPMACSSWWrm
28204 { 10516, 8, 1, 0, 261, 0|(1ULL<<MCID::MayLoad), 0xa5ac068021ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #10516 = VPMACSWDrm
28206 { 10518, 8, 1, 0, 261, 0|(1ULL<<MCID::MayLoad), 0xa56c068021ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #10518 = VPMACSWWrm
28208 { 10520, 8, 1, 0, 261, 0|(1ULL<<MCID::MayLoad), 0xa9ac068021ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #10520 = VPMADCSSWDrm
28210 { 10522, 8, 1, 0, 261, 0|(1ULL<<MCID::MayLoad), 0xadac068021ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #10522 = VPMADCSWDrm
29669 { 11981, 8, 1, 0, 521, 0|(1ULL<<MCID::MayLoad), 0xa8ec068021ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #11981 = VPPERMrmr