|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/X86/X86GenInstrInfo.inc20685 { 2997, 3, 1, 0, 22, 0|(1ULL<<MCID::Commutable), 0x9618002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #2997 = VADDPDrr
20719 { 3031, 3, 1, 0, 24, 0|(1ULL<<MCID::Commutable), 0x9614002031ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #3031 = VADDPSrr
20734 { 3046, 3, 1, 0, 26, 0, 0x9618003831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #3046 = VADDSDrr_Int
20749 { 3061, 3, 1, 0, 28, 0, 0x9614003031ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #3061 = VADDSSrr_Int
20753 { 3065, 3, 1, 0, 22, 0, 0xb418002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #3065 = VADDSUBPDrr
20757 { 3069, 3, 1, 0, 24, 0, 0xb414003831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #3069 = VADDSUBPSrr
20767 { 3079, 3, 1, 0, 31, 0, 0xb7dc004831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #3079 = VAESDECLASTrr
20777 { 3089, 3, 1, 0, 31, 0, 0xb79c004831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #3089 = VAESDECrr
20787 { 3099, 3, 1, 0, 31, 0, 0xb75c004831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #3099 = VAESENCLASTrr
20797 { 3109, 3, 1, 0, 31, 0, 0xb71c004831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #3109 = VAESENCrr
20886 { 3198, 3, 1, 0, 1042, 0, 0x9558002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #3198 = VANDNPDrr
20917 { 3229, 3, 1, 0, 1042, 0, 0x9554002031ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #3229 = VANDNPSrr
20948 { 3260, 3, 1, 0, 37, 0|(1ULL<<MCID::Commutable), 0x9518002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #3260 = VANDPDrr
20979 { 3291, 3, 1, 0, 37, 0|(1ULL<<MCID::Commutable), 0x9514002031ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #3291 = VANDPSrr
21841 { 4153, 3, 1, 0, 868, 0, 0x9690003831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #4153 = VCVTSD2SSrr_Int
21897 { 4209, 3, 1, 0, 845, 0, 0x9690003031ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #4209 = VCVTSS2SDrr_Int
22405 { 4717, 3, 1, 0, 122, 0, 0x9798002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #4717 = VDIVPDrr
22439 { 4751, 3, 1, 0, 124, 0, 0x9794002031ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #4751 = VDIVPSrr
22454 { 4766, 3, 1, 0, 128, 0, 0x9798003831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #4766 = VDIVSDrr_Int
22469 { 4781, 3, 1, 0, 126, 0, 0x9794003031ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #4781 = VDIVSSrr_Int
24804 { 7116, 3, 1, 0, 137, 0|(1ULL<<MCID::Commutable), 0xb3dc004831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #7116 = VGF2P8MULBrr
24808 { 7120, 3, 1, 0, 143, 0, 0x9f18002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #7120 = VHADDPDrr
24812 { 7124, 3, 1, 0, 143, 0, 0x9f14003831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #7124 = VHADDPSrr
24816 { 7128, 3, 1, 0, 143, 0, 0x9f58002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #7128 = VHSUBPDrr
24820 { 7132, 3, 1, 0, 143, 0, 0x9f54003831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #7132 = VHSUBPSrr
24944 { 7256, 3, 1, 0, 68, 0|(1ULL<<MCID::Commutable), 0x97d8002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #7256 = VMAXCPDrr
24975 { 7287, 3, 1, 0, 70, 0|(1ULL<<MCID::Commutable), 0x97d4002031ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #7287 = VMAXCPSrr
25017 { 7329, 3, 1, 0, 68, 0, 0x97d8002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #7329 = VMAXPDrr
25051 { 7363, 3, 1, 0, 70, 0, 0x97d4002031ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #7363 = VMAXPSrr
25066 { 7378, 3, 1, 0, 72, 0, 0x97d8003831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #7378 = VMAXSDrr_Int
25081 { 7393, 3, 1, 0, 74, 0, 0x97d4003031ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #7393 = VMAXSSrr_Int
25115 { 7427, 3, 1, 0, 68, 0|(1ULL<<MCID::Commutable), 0x9758002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #7427 = VMINCPDrr
25146 { 7458, 3, 1, 0, 70, 0|(1ULL<<MCID::Commutable), 0x9754002031ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #7458 = VMINCPSrr
25188 { 7500, 3, 1, 0, 68, 0, 0x9758002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #7500 = VMINPDrr
25222 { 7534, 3, 1, 0, 70, 0, 0x9754002031ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #7534 = VMINPSrr
25237 { 7549, 3, 1, 0, 72, 0, 0x9758003831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #7549 = VMINSDrr_Int
25252 { 7564, 3, 1, 0, 74, 0, 0x9754003031ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #7564 = VMINSSrr_Int
25588 { 7900, 3, 1, 0, 173, 0|(1ULL<<MCID::Commutable), 0x8494002031ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #7900 = VMOVHLPSrr
25598 { 7910, 3, 1, 0, 173, 0, 0x8594002031ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #7910 = VMOVLHPSrr
25660 { 7972, 3, 1, 0, 173, 0|(1ULL<<MCID::Commutable), 0x8418003831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #7972 = VMOVSDrr
25661 { 7973, 3, 1, 0, 173, 0, 0x8450003830ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #7973 = VMOVSDrr_REV
25725 { 8037, 3, 1, 0, 173, 0|(1ULL<<MCID::Commutable), 0x8414003031ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #8037 = VMOVSSrr
25726 { 8038, 3, 1, 0, 173, 0, 0x8450003030ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #8038 = VMOVSSrr_REV
25859 { 8171, 3, 1, 0, 225, 0|(1ULL<<MCID::Commutable), 0x9658002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #8171 = VMULPDrr
25893 { 8205, 3, 1, 0, 227, 0|(1ULL<<MCID::Commutable), 0x9654002031ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #8205 = VMULPSrr
25908 { 8220, 3, 1, 0, 229, 0, 0x9658003831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #8220 = VMULSDrr_Int
25923 { 8235, 3, 1, 0, 231, 0, 0x9654003031ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #8235 = VMULSSrr_Int
25960 { 8272, 3, 1, 0, 37, 0|(1ULL<<MCID::Commutable), 0x9598002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #8272 = VORPDrr
25991 { 8303, 3, 1, 0, 37, 0|(1ULL<<MCID::Commutable), 0x9594002031ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #8303 = VORPSrr
26148 { 8460, 3, 1, 0, 239, 0, 0x9adc002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #8460 = VPACKSSDWrr
26170 { 8482, 3, 1, 0, 239, 0, 0x98dc002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #8482 = VPACKSSWBrr
26201 { 8513, 3, 1, 0, 239, 0, 0x8adc004831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #8513 = VPACKUSDWrr
26223 { 8535, 3, 1, 0, 239, 0, 0x99dc002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #8535 = VPACKUSWBrr
26245 { 8557, 3, 1, 0, 1058, 0|(1ULL<<MCID::Commutable), 0xbf1c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #8557 = VPADDBrr
26276 { 8588, 3, 1, 0, 1058, 0|(1ULL<<MCID::Commutable), 0xbf9c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #8588 = VPADDDrr
26307 { 8619, 3, 1, 0, 1058, 0|(1ULL<<MCID::Commutable), 0xb51c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #8619 = VPADDQrr
26329 { 8641, 3, 1, 0, 137, 0|(1ULL<<MCID::Commutable), 0xbb1c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #8641 = VPADDSBrr
26351 { 8663, 3, 1, 0, 137, 0|(1ULL<<MCID::Commutable), 0xbb5c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #8663 = VPADDSWrr
26373 { 8685, 3, 1, 0, 137, 0|(1ULL<<MCID::Commutable), 0xb71c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #8685 = VPADDUSBrr
26395 { 8707, 3, 1, 0, 137, 0|(1ULL<<MCID::Commutable), 0xb75c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #8707 = VPADDUSWrr
26417 { 8729, 3, 1, 0, 1058, 0|(1ULL<<MCID::Commutable), 0xbf5c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #8729 = VPADDWrr
26524 { 8836, 3, 1, 0, 1044, 0, 0xb7dc002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #8836 = VPANDNrr
26555 { 8867, 3, 1, 0, 174, 0|(1ULL<<MCID::Commutable), 0xb6dc002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #8867 = VPANDrr
26577 { 8889, 3, 1, 0, 137, 0|(1ULL<<MCID::Commutable), 0xb81c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #8889 = VPAVGBrr
26599 { 8911, 3, 1, 0, 137, 0|(1ULL<<MCID::Commutable), 0xb8dc002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #8911 = VPAVGWrr
26895 { 9207, 3, 1, 0, 137, 0|(1ULL<<MCID::Commutable), 0x9d1c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #9207 = VPCMPEQBrr
26917 { 9229, 3, 1, 0, 137, 0|(1ULL<<MCID::Commutable), 0x9d9c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #9229 = VPCMPEQDrr
26939 { 9251, 3, 1, 0, 137, 0|(1ULL<<MCID::Commutable), 0x8a5c004831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #9251 = VPCMPEQQrr
26955 { 9267, 3, 1, 0, 137, 0|(1ULL<<MCID::Commutable), 0x9d5c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #9267 = VPCMPEQWrr
26975 { 9287, 3, 1, 0, 1075, 0, 0x991c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #9287 = VPCMPGTBrr
26997 { 9309, 3, 1, 0, 1075, 0, 0x999c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #9309 = VPCMPGTDrr
27019 { 9331, 3, 1, 0, 790, 0, 0x8ddc004831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #9331 = VPCMPGTQrr
27035 { 9347, 3, 1, 0, 1075, 0, 0x995c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #9347 = VPCMPGTWrr
27631 { 9943, 3, 1, 0, 501, 0, 0x8358004831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #9943 = VPERMILPDrr
27693 { 10005, 3, 1, 0, 501, 0, 0x8314004831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #10005 = VPERMILPSrr
28073 { 10385, 3, 1, 0, 1038, 0, 0x809c004831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #10385 = VPHADDDrr
28077 { 10389, 3, 1, 0, 1062, 0, 0x80dc004831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #10389 = VPHADDSWrr
28097 { 10409, 3, 1, 0, 1038, 0, 0x805c004831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #10409 = VPHADDWrr
28107 { 10419, 3, 1, 0, 1038, 0, 0x819c004831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #10419 = VPHSUBDrr
28111 { 10423, 3, 1, 0, 1062, 0, 0x81dc004831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #10423 = VPHSUBSWrr
28117 { 10429, 3, 1, 0, 1038, 0, 0x815c004831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #10429 = VPHSUBWrr
28287 { 10599, 3, 1, 0, 262, 0, 0x811c004831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #10599 = VPMADDUBSWrr
28309 { 10621, 3, 1, 0, 262, 0|(1ULL<<MCID::Commutable), 0xbd5c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #10621 = VPMADDWDrr
28339 { 10651, 3, 1, 0, 137, 0|(1ULL<<MCID::Commutable), 0x8f1c004831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #10651 = VPMAXSBrr
28370 { 10682, 3, 1, 0, 137, 0|(1ULL<<MCID::Commutable), 0x8f5c004831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #10682 = VPMAXSDrr
28419 { 10731, 3, 1, 0, 137, 0|(1ULL<<MCID::Commutable), 0xbb9c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #10731 = VPMAXSWrr
28441 { 10753, 3, 1, 0, 137, 0|(1ULL<<MCID::Commutable), 0xb79c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #10753 = VPMAXUBrr
28472 { 10784, 3, 1, 0, 137, 0|(1ULL<<MCID::Commutable), 0x8fdc004831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #10784 = VPMAXUDrr
28521 { 10833, 3, 1, 0, 137, 0|(1ULL<<MCID::Commutable), 0x8f9c004831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #10833 = VPMAXUWrr
28543 { 10855, 3, 1, 0, 137, 0|(1ULL<<MCID::Commutable), 0x8e1c004831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #10855 = VPMINSBrr
28574 { 10886, 3, 1, 0, 137, 0|(1ULL<<MCID::Commutable), 0x8e5c004831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #10886 = VPMINSDrr
28623 { 10935, 3, 1, 0, 137, 0|(1ULL<<MCID::Commutable), 0xba9c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #10935 = VPMINSWrr
28645 { 10957, 3, 1, 0, 137, 0|(1ULL<<MCID::Commutable), 0xb69c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #10957 = VPMINUBrr
28676 { 10988, 3, 1, 0, 137, 0|(1ULL<<MCID::Commutable), 0x8edc004831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #10988 = VPMINUDrr
28725 { 11037, 3, 1, 0, 137, 0|(1ULL<<MCID::Commutable), 0x8e9c004831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #11037 = VPMINUWrr
29316 { 11628, 3, 1, 0, 262, 0|(1ULL<<MCID::Commutable), 0x8a1c004831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #11628 = VPMULDQrr
29338 { 11650, 3, 1, 0, 262, 0|(1ULL<<MCID::Commutable), 0x82dc004831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #11650 = VPMULHRSWrr
29360 { 11672, 3, 1, 0, 262, 0|(1ULL<<MCID::Commutable), 0xb91c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #11672 = VPMULHUWrr
29382 { 11694, 3, 1, 0, 262, 0|(1ULL<<MCID::Commutable), 0xb95c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #11694 = VPMULHWrr
29413 { 11725, 3, 1, 0, 266, 0|(1ULL<<MCID::Commutable), 0x901c004831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #11725 = VPMULLDrr
29462 { 11774, 3, 1, 0, 262, 0|(1ULL<<MCID::Commutable), 0xb55c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #11774 = VPMULLWrr
29520 { 11832, 3, 1, 0, 262, 0|(1ULL<<MCID::Commutable), 0xbd1c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #11832 = VPMULUDQrr
29668 { 11980, 3, 1, 0, 174, 0|(1ULL<<MCID::Commutable), 0xbadc002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #11980 = VPORrr
29893 { 12205, 3, 1, 0, 529, 0, 0x242c00a032ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #12205 = VPROTBrr
29894 { 12206, 3, 1, 0, 529, 0, 0xe42c00a031ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #12206 = VPROTBrr_REV
29899 { 12211, 3, 1, 0, 529, 0, 0x24ac00a032ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #12211 = VPROTDrr
29900 { 12212, 3, 1, 0, 529, 0, 0xe4ac00a031ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #12212 = VPROTDrr_REV
29905 { 12217, 3, 1, 0, 529, 0, 0x24ec00a032ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #12217 = VPROTQrr
29906 { 12218, 3, 1, 0, 529, 0, 0xe4ec00a031ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #12218 = VPROTQrr_REV
29911 { 12223, 3, 1, 0, 529, 0, 0x246c00a032ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #12223 = VPROTWrr
29912 { 12224, 3, 1, 0, 529, 0, 0xe46c00a031ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #12224 = VPROTWrr_REV
29922 { 12234, 3, 1, 0, 271, 0|(1ULL<<MCID::Commutable), 0xbd9c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #12234 = VPSADBWrr
29937 { 12249, 3, 1, 0, 529, 0, 0x262c00a032ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #12249 = VPSHABrr
29938 { 12250, 3, 1, 0, 529, 0, 0xe62c00a031ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #12250 = VPSHABrr_REV
29941 { 12253, 3, 1, 0, 529, 0, 0x26ac00a032ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #12253 = VPSHADrr
29942 { 12254, 3, 1, 0, 529, 0, 0xe6ac00a031ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #12254 = VPSHADrr_REV
29945 { 12257, 3, 1, 0, 529, 0, 0x26ec00a032ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #12257 = VPSHAQrr
29946 { 12258, 3, 1, 0, 529, 0, 0xe6ec00a031ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #12258 = VPSHAQrr_REV
29949 { 12261, 3, 1, 0, 529, 0, 0x266c00a032ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #12261 = VPSHAWrr
29950 { 12262, 3, 1, 0, 529, 0, 0xe66c00a031ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #12262 = VPSHAWrr_REV
29953 { 12265, 3, 1, 0, 529, 0, 0x252c00a032ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #12265 = VPSHLBrr
29954 { 12266, 3, 1, 0, 529, 0, 0xe52c00a031ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #12266 = VPSHLBrr_REV
30101 { 12413, 3, 1, 0, 529, 0, 0x25ac00a032ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #12413 = VPSHLDrr
30102 { 12414, 3, 1, 0, 529, 0, 0xe5ac00a031ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #12414 = VPSHLDrr_REV
30105 { 12417, 3, 1, 0, 529, 0, 0x25ec00a032ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #12417 = VPSHLQrr
30106 { 12418, 3, 1, 0, 529, 0, 0xe5ec00a031ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #12418 = VPSHLQrr_REV
30109 { 12421, 3, 1, 0, 529, 0, 0x256c00a032ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #12421 = VPSHLWrr
30110 { 12422, 3, 1, 0, 529, 0, 0xe56c00a031ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #12422 = VPSHLWrr_REV
30288 { 12600, 3, 1, 0, 273, 0, 0x801c004831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #12600 = VPSHUFBrr
30367 { 12679, 3, 1, 0, 137, 0, 0x821c004831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #12679 = VPSIGNBrr
30371 { 12683, 3, 1, 0, 137, 0, 0x829c004831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #12683 = VPSIGNDrr
30375 { 12687, 3, 1, 0, 137, 0, 0x825c004831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #12687 = VPSIGNWrr
30434 { 12746, 3, 1, 0, 276, 0, 0xbc9c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #12746 = VPSLLDrr
30485 { 12797, 3, 1, 0, 276, 0, 0xbcdc002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #12797 = VPSLLQrr
30516 { 12828, 3, 1, 0, 529, 0, 0x91dc004831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #12828 = VPSLLVDrr
30547 { 12859, 3, 1, 0, 814, 0, 0xd1dc004831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #12859 = VPSLLVQrr
30607 { 12919, 3, 1, 0, 276, 0, 0xbc5c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #12919 = VPSLLWrr
30658 { 12970, 3, 1, 0, 276, 0, 0xb89c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #12970 = VPSRADrr
30734 { 13046, 3, 1, 0, 529, 0, 0x919c004831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13046 = VPSRAVDrr
30821 { 13133, 3, 1, 0, 276, 0, 0xb85c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13133 = VPSRAWrr
30880 { 13192, 3, 1, 0, 276, 0, 0xb49c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13192 = VPSRLDrr
30931 { 13243, 3, 1, 0, 276, 0, 0xb4dc002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13243 = VPSRLQrr
30962 { 13274, 3, 1, 0, 529, 0, 0x915c004831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13274 = VPSRLVDrr
30993 { 13305, 3, 1, 0, 814, 0, 0xd15c004831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13305 = VPSRLVQrr
31053 { 13365, 3, 1, 0, 276, 0, 0xb45c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13365 = VPSRLWrr
31075 { 13387, 3, 1, 0, 788, 0, 0xbe1c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13387 = VPSUBBrr
31106 { 13418, 3, 1, 0, 788, 0, 0xbe9c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13418 = VPSUBDrr
31137 { 13449, 3, 1, 0, 788, 0, 0xbedc002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13449 = VPSUBQrr
31159 { 13471, 3, 1, 0, 1052, 0, 0xba1c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13471 = VPSUBSBrr
31181 { 13493, 3, 1, 0, 1052, 0, 0xba5c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13493 = VPSUBSWrr
31203 { 13515, 3, 1, 0, 1052, 0, 0xb61c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13515 = VPSUBUSBrr
31225 { 13537, 3, 1, 0, 1052, 0, 0xb65c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13537 = VPSUBUSWrr
31247 { 13559, 3, 1, 0, 788, 0, 0xbe5c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13559 = VPSUBWrr
31447 { 13759, 3, 1, 0, 239, 0, 0x9a1c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13759 = VPUNPCKHBWrr
31478 { 13790, 3, 1, 0, 239, 0, 0x9a9c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13790 = VPUNPCKHDQrr
31509 { 13821, 3, 1, 0, 239, 0, 0x9b5c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13821 = VPUNPCKHQDQrr
31531 { 13843, 3, 1, 0, 239, 0, 0x9a5c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13843 = VPUNPCKHWDrr
31553 { 13865, 3, 1, 0, 239, 0, 0x981c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13865 = VPUNPCKLBWrr
31584 { 13896, 3, 1, 0, 239, 0, 0x989c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13896 = VPUNPCKLDQrr
31615 { 13927, 3, 1, 0, 239, 0, 0x9b1c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13927 = VPUNPCKLQDQrr
31637 { 13949, 3, 1, 0, 239, 0, 0x985c002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #13949 = VPUNPCKLWDrr
31695 { 14007, 3, 1, 0, 787, 0|(1ULL<<MCID::Commutable), 0xbbdc002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #14007 = VPXORrr
31889 { 14201, 3, 1, 0, 287, 0, 0x94d4003031ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #14201 = VRCPSSr_Int
32181 { 14493, 3, 1, 0, 298, 0, 0x9494003031ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #14493 = VRSQRTSSr_Int
32496 { 14808, 3, 1, 0, 314, 0, 0x9458003831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #14808 = VSQRTSDr_Int
32511 { 14823, 3, 1, 0, 317, 0, 0x9454003031ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #14823 = VSQRTSSr_Int
32546 { 14858, 3, 1, 0, 22, 0, 0x9718002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #14858 = VSUBPDrr
32580 { 14892, 3, 1, 0, 24, 0, 0x9714002031ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #14892 = VSUBPSrr
32595 { 14907, 3, 1, 0, 26, 0, 0x9718003831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #14907 = VSUBSDrr_Int
32610 { 14922, 3, 1, 0, 28, 0, 0x9714003031ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #14922 = VSUBSSrr_Int
32667 { 14979, 3, 1, 0, 173, 0|(1ULL<<MCID::Commutable), 0x8558002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #14979 = VUNPCKHPDrr
32698 { 15010, 3, 1, 0, 173, 0, 0x8554002031ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #15010 = VUNPCKHPSrr
32729 { 15041, 3, 1, 0, 173, 0, 0x8518002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #15041 = VUNPCKLPDrr
32760 { 15072, 3, 1, 0, 173, 0, 0x8514002031ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #15072 = VUNPCKLPSrr
32791 { 15103, 3, 1, 0, 785, 0|(1ULL<<MCID::Commutable), 0x95d8002831ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #15103 = VXORPDrr
32822 { 15134, 3, 1, 0, 785, 0|(1ULL<<MCID::Commutable), 0x95d4002031ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #15134 = VXORPSrr