|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/X86/X86GenInstrInfo.inc20684 { 2996, 7, 1, 0, 21, 0|(1ULL<<MCID::MayLoad), 0x9618002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #2996 = VADDPDrm
20718 { 3030, 7, 1, 0, 23, 0|(1ULL<<MCID::MayLoad), 0x9614002021ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #3030 = VADDPSrm
20732 { 3044, 7, 1, 0, 25, 0|(1ULL<<MCID::MayLoad), 0x9618003821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #3044 = VADDSDrm_Int
20747 { 3059, 7, 1, 0, 27, 0|(1ULL<<MCID::MayLoad), 0x9614003021ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #3059 = VADDSSrm_Int
20752 { 3064, 7, 1, 0, 21, 0|(1ULL<<MCID::MayLoad), 0xb418002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #3064 = VADDSUBPDrm
20756 { 3068, 7, 1, 0, 23, 0|(1ULL<<MCID::MayLoad), 0xb414003821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #3068 = VADDSUBPSrm
20766 { 3078, 7, 1, 0, 30, 0|(1ULL<<MCID::MayLoad), 0xb7dc004821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #3078 = VAESDECLASTrm
20776 { 3088, 7, 1, 0, 30, 0|(1ULL<<MCID::MayLoad), 0xb79c004821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #3088 = VAESDECrm
20786 { 3098, 7, 1, 0, 30, 0|(1ULL<<MCID::MayLoad), 0xb75c004821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #3098 = VAESENCLASTrm
20796 { 3108, 7, 1, 0, 30, 0|(1ULL<<MCID::MayLoad), 0xb71c004821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #3108 = VAESENCrm
20885 { 3197, 7, 1, 0, 36, 0|(1ULL<<MCID::MayLoad), 0x9558002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #3197 = VANDNPDrm
20916 { 3228, 7, 1, 0, 36, 0|(1ULL<<MCID::MayLoad), 0x9554002021ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #3228 = VANDNPSrm
20947 { 3259, 7, 1, 0, 36, 0|(1ULL<<MCID::MayLoad), 0x9518002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #3259 = VANDPDrm
20978 { 3290, 7, 1, 0, 36, 0|(1ULL<<MCID::MayLoad), 0x9514002021ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #3290 = VANDPSrm
21839 { 4151, 7, 1, 0, 883, 0|(1ULL<<MCID::MayLoad), 0x9690003821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #4151 = VCVTSD2SSrm_Int
21853 { 4165, 7, 1, 0, 99, 0|(1ULL<<MCID::MayLoad), 0x8a90003821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #4165 = VCVTSI2SDrm_Int
21862 { 4174, 7, 1, 0, 103, 0|(1ULL<<MCID::MayLoad), 0x8a90003021ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #4174 = VCVTSI2SSrm_Int
21871 { 4183, 7, 1, 0, 99, 0|(1ULL<<MCID::MayLoad), 0xca90003821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #4183 = VCVTSI642SDrm_Int
21880 { 4192, 7, 1, 0, 103, 0|(1ULL<<MCID::MayLoad), 0xca90003021ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #4192 = VCVTSI642SSrm_Int
21895 { 4207, 7, 1, 0, 826, 0|(1ULL<<MCID::MayLoad), 0x9690003021ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #4207 = VCVTSS2SDrm_Int
22404 { 4716, 7, 1, 0, 121, 0|(1ULL<<MCID::MayLoad), 0x9798002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #4716 = VDIVPDrm
22438 { 4750, 7, 1, 0, 123, 0|(1ULL<<MCID::MayLoad), 0x9794002021ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #4750 = VDIVPSrm
22452 { 4764, 7, 1, 0, 127, 0|(1ULL<<MCID::MayLoad), 0x9798003821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #4764 = VDIVSDrm_Int
22467 { 4779, 7, 1, 0, 129, 0|(1ULL<<MCID::MayLoad), 0x9794003021ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #4779 = VDIVSSrm_Int
24803 { 7115, 7, 1, 0, 141, 0|(1ULL<<MCID::MayLoad), 0xb3dc004821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #7115 = VGF2P8MULBrm
24807 { 7119, 7, 1, 0, 142, 0|(1ULL<<MCID::MayLoad), 0x9f18002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #7119 = VHADDPDrm
24811 { 7123, 7, 1, 0, 142, 0|(1ULL<<MCID::MayLoad), 0x9f14003821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #7123 = VHADDPSrm
24815 { 7127, 7, 1, 0, 142, 0|(1ULL<<MCID::MayLoad), 0x9f58002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #7127 = VHSUBPDrm
24819 { 7131, 7, 1, 0, 142, 0|(1ULL<<MCID::MayLoad), 0x9f54003821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #7131 = VHSUBPSrm
24909 { 7221, 7, 1, 0, 451, 0|(1ULL<<MCID::MayLoad), 0x8b58004821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #7221 = VMASKMOVPDrm
24913 { 7225, 7, 1, 0, 451, 0|(1ULL<<MCID::MayLoad), 0x8b14004821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #7225 = VMASKMOVPSrm
24943 { 7255, 7, 1, 0, 67, 0|(1ULL<<MCID::MayLoad), 0x97d8002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #7255 = VMAXCPDrm
24974 { 7286, 7, 1, 0, 69, 0|(1ULL<<MCID::MayLoad), 0x97d4002021ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #7286 = VMAXCPSrm
25016 { 7328, 7, 1, 0, 67, 0|(1ULL<<MCID::MayLoad), 0x97d8002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #7328 = VMAXPDrm
25050 { 7362, 7, 1, 0, 69, 0|(1ULL<<MCID::MayLoad), 0x97d4002021ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #7362 = VMAXPSrm
25064 { 7376, 7, 1, 0, 71, 0|(1ULL<<MCID::MayLoad), 0x97d8003821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #7376 = VMAXSDrm_Int
25079 { 7391, 7, 1, 0, 73, 0|(1ULL<<MCID::MayLoad), 0x97d4003021ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #7391 = VMAXSSrm_Int
25114 { 7426, 7, 1, 0, 67, 0|(1ULL<<MCID::MayLoad), 0x9758002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #7426 = VMINCPDrm
25145 { 7457, 7, 1, 0, 69, 0|(1ULL<<MCID::MayLoad), 0x9754002021ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #7457 = VMINCPSrm
25187 { 7499, 7, 1, 0, 67, 0|(1ULL<<MCID::MayLoad), 0x9758002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #7499 = VMINPDrm
25221 { 7533, 7, 1, 0, 69, 0|(1ULL<<MCID::MayLoad), 0x9754002021ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #7533 = VMINPSrm
25235 { 7547, 7, 1, 0, 71, 0|(1ULL<<MCID::MayLoad), 0x9758003821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #7547 = VMINSDrm_Int
25250 { 7562, 7, 1, 0, 73, 0|(1ULL<<MCID::MayLoad), 0x9754003021ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #7562 = VMINSSrm_Int
25592 { 7904, 7, 1, 0, 795, 0|(1ULL<<MCID::MayLoad), 0x8598002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #7904 = VMOVHPDrm
25596 { 7908, 7, 1, 0, 795, 0|(1ULL<<MCID::MayLoad), 0x8594002021ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #7908 = VMOVHPSrm
25602 { 7914, 7, 1, 0, 795, 0|(1ULL<<MCID::MayLoad), 0x8498002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #7914 = VMOVLPDrm
25606 { 7918, 7, 1, 0, 795, 0|(1ULL<<MCID::MayLoad), 0x8494002021ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #7918 = VMOVLPSrm
25858 { 8170, 7, 1, 0, 224, 0|(1ULL<<MCID::MayLoad), 0x9658002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #8170 = VMULPDrm
25892 { 8204, 7, 1, 0, 226, 0|(1ULL<<MCID::MayLoad), 0x9654002021ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #8204 = VMULPSrm
25906 { 8218, 7, 1, 0, 228, 0|(1ULL<<MCID::MayLoad), 0x9658003821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #8218 = VMULSDrm_Int
25921 { 8233, 7, 1, 0, 230, 0|(1ULL<<MCID::MayLoad), 0x9654003021ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #8233 = VMULSSrm_Int
25959 { 8271, 7, 1, 0, 36, 0|(1ULL<<MCID::MayLoad), 0x9598002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #8271 = VORPDrm
25990 { 8302, 7, 1, 0, 36, 0|(1ULL<<MCID::MayLoad), 0x9594002021ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #8302 = VORPSrm
26147 { 8459, 7, 1, 0, 238, 0|(1ULL<<MCID::MayLoad), 0x9adc002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #8459 = VPACKSSDWrm
26169 { 8481, 7, 1, 0, 238, 0|(1ULL<<MCID::MayLoad), 0x98dc002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #8481 = VPACKSSWBrm
26200 { 8512, 7, 1, 0, 238, 0|(1ULL<<MCID::MayLoad), 0x8adc004821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #8512 = VPACKUSDWrm
26222 { 8534, 7, 1, 0, 238, 0|(1ULL<<MCID::MayLoad), 0x99dc002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #8534 = VPACKUSWBrm
26244 { 8556, 7, 1, 0, 1069, 0|(1ULL<<MCID::MayLoad), 0xbf1c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #8556 = VPADDBrm
26275 { 8587, 7, 1, 0, 1069, 0|(1ULL<<MCID::MayLoad), 0xbf9c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #8587 = VPADDDrm
26306 { 8618, 7, 1, 0, 1069, 0|(1ULL<<MCID::MayLoad), 0xb51c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #8618 = VPADDQrm
26328 { 8640, 7, 1, 0, 141, 0|(1ULL<<MCID::MayLoad), 0xbb1c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #8640 = VPADDSBrm
26350 { 8662, 7, 1, 0, 141, 0|(1ULL<<MCID::MayLoad), 0xbb5c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #8662 = VPADDSWrm
26372 { 8684, 7, 1, 0, 141, 0|(1ULL<<MCID::MayLoad), 0xb71c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #8684 = VPADDUSBrm
26394 { 8706, 7, 1, 0, 141, 0|(1ULL<<MCID::MayLoad), 0xb75c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #8706 = VPADDUSWrm
26416 { 8728, 7, 1, 0, 1069, 0|(1ULL<<MCID::MayLoad), 0xbf5c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #8728 = VPADDWrm
26523 { 8835, 7, 1, 0, 240, 0|(1ULL<<MCID::MayLoad), 0xb7dc002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #8835 = VPANDNrm
26554 { 8866, 7, 1, 0, 240, 0|(1ULL<<MCID::MayLoad), 0xb6dc002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #8866 = VPANDrm
26576 { 8888, 7, 1, 0, 141, 0|(1ULL<<MCID::MayLoad), 0xb81c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #8888 = VPAVGBrm
26598 { 8910, 7, 1, 0, 141, 0|(1ULL<<MCID::MayLoad), 0xb8dc002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #8910 = VPAVGWrm
26894 { 9206, 7, 1, 0, 141, 0|(1ULL<<MCID::MayLoad), 0x9d1c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #9206 = VPCMPEQBrm
26916 { 9228, 7, 1, 0, 141, 0|(1ULL<<MCID::MayLoad), 0x9d9c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #9228 = VPCMPEQDrm
26938 { 9250, 7, 1, 0, 141, 0|(1ULL<<MCID::MayLoad), 0x8a5c004821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #9250 = VPCMPEQQrm
26954 { 9266, 7, 1, 0, 141, 0|(1ULL<<MCID::MayLoad), 0x9d5c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #9266 = VPCMPEQWrm
26974 { 9286, 7, 1, 0, 141, 0|(1ULL<<MCID::MayLoad), 0x991c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #9286 = VPCMPGTBrm
26996 { 9308, 7, 1, 0, 141, 0|(1ULL<<MCID::MayLoad), 0x999c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #9308 = VPCMPGTDrm
27018 { 9330, 7, 1, 0, 774, 0|(1ULL<<MCID::MayLoad), 0x8ddc004821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #9330 = VPCMPGTQrm
27034 { 9346, 7, 1, 0, 141, 0|(1ULL<<MCID::MayLoad), 0x995c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #9346 = VPCMPGTWrm
27630 { 9942, 7, 1, 0, 503, 0|(1ULL<<MCID::MayLoad), 0x8358004821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #9942 = VPERMILPDrm
27692 { 10004, 7, 1, 0, 503, 0|(1ULL<<MCID::MayLoad), 0x8314004821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #10004 = VPERMILPSrm
28072 { 10384, 7, 1, 0, 1039, 0|(1ULL<<MCID::MayLoad), 0x809c004821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #10384 = VPHADDDrm
28076 { 10388, 7, 1, 0, 1072, 0|(1ULL<<MCID::MayLoad), 0x80dc004821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #10388 = VPHADDSWrm
28096 { 10408, 7, 1, 0, 1039, 0|(1ULL<<MCID::MayLoad), 0x805c004821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #10408 = VPHADDWrm
28106 { 10418, 7, 1, 0, 1039, 0|(1ULL<<MCID::MayLoad), 0x819c004821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #10418 = VPHSUBDrm
28110 { 10422, 7, 1, 0, 1072, 0|(1ULL<<MCID::MayLoad), 0x81dc004821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #10422 = VPHSUBSWrm
28116 { 10428, 7, 1, 0, 1039, 0|(1ULL<<MCID::MayLoad), 0x815c004821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #10428 = VPHSUBWrm
28286 { 10598, 7, 1, 0, 261, 0|(1ULL<<MCID::MayLoad), 0x811c004821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #10598 = VPMADDUBSWrm
28308 { 10620, 7, 1, 0, 261, 0|(1ULL<<MCID::MayLoad), 0xbd5c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #10620 = VPMADDWDrm
28313 { 10625, 7, 1, 0, 972, 0|(1ULL<<MCID::MayLoad), 0xa31c004821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #10625 = VPMASKMOVDrm
28317 { 10629, 7, 1, 0, 515, 0|(1ULL<<MCID::MayLoad), 0xe31c004821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #10629 = VPMASKMOVQrm
28338 { 10650, 7, 1, 0, 141, 0|(1ULL<<MCID::MayLoad), 0x8f1c004821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #10650 = VPMAXSBrm
28369 { 10681, 7, 1, 0, 141, 0|(1ULL<<MCID::MayLoad), 0x8f5c004821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #10681 = VPMAXSDrm
28418 { 10730, 7, 1, 0, 141, 0|(1ULL<<MCID::MayLoad), 0xbb9c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #10730 = VPMAXSWrm
28440 { 10752, 7, 1, 0, 141, 0|(1ULL<<MCID::MayLoad), 0xb79c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #10752 = VPMAXUBrm
28471 { 10783, 7, 1, 0, 141, 0|(1ULL<<MCID::MayLoad), 0x8fdc004821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #10783 = VPMAXUDrm
28520 { 10832, 7, 1, 0, 141, 0|(1ULL<<MCID::MayLoad), 0x8f9c004821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #10832 = VPMAXUWrm
28542 { 10854, 7, 1, 0, 141, 0|(1ULL<<MCID::MayLoad), 0x8e1c004821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #10854 = VPMINSBrm
28573 { 10885, 7, 1, 0, 141, 0|(1ULL<<MCID::MayLoad), 0x8e5c004821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #10885 = VPMINSDrm
28622 { 10934, 7, 1, 0, 141, 0|(1ULL<<MCID::MayLoad), 0xba9c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #10934 = VPMINSWrm
28644 { 10956, 7, 1, 0, 141, 0|(1ULL<<MCID::MayLoad), 0xb69c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #10956 = VPMINUBrm
28675 { 10987, 7, 1, 0, 141, 0|(1ULL<<MCID::MayLoad), 0x8edc004821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #10987 = VPMINUDrm
28724 { 11036, 7, 1, 0, 141, 0|(1ULL<<MCID::MayLoad), 0x8e9c004821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #11036 = VPMINUWrm
29315 { 11627, 7, 1, 0, 261, 0|(1ULL<<MCID::MayLoad), 0x8a1c004821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #11627 = VPMULDQrm
29337 { 11649, 7, 1, 0, 261, 0|(1ULL<<MCID::MayLoad), 0x82dc004821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #11649 = VPMULHRSWrm
29359 { 11671, 7, 1, 0, 261, 0|(1ULL<<MCID::MayLoad), 0xb91c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #11671 = VPMULHUWrm
29381 { 11693, 7, 1, 0, 261, 0|(1ULL<<MCID::MayLoad), 0xb95c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #11693 = VPMULHWrm
29412 { 11724, 7, 1, 0, 265, 0|(1ULL<<MCID::MayLoad), 0x901c004821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #11724 = VPMULLDrm
29461 { 11773, 7, 1, 0, 261, 0|(1ULL<<MCID::MayLoad), 0xb55c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #11773 = VPMULLWrm
29519 { 11831, 7, 1, 0, 261, 0|(1ULL<<MCID::MayLoad), 0xbd1c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #11831 = VPMULUDQrm
29667 { 11979, 7, 1, 0, 240, 0|(1ULL<<MCID::MayLoad), 0xbadc002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #11979 = VPORrm
29892 { 12204, 7, 1, 0, 528, 0|(1ULL<<MCID::MayLoad), 0xe42c00a021ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #12204 = VPROTBrm
29898 { 12210, 7, 1, 0, 528, 0|(1ULL<<MCID::MayLoad), 0xe4ac00a021ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #12210 = VPROTDrm
29904 { 12216, 7, 1, 0, 528, 0|(1ULL<<MCID::MayLoad), 0xe4ec00a021ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #12216 = VPROTQrm
29910 { 12222, 7, 1, 0, 528, 0|(1ULL<<MCID::MayLoad), 0xe46c00a021ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #12222 = VPROTWrm
29921 { 12233, 7, 1, 0, 270, 0|(1ULL<<MCID::MayLoad), 0xbd9c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #12233 = VPSADBWrm
29936 { 12248, 7, 1, 0, 528, 0|(1ULL<<MCID::MayLoad), 0xe62c00a021ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #12248 = VPSHABrm
29940 { 12252, 7, 1, 0, 528, 0|(1ULL<<MCID::MayLoad), 0xe6ac00a021ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #12252 = VPSHADrm
29944 { 12256, 7, 1, 0, 528, 0|(1ULL<<MCID::MayLoad), 0xe6ec00a021ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #12256 = VPSHAQrm
29948 { 12260, 7, 1, 0, 528, 0|(1ULL<<MCID::MayLoad), 0xe66c00a021ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #12260 = VPSHAWrm
29952 { 12264, 7, 1, 0, 528, 0|(1ULL<<MCID::MayLoad), 0xe52c00a021ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #12264 = VPSHLBrm
30100 { 12412, 7, 1, 0, 528, 0|(1ULL<<MCID::MayLoad), 0xe5ac00a021ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #12412 = VPSHLDrm
30104 { 12416, 7, 1, 0, 528, 0|(1ULL<<MCID::MayLoad), 0xe5ec00a021ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #12416 = VPSHLQrm
30108 { 12420, 7, 1, 0, 528, 0|(1ULL<<MCID::MayLoad), 0xe56c00a021ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #12420 = VPSHLWrm
30287 { 12599, 7, 1, 0, 272, 0|(1ULL<<MCID::MayLoad), 0x801c004821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #12599 = VPSHUFBrm
30366 { 12678, 7, 1, 0, 141, 0|(1ULL<<MCID::MayLoad), 0x821c004821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #12678 = VPSIGNBrm
30370 { 12682, 7, 1, 0, 141, 0|(1ULL<<MCID::MayLoad), 0x829c004821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #12682 = VPSIGNDrm
30374 { 12686, 7, 1, 0, 141, 0|(1ULL<<MCID::MayLoad), 0x825c004821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #12686 = VPSIGNWrm
30433 { 12745, 7, 1, 0, 275, 0|(1ULL<<MCID::MayLoad), 0xbc9c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #12745 = VPSLLDrm
30484 { 12796, 7, 1, 0, 275, 0|(1ULL<<MCID::MayLoad), 0xbcdc002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #12796 = VPSLLQrm
30515 { 12827, 7, 1, 0, 528, 0|(1ULL<<MCID::MayLoad), 0x91dc004821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #12827 = VPSLLVDrm
30546 { 12858, 7, 1, 0, 824, 0|(1ULL<<MCID::MayLoad), 0xd1dc004821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #12858 = VPSLLVQrm
30606 { 12918, 7, 1, 0, 275, 0|(1ULL<<MCID::MayLoad), 0xbc5c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #12918 = VPSLLWrm
30657 { 12969, 7, 1, 0, 275, 0|(1ULL<<MCID::MayLoad), 0xb89c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #12969 = VPSRADrm
30733 { 13045, 7, 1, 0, 528, 0|(1ULL<<MCID::MayLoad), 0x919c004821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #13045 = VPSRAVDrm
30820 { 13132, 7, 1, 0, 275, 0|(1ULL<<MCID::MayLoad), 0xb85c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #13132 = VPSRAWrm
30879 { 13191, 7, 1, 0, 275, 0|(1ULL<<MCID::MayLoad), 0xb49c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #13191 = VPSRLDrm
30930 { 13242, 7, 1, 0, 275, 0|(1ULL<<MCID::MayLoad), 0xb4dc002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #13242 = VPSRLQrm
30961 { 13273, 7, 1, 0, 528, 0|(1ULL<<MCID::MayLoad), 0x915c004821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #13273 = VPSRLVDrm
30992 { 13304, 7, 1, 0, 824, 0|(1ULL<<MCID::MayLoad), 0xd15c004821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #13304 = VPSRLVQrm
31052 { 13364, 7, 1, 0, 275, 0|(1ULL<<MCID::MayLoad), 0xb45c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #13364 = VPSRLWrm
31074 { 13386, 7, 1, 0, 1069, 0|(1ULL<<MCID::MayLoad), 0xbe1c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #13386 = VPSUBBrm
31105 { 13417, 7, 1, 0, 1069, 0|(1ULL<<MCID::MayLoad), 0xbe9c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #13417 = VPSUBDrm
31136 { 13448, 7, 1, 0, 1069, 0|(1ULL<<MCID::MayLoad), 0xbedc002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #13448 = VPSUBQrm
31158 { 13470, 7, 1, 0, 141, 0|(1ULL<<MCID::MayLoad), 0xba1c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #13470 = VPSUBSBrm
31180 { 13492, 7, 1, 0, 141, 0|(1ULL<<MCID::MayLoad), 0xba5c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #13492 = VPSUBSWrm
31202 { 13514, 7, 1, 0, 141, 0|(1ULL<<MCID::MayLoad), 0xb61c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #13514 = VPSUBUSBrm
31224 { 13536, 7, 1, 0, 141, 0|(1ULL<<MCID::MayLoad), 0xb65c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #13536 = VPSUBUSWrm
31246 { 13558, 7, 1, 0, 1069, 0|(1ULL<<MCID::MayLoad), 0xbe5c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #13558 = VPSUBWrm
31446 { 13758, 7, 1, 0, 238, 0|(1ULL<<MCID::MayLoad), 0x9a1c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #13758 = VPUNPCKHBWrm
31477 { 13789, 7, 1, 0, 238, 0|(1ULL<<MCID::MayLoad), 0x9a9c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #13789 = VPUNPCKHDQrm
31508 { 13820, 7, 1, 0, 238, 0|(1ULL<<MCID::MayLoad), 0x9b5c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #13820 = VPUNPCKHQDQrm
31530 { 13842, 7, 1, 0, 238, 0|(1ULL<<MCID::MayLoad), 0x9a5c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #13842 = VPUNPCKHWDrm
31552 { 13864, 7, 1, 0, 238, 0|(1ULL<<MCID::MayLoad), 0x981c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #13864 = VPUNPCKLBWrm
31583 { 13895, 7, 1, 0, 238, 0|(1ULL<<MCID::MayLoad), 0x989c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #13895 = VPUNPCKLDQrm
31614 { 13926, 7, 1, 0, 238, 0|(1ULL<<MCID::MayLoad), 0x9b1c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #13926 = VPUNPCKLQDQrm
31636 { 13948, 7, 1, 0, 238, 0|(1ULL<<MCID::MayLoad), 0x985c002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #13948 = VPUNPCKLWDrm
31694 { 14006, 7, 1, 0, 240, 0|(1ULL<<MCID::MayLoad), 0xbbdc002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #14006 = VPXORrm
31887 { 14199, 7, 1, 0, 286, 0|(1ULL<<MCID::MayLoad), 0x94d4003021ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #14199 = VRCPSSm_Int
32179 { 14491, 7, 1, 0, 297, 0|(1ULL<<MCID::MayLoad), 0x9494003021ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #14491 = VRSQRTSSm_Int
32494 { 14806, 7, 1, 0, 313, 0|(1ULL<<MCID::MayLoad), 0x9458003821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #14806 = VSQRTSDm_Int
32509 { 14821, 7, 1, 0, 316, 0|(1ULL<<MCID::MayLoad), 0x9454003021ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #14821 = VSQRTSSm_Int
32545 { 14857, 7, 1, 0, 21, 0|(1ULL<<MCID::MayLoad), 0x9718002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #14857 = VSUBPDrm
32579 { 14891, 7, 1, 0, 23, 0|(1ULL<<MCID::MayLoad), 0x9714002021ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #14891 = VSUBPSrm
32593 { 14905, 7, 1, 0, 25, 0|(1ULL<<MCID::MayLoad), 0x9718003821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #14905 = VSUBSDrm_Int
32608 { 14920, 7, 1, 0, 27, 0|(1ULL<<MCID::MayLoad), 0x9714003021ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #14920 = VSUBSSrm_Int
32666 { 14978, 7, 1, 0, 172, 0|(1ULL<<MCID::MayLoad), 0x8558002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #14978 = VUNPCKHPDrm
32697 { 15009, 7, 1, 0, 172, 0|(1ULL<<MCID::MayLoad), 0x8554002021ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #15009 = VUNPCKHPSrm
32728 { 15040, 7, 1, 0, 172, 0|(1ULL<<MCID::MayLoad), 0x8518002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #15040 = VUNPCKLPDrm
32759 { 15071, 7, 1, 0, 172, 0|(1ULL<<MCID::MayLoad), 0x8514002021ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #15071 = VUNPCKLPSrm
32790 { 15102, 7, 1, 0, 36, 0|(1ULL<<MCID::MayLoad), 0x95d8002821ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #15102 = VXORPDrm
32821 { 15133, 7, 1, 0, 36, 0|(1ULL<<MCID::MayLoad), 0x95d4002021ULL, nullptr, nullptr, OperandInfo350, -1 ,nullptr }, // Inst #15133 = VXORPSrm