|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/X86/X86GenInstrInfo.inc20660 { 2972, 3, 1, 0, 22, 0|(1ULL<<MCID::Commutable), 0x200d638002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #2972 = VADDPDZ128rr
20694 { 3006, 3, 1, 0, 24, 0|(1ULL<<MCID::Commutable), 0x2009634002031ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #3006 = VADDPSZ128rr
20725 { 3037, 3, 1, 0, 26, 0, 0x100d638003831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #3037 = VADDSDZrr_Int
20740 { 3052, 3, 1, 0, 28, 0, 0x809634003031ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #3052 = VADDSSZrr_Int
20761 { 3073, 3, 1, 0, 31, 0, 0x200b7fc004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #3073 = VAESDECLASTZ128rr
20771 { 3083, 3, 1, 0, 31, 0, 0x200b7bc004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #3083 = VAESDECZ128rr
20781 { 3093, 3, 1, 0, 31, 0, 0x200b77c004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #3093 = VAESENCLASTZ128rr
20791 { 3103, 3, 1, 0, 31, 0, 0x200b73c004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #3103 = VAESENCZ128rr
20864 { 3176, 3, 1, 0, 37, 0, 0x200d578002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #3176 = VANDNPDZ128rr
20895 { 3207, 3, 1, 0, 37, 0, 0x2009574002031ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #3207 = VANDNPSZ128rr
20926 { 3238, 3, 1, 0, 37, 0|(1ULL<<MCID::Commutable), 0x200d538002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #3238 = VANDPDZ128rr
20957 { 3269, 3, 1, 0, 37, 0|(1ULL<<MCID::Commutable), 0x2009534002031ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #3269 = VANDPSZ128rr
20987 { 3299, 3, 1, 0, 1080, 0, 0x200d978004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #3299 = VBLENDMPDZ128rr
21014 { 3326, 3, 1, 0, 1080, 0, 0x2009974004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #3326 = VBLENDMPSZ128rr
21346 { 3658, 3, 1, 0, 88, 0, 0x2009cbc005831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #3658 = VCVTNE2PS2BF16Z128rr
21832 { 4144, 3, 1, 0, 1129, 0, 0x100d6b0003831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #4144 = VCVTSD2SSZrr_Int
21888 { 4200, 3, 1, 0, 1132, 0, 0x8096b0003031ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #4200 = VCVTSS2SDZrr_Int
21891 { 4203, 3, 1, 0, 1132, 0, 0x9096b0003031ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #4203 = VCVTSS2SDZrrb_Int
22380 { 4692, 3, 1, 0, 122, 0, 0x200d7b8002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #4692 = VDIVPDZ128rr
22414 { 4726, 3, 1, 0, 124, 0, 0x20097b4002031ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #4726 = VDIVPSZ128rr
22445 { 4757, 3, 1, 0, 128, 0, 0x100d7b8003831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #4757 = VDIVSDZrr_Int
22460 { 4772, 3, 1, 0, 126, 0, 0x8097b4003031ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #4772 = VDIVSSZrr_Int
24628 { 6940, 3, 1, 0, 292, 0, 0x100d0f8004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #6940 = VGETEXPSDZr
24629 { 6941, 3, 1, 0, 292, 0, 0x110d0f8004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #6941 = VGETEXPSDZrb
24637 { 6949, 3, 1, 0, 292, 0, 0x8090f4004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #6949 = VGETEXPSSZr
24638 { 6950, 3, 1, 0, 292, 0, 0x9090f4004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #6950 = VGETEXPSSZrb
24788 { 7100, 3, 1, 0, 137, 0|(1ULL<<MCID::Commutable), 0x200b3fc004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #7100 = VGF2P8MULBZ128rr
24922 { 7234, 3, 1, 0, 68, 0|(1ULL<<MCID::Commutable), 0x200d7f8002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #7234 = VMAXCPDZ128rr
24953 { 7265, 3, 1, 0, 70, 0|(1ULL<<MCID::Commutable), 0x20097f4002031ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #7265 = VMAXCPSZ128rr
24992 { 7304, 3, 1, 0, 68, 0, 0x200d7f8002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #7304 = VMAXPDZ128rr
25026 { 7338, 3, 1, 0, 70, 0, 0x20097f4002031ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #7338 = VMAXPSZ128rr
25057 { 7369, 3, 1, 0, 72, 0, 0x100d7f8003831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #7369 = VMAXSDZrr_Int
25060 { 7372, 3, 1, 0, 72, 0, 0x110d7f8003831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #7372 = VMAXSDZrrb_Int
25072 { 7384, 3, 1, 0, 74, 0, 0x8097f4003031ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #7384 = VMAXSSZrr_Int
25075 { 7387, 3, 1, 0, 74, 0, 0x9097f4003031ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #7387 = VMAXSSZrrb_Int
25093 { 7405, 3, 1, 0, 68, 0|(1ULL<<MCID::Commutable), 0x200d778002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #7405 = VMINCPDZ128rr
25124 { 7436, 3, 1, 0, 70, 0|(1ULL<<MCID::Commutable), 0x2009774002031ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #7436 = VMINCPSZ128rr
25163 { 7475, 3, 1, 0, 68, 0, 0x200d778002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #7475 = VMINPDZ128rr
25197 { 7509, 3, 1, 0, 70, 0, 0x2009774002031ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #7509 = VMINPSZ128rr
25228 { 7540, 3, 1, 0, 72, 0, 0x100d778003831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #7540 = VMINSDZrr_Int
25231 { 7543, 3, 1, 0, 72, 0, 0x110d778003831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #7543 = VMINSDZrrb_Int
25243 { 7555, 3, 1, 0, 74, 0, 0x809774003031ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #7555 = VMINSSZrr_Int
25246 { 7558, 3, 1, 0, 74, 0, 0x909774003031ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #7558 = VMINSSZrrb_Int
25587 { 7899, 3, 1, 0, 173, 0|(1ULL<<MCID::Commutable), 0x20084b4002031ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #7899 = VMOVHLPSZrr
25597 { 7909, 3, 1, 0, 173, 0, 0x20085b4002031ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #7909 = VMOVLHPSZrr
25651 { 7963, 3, 1, 0, 173, 0, 0x100c438003831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #7963 = VMOVSDZrr
25652 { 7964, 3, 1, 0, 173, 0, 0x200c470003830ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #7964 = VMOVSDZrr_REV
25716 { 8028, 3, 1, 0, 173, 0, 0x808434003031ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #8028 = VMOVSSZrr
25717 { 8029, 3, 1, 0, 173, 0, 0x2008470003030ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #8029 = VMOVSSZrr_REV
25834 { 8146, 3, 1, 0, 225, 0|(1ULL<<MCID::Commutable), 0x200d678002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #8146 = VMULPDZ128rr
25868 { 8180, 3, 1, 0, 227, 0|(1ULL<<MCID::Commutable), 0x2009674002031ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #8180 = VMULPSZ128rr
25899 { 8211, 3, 1, 0, 229, 0, 0x100d678003831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #8211 = VMULSDZrr_Int
25914 { 8226, 3, 1, 0, 231, 0, 0x809674003031ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #8226 = VMULSSZrr_Int
25938 { 8250, 3, 1, 0, 37, 0|(1ULL<<MCID::Commutable), 0x200d5b8002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #8250 = VORPDZ128rr
25969 { 8281, 3, 1, 0, 37, 0|(1ULL<<MCID::Commutable), 0x20095b4002031ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #8281 = VORPSZ128rr
26126 { 8438, 3, 1, 0, 239, 0, 0x2009afc002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #8438 = VPACKSSDWZ128rr
26154 { 8466, 3, 1, 0, 239, 0, 0x20098fc002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #8466 = VPACKSSWBZ128rr
26179 { 8491, 3, 1, 0, 239, 0, 0x2008afc004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #8491 = VPACKUSDWZ128rr
26207 { 8519, 3, 1, 0, 239, 0, 0x20099fc002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #8519 = VPACKUSWBZ128rr
26229 { 8541, 3, 1, 0, 1082, 0|(1ULL<<MCID::Commutable), 0x200bf3c002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #8541 = VPADDBZ128rr
26254 { 8566, 3, 1, 0, 1082, 0|(1ULL<<MCID::Commutable), 0x200bfbc002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #8566 = VPADDDZ128rr
26285 { 8597, 3, 1, 0, 1082, 0|(1ULL<<MCID::Commutable), 0x200f53c002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #8597 = VPADDQZ128rr
26313 { 8625, 3, 1, 0, 137, 0|(1ULL<<MCID::Commutable), 0x200bb3c002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #8625 = VPADDSBZ128rr
26335 { 8647, 3, 1, 0, 137, 0|(1ULL<<MCID::Commutable), 0x200bb7c002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #8647 = VPADDSWZ128rr
26357 { 8669, 3, 1, 0, 137, 0|(1ULL<<MCID::Commutable), 0x200b73c002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #8669 = VPADDUSBZ128rr
26379 { 8691, 3, 1, 0, 137, 0|(1ULL<<MCID::Commutable), 0x200b77c002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #8691 = VPADDUSWZ128rr
26401 { 8713, 3, 1, 0, 1082, 0|(1ULL<<MCID::Commutable), 0x200bf7c002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #8713 = VPADDWZ128rr
26446 { 8758, 3, 1, 0, 174, 0|(1ULL<<MCID::Commutable), 0x200b6fc002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #8758 = VPANDDZ128rr
26473 { 8785, 3, 1, 0, 174, 0, 0x200b7fc002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #8785 = VPANDNDZ128rr
26500 { 8812, 3, 1, 0, 174, 0, 0x200f7fc002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #8812 = VPANDNQZ128rr
26531 { 8843, 3, 1, 0, 174, 0|(1ULL<<MCID::Commutable), 0x200f6fc002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #8843 = VPANDQZ128rr
26561 { 8873, 3, 1, 0, 137, 0|(1ULL<<MCID::Commutable), 0x200b83c002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #8873 = VPAVGBZ128rr
26583 { 8895, 3, 1, 0, 137, 0|(1ULL<<MCID::Commutable), 0x200b8fc002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #8895 = VPAVGWZ128rr
26607 { 8919, 3, 1, 0, 1085, 0, 0x20099bc004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #8919 = VPBLENDMBZ128rr
26628 { 8940, 3, 1, 0, 1085, 0, 0x200993c004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #8940 = VPBLENDMDZ128rr
26655 { 8967, 3, 1, 0, 1085, 0, 0x200d93c004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #8967 = VPBLENDMQZ128rr
26679 { 8991, 3, 1, 0, 1085, 0, 0x200d9bc004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #8991 = VPBLENDMWZ128rr
27375 { 9687, 3, 1, 0, 360, 0, 0x200a37c004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #9687 = VPERMBZ128rr
27589 { 9901, 3, 1, 0, 501, 0, 0x200c378004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #9901 = VPERMILPDZ128rr
27651 { 9963, 3, 1, 0, 501, 0, 0x2008334004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #9963 = VPERMILPSZ128rr
27937 { 10249, 3, 1, 0, 1138, 0, 0x200e37c004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #10249 = VPERMWZ128rr
28271 { 10583, 3, 1, 0, 262, 0, 0x200813c004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #10583 = VPMADDUBSWZ128rr
28293 { 10605, 3, 1, 0, 262, 0|(1ULL<<MCID::Commutable), 0x200bd7c002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #10605 = VPMADDWDZ128rr
28323 { 10635, 3, 1, 0, 137, 0|(1ULL<<MCID::Commutable), 0x2008f3c004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #10635 = VPMAXSBZ128rr
28348 { 10660, 3, 1, 0, 137, 0|(1ULL<<MCID::Commutable), 0x2008f7c004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #10660 = VPMAXSDZ128rr
28377 { 10689, 3, 1, 0, 1102, 0|(1ULL<<MCID::Commutable), 0x200cf7c004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #10689 = VPMAXSQZ128rr
28403 { 10715, 3, 1, 0, 137, 0|(1ULL<<MCID::Commutable), 0x200bbbc002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #10715 = VPMAXSWZ128rr
28425 { 10737, 3, 1, 0, 137, 0|(1ULL<<MCID::Commutable), 0x200b7bc002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #10737 = VPMAXUBZ128rr
28450 { 10762, 3, 1, 0, 137, 0|(1ULL<<MCID::Commutable), 0x2008ffc004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #10762 = VPMAXUDZ128rr
28479 { 10791, 3, 1, 0, 1102, 0|(1ULL<<MCID::Commutable), 0x200cffc004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #10791 = VPMAXUQZ128rr
28505 { 10817, 3, 1, 0, 137, 0|(1ULL<<MCID::Commutable), 0x2008fbc004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #10817 = VPMAXUWZ128rr
28527 { 10839, 3, 1, 0, 137, 0|(1ULL<<MCID::Commutable), 0x2008e3c004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #10839 = VPMINSBZ128rr
28552 { 10864, 3, 1, 0, 137, 0|(1ULL<<MCID::Commutable), 0x2008e7c004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #10864 = VPMINSDZ128rr
28581 { 10893, 3, 1, 0, 1102, 0|(1ULL<<MCID::Commutable), 0x200ce7c004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #10893 = VPMINSQZ128rr
28607 { 10919, 3, 1, 0, 137, 0|(1ULL<<MCID::Commutable), 0x200babc002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #10919 = VPMINSWZ128rr
28629 { 10941, 3, 1, 0, 137, 0|(1ULL<<MCID::Commutable), 0x200b6bc002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #10941 = VPMINUBZ128rr
28654 { 10966, 3, 1, 0, 137, 0|(1ULL<<MCID::Commutable), 0x2008efc004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #10966 = VPMINUDZ128rr
28683 { 10995, 3, 1, 0, 1102, 0|(1ULL<<MCID::Commutable), 0x200cefc004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #10995 = VPMINUQZ128rr
28709 { 11021, 3, 1, 0, 137, 0|(1ULL<<MCID::Commutable), 0x2008ebc004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #11021 = VPMINUWZ128rr
29294 { 11606, 3, 1, 0, 262, 0|(1ULL<<MCID::Commutable), 0x200ca3c004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #11606 = VPMULDQZ128rr
29322 { 11634, 3, 1, 0, 262, 0|(1ULL<<MCID::Commutable), 0x20082fc004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #11634 = VPMULHRSWZ128rr
29344 { 11656, 3, 1, 0, 262, 0|(1ULL<<MCID::Commutable), 0x200b93c002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #11656 = VPMULHUWZ128rr
29366 { 11678, 3, 1, 0, 262, 0|(1ULL<<MCID::Commutable), 0x200b97c002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #11678 = VPMULHWZ128rr
29391 { 11703, 3, 1, 0, 266, 0|(1ULL<<MCID::Commutable), 0x200903c004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #11703 = VPMULLDZ128rr
29420 { 11732, 3, 1, 0, 1236, 0|(1ULL<<MCID::Commutable), 0x200d03c004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #11732 = VPMULLQZ128rr
29446 { 11758, 3, 1, 0, 262, 0|(1ULL<<MCID::Commutable), 0x200b57c002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #11758 = VPMULLWZ128rr
29469 { 11781, 3, 1, 0, 137, 0, 0x200e0fc004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #11781 = VPMULTISHIFTQBZ128rr
29498 { 11810, 3, 1, 0, 262, 0|(1ULL<<MCID::Commutable), 0x200fd3c002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #11810 = VPMULUDQZ128rr
29617 { 11929, 3, 1, 0, 174, 0|(1ULL<<MCID::Commutable), 0x200bafc002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #11929 = VPORDZ128rr
29644 { 11956, 3, 1, 0, 174, 0|(1ULL<<MCID::Commutable), 0x200fafc002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #11956 = VPORQZ128rr
29733 { 12045, 3, 1, 0, 529, 0, 0x200857c004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #12045 = VPROLVDZ128rr
29760 { 12072, 3, 1, 0, 529, 0, 0x200c57c004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #12072 = VPROLVQZ128rr
29841 { 12153, 3, 1, 0, 529, 0, 0x200853c004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #12153 = VPRORVDZ128rr
29868 { 12180, 3, 1, 0, 529, 0, 0x200c53c004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #12180 = VPRORVQZ128rr
29916 { 12228, 3, 1, 0, 271, 0|(1ULL<<MCID::Commutable), 0x200bdbc002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #12228 = VPSADBWZ128rr
30272 { 12584, 3, 1, 0, 273, 0, 0x200803c004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #12584 = VPSHUFBZ128rr
30399 { 12711, 3, 1, 0, 276, 0, 0x200bcbc002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #12711 = VPSLLDZ128rr
30450 { 12762, 3, 1, 0, 276, 0, 0x200fcfc002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #12762 = VPSLLQZ128rr
30494 { 12806, 3, 1, 0, 529, 0, 0x20091fc004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #12806 = VPSLLVDZ128rr
30525 { 12837, 3, 1, 0, 529, 0, 0x200d1fc004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #12837 = VPSLLVQZ128rr
30551 { 12863, 3, 1, 0, 529, 0, 0x200c4bc004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #12863 = VPSLLVWZ128rr
30578 { 12890, 3, 1, 0, 276, 0, 0x200bc7c002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #12890 = VPSLLWZ128rr
30623 { 12935, 3, 1, 0, 276, 0, 0x200b8bc002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #12935 = VPSRADZ128rr
30671 { 12983, 3, 1, 0, 276, 0, 0x200f8bc002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #12983 = VPSRAQZ128rr
30712 { 13024, 3, 1, 0, 529, 0, 0x20091bc004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #13024 = VPSRAVDZ128rr
30741 { 13053, 3, 1, 0, 529, 0, 0x200d1bc004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #13053 = VPSRAVQZ128rr
30765 { 13077, 3, 1, 0, 529, 0, 0x200c47c004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #13077 = VPSRAVWZ128rr
30792 { 13104, 3, 1, 0, 276, 0, 0x200b87c002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #13104 = VPSRAWZ128rr
30845 { 13157, 3, 1, 0, 276, 0, 0x200b4bc002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #13157 = VPSRLDZ128rr
30896 { 13208, 3, 1, 0, 276, 0, 0x200f4fc002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #13208 = VPSRLQZ128rr
30940 { 13252, 3, 1, 0, 529, 0, 0x200917c004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #13252 = VPSRLVDZ128rr
30971 { 13283, 3, 1, 0, 529, 0, 0x200d17c004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #13283 = VPSRLVQZ128rr
30997 { 13309, 3, 1, 0, 529, 0, 0x200c43c004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #13309 = VPSRLVWZ128rr
31024 { 13336, 3, 1, 0, 276, 0, 0x200b47c002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #13336 = VPSRLWZ128rr
31059 { 13371, 3, 1, 0, 1275, 0, 0x200be3c002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #13371 = VPSUBBZ128rr
31084 { 13396, 3, 1, 0, 1275, 0, 0x200bebc002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #13396 = VPSUBDZ128rr
31115 { 13427, 3, 1, 0, 1275, 0, 0x200fefc002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #13427 = VPSUBQZ128rr
31143 { 13455, 3, 1, 0, 137, 0, 0x200ba3c002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #13455 = VPSUBSBZ128rr
31165 { 13477, 3, 1, 0, 137, 0, 0x200ba7c002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #13477 = VPSUBSWZ128rr
31187 { 13499, 3, 1, 0, 137, 0, 0x200b63c002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #13499 = VPSUBUSBZ128rr
31209 { 13521, 3, 1, 0, 137, 0, 0x200b67c002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #13521 = VPSUBUSWZ128rr
31231 { 13543, 3, 1, 0, 1275, 0, 0x200be7c002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #13543 = VPSUBWZ128rr
31431 { 13743, 3, 1, 0, 239, 0, 0x2009a3c002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #13743 = VPUNPCKHBWZ128rr
31456 { 13768, 3, 1, 0, 239, 0, 0x2009abc002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #13768 = VPUNPCKHDQZ128rr
31487 { 13799, 3, 1, 0, 239, 0, 0x200db7c002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #13799 = VPUNPCKHQDQZ128rr
31515 { 13827, 3, 1, 0, 239, 0, 0x2009a7c002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #13827 = VPUNPCKHWDZ128rr
31537 { 13849, 3, 1, 0, 239, 0, 0x200983c002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #13849 = VPUNPCKLBWZ128rr
31562 { 13874, 3, 1, 0, 239, 0, 0x20098bc002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #13874 = VPUNPCKLDQZ128rr
31593 { 13905, 3, 1, 0, 239, 0, 0x200db3c002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #13905 = VPUNPCKLQDQZ128rr
31621 { 13933, 3, 1, 0, 239, 0, 0x200987c002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #13933 = VPUNPCKLWDZ128rr
31644 { 13956, 3, 1, 0, 1272, 0|(1ULL<<MCID::Commutable), 0x200bbfc002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #13956 = VPXORDZ128rr
31671 { 13983, 3, 1, 0, 1272, 0|(1ULL<<MCID::Commutable), 0x200fbfc002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #13983 = VPXORQZ128rr
31831 { 14143, 3, 1, 0, 287, 0, 0x100d378004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #14143 = VRCP14SDZrr
31837 { 14149, 3, 1, 0, 287, 0, 0x809374004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #14149 = VRCP14SSZrr
31867 { 14179, 3, 1, 0, 287, 0, 0x100f2f8004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #14179 = VRCP28SDZr
31868 { 14180, 3, 1, 0, 287, 0, 0x110f2f8004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #14180 = VRCP28SDZrb
31876 { 14188, 3, 1, 0, 287, 0, 0x80b2f4004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #14188 = VRCP28SSZr
31877 { 14189, 3, 1, 0, 287, 0, 0x90b2f4004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #14189 = VRCP28SSZrb
32123 { 14435, 3, 1, 0, 298, 0, 0x100d3f8004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #14435 = VRSQRT14SDZrr
32129 { 14441, 3, 1, 0, 298, 0, 0x8093f4004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #14441 = VRSQRT14SSZrr
32159 { 14471, 3, 1, 0, 298, 0, 0x100f378004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #14471 = VRSQRT28SDZr
32160 { 14472, 3, 1, 0, 298, 0, 0x110f378004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #14472 = VRSQRT28SDZrb
32168 { 14480, 3, 1, 0, 298, 0, 0x80b374004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #14480 = VRSQRT28SSZr
32169 { 14481, 3, 1, 0, 298, 0, 0x90b374004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #14481 = VRSQRT28SSZrb
32188 { 14500, 3, 1, 0, 24, 0, 0x200cb38004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #14500 = VSCALEFPDZ128rr
32218 { 14530, 3, 1, 0, 24, 0, 0x2008b34004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #14530 = VSCALEFPSZ128rr
32245 { 14557, 3, 1, 0, 28, 0, 0x100cb78004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #14557 = VSCALEFSDZrr
32254 { 14566, 3, 1, 0, 28, 0, 0x808b74004831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #14566 = VSCALEFSSZrr
32487 { 14799, 3, 1, 0, 314, 0, 0x100d478003831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #14799 = VSQRTSDZr_Int
32502 { 14814, 3, 1, 0, 317, 0, 0x809474003031ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #14814 = VSQRTSSZr_Int
32521 { 14833, 3, 1, 0, 22, 0, 0x200d738002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #14833 = VSUBPDZ128rr
32555 { 14867, 3, 1, 0, 24, 0, 0x2009734002031ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #14867 = VSUBPSZ128rr
32586 { 14898, 3, 1, 0, 26, 0, 0x100d738003831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #14898 = VSUBSDZrr_Int
32601 { 14913, 3, 1, 0, 28, 0, 0x809734003031ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #14913 = VSUBSSZrr_Int
32645 { 14957, 3, 1, 0, 173, 0|(1ULL<<MCID::Commutable), 0x200c578002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #14957 = VUNPCKHPDZ128rr
32676 { 14988, 3, 1, 0, 173, 0, 0x2008574002031ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #14988 = VUNPCKHPSZ128rr
32707 { 15019, 3, 1, 0, 173, 0, 0x200c538002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #15019 = VUNPCKLPDZ128rr
32738 { 15050, 3, 1, 0, 173, 0, 0x2008534002031ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #15050 = VUNPCKLPSZ128rr
32769 { 15081, 3, 1, 0, 1269, 0|(1ULL<<MCID::Commutable), 0x200d5f8002831ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #15081 = VXORPDZ128rr
32800 { 15112, 3, 1, 0, 1269, 0|(1ULL<<MCID::Commutable), 0x20095f4002031ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #15112 = VXORPSZ128rr