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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/X86/X86GenInstrInfo.inc18222 { 534, 2, 1, 0, 52, 0, 0x3200002082ULL, nullptr, nullptr, OperandInfo127, -1 ,nullptr }, // Inst #534 = BSWAP16r_BAD
18536 { 848, 2, 1, 0, 1, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x3fc00000b9ULL, nullptr, ImplicitList1, OperandInfo127, -1 ,nullptr }, // Inst #848 = DEC16r
18537 { 849, 2, 1, 0, 1, 0, 0x1200000082ULL, nullptr, ImplicitList1, OperandInfo127, -1 ,nullptr }, // Inst #849 = DEC16r_alt
18772 { 1084, 2, 1, 0, 1, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x3fc00000b8ULL, nullptr, ImplicitList1, OperandInfo127, -1 ,nullptr }, // Inst #1084 = INC16r
18773 { 1085, 2, 1, 0, 1, 0, 0x1000000082ULL, nullptr, ImplicitList1, OperandInfo127, -1 ,nullptr }, // Inst #1085 = INC16r_alt
19576 { 1888, 2, 1, 0, 1, 0, 0x3dc00000bbULL, nullptr, ImplicitList1, OperandInfo127, -1 ,nullptr }, // Inst #1888 = NEG16r
19591 { 1903, 2, 1, 0, 1, 0, 0x3dc00000baULL, nullptr, nullptr, OperandInfo127, -1 ,nullptr }, // Inst #1903 = NOT16r
20034 { 2346, 2, 1, 0, 726, 0, 0x34400000baULL, ImplicitList1, ImplicitList1, OperandInfo127, -1 ,nullptr }, // Inst #2346 = RCL16r1
20035 { 2347, 2, 1, 0, 1013, 0, 0x34c00000baULL, ImplicitList78, ImplicitList1, OperandInfo127, -1 ,nullptr }, // Inst #2347 = RCL16rCL
20064 { 2376, 2, 1, 0, 726, 0, 0x34400000bbULL, ImplicitList1, ImplicitList1, OperandInfo127, -1 ,nullptr }, // Inst #2376 = RCR16r1
20065 { 2377, 2, 1, 0, 898, 0, 0x34c00000bbULL, ImplicitList78, ImplicitList1, OperandInfo127, -1 ,nullptr }, // Inst #2377 = RCR16rCL
20135 { 2447, 2, 1, 0, 848, 0, 0x34400000b8ULL, nullptr, ImplicitList1, OperandInfo127, -1 ,nullptr }, // Inst #2447 = ROL16r1
20136 { 2448, 2, 1, 0, 282, 0, 0x34c00000b8ULL, ImplicitList90, ImplicitList1, OperandInfo127, -1 ,nullptr }, // Inst #2448 = ROL16rCL
20159 { 2471, 2, 1, 0, 848, 0, 0x34400000b9ULL, nullptr, ImplicitList1, OperandInfo127, -1 ,nullptr }, // Inst #2471 = ROR16r1
20160 { 2472, 2, 1, 0, 282, 0, 0x34c00000b9ULL, ImplicitList90, ImplicitList1, OperandInfo127, -1 ,nullptr }, // Inst #2472 = ROR16rCL
20209 { 2521, 2, 1, 0, 290, 0, 0x34400000bfULL, nullptr, ImplicitList1, OperandInfo127, -1 ,nullptr }, // Inst #2521 = SAR16r1
20210 { 2522, 2, 1, 0, 301, 0, 0x34c00000bfULL, ImplicitList90, ImplicitList1, OperandInfo127, -1 ,nullptr }, // Inst #2522 = SAR16rCL
20301 { 2613, 2, 1, 0, 290, 0, 0x34400000bcULL, nullptr, ImplicitList1, OperandInfo127, -1 ,nullptr }, // Inst #2613 = SHL16r1
20302 { 2614, 2, 1, 0, 301, 0, 0x34c00000bcULL, ImplicitList90, ImplicitList1, OperandInfo127, -1 ,nullptr }, // Inst #2614 = SHL16rCL
20341 { 2653, 2, 1, 0, 290, 0, 0x34400000bdULL, nullptr, ImplicitList1, OperandInfo127, -1 ,nullptr }, // Inst #2653 = SHR16r1
20342 { 2654, 2, 1, 0, 301, 0, 0x34c00000bdULL, ImplicitList90, ImplicitList1, OperandInfo127, -1 ,nullptr }, // Inst #2654 = SHR16rCL
32855 { 15167, 2, 1, 0, 578, 0, 0x2400000082ULL, ImplicitList10, ImplicitList10, OperandInfo127, -1 ,nullptr }, // Inst #15167 = XCHG16ar