reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/X86/X86GenInstrInfo.inc
18208   { 520,	6,	1,	0,	660,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x18800000a1ULL, nullptr, nullptr, OperandInfo126, -1 ,nullptr },  // Inst #520 = BOUNDS16rm
18210   { 522,	6,	1,	0,	48,	0|(1ULL<<MCID::MayLoad), 0x2f000020a1ULL, nullptr, ImplicitList1, OperandInfo126, -1 ,nullptr },  // Inst #522 = BSF16rm
18216   { 528,	6,	1,	0,	50,	0|(1ULL<<MCID::MayLoad), 0x2f400020a1ULL, nullptr, ImplicitList1, OperandInfo126, -1 ,nullptr },  // Inst #528 = BSR16rm
18381   { 693,	6,	0,	0,	20,	0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0xec00000a1ULL, nullptr, ImplicitList1, OperandInfo126, -1 ,nullptr },  // Inst #693 = CMP16rm
18622   { 934,	6,	0,	0,	134,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x3e00005a21ULL, nullptr, ImplicitList1, OperandInfo126, -1 ,nullptr },  // Inst #934 = ENQCMD16
18625   { 937,	6,	0,	0,	134,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x3e00005221ULL, nullptr, ImplicitList1, OperandInfo126, -1 ,nullptr },  // Inst #937 = ENQCMDS16
18926   { 1238,	6,	1,	0,	886,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x800020a1ULL, nullptr, nullptr, OperandInfo126, -1 ,nullptr },  // Inst #1238 = LAR16rm
18940   { 1252,	6,	1,	0,	8,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x31400000a1ULL, nullptr, nullptr, OperandInfo126, -1 ,nullptr },  // Inst #1252 = LDS16rm
18960   { 1272,	6,	1,	0,	1054,	0, 0x23400000a1ULL, nullptr, nullptr, OperandInfo126, -1 ,nullptr },  // Inst #1272 = LEA16r
18966   { 1278,	6,	1,	0,	8,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x31000000a1ULL, nullptr, nullptr, OperandInfo126, -1 ,nullptr },  // Inst #1278 = LES16rm
18969   { 1281,	6,	1,	0,	8,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x2d000020a1ULL, nullptr, nullptr, OperandInfo126, -1 ,nullptr },  // Inst #1281 = LFS16rm
18975   { 1287,	6,	1,	0,	8,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x2d400020a1ULL, nullptr, nullptr, OperandInfo126, -1 ,nullptr },  // Inst #1287 = LGS16rm
19064   { 1376,	6,	1,	0,	886,	0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0xc00020a1ULL, nullptr, nullptr, OperandInfo126, -1 ,nullptr },  // Inst #1376 = LSL16rm
19070   { 1382,	6,	1,	0,	8,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x2c800020a1ULL, nullptr, nullptr, OperandInfo126, -1 ,nullptr },  // Inst #1382 = LSS16rm
19087   { 1399,	6,	1,	0,	183,	0|(1ULL<<MCID::MayLoad), 0x2f400030a1ULL, nullptr, ImplicitList1, OperandInfo126, -1 ,nullptr },  // Inst #1399 = LZCNT16rm
19342   { 1654,	6,	1,	0,	938,	0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x22c00000a1ULL, nullptr, nullptr, OperandInfo126, -1 ,nullptr },  // Inst #1654 = MOV16rm
19412   { 1724,	6,	1,	0,	833,	0|(1ULL<<MCID::MayLoad), 0x3c000040a1ULL, nullptr, nullptr, OperandInfo126, -1 ,nullptr },  // Inst #1724 = MOVBE16rm
19422   { 1734,	6,	0,	0,	134,	0|(1ULL<<MCID::UnmodeledSideEffects), 0x3e00004a21ULL, nullptr, nullptr, OperandInfo126, -1 ,nullptr },  // Inst #1734 = MOVDIR64B16
19483   { 1795,	6,	1,	0,	729,	0|(1ULL<<MCID::MayLoad), 0x2fc00020a1ULL, nullptr, nullptr, OperandInfo126, -1 ,nullptr },  // Inst #1795 = MOVSX16rm16
19484   { 1796,	6,	1,	0,	729,	0|(1ULL<<MCID::MayLoad), 0x18c00000a1ULL, nullptr, nullptr, OperandInfo126, -1 ,nullptr },  // Inst #1796 = MOVSX16rm32
19485   { 1797,	6,	1,	0,	622,	0|(1ULL<<MCID::MayLoad), 0x2f800020a1ULL, nullptr, nullptr, OperandInfo126, -1 ,nullptr },  // Inst #1797 = MOVSX16rm8
19512   { 1824,	6,	1,	0,	729,	0|(1ULL<<MCID::MayLoad), 0x2dc00020a1ULL, nullptr, nullptr, OperandInfo126, -1 ,nullptr },  // Inst #1824 = MOVZX16rm16
19513   { 1825,	6,	1,	0,	622,	0|(1ULL<<MCID::MayLoad), 0x2d800020a1ULL, nullptr, nullptr, OperandInfo126, -1 ,nullptr },  // Inst #1825 = MOVZX16rm8
19883   { 2195,	6,	1,	0,	268,	0|(1ULL<<MCID::MayLoad), 0x2e000030a1ULL, nullptr, ImplicitList1, OperandInfo126, -1 ,nullptr },  // Inst #2195 = POPCNT16rm
20597   { 2909,	6,	1,	0,	320,	0|(1ULL<<MCID::MayLoad), 0x2f000030a1ULL, nullptr, ImplicitList1, OperandInfo126, -1 ,nullptr },  // Inst #2909 = TZCNT16rm