|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/X86/X86GenAsmMatcher.inc 9339 { 4871 /* movzbl */, X86::MOVZX32rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR32 }, },
9352 { 4906 /* movzx */, X86::MOVZX32rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR32 }, },
23899 { 4906 /* movzx */, X86::MOVZX32rr8, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR8 }, },
gen/lib/Target/X86/X86GenDAGISel.inc20713 /* 42005*/ OPC_MorphNodeTo1, TARGET_VAL(X86::MOVZX32rr8), 0,
20721 /* 42025*/ OPC_EmitNode1, TARGET_VAL(X86::MOVZX32rr8), 0,
20767 /* 42149*/ OPC_EmitNode1, TARGET_VAL(X86::MOVZX32rr8), 0,
55467 /*117575*/ OPC_MorphNodeTo1, TARGET_VAL(X86::MOVZX32rr8), 0,
55473 /*117587*/ OPC_EmitNode1, TARGET_VAL(X86::MOVZX32rr8), 0,
55511 /*117675*/ OPC_EmitNode1, TARGET_VAL(X86::MOVZX32rr8), 0,
55925 /*118497*/ OPC_MorphNodeTo1, TARGET_VAL(X86::MOVZX32rr8), 0,
55953 /*118557*/ OPC_EmitNode1, TARGET_VAL(X86::MOVZX32rr8), 0,
55972 /*118604*/ OPC_EmitNode1, TARGET_VAL(X86::MOVZX32rr8), 0,
gen/lib/Target/X86/X86GenFastISel.inc 200 return fastEmitInst_r(X86::MOVZX32rr8, &X86::GR32RegClass, Op0, Op0IsKill);
2251 return fastEmitInst_r(X86::MOVZX32rr8, &X86::GR32RegClass, Op0, Op0IsKill);
gen/lib/Target/X86/X86GenGlobalISel.inc 3022 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOVZX32rr8,
10270 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVZX32rr8,
10304 GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::MOVZX32rr8,
11433 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVZX32rr8,
11507 GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::MOVZX32rr8,
lib/Target/X86/X86DomainReassignment.cpp 636 createReplacerDstCOPY(X86::MOVZX32rr8, X86::KMOVBkk);
lib/Target/X86/X86FastISel.cpp 1544 case MVT::i8: MovInst = X86::MOVZX32rr8; break;
1562 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(X86::MOVZX32rr8),
lib/Target/X86/X86FixupBWInsts.cpp 396 return tryReplaceExtend(X86::MOVZX32rr8, MI);
lib/Target/X86/X86FixupSetCC.cpp 112 if (Use.getOpcode() == X86::MOVZX32rr8)
lib/Target/X86/X86FlagsCopyLowering.cpp 935 BuildMI(MBB, SetPos, SetLoc, TII->get(X86::MOVZX32rr8), NewReg)
lib/Target/X86/X86ISelDAGToDAG.cpp 1121 if (Opc != X86::MOVZX32rr8 && Opc != X86::MOVSX32rr8 &&
1134 unsigned ExpectedOpc = Opc == X86::MOVZX32rr8 ? X86::MOVZX32rr8_NOREX
lib/Target/X86/X86InstrFoldTables.cpp 559 { X86::MOVZX32rr8, X86::MOVZX32rm8, 0 },
lib/Target/X86/X86InstrInfo.cpp 98 case X86::MOVZX32rr8:
119 case X86::MOVZX32rr8:
lib/Target/X86/X86InstructionSelector.cpp 793 {LLT::scalar(8), LLT::scalar(64), X86::MOVZX32rr8, true}, // i8 => i64
lib/Target/X86/X86SpeculativeLoadHardening.cpp 1369 case X86::MOVZX32rr8: case X86::MOVZX32rr16: