reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/X86/X86GenAsmMatcher.inc

 9271   { 4677 /* movq */, X86::MOV64ri32, Convert__Reg1_1__ImmSExti64i321_0, AMFBS_None, { MCK_ImmSExti64i32, MCK_GR64 }, },
23745   { 4333 /* mov */, X86::MOV64ri32, Convert__Reg1_0__ImmSExti64i321_1, AMFBS_None, { MCK_GR64, MCK_ImmSExti64i32 }, },

gen/lib/Target/X86/X86GenDAGISel.inc

55352 /*117328*/          OPC_MorphNodeTo1, TARGET_VAL(X86::MOV64ri32), 0,
57965 /*122482*/        OPC_MorphNodeTo1, TARGET_VAL(X86::MOV64ri32), 0,
57973 /*122497*/        OPC_MorphNodeTo1, TARGET_VAL(X86::MOV64ri32), 0,
57981 /*122512*/        OPC_MorphNodeTo1, TARGET_VAL(X86::MOV64ri32), 0,
57989 /*122527*/        OPC_MorphNodeTo1, TARGET_VAL(X86::MOV64ri32), 0,
57997 /*122542*/        OPC_MorphNodeTo1, TARGET_VAL(X86::MOV64ri32), 0,
58005 /*122557*/        OPC_MorphNodeTo1, TARGET_VAL(X86::MOV64ri32), 0,
58012 /*122570*/        OPC_MorphNodeTo1, TARGET_VAL(X86::MOV64ri32), 0,

gen/lib/Target/X86/X86GenGlobalISel.inc

10869       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOV64ri32,

lib/Target/X86/X86FastISel.cpp

 3725       Opc = X86::MOV64ri32;

lib/Target/X86/X86FrameLowering.cpp

 1271         BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64ri32), X86::RAX)

lib/Target/X86/X86ISelLowering.cpp

30770   unsigned MovRIOpc = (PVT == MVT::i64) ? X86::MOV64ri32 : X86::MOV32ri;

lib/Target/X86/X86InstrFoldTables.cpp

  301   { X86::MOV64ri32,           X86::MOV64mi32,           TB_FOLDED_STORE },

lib/Target/X86/X86InstrInfo.cpp

  523   case X86::MOV64ri32:
 7643   case X86::MOV64ri32:

lib/Target/X86/X86InstructionSelector.cpp

  667       NewOpc = X86::MOV64ri32;

lib/Target/X86/X86SpeculativeLoadHardening.cpp

  447   BuildMI(Entry, EntryInsertPt, Loc, TII->get(X86::MOV64ri32), PS->PoisonReg)
 1110                              TII->get(X86::MOV64ri32), TargetReg)
 2499       BuildMI(MBB, InsertPt, Loc, TII->get(X86::MOV64ri32), ExpectedRetAddrReg)

unittests/tools/llvm-exegesis/X86/AssemblerTest.cpp

   54   Check({}, MCInstBuilder(MOV64ri32).addReg(RAX).addImm(42), 0x48, 0xc7, 0xc0,