reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/X86/X86GenAsmMatcher.inc

 9236   { 4546 /* movl */, X86::MOV32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
23740   { 4333 /* mov */, X86::MOV32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },

gen/lib/Target/X86/X86GenDAGISel.inc

50723 /*107094*/      OPC_MorphNodeTo1, TARGET_VAL(X86::MOV32rm), 0|OPFL_Chain|OPFL_MemRefs,
50905 /*107508*/        OPC_EmitNode1, TARGET_VAL(X86::MOV32rm), 0|OPFL_Chain|OPFL_MemRefs,
50969 /*107674*/      OPC_EmitNode1, TARGET_VAL(X86::MOV32rm), 0|OPFL_Chain|OPFL_MemRefs,
53940 /*114306*/      OPC_MorphNodeTo1, TARGET_VAL(X86::MOV32rm), 0|OPFL_Chain|OPFL_MemRefs,

lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp

  567     unsigned FixupKind = Opcode == X86::MOV32rm ? X86::reloc_signed_4byte_relax

lib/Target/X86/X86AvoidStoreForwardingBlocks.cpp

  465       buildCopy(LoadInst, X86::MOV32rm, LdDisp, StoreInst, X86::MOV32mr, StDisp,

lib/Target/X86/X86CallFrameOptimization.cpp

  622   if ((DefMI.getOpcode() != X86::MOV32rm &&

lib/Target/X86/X86CmovConversion.cpp

  540         if (Op == X86::MOV64rm || Op == X86::MOV32rm) {

lib/Target/X86/X86DomainReassignment.cpp

  655     createReplacer(X86::MOV32rm, X86::KMOVDkm);

lib/Target/X86/X86FastISel.cpp

  342     Opc = X86::MOV32rm;
  786           Opc = X86::MOV32rm;
 2684     case MVT::i32: Opc = X86::MOV32rm; RC = &X86::GR32RegClass; break;

lib/Target/X86/X86FrameLowering.cpp

 1297         MI = addRegOffset(BuildMI(MF, DL, TII.get(X86::MOV32rm), X86::EAX),
 2966     addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32rm), X86::ESP),
 2997     addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32rm), FramePtr),

lib/Target/X86/X86ISelLowering.cpp

29381     BuildMI(thisMBB, DL, TII->get(X86::MOV32rm), OffsetReg)
30258         BuildMI(*BB, MI, DL, TII->get(X86::MOV32rm), X86::EAX)
30270         BuildMI(*BB, MI, DL, TII->get(X86::MOV32rm), X86::EAX)
30606     unsigned Opm = Uses64BitFramePtr ? X86::MOV64rm : X86::MOV32rm;
30711   unsigned PtrLoadOpc = (PVT == MVT::i64) ? X86::MOV64rm : X86::MOV32rm;
30829   unsigned PtrLoadOpc = (PVT == MVT::i64) ? X86::MOV64rm : X86::MOV32rm;
31022     unsigned Op = FPIs64Bit ? X86::MOV64rm : X86::MOV32rm;
31033   addFrameReference(BuildMI(DispatchBB, DL, TII->get(X86::MOV32rm), IReg), FI,
31073       BuildMI(DispContBB, DL, TII->get(X86::MOV32rm), OReg)

lib/Target/X86/X86InstrFoldTables.cpp

  533   { X86::MOV32rr,              X86::MOV32rm,              0 },

lib/Target/X86/X86InstrInfo.cpp

  220   case X86::MOV32rm:
  530   case X86::MOV32rm:
 3087       return load ? X86::MOV32rm : X86::MOV32mr;
 4914         Opcode = X86::MOV32rm;
 5756   case X86::MOV32rm:
 5839   case X86::MOV32rm:

lib/Target/X86/X86InstructionSelector.cpp

  410       return Isload ? X86::MOV32rm : X86::MOV32mr;

lib/Target/X86/X86MCInstLower.cpp

  803   case X86::MOV32rm: {
  814     case X86::MOV32rm: NewOpc = X86::MOV32ao32; break;

lib/Target/X86/X86SpeculativeLoadHardening.cpp

 1569   case X86::MOV32rm:

unittests/tools/llvm-exegesis/X86/SnippetGeneratorTest.cpp

  319   const unsigned Opcode = X86::MOV32rm;