reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/X86/X86GenAsmMatcher.inc

 9040   { 3879 /* leal */, X86::LEA64_32r, Convert__Reg1_1__Mem5_0, AMFBS_In64BitMode, { MCK_Mem, MCK_GR32 }, },
23611   { 3875 /* lea */, X86::LEA64_32r, Convert__Reg1_0__Mem5_1, AMFBS_In64BitMode, { MCK_GR32, MCK_Mem }, },

gen/lib/Target/X86/X86GenDAGISel.inc

19545 /* 39428*/          OPC_MorphNodeTo1, TARGET_VAL(X86::LEA64_32r), 0,
32411 /* 67279*/          OPC_MorphNodeTo1, TARGET_VAL(X86::LEA64_32r), 0,
42729 /* 89351*/          OPC_MorphNodeTo1, TARGET_VAL(X86::LEA64_32r), 0,
44216 /* 92512*/          OPC_MorphNodeTo1, TARGET_VAL(X86::LEA64_32r), 0,
45125 /* 94446*/          OPC_MorphNodeTo1, TARGET_VAL(X86::LEA64_32r), 0,
54903 /*116371*/        OPC_MorphNodeTo1, TARGET_VAL(X86::LEA64_32r), 0,
54928 /*116431*/        OPC_MorphNodeTo1, TARGET_VAL(X86::LEA64_32r), 0,
54945 /*116472*/      OPC_MorphNodeTo1, TARGET_VAL(X86::LEA64_32r), 0,

gen/lib/Target/X86/X86GenInstrInfo.inc

49347   case X86::LEA64_32r:
80119   case X86::LEA64_32r:

lib/Target/X86/X86FastISel.cpp

 3837               ? (Subtarget->isTarget64BitILP32() ? X86::LEA64_32r : X86::LEA32r)
 3882           ? (Subtarget->isTarget64BitILP32() ? X86::LEA64_32r : X86::LEA32r)

lib/Target/X86/X86FixupLEAs.cpp

  190          Opcode == X86::LEA64_32r;
  319   case X86::LEA64_32r:
  333   case X86::LEA64_32r:
  345   case X86::LEA64_32r:
  376   if (MI.getOpcode() == X86::LEA64_32r) {
  393     if (MI.getOpcode() == X86::LEA64_32r) {
  414       if (MI.getOpcode() == X86::LEA64_32r) {
  424       if (MI.getOpcode() == X86::LEA64_32r) {
  551   if (MI.getOpcode() == X86::LEA64_32r) {
  581     if (MI.getOpcode() == X86::LEA64_32r) {
  639   if (LEAOpcode == X86::LEA64_32r)

lib/Target/X86/X86FrameLowering.cpp

  426   } else if ((Opc == X86::LEA32r || Opc == X86::LEA64_32r) &&
 2378       BuildMI(checkMBB, DL, TII.get(IsLP64 ? X86::LEA64r : X86::LEA64_32r), ScratchReg).addReg(X86::RSP)

lib/Target/X86/X86ISelLowering.cpp

 4246            Opcode == X86::LEA64_32r) &&

lib/Target/X86/X86InstrInfo.cpp

  719   if (Opc != X86::LEA64_32r) {
  779   unsigned Opcode = X86::LEA64_32r;
  947     unsigned Opc = Is64Bit ? X86::LEA64_32r : X86::LEA32r;
  985         (Is64Bit ? X86::LEA64_32r : X86::LEA32r);
 1007         : (Is64Bit ? X86::LEA64_32r : X86::LEA32r);
 1042       Opc = Is64Bit ? X86::LEA64_32r : X86::LEA32r;
 1091     unsigned Opc = Is64Bit ? X86::LEA64_32r : X86::LEA32r;
 1132     unsigned Opc = Is64Bit ? X86::LEA64_32r : X86::LEA32r;
 7569   case X86::LEA64_32r: {

lib/Target/X86/X86InstructionSelector.cpp

  553     return STI.isTarget64BitILP32() ? X86::LEA64_32r : X86::LEA32r;

lib/Target/X86/X86MCInstLower.cpp

  474   case X86::LEA64_32r:

lib/Target/X86/X86OptimizeLEAs.cpp

  232          Opcode == X86::LEA64r || Opcode == X86::LEA64_32r;

lib/Target/X86/X86RegisterInfo.cpp

  682   if ((Opc != X86::LEA32r && Opc != X86::LEA64r && Opc != X86::LEA64_32r) ||
  692   if (Opc == X86::LEA64_32r)
  758   if (Opc == X86::LEA64_32r && X86::GR32RegClass.contains(BasePtr))

lib/Target/X86/X86SpeculativeLoadHardening.cpp

 1386   case X86::LEA64_32r:

tools/llvm-exegesis/lib/X86/Target.cpp

  263   if (Opcode == X86::LEA64r || Opcode == X86::LEA64_32r) {
  314   if (Opcode == X86::LEA64r || Opcode == X86::LEA64_32r) {