reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/X86/X86GenAsmMatcher.inc

 9039   { 3879 /* leal */, X86::LEA32r, Convert__Reg1_1__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem, MCK_GR32 }, },
23610   { 3875 /* lea */, X86::LEA32r, Convert__Reg1_0__Mem5_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_Mem }, },

gen/lib/Target/X86/X86GenDAGISel.inc

19538 /* 39411*/          OPC_MorphNodeTo1, TARGET_VAL(X86::LEA32r), 0,
32404 /* 67262*/          OPC_MorphNodeTo1, TARGET_VAL(X86::LEA32r), 0,
42722 /* 89334*/          OPC_MorphNodeTo1, TARGET_VAL(X86::LEA32r), 0,
44209 /* 92495*/          OPC_MorphNodeTo1, TARGET_VAL(X86::LEA32r), 0,
45118 /* 94429*/          OPC_MorphNodeTo1, TARGET_VAL(X86::LEA32r), 0,
54896 /*116354*/        OPC_MorphNodeTo1, TARGET_VAL(X86::LEA32r), 0,
54921 /*116414*/        OPC_MorphNodeTo1, TARGET_VAL(X86::LEA32r), 0,

gen/lib/Target/X86/X86GenInstrInfo.inc

49345   case X86::LEA32r:
80117   case X86::LEA32r:

lib/Target/X86/X86CallFrameOptimization.cpp

  380   while (I->getOpcode() == X86::LEA32r || I->isDebugInstr())

lib/Target/X86/X86FastISel.cpp

 3837               ? (Subtarget->isTarget64BitILP32() ? X86::LEA64_32r : X86::LEA32r)
 3882           ? (Subtarget->isTarget64BitILP32() ? X86::LEA64_32r : X86::LEA32r)

lib/Target/X86/X86FixupLEAs.cpp

  136                 TII->get(MI.getOpcode() == X86::MOV32rr ? X86::LEA32r
  189   return Opcode == X86::LEA32r || Opcode == X86::LEA64r ||
  318   case X86::LEA32r:
  332   case X86::LEA32r:
  344   case X86::LEA32r:

lib/Target/X86/X86FrameLowering.cpp

  139   return IsLP64 ? X86::LEA64r : X86::LEA32r;
  426   } else if ((Opc == X86::LEA32r || Opc == X86::LEA64_32r) &&
 2405       BuildMI(checkMBB, DL, TII.get(X86::LEA32r), ScratchReg).addReg(X86::ESP)
 2680       LEAop = X86::LEA32r;
 2989     addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::LEA32r), BasePtr),

lib/Target/X86/X86ISelLowering.cpp

 4245       if ((Opcode == X86::LEA32r || Opcode == X86::LEA64r ||
30551       MIB = BuildMI(*thisMBB, MI, DL, TII->get(X86::LEA32r), LabelReg)
30917       BuildMI(*MBB, MI, DL, TII->get(X86::LEA32r), VR)
31399         BuildMI(*BB, *MBBI, DL, TII->get(X86::LEA32r), computedAddrVReg), AM);

lib/Target/X86/X86InstrInfo.cpp

  618   case X86::LEA32r:
  710     RC = Opc != X86::LEA32r ? &X86::GR64RegClass : &X86::GR32RegClass;
  712     RC = Opc != X86::LEA32r ?
  947     unsigned Opc = Is64Bit ? X86::LEA64_32r : X86::LEA32r;
  985         (Is64Bit ? X86::LEA64_32r : X86::LEA32r);
 1007         : (Is64Bit ? X86::LEA64_32r : X86::LEA32r);
 1042       Opc = Is64Bit ? X86::LEA64_32r : X86::LEA32r;
 1091     unsigned Opc = Is64Bit ? X86::LEA64_32r : X86::LEA32r;
 1132     unsigned Opc = Is64Bit ? X86::LEA64_32r : X86::LEA32r;
 7567   case X86::LEA32r:

lib/Target/X86/X86InstructionSelector.cpp

  553     return STI.isTarget64BitILP32() ? X86::LEA64_32r : X86::LEA32r;

lib/Target/X86/X86MCInstLower.cpp

  477   case X86::LEA32r:
  950       EmitAndCountInstruction(MCInstBuilder(X86::LEA32r)
  958       EmitAndCountInstruction(MCInstBuilder(X86::LEA32r)

lib/Target/X86/X86OptimizeLEAs.cpp

  231   return Opcode == X86::LEA16r || Opcode == X86::LEA32r ||

lib/Target/X86/X86RegisterInfo.cpp

  682   if ((Opc != X86::LEA32r && Opc != X86::LEA64r && Opc != X86::LEA64_32r) ||

lib/Target/X86/X86SpeculativeLoadHardening.cpp

 1385   case X86::LEA32r: