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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/X86/X86GenInstrInfo.inc19878 { 2190, 1, 1, 0, 837, 0|(1ULL<<MCID::MayLoad), 0x1600000102ULL, ImplicitList74, ImplicitList74, OperandInfo64, -1 ,nullptr }, // Inst #2190 = POP64r
19878 { 2190, 1, 1, 0, 837, 0|(1ULL<<MCID::MayLoad), 0x1600000102ULL, ImplicitList74, ImplicitList74, OperandInfo64, -1 ,nullptr }, // Inst #2190 = POP64r
19879 { 2191, 5, 0, 0, 619, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x23c0000128ULL, ImplicitList74, ImplicitList74, OperandInfo91, -1 ,nullptr }, // Inst #2191 = POP64rmm
19879 { 2191, 5, 0, 0, 619, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x23c0000128ULL, ImplicitList74, ImplicitList74, OperandInfo91, -1 ,nullptr }, // Inst #2191 = POP64rmm
19880 { 2192, 1, 1, 0, 593, 0|(1ULL<<MCID::MayLoad), 0x23c0000138ULL, ImplicitList74, ImplicitList74, OperandInfo64, -1 ,nullptr }, // Inst #2192 = POP64rmr
19880 { 2192, 1, 1, 0, 593, 0|(1ULL<<MCID::MayLoad), 0x23c0000138ULL, ImplicitList74, ImplicitList74, OperandInfo64, -1 ,nullptr }, // Inst #2192 = POP64rmr
19895 { 2207, 0, 0, 0, 931, 0|(1ULL<<MCID::MayLoad), 0x2740000101ULL, ImplicitList74, ImplicitList77, nullptr, -1 ,nullptr }, // Inst #2207 = POPF64
20003 { 2315, 1, 0, 0, 594, 0|(1ULL<<MCID::MayStore), 0x1a00100101ULL, ImplicitList74, ImplicitList74, OperandInfo3, -1 ,nullptr }, // Inst #2315 = PUSH64i32
20003 { 2315, 1, 0, 0, 594, 0|(1ULL<<MCID::MayStore), 0x1a00100101ULL, ImplicitList74, ImplicitList74, OperandInfo3, -1 ,nullptr }, // Inst #2315 = PUSH64i32
20004 { 2316, 1, 0, 0, 841, 0|(1ULL<<MCID::MayStore), 0x1a80020101ULL, ImplicitList74, ImplicitList74, OperandInfo3, -1 ,nullptr }, // Inst #2316 = PUSH64i8
20004 { 2316, 1, 0, 0, 841, 0|(1ULL<<MCID::MayStore), 0x1a80020101ULL, ImplicitList74, ImplicitList74, OperandInfo3, -1 ,nullptr }, // Inst #2316 = PUSH64i8
20005 { 2317, 1, 0, 0, 841, 0|(1ULL<<MCID::MayStore), 0x1400000102ULL, ImplicitList74, ImplicitList74, OperandInfo64, -1 ,nullptr }, // Inst #2317 = PUSH64r
20005 { 2317, 1, 0, 0, 841, 0|(1ULL<<MCID::MayStore), 0x1400000102ULL, ImplicitList74, ImplicitList74, OperandInfo64, -1 ,nullptr }, // Inst #2317 = PUSH64r
20006 { 2318, 5, 0, 0, 606, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x3fc000012eULL, ImplicitList74, ImplicitList74, OperandInfo91, -1 ,nullptr }, // Inst #2318 = PUSH64rmm
20006 { 2318, 5, 0, 0, 606, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x3fc000012eULL, ImplicitList74, ImplicitList74, OperandInfo91, -1 ,nullptr }, // Inst #2318 = PUSH64rmm
20007 { 2319, 1, 0, 0, 732, 0|(1ULL<<MCID::MayStore), 0x3fc000013eULL, ImplicitList74, ImplicitList74, OperandInfo64, -1 ,nullptr }, // Inst #2319 = PUSH64rmr
20007 { 2319, 1, 0, 0, 732, 0|(1ULL<<MCID::MayStore), 0x3fc000013eULL, ImplicitList74, ImplicitList74, OperandInfo64, -1 ,nullptr }, // Inst #2319 = PUSH64rmr
20018 { 2330, 0, 0, 0, 741, 0|(1ULL<<MCID::MayStore), 0x2700000101ULL, ImplicitList77, ImplicitList74, nullptr, -1 ,nullptr }, // Inst #2330 = PUSHF64
20086 { 2398, 1, 1, 0, 288, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList74, ImplicitList73, OperandInfo64, -1 ,nullptr }, // Inst #2398 = RDFLAGS64
20276 { 2588, 2, 1, 0, 8, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList74, ImplicitList97, OperandInfo118, -1 ,nullptr }, // Inst #2588 = SEG_ALLOCA_64
32829 { 15141, 1, 0, 0, 8, 0, 0x0ULL, ImplicitList74, ImplicitList97, OperandInfo64, -1 ,nullptr }, // Inst #15141 = WIN_ALLOCA_64
32831 { 15143, 1, 0, 0, 288, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList74, ImplicitList77, OperandInfo64, -1 ,nullptr }, // Inst #15143 = WRFLAGS64