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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/X86/X86GenInstrInfo.inc17905 { 217, 1, 0, 0, 7, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #217 = RETPOLINE_CALL32
17906 { 218, 1, 0, 0, 7, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo64, -1 ,nullptr }, // Inst #218 = RETPOLINE_CALL64
17907 { 219, 2, 0, 0, 7, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo61, -1 ,nullptr }, // Inst #219 = RETPOLINE_TCRETURN32
17908 { 220, 2, 0, 0, 7, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo63, -1 ,nullptr }, // Inst #220 = RETPOLINE_TCRETURN64
18061 { 373, 3, 0, 0, 1, 0, 0x0ULL, ImplicitList6, ImplicitList19, OperandInfo99, -1 ,nullptr }, // Inst #373 = ADJCALLSTACKDOWN64
18063 { 375, 2, 0, 0, 1, 0, 0x0ULL, ImplicitList6, ImplicitList19, OperandInfo8, -1 ,nullptr }, // Inst #375 = ADJCALLSTACKUP64
18285 { 597, 5, 0, 0, 762, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad), 0x3fc000002aULL, ImplicitList6, nullptr, OperandInfo91, -1 ,nullptr }, // Inst #597 = CALL64m
18286 { 598, 5, 0, 0, 762, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad), 0x20003fc000002aULL, ImplicitList6, nullptr, OperandInfo91, -1 ,nullptr }, // Inst #598 = CALL64m_NT
18287 { 599, 1, 0, 0, 736, 0|(1ULL<<MCID::Call), 0x3a000e0101ULL, ImplicitList6, nullptr, OperandInfo129, -1 ,nullptr }, // Inst #599 = CALL64pcrel32
18288 { 600, 1, 0, 0, 737, 0|(1ULL<<MCID::Call), 0x3fc000003aULL, ImplicitList6, nullptr, OperandInfo64, -1 ,nullptr }, // Inst #600 = CALL64r
18289 { 601, 1, 0, 0, 737, 0|(1ULL<<MCID::Call), 0x20003fc000003aULL, ImplicitList6, nullptr, OperandInfo64, -1 ,nullptr }, // Inst #601 = CALL64r_NT
18639 { 951, 5, 0, 0, 767, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x3fc001002bULL, ImplicitList6, nullptr, OperandInfo91, -1 ,nullptr }, // Inst #951 = FARCALL64
20548 { 2860, 1, 0, 0, 7, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList6, nullptr, OperandInfo129, -1 ,nullptr }, // Inst #2860 = TAILJMPd64
20552 { 2864, 5, 0, 0, 5, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList6, nullptr, OperandInfo317, -1 ,nullptr }, // Inst #2864 = TAILJMPm64
20553 { 2865, 5, 0, 0, 5, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x10000ULL, ImplicitList6, nullptr, OperandInfo317, -1 ,nullptr }, // Inst #2865 = TAILJMPm64_REX
20555 { 2867, 1, 0, 0, 7, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList6, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #2867 = TAILJMPr64
20556 { 2868, 1, 0, 0, 7, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x10000ULL, ImplicitList6, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #2868 = TAILJMPr64_REX
20558 { 2870, 2, 0, 0, 7, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList6, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #2870 = TCRETURNdi64
20562 { 2874, 6, 0, 0, 5, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList6, nullptr, OperandInfo320, -1 ,nullptr }, // Inst #2874 = TCRETURNmi64
20564 { 2876, 2, 0, 0, 7, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList6, nullptr, OperandInfo321, -1 ,nullptr }, // Inst #2876 = TCRETURNri64
20586 { 2898, 5, 0, 0, 8, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, ImplicitList100, OperandInfo91, -1 ,nullptr }, // Inst #2898 = TLSCall_64
20588 { 2900, 5, 0, 0, 8, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, ImplicitList102, OperandInfo91, -1 ,nullptr }, // Inst #2900 = TLS_addr64
20590 { 2902, 5, 0, 0, 8, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, ImplicitList102, OperandInfo91, -1 ,nullptr }, // Inst #2902 = TLS_base_addr64