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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/X86/X86GenInstrInfo.inc18060 { 372, 3, 0, 0, 1, 0, 0x0ULL, ImplicitList17, ImplicitList18, OperandInfo99, -1 ,nullptr }, // Inst #372 = ADJCALLSTACKDOWN32
18062 { 374, 2, 0, 0, 1, 0, 0x0ULL, ImplicitList17, ImplicitList18, OperandInfo8, -1 ,nullptr }, // Inst #374 = ADJCALLSTACKUP32
18277 { 589, 5, 0, 0, 761, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad), 0x3fc00000aaULL, ImplicitList17, nullptr, OperandInfo91, -1 ,nullptr }, // Inst #589 = CALL16m
18278 { 590, 5, 0, 0, 761, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad), 0x20003fc00000aaULL, ImplicitList17, nullptr, OperandInfo91, -1 ,nullptr }, // Inst #590 = CALL16m_NT
18279 { 591, 1, 0, 0, 951, 0|(1ULL<<MCID::Call), 0x3fc00000baULL, ImplicitList17, nullptr, OperandInfo65, -1 ,nullptr }, // Inst #591 = CALL16r
18280 { 592, 1, 0, 0, 951, 0|(1ULL<<MCID::Call), 0x20003fc00000baULL, ImplicitList17, nullptr, OperandInfo65, -1 ,nullptr }, // Inst #592 = CALL16r_NT
18281 { 593, 5, 0, 0, 761, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad), 0x3fc000012aULL, ImplicitList17, nullptr, OperandInfo91, -1 ,nullptr }, // Inst #593 = CALL32m
18282 { 594, 5, 0, 0, 761, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad), 0x20003fc000012aULL, ImplicitList17, nullptr, OperandInfo91, -1 ,nullptr }, // Inst #594 = CALL32m_NT
18283 { 595, 1, 0, 0, 951, 0|(1ULL<<MCID::Call), 0x3fc000013aULL, ImplicitList17, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #595 = CALL32r
18284 { 596, 1, 0, 0, 951, 0|(1ULL<<MCID::Call), 0x20003fc000013aULL, ImplicitList17, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #596 = CALL32r_NT
18290 { 602, 1, 0, 0, 7, 0|(1ULL<<MCID::Call), 0x3a000a0081ULL, ImplicitList17, nullptr, OperandInfo129, -1 ,nullptr }, // Inst #602 = CALLpcrel16
18291 { 603, 1, 0, 0, 7, 0|(1ULL<<MCID::Call), 0x3a000e0101ULL, ImplicitList17, nullptr, OperandInfo129, -1 ,nullptr }, // Inst #603 = CALLpcrel32
18635 { 947, 2, 0, 0, 7, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x2680080088ULL, ImplicitList17, nullptr, OperandInfo8, -1 ,nullptr }, // Inst #947 = FARCALL16i
18636 { 948, 5, 0, 0, 5, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x3fc00000abULL, ImplicitList17, nullptr, OperandInfo91, -1 ,nullptr }, // Inst #948 = FARCALL16m
18637 { 949, 2, 0, 0, 7, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x26800c0108ULL, ImplicitList17, nullptr, OperandInfo8, -1 ,nullptr }, // Inst #949 = FARCALL32i
18638 { 950, 5, 0, 0, 5, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x3fc000012bULL, ImplicitList17, nullptr, OperandInfo91, -1 ,nullptr }, // Inst #950 = FARCALL32m
19455 { 1767, 2, 1, 0, 7, 0|(1ULL<<MCID::NotDuplicable), 0x3a000c0000ULL, ImplicitList17, nullptr, OperandInfo61, -1 ,nullptr }, // Inst #1767 = MOVPC32r
20547 { 2859, 1, 0, 0, 7, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList17, nullptr, OperandInfo129, -1 ,nullptr }, // Inst #2859 = TAILJMPd
20551 { 2863, 5, 0, 0, 5, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList17, nullptr, OperandInfo317, -1 ,nullptr }, // Inst #2863 = TAILJMPm
20554 { 2866, 1, 0, 0, 7, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList17, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #2866 = TAILJMPr
20557 { 2869, 2, 0, 0, 7, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList17, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #2869 = TCRETURNdi
20561 { 2873, 6, 0, 0, 5, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList17, nullptr, OperandInfo320, -1 ,nullptr }, // Inst #2873 = TCRETURNmi
20563 { 2875, 2, 0, 0, 7, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList17, nullptr, OperandInfo321, -1 ,nullptr }, // Inst #2875 = TCRETURNri
20585 { 2897, 5, 0, 0, 8, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList17, ImplicitList99, OperandInfo91, -1 ,nullptr }, // Inst #2897 = TLSCall_32
20587 { 2899, 5, 0, 0, 8, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList17, ImplicitList101, OperandInfo91, -1 ,nullptr }, // Inst #2899 = TLS_addr32
20589 { 2901, 5, 0, 0, 8, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList17, ImplicitList101, OperandInfo91, -1 ,nullptr }, // Inst #2901 = TLS_base_addr32