|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/X86/X86GenInstrInfo.inc17943 { 255, 0, 0, 0, 15, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3640000061ULL, ImplicitList12, ImplicitList13, nullptr, -1 ,nullptr }, // Inst #255 = ABS_F
17944 { 256, 2, 1, 0, 15, 0, 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo73, -1 ,nullptr }, // Inst #256 = ABS_Fp32
17945 { 257, 2, 1, 0, 15, 0, 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo74, -1 ,nullptr }, // Inst #257 = ABS_Fp64
17946 { 258, 2, 1, 0, 15, 0, 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo75, -1 ,nullptr }, // Inst #258 = ABS_Fp80
18039 { 351, 5, 0, 0, 773, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x3600000028ULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #351 = ADD_F32m
18040 { 352, 5, 0, 0, 773, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x3700000028ULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #352 = ADD_F64m
18041 { 353, 5, 0, 0, 777, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x3780000028ULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #353 = ADD_FI16m
18042 { 354, 5, 0, 0, 777, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x3680000028ULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #354 = ADD_FI32m
18043 { 355, 1, 0, 0, 1060, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3780000038ULL, ImplicitList12, ImplicitList13, OperandInfo92, -1 ,nullptr }, // Inst #355 = ADD_FPrST0
18044 { 356, 1, 0, 0, 1060, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3600000038ULL, ImplicitList12, ImplicitList13, OperandInfo92, -1 ,nullptr }, // Inst #356 = ADD_FST0r
18045 { 357, 3, 1, 0, 0, 0, 0x800000ULL, ImplicitList12, ImplicitList13, OperandInfo93, -1 ,nullptr }, // Inst #357 = ADD_Fp32
18046 { 358, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo94, -1 ,nullptr }, // Inst #358 = ADD_Fp32m
18047 { 359, 3, 1, 0, 0, 0, 0x800000ULL, ImplicitList12, ImplicitList13, OperandInfo95, -1 ,nullptr }, // Inst #359 = ADD_Fp64
18048 { 360, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo96, -1 ,nullptr }, // Inst #360 = ADD_Fp64m
18049 { 361, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo96, -1 ,nullptr }, // Inst #361 = ADD_Fp64m32
18050 { 362, 3, 1, 0, 0, 0, 0x800000ULL, ImplicitList12, ImplicitList13, OperandInfo97, -1 ,nullptr }, // Inst #362 = ADD_Fp80
18051 { 363, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #363 = ADD_Fp80m32
18052 { 364, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #364 = ADD_Fp80m64
18053 { 365, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo94, -1 ,nullptr }, // Inst #365 = ADD_FpI16m32
18054 { 366, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo96, -1 ,nullptr }, // Inst #366 = ADD_FpI16m64
18055 { 367, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #367 = ADD_FpI16m80
18056 { 368, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo94, -1 ,nullptr }, // Inst #368 = ADD_FpI32m32
18057 { 369, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo96, -1 ,nullptr }, // Inst #369 = ADD_FpI32m64
18058 { 370, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #370 = ADD_FpI32m80
18059 { 371, 1, 0, 0, 1060, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3700000038ULL, ImplicitList12, ImplicitList13, OperandInfo92, -1 ,nullptr }, // Inst #371 = ADD_FrST0
18297 { 609, 0, 0, 0, 961, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3640000060ULL, ImplicitList12, ImplicitList13, nullptr, -1 ,nullptr }, // Inst #609 = CHS_F
18298 { 610, 2, 1, 0, 961, 0, 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo73, -1 ,nullptr }, // Inst #610 = CHS_Fp32
18299 { 611, 2, 1, 0, 961, 0, 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo74, -1 ,nullptr }, // Inst #611 = CHS_Fp64
18300 { 612, 2, 1, 0, 961, 0, 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo75, -1 ,nullptr }, // Inst #612 = CHS_Fp80
18445 { 757, 1, 0, 0, 709, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x360000003bULL, ImplicitList12, ImplicitList13, OperandInfo92, -1 ,nullptr }, // Inst #757 = COMP_FST0r
18448 { 760, 1, 0, 0, 709, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x360000003aULL, ImplicitList12, ImplicitList13, OperandInfo92, -1 ,nullptr }, // Inst #760 = COM_FST0r
18449 { 761, 0, 0, 0, 706, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x364000007fULL, ImplicitList12, ImplicitList13, nullptr, -1 ,nullptr }, // Inst #761 = COS_F
18450 { 762, 2, 1, 0, 706, 0, 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo73, -1 ,nullptr }, // Inst #762 = COS_Fp32
18451 { 763, 2, 1, 0, 706, 0, 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo74, -1 ,nullptr }, // Inst #763 = COS_Fp64
18452 { 764, 2, 1, 0, 706, 0, 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo75, -1 ,nullptr }, // Inst #764 = COS_Fp80
18557 { 869, 5, 0, 0, 903, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x360000002fULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #869 = DIVR_F32m
18558 { 870, 5, 0, 0, 903, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x370000002fULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #870 = DIVR_F64m
18559 { 871, 5, 0, 0, 904, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x378000002fULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #871 = DIVR_FI16m
18560 { 872, 5, 0, 0, 904, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x368000002fULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #872 = DIVR_FI32m
18561 { 873, 1, 0, 0, 905, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x378000003eULL, ImplicitList12, ImplicitList13, OperandInfo92, -1 ,nullptr }, // Inst #873 = DIVR_FPrST0
18562 { 874, 1, 0, 0, 905, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x360000003fULL, ImplicitList12, ImplicitList13, OperandInfo92, -1 ,nullptr }, // Inst #874 = DIVR_FST0r
18563 { 875, 7, 1, 0, 125, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo94, -1 ,nullptr }, // Inst #875 = DIVR_Fp32m
18564 { 876, 7, 1, 0, 125, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo96, -1 ,nullptr }, // Inst #876 = DIVR_Fp64m
18565 { 877, 7, 1, 0, 125, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo96, -1 ,nullptr }, // Inst #877 = DIVR_Fp64m32
18566 { 878, 7, 1, 0, 125, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #878 = DIVR_Fp80m32
18567 { 879, 7, 1, 0, 125, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #879 = DIVR_Fp80m64
18568 { 880, 7, 1, 0, 125, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo94, -1 ,nullptr }, // Inst #880 = DIVR_FpI16m32
18569 { 881, 7, 1, 0, 125, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo96, -1 ,nullptr }, // Inst #881 = DIVR_FpI16m64
18570 { 882, 7, 1, 0, 125, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #882 = DIVR_FpI16m80
18571 { 883, 7, 1, 0, 125, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo94, -1 ,nullptr }, // Inst #883 = DIVR_FpI32m32
18572 { 884, 7, 1, 0, 125, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo96, -1 ,nullptr }, // Inst #884 = DIVR_FpI32m64
18573 { 885, 7, 1, 0, 125, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #885 = DIVR_FpI32m80
18574 { 886, 1, 0, 0, 905, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x370000003eULL, ImplicitList12, ImplicitList13, OperandInfo92, -1 ,nullptr }, // Inst #886 = DIVR_FrST0
18583 { 895, 5, 0, 0, 779, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x360000002eULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #895 = DIV_F32m
18584 { 896, 5, 0, 0, 779, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x370000002eULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #896 = DIV_F64m
18585 { 897, 5, 0, 0, 780, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x378000002eULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #897 = DIV_FI16m
18586 { 898, 5, 0, 0, 780, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x368000002eULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #898 = DIV_FI32m
18587 { 899, 1, 0, 0, 902, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x378000003fULL, ImplicitList12, ImplicitList13, OperandInfo92, -1 ,nullptr }, // Inst #899 = DIV_FPrST0
18588 { 900, 1, 0, 0, 902, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x360000003eULL, ImplicitList12, ImplicitList13, OperandInfo92, -1 ,nullptr }, // Inst #900 = DIV_FST0r
18589 { 901, 3, 1, 0, 0, 0, 0x800000ULL, ImplicitList12, ImplicitList13, OperandInfo93, -1 ,nullptr }, // Inst #901 = DIV_Fp32
18590 { 902, 7, 1, 0, 125, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo94, -1 ,nullptr }, // Inst #902 = DIV_Fp32m
18591 { 903, 3, 1, 0, 0, 0, 0x800000ULL, ImplicitList12, ImplicitList13, OperandInfo95, -1 ,nullptr }, // Inst #903 = DIV_Fp64
18592 { 904, 7, 1, 0, 125, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo96, -1 ,nullptr }, // Inst #904 = DIV_Fp64m
18593 { 905, 7, 1, 0, 125, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo96, -1 ,nullptr }, // Inst #905 = DIV_Fp64m32
18594 { 906, 3, 1, 0, 0, 0, 0x800000ULL, ImplicitList12, ImplicitList13, OperandInfo97, -1 ,nullptr }, // Inst #906 = DIV_Fp80
18595 { 907, 7, 1, 0, 125, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #907 = DIV_Fp80m32
18596 { 908, 7, 1, 0, 125, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #908 = DIV_Fp80m64
18597 { 909, 7, 1, 0, 125, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo94, -1 ,nullptr }, // Inst #909 = DIV_FpI16m32
18598 { 910, 7, 1, 0, 125, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo96, -1 ,nullptr }, // Inst #910 = DIV_FpI16m64
18599 { 911, 7, 1, 0, 125, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #911 = DIV_FpI16m80
18600 { 912, 7, 1, 0, 125, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo94, -1 ,nullptr }, // Inst #912 = DIV_FpI32m32
18601 { 913, 7, 1, 0, 125, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo96, -1 ,nullptr }, // Inst #913 = DIV_FpI32m64
18602 { 914, 7, 1, 0, 125, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #914 = DIV_FpI32m80
18603 { 915, 1, 0, 0, 902, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x370000003fULL, ImplicitList12, ImplicitList13, OperandInfo92, -1 ,nullptr }, // Inst #915 = DIV_FrST0
18647 { 959, 5, 0, 0, 927, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x360000002aULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #959 = FCOM32m
18648 { 960, 5, 0, 0, 927, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x370000002aULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #960 = FCOM64m
18649 { 961, 5, 0, 0, 927, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x360000002bULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #961 = FCOMP32m
18650 { 962, 5, 0, 0, 927, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x370000002bULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #962 = FCOMP64m
18656 { 968, 5, 0, 0, 775, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x378000002aULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #968 = FICOM16m
18657 { 969, 5, 0, 0, 775, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x368000002aULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #969 = FICOM32m
18658 { 970, 5, 0, 0, 775, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x378000002bULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #970 = FICOMP16m
18659 { 971, 5, 0, 0, 775, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x368000002bULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #971 = FICOMP32m
18663 { 975, 0, 0, 0, 140, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x364000006aULL, ImplicitList12, ImplicitList13, nullptr, -1 ,nullptr }, // Inst #975 = FLDL2E
18664 { 976, 0, 0, 0, 140, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3640000069ULL, ImplicitList12, ImplicitList13, nullptr, -1 ,nullptr }, // Inst #976 = FLDL2T
18665 { 977, 0, 0, 0, 140, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x364000006cULL, ImplicitList12, ImplicitList13, nullptr, -1 ,nullptr }, // Inst #977 = FLDLG2
18666 { 978, 0, 0, 0, 140, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x364000006dULL, ImplicitList12, ImplicitList13, nullptr, -1 ,nullptr }, // Inst #978 = FLDLN2
18667 { 979, 0, 0, 0, 140, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x364000006bULL, ImplicitList12, ImplicitList13, nullptr, -1 ,nullptr }, // Inst #979 = FLDPI
18671 { 983, 5, 0, 0, 648, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x364000002fULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #983 = FNSTCW16m
18727 { 1039, 5, 0, 0, 598, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x37c0000028ULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #1039 = ILD_F16m
18728 { 1040, 5, 0, 0, 598, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x36c0000028ULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #1040 = ILD_F32m
18729 { 1041, 5, 0, 0, 598, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x37c000002dULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #1041 = ILD_F64m
18730 { 1042, 6, 1, 0, 62, 0|(1ULL<<MCID::MayLoad), 0x200000ULL, ImplicitList12, ImplicitList13, OperandInfo197, -1 ,nullptr }, // Inst #1042 = ILD_Fp16m32
18731 { 1043, 6, 1, 0, 62, 0|(1ULL<<MCID::MayLoad), 0x200000ULL, ImplicitList12, ImplicitList13, OperandInfo198, -1 ,nullptr }, // Inst #1043 = ILD_Fp16m64
18732 { 1044, 6, 1, 0, 62, 0|(1ULL<<MCID::MayLoad), 0x200000ULL, ImplicitList12, ImplicitList13, OperandInfo199, -1 ,nullptr }, // Inst #1044 = ILD_Fp16m80
18733 { 1045, 6, 1, 0, 62, 0|(1ULL<<MCID::MayLoad), 0x200000ULL, ImplicitList12, ImplicitList13, OperandInfo197, -1 ,nullptr }, // Inst #1045 = ILD_Fp32m32
18734 { 1046, 6, 1, 0, 62, 0|(1ULL<<MCID::MayLoad), 0x200000ULL, ImplicitList12, ImplicitList13, OperandInfo198, -1 ,nullptr }, // Inst #1046 = ILD_Fp32m64
18735 { 1047, 6, 1, 0, 62, 0|(1ULL<<MCID::MayLoad), 0x200000ULL, ImplicitList12, ImplicitList13, OperandInfo199, -1 ,nullptr }, // Inst #1047 = ILD_Fp32m80
18736 { 1048, 6, 1, 0, 62, 0|(1ULL<<MCID::MayLoad), 0x200000ULL, ImplicitList12, ImplicitList13, OperandInfo197, -1 ,nullptr }, // Inst #1048 = ILD_Fp64m32
18737 { 1049, 6, 1, 0, 62, 0|(1ULL<<MCID::MayLoad), 0x200000ULL, ImplicitList12, ImplicitList13, OperandInfo198, -1 ,nullptr }, // Inst #1049 = ILD_Fp64m64
18738 { 1050, 6, 1, 0, 62, 0|(1ULL<<MCID::MayLoad), 0x200000ULL, ImplicitList12, ImplicitList13, OperandInfo199, -1 ,nullptr }, // Inst #1050 = ILD_Fp64m80
18807 { 1119, 5, 0, 0, 735, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x37c0000029ULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #1119 = ISTT_FP16m
18808 { 1120, 5, 0, 0, 735, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x36c0000029ULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #1120 = ISTT_FP32m
18809 { 1121, 5, 0, 0, 735, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x3740000029ULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #1121 = ISTT_FP64m
18810 { 1122, 6, 0, 0, 134, 0|(1ULL<<MCID::MayStore), 0x400000ULL, ImplicitList12, ImplicitList13, OperandInfo194, -1 ,nullptr }, // Inst #1122 = ISTT_Fp16m32
18811 { 1123, 6, 0, 0, 134, 0|(1ULL<<MCID::MayStore), 0x400000ULL, ImplicitList12, ImplicitList13, OperandInfo195, -1 ,nullptr }, // Inst #1123 = ISTT_Fp16m64
18812 { 1124, 6, 0, 0, 134, 0|(1ULL<<MCID::MayStore), 0x400000ULL, ImplicitList12, ImplicitList13, OperandInfo196, -1 ,nullptr }, // Inst #1124 = ISTT_Fp16m80
18813 { 1125, 6, 0, 0, 134, 0|(1ULL<<MCID::MayStore), 0x400000ULL, ImplicitList12, ImplicitList13, OperandInfo194, -1 ,nullptr }, // Inst #1125 = ISTT_Fp32m32
18814 { 1126, 6, 0, 0, 134, 0|(1ULL<<MCID::MayStore), 0x400000ULL, ImplicitList12, ImplicitList13, OperandInfo195, -1 ,nullptr }, // Inst #1126 = ISTT_Fp32m64
18815 { 1127, 6, 0, 0, 134, 0|(1ULL<<MCID::MayStore), 0x400000ULL, ImplicitList12, ImplicitList13, OperandInfo196, -1 ,nullptr }, // Inst #1127 = ISTT_Fp32m80
18816 { 1128, 6, 0, 0, 134, 0|(1ULL<<MCID::MayStore), 0x400000ULL, ImplicitList12, ImplicitList13, OperandInfo194, -1 ,nullptr }, // Inst #1128 = ISTT_Fp64m32
18817 { 1129, 6, 0, 0, 134, 0|(1ULL<<MCID::MayStore), 0x400000ULL, ImplicitList12, ImplicitList13, OperandInfo195, -1 ,nullptr }, // Inst #1129 = ISTT_Fp64m64
18818 { 1130, 6, 0, 0, 134, 0|(1ULL<<MCID::MayStore), 0x400000ULL, ImplicitList12, ImplicitList13, OperandInfo196, -1 ,nullptr }, // Inst #1130 = ISTT_Fp64m80
18819 { 1131, 5, 0, 0, 642, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x37c000002aULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #1131 = IST_F16m
18820 { 1132, 5, 0, 0, 642, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x36c000002aULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #1132 = IST_F32m
18821 { 1133, 5, 0, 0, 642, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x37c000002bULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #1133 = IST_FP16m
18822 { 1134, 5, 0, 0, 642, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x36c000002bULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #1134 = IST_FP32m
18823 { 1135, 5, 0, 0, 642, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x37c000002fULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #1135 = IST_FP64m
18824 { 1136, 6, 0, 0, 134, 0|(1ULL<<MCID::MayStore), 0x400000ULL, ImplicitList12, ImplicitList13, OperandInfo194, -1 ,nullptr }, // Inst #1136 = IST_Fp16m32
18825 { 1137, 6, 0, 0, 134, 0|(1ULL<<MCID::MayStore), 0x400000ULL, ImplicitList12, ImplicitList13, OperandInfo195, -1 ,nullptr }, // Inst #1137 = IST_Fp16m64
18826 { 1138, 6, 0, 0, 134, 0|(1ULL<<MCID::MayStore), 0x400000ULL, ImplicitList12, ImplicitList13, OperandInfo196, -1 ,nullptr }, // Inst #1138 = IST_Fp16m80
18827 { 1139, 6, 0, 0, 134, 0|(1ULL<<MCID::MayStore), 0x400000ULL, ImplicitList12, ImplicitList13, OperandInfo194, -1 ,nullptr }, // Inst #1139 = IST_Fp32m32
18828 { 1140, 6, 0, 0, 134, 0|(1ULL<<MCID::MayStore), 0x400000ULL, ImplicitList12, ImplicitList13, OperandInfo195, -1 ,nullptr }, // Inst #1140 = IST_Fp32m64
18829 { 1141, 6, 0, 0, 134, 0|(1ULL<<MCID::MayStore), 0x400000ULL, ImplicitList12, ImplicitList13, OperandInfo196, -1 ,nullptr }, // Inst #1141 = IST_Fp32m80
18830 { 1142, 6, 0, 0, 134, 0|(1ULL<<MCID::MayStore), 0x400000ULL, ImplicitList12, ImplicitList13, OperandInfo194, -1 ,nullptr }, // Inst #1142 = IST_Fp64m32
18831 { 1143, 6, 0, 0, 134, 0|(1ULL<<MCID::MayStore), 0x400000ULL, ImplicitList12, ImplicitList13, OperandInfo195, -1 ,nullptr }, // Inst #1143 = IST_Fp64m64
18832 { 1144, 6, 0, 0, 134, 0|(1ULL<<MCID::MayStore), 0x400000ULL, ImplicitList12, ImplicitList13, OperandInfo196, -1 ,nullptr }, // Inst #1144 = IST_Fp64m80
18942 { 1254, 0, 0, 0, 179, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x364000006eULL, ImplicitList12, ImplicitList13, nullptr, -1 ,nullptr }, // Inst #1254 = LD_F0
18943 { 1255, 0, 0, 0, 180, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3640000068ULL, ImplicitList12, ImplicitList13, nullptr, -1 ,nullptr }, // Inst #1255 = LD_F1
18944 { 1256, 5, 0, 0, 770, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x3640000028ULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #1256 = LD_F32m
18945 { 1257, 5, 0, 0, 770, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x3740000028ULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #1257 = LD_F64m
18946 { 1258, 5, 0, 0, 629, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x36c000002dULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #1258 = LD_F80m
18947 { 1259, 1, 1, 0, 2, 0, 0x200000ULL, ImplicitList12, ImplicitList13, OperandInfo237, -1 ,nullptr }, // Inst #1259 = LD_Fp032
18948 { 1260, 1, 1, 0, 2, 0, 0x200000ULL, ImplicitList12, ImplicitList13, OperandInfo238, -1 ,nullptr }, // Inst #1260 = LD_Fp064
18949 { 1261, 1, 1, 0, 2, 0, 0x200000ULL, ImplicitList12, ImplicitList13, OperandInfo239, -1 ,nullptr }, // Inst #1261 = LD_Fp080
18950 { 1262, 1, 1, 0, 2, 0, 0x200000ULL, ImplicitList12, ImplicitList13, OperandInfo237, -1 ,nullptr }, // Inst #1262 = LD_Fp132
18951 { 1263, 1, 1, 0, 2, 0, 0x200000ULL, ImplicitList12, ImplicitList13, OperandInfo238, -1 ,nullptr }, // Inst #1263 = LD_Fp164
18952 { 1264, 1, 1, 0, 2, 0, 0x200000ULL, ImplicitList12, ImplicitList13, OperandInfo239, -1 ,nullptr }, // Inst #1264 = LD_Fp180
18953 { 1265, 6, 1, 0, 62, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x200000ULL, ImplicitList12, ImplicitList13, OperandInfo197, -1 ,nullptr }, // Inst #1265 = LD_Fp32m
18954 { 1266, 6, 1, 0, 62, 0|(1ULL<<MCID::MayLoad), 0x200000ULL, ImplicitList12, ImplicitList13, OperandInfo198, -1 ,nullptr }, // Inst #1266 = LD_Fp32m64
18955 { 1267, 6, 1, 0, 62, 0|(1ULL<<MCID::MayLoad), 0x200000ULL, ImplicitList12, ImplicitList13, OperandInfo199, -1 ,nullptr }, // Inst #1267 = LD_Fp32m80
18956 { 1268, 6, 1, 0, 62, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x200000ULL, ImplicitList12, ImplicitList13, OperandInfo198, -1 ,nullptr }, // Inst #1268 = LD_Fp64m
18957 { 1269, 6, 1, 0, 62, 0|(1ULL<<MCID::MayLoad), 0x200000ULL, ImplicitList12, ImplicitList13, OperandInfo199, -1 ,nullptr }, // Inst #1269 = LD_Fp64m80
18958 { 1270, 6, 1, 0, 62, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x200000ULL, ImplicitList12, ImplicitList13, OperandInfo199, -1 ,nullptr }, // Inst #1270 = LD_Fp80m
18959 { 1271, 1, 0, 0, 581, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3640000038ULL, ImplicitList12, ImplicitList13, OperandInfo92, -1 ,nullptr }, // Inst #1271 = LD_Frr
19552 { 1864, 5, 0, 0, 776, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x3600000029ULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #1864 = MUL_F32m
19553 { 1865, 5, 0, 0, 776, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x3700000029ULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #1865 = MUL_F64m
19554 { 1866, 5, 0, 0, 778, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x3780000029ULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #1866 = MUL_FI16m
19555 { 1867, 5, 0, 0, 778, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x3680000029ULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #1867 = MUL_FI32m
19556 { 1868, 1, 0, 0, 887, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3780000039ULL, ImplicitList12, ImplicitList13, OperandInfo92, -1 ,nullptr }, // Inst #1868 = MUL_FPrST0
19557 { 1869, 1, 0, 0, 887, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3600000039ULL, ImplicitList12, ImplicitList13, OperandInfo92, -1 ,nullptr }, // Inst #1869 = MUL_FST0r
19558 { 1870, 3, 1, 0, 0, 0, 0x800000ULL, ImplicitList12, ImplicitList13, OperandInfo93, -1 ,nullptr }, // Inst #1870 = MUL_Fp32
19559 { 1871, 7, 1, 0, 236, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo94, -1 ,nullptr }, // Inst #1871 = MUL_Fp32m
19560 { 1872, 3, 1, 0, 0, 0, 0x800000ULL, ImplicitList12, ImplicitList13, OperandInfo95, -1 ,nullptr }, // Inst #1872 = MUL_Fp64
19561 { 1873, 7, 1, 0, 236, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo96, -1 ,nullptr }, // Inst #1873 = MUL_Fp64m
19562 { 1874, 7, 1, 0, 236, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo96, -1 ,nullptr }, // Inst #1874 = MUL_Fp64m32
19563 { 1875, 3, 1, 0, 0, 0, 0x800000ULL, ImplicitList12, ImplicitList13, OperandInfo97, -1 ,nullptr }, // Inst #1875 = MUL_Fp80
19564 { 1876, 7, 1, 0, 236, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #1876 = MUL_Fp80m32
19565 { 1877, 7, 1, 0, 236, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #1877 = MUL_Fp80m64
19566 { 1878, 7, 1, 0, 236, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo94, -1 ,nullptr }, // Inst #1878 = MUL_FpI16m32
19567 { 1879, 7, 1, 0, 236, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo96, -1 ,nullptr }, // Inst #1879 = MUL_FpI16m64
19568 { 1880, 7, 1, 0, 236, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #1880 = MUL_FpI16m80
19569 { 1881, 7, 1, 0, 236, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo94, -1 ,nullptr }, // Inst #1881 = MUL_FpI32m32
19570 { 1882, 7, 1, 0, 236, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo96, -1 ,nullptr }, // Inst #1882 = MUL_FpI32m64
19571 { 1883, 7, 1, 0, 236, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #1883 = MUL_FpI32m80
19572 { 1884, 1, 0, 0, 887, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3700000039ULL, ImplicitList12, ImplicitList13, OperandInfo92, -1 ,nullptr }, // Inst #1884 = MUL_FrST0
20385 { 2697, 0, 0, 0, 706, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x364000007eULL, ImplicitList12, ImplicitList13, nullptr, -1 ,nullptr }, // Inst #2697 = SIN_F
20386 { 2698, 2, 1, 0, 706, 0, 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo73, -1 ,nullptr }, // Inst #2698 = SIN_Fp32
20387 { 2699, 2, 1, 0, 706, 0, 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo74, -1 ,nullptr }, // Inst #2699 = SIN_Fp64
20388 { 2700, 2, 1, 0, 706, 0, 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo75, -1 ,nullptr }, // Inst #2700 = SIN_Fp80
20412 { 2724, 0, 0, 0, 318, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x364000007aULL, ImplicitList12, ImplicitList13, nullptr, -1 ,nullptr }, // Inst #2724 = SQRT_F
20413 { 2725, 2, 1, 0, 318, 0, 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo73, -1 ,nullptr }, // Inst #2725 = SQRT_Fp32
20414 { 2726, 2, 1, 0, 318, 0, 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo74, -1 ,nullptr }, // Inst #2726 = SQRT_Fp64
20415 { 2727, 2, 1, 0, 318, 0, 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo75, -1 ,nullptr }, // Inst #2727 = SQRT_Fp80
20431 { 2743, 5, 0, 0, 609, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x364000002aULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #2743 = ST_F32m
20432 { 2744, 5, 0, 0, 609, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x374000002aULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #2744 = ST_F64m
20433 { 2745, 5, 0, 0, 812, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x364000002bULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #2745 = ST_FP32m
20434 { 2746, 5, 0, 0, 812, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x374000002bULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #2746 = ST_FP64m
20435 { 2747, 5, 0, 0, 633, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x36c000002fULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #2747 = ST_FP80m
20436 { 2748, 1, 0, 0, 610, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x374000003bULL, ImplicitList12, ImplicitList13, OperandInfo92, -1 ,nullptr }, // Inst #2748 = ST_FPrr
20437 { 2749, 6, 0, 0, 134, 0|(1ULL<<MCID::MayStore), 0x400000ULL, ImplicitList12, ImplicitList13, OperandInfo194, -1 ,nullptr }, // Inst #2749 = ST_Fp32m
20438 { 2750, 6, 0, 0, 134, 0|(1ULL<<MCID::MayStore), 0x400000ULL, ImplicitList12, ImplicitList13, OperandInfo195, -1 ,nullptr }, // Inst #2750 = ST_Fp64m
20439 { 2751, 6, 0, 0, 134, 0|(1ULL<<MCID::MayStore), 0x400000ULL, ImplicitList12, ImplicitList13, OperandInfo195, -1 ,nullptr }, // Inst #2751 = ST_Fp64m32
20440 { 2752, 6, 0, 0, 134, 0|(1ULL<<MCID::MayStore), 0x400000ULL, ImplicitList12, ImplicitList13, OperandInfo196, -1 ,nullptr }, // Inst #2752 = ST_Fp80m32
20441 { 2753, 6, 0, 0, 134, 0|(1ULL<<MCID::MayStore), 0x400000ULL, ImplicitList12, ImplicitList13, OperandInfo196, -1 ,nullptr }, // Inst #2753 = ST_Fp80m64
20442 { 2754, 6, 0, 0, 134, 0|(1ULL<<MCID::MayStore), 0x400000ULL, ImplicitList12, ImplicitList13, OperandInfo194, -1 ,nullptr }, // Inst #2754 = ST_FpP32m
20443 { 2755, 6, 0, 0, 134, 0|(1ULL<<MCID::MayStore), 0x400000ULL, ImplicitList12, ImplicitList13, OperandInfo195, -1 ,nullptr }, // Inst #2755 = ST_FpP64m
20444 { 2756, 6, 0, 0, 134, 0|(1ULL<<MCID::MayStore), 0x400000ULL, ImplicitList12, ImplicitList13, OperandInfo195, -1 ,nullptr }, // Inst #2756 = ST_FpP64m32
20445 { 2757, 6, 0, 0, 134, 0|(1ULL<<MCID::MayStore), 0x400000ULL, ImplicitList12, ImplicitList13, OperandInfo196, -1 ,nullptr }, // Inst #2757 = ST_FpP80m
20446 { 2758, 6, 0, 0, 134, 0|(1ULL<<MCID::MayStore), 0x400000ULL, ImplicitList12, ImplicitList13, OperandInfo196, -1 ,nullptr }, // Inst #2758 = ST_FpP80m32
20447 { 2759, 6, 0, 0, 134, 0|(1ULL<<MCID::MayStore), 0x400000ULL, ImplicitList12, ImplicitList13, OperandInfo196, -1 ,nullptr }, // Inst #2759 = ST_FpP80m64
20448 { 2760, 1, 0, 0, 610, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x374000003aULL, ImplicitList12, ImplicitList13, OperandInfo92, -1 ,nullptr }, // Inst #2760 = ST_Frr
20489 { 2801, 5, 0, 0, 773, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x360000002dULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #2801 = SUBR_F32m
20490 { 2802, 5, 0, 0, 773, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x370000002dULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #2802 = SUBR_F64m
20491 { 2803, 5, 0, 0, 777, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x378000002dULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #2803 = SUBR_FI16m
20492 { 2804, 5, 0, 0, 777, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x368000002dULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #2804 = SUBR_FI32m
20493 { 2805, 1, 0, 0, 1060, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x378000003cULL, ImplicitList12, ImplicitList13, OperandInfo92, -1 ,nullptr }, // Inst #2805 = SUBR_FPrST0
20494 { 2806, 1, 0, 0, 1060, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x360000003dULL, ImplicitList12, ImplicitList13, OperandInfo92, -1 ,nullptr }, // Inst #2806 = SUBR_FST0r
20495 { 2807, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo94, -1 ,nullptr }, // Inst #2807 = SUBR_Fp32m
20496 { 2808, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo96, -1 ,nullptr }, // Inst #2808 = SUBR_Fp64m
20497 { 2809, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo96, -1 ,nullptr }, // Inst #2809 = SUBR_Fp64m32
20498 { 2810, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #2810 = SUBR_Fp80m32
20499 { 2811, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #2811 = SUBR_Fp80m64
20500 { 2812, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo94, -1 ,nullptr }, // Inst #2812 = SUBR_FpI16m32
20501 { 2813, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo96, -1 ,nullptr }, // Inst #2813 = SUBR_FpI16m64
20502 { 2814, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #2814 = SUBR_FpI16m80
20503 { 2815, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo94, -1 ,nullptr }, // Inst #2815 = SUBR_FpI32m32
20504 { 2816, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo96, -1 ,nullptr }, // Inst #2816 = SUBR_FpI32m64
20505 { 2817, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #2817 = SUBR_FpI32m80
20506 { 2818, 1, 0, 0, 1060, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x370000003cULL, ImplicitList12, ImplicitList13, OperandInfo92, -1 ,nullptr }, // Inst #2818 = SUBR_FrST0
20515 { 2827, 5, 0, 0, 773, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x360000002cULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #2827 = SUB_F32m
20516 { 2828, 5, 0, 0, 773, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x370000002cULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #2828 = SUB_F64m
20517 { 2829, 5, 0, 0, 777, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x378000002cULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #2829 = SUB_FI16m
20518 { 2830, 5, 0, 0, 777, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x368000002cULL, ImplicitList12, ImplicitList13, OperandInfo91, -1 ,nullptr }, // Inst #2830 = SUB_FI32m
20519 { 2831, 1, 0, 0, 1060, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x378000003dULL, ImplicitList12, ImplicitList13, OperandInfo92, -1 ,nullptr }, // Inst #2831 = SUB_FPrST0
20520 { 2832, 1, 0, 0, 1060, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x360000003cULL, ImplicitList12, ImplicitList13, OperandInfo92, -1 ,nullptr }, // Inst #2832 = SUB_FST0r
20521 { 2833, 3, 1, 0, 0, 0, 0x800000ULL, ImplicitList12, ImplicitList13, OperandInfo93, -1 ,nullptr }, // Inst #2833 = SUB_Fp32
20522 { 2834, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo94, -1 ,nullptr }, // Inst #2834 = SUB_Fp32m
20523 { 2835, 3, 1, 0, 0, 0, 0x800000ULL, ImplicitList12, ImplicitList13, OperandInfo95, -1 ,nullptr }, // Inst #2835 = SUB_Fp64
20524 { 2836, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo96, -1 ,nullptr }, // Inst #2836 = SUB_Fp64m
20525 { 2837, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo96, -1 ,nullptr }, // Inst #2837 = SUB_Fp64m32
20526 { 2838, 3, 1, 0, 0, 0, 0x800000ULL, ImplicitList12, ImplicitList13, OperandInfo97, -1 ,nullptr }, // Inst #2838 = SUB_Fp80
20527 { 2839, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #2839 = SUB_Fp80m32
20528 { 2840, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #2840 = SUB_Fp80m64
20529 { 2841, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo94, -1 ,nullptr }, // Inst #2841 = SUB_FpI16m32
20530 { 2842, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo96, -1 ,nullptr }, // Inst #2842 = SUB_FpI16m64
20531 { 2843, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #2843 = SUB_FpI16m80
20532 { 2844, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo94, -1 ,nullptr }, // Inst #2844 = SUB_FpI32m32
20533 { 2845, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo96, -1 ,nullptr }, // Inst #2845 = SUB_FpI32m64
20534 { 2846, 7, 1, 0, 29, 0|(1ULL<<MCID::MayLoad), 0x600000ULL, ImplicitList12, ImplicitList13, OperandInfo98, -1 ,nullptr }, // Inst #2846 = SUB_FpI32m80
20535 { 2847, 1, 0, 0, 1060, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x370000003dULL, ImplicitList12, ImplicitList13, OperandInfo92, -1 ,nullptr }, // Inst #2847 = SUB_FrST0
20593 { 2905, 0, 0, 0, 1025, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3640000064ULL, ImplicitList12, ImplicitList13, nullptr, -1 ,nullptr }, // Inst #2905 = TST_F
20594 { 2906, 1, 0, 0, 655, 0, 0x400000ULL, ImplicitList12, ImplicitList13, OperandInfo237, -1 ,nullptr }, // Inst #2906 = TST_Fp32
20595 { 2907, 1, 0, 0, 655, 0, 0x400000ULL, ImplicitList12, ImplicitList13, OperandInfo238, -1 ,nullptr }, // Inst #2907 = TST_Fp64
20596 { 2908, 1, 0, 0, 655, 0, 0x400000ULL, ImplicitList12, ImplicitList13, OperandInfo239, -1 ,nullptr }, // Inst #2908 = TST_Fp80
20619 { 2931, 2, 0, 0, 77, 0, 0xa00000ULL, ImplicitList12, ImplicitList31, OperandInfo73, -1 ,nullptr }, // Inst #2931 = UCOM_FpIr32
20620 { 2932, 2, 0, 0, 77, 0, 0xa00000ULL, ImplicitList12, ImplicitList31, OperandInfo74, -1 ,nullptr }, // Inst #2932 = UCOM_FpIr64
20621 { 2933, 2, 0, 0, 77, 0, 0xa00000ULL, ImplicitList12, ImplicitList31, OperandInfo75, -1 ,nullptr }, // Inst #2933 = UCOM_FpIr80
20622 { 2934, 2, 0, 0, 77, 0, 0xa00000ULL, ImplicitList12, ImplicitList13, OperandInfo73, -1 ,nullptr }, // Inst #2934 = UCOM_Fpr32
20623 { 2935, 2, 0, 0, 77, 0, 0xa00000ULL, ImplicitList12, ImplicitList13, OperandInfo74, -1 ,nullptr }, // Inst #2935 = UCOM_Fpr64
20624 { 2936, 2, 0, 0, 77, 0, 0xa00000ULL, ImplicitList12, ImplicitList13, OperandInfo75, -1 ,nullptr }, // Inst #2936 = UCOM_Fpr80
32866 { 15178, 1, 0, 0, 595, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3640000039ULL, ImplicitList12, ImplicitList13, OperandInfo92, -1 ,nullptr }, // Inst #15178 = XCH_F