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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/X86/X86GenInstrInfo.inc17940 { 252, 1, 0, 0, 644, 0, 0x3540020001ULL, ImplicitList10, ImplicitList9, OperandInfo3, -1 ,nullptr }, // Inst #252 = AAD8i8
17987 { 299, 1, 0, 0, 1, 0, 0x140080081ULL, ImplicitList10, ImplicitList9, OperandInfo3, -1 ,nullptr }, // Inst #299 = ADD16i16
18080 { 392, 1, 0, 0, 1, 0, 0x940080081ULL, ImplicitList10, ImplicitList9, OperandInfo3, -1 ,nullptr }, // Inst #392 = AND16i16
18294 { 606, 0, 0, 0, 627, 0, 0x2600000081ULL, ImplicitList11, ImplicitList10, nullptr, -1 ,nullptr }, // Inst #606 = CBW
18375 { 687, 1, 0, 0, 1, 0|(1ULL<<MCID::Compare), 0xf40080081ULL, ImplicitList10, ImplicitList1, OperandInfo3, -1 ,nullptr }, // Inst #687 = CMP16i16
18428 { 740, 6, 0, 0, 662, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x2c400020a0ULL, ImplicitList10, ImplicitList9, OperandInfo77, -1 ,nullptr }, // Inst #740 = CMPXCHG16rm
18429 { 741, 2, 1, 0, 1047, 0, 0x2c400020b0ULL, ImplicitList10, ImplicitList9, OperandInfo108, -1 ,nullptr }, // Inst #741 = CMPXCHG16rr
18530 { 842, 0, 0, 0, 721, 0, 0x2640000081ULL, ImplicitList10, ImplicitList34, nullptr, -1 ,nullptr }, // Inst #842 = CWD
18531 { 843, 0, 0, 0, 627, 0, 0x2600000101ULL, ImplicitList10, ImplicitList7, nullptr, -1 ,nullptr }, // Inst #843 = CWDE
18551 { 863, 5, 0, 0, 119, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x3d8000002eULL, ImplicitList10, ImplicitList36, OperandInfo91, -1 ,nullptr }, // Inst #863 = DIV8m
18552 { 864, 1, 0, 0, 120, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3d8000003eULL, ImplicitList10, ImplicitList36, OperandInfo66, -1 ,nullptr }, // Inst #864 = DIV8r
18672 { 984, 0, 0, 0, 722, 0, 0x37c0000060ULL, ImplicitList13, ImplicitList10, nullptr, -1 ,nullptr }, // Inst #984 = FNSTSW16r
18725 { 1037, 5, 0, 0, 150, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x3d8000002fULL, ImplicitList10, ImplicitList36, OperandInfo91, -1 ,nullptr }, // Inst #1037 = IDIV8m
18726 { 1038, 1, 0, 0, 151, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3d8000003fULL, ImplicitList10, ImplicitList36, OperandInfo66, -1 ,nullptr }, // Inst #1038 = IDIV8r
18739 { 1051, 5, 0, 0, 152, 0|(1ULL<<MCID::MayLoad), 0x3dc00000adULL, ImplicitList10, ImplicitList35, OperandInfo91, -1 ,nullptr }, // Inst #1051 = IMUL16m
18740 { 1052, 1, 0, 0, 153, 0, 0x3dc00000bdULL, ImplicitList10, ImplicitList35, OperandInfo65, -1 ,nullptr }, // Inst #1052 = IMUL16r
18765 { 1077, 1, 0, 0, 694, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3940020081ULL, nullptr, ImplicitList10, OperandInfo3, -1 ,nullptr }, // Inst #1077 = IN16ri
18766 { 1078, 0, 0, 0, 695, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3b40000081ULL, ImplicitList41, ImplicitList10, nullptr, -1 ,nullptr }, // Inst #1078 = IN16rr
18932 { 1244, 6, 0, 0, 1046, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x2c410020a0ULL, ImplicitList10, ImplicitList9, OperandInfo77, -1 ,nullptr }, // Inst #1244 = LCMPXCHG16
19331 { 1643, 2, 0, 0, 1, 0|(1ULL<<MCID::MayLoad), 0x2840080283ULL, nullptr, ImplicitList10, OperandInfo267, -1 ,nullptr }, // Inst #1643 = MOV16ao16
19332 { 1644, 2, 0, 0, 1, 0|(1ULL<<MCID::MayLoad), 0x28400c0483ULL, nullptr, ImplicitList10, OperandInfo267, -1 ,nullptr }, // Inst #1644 = MOV16ao32
19333 { 1645, 2, 0, 0, 1, 0|(1ULL<<MCID::MayLoad), 0x2840120683ULL, nullptr, ImplicitList10, OperandInfo267, -1 ,nullptr }, // Inst #1645 = MOV16ao64
19337 { 1649, 2, 0, 0, 1, 0|(1ULL<<MCID::MayStore), 0x28c0080283ULL, ImplicitList10, nullptr, OperandInfo267, -1 ,nullptr }, // Inst #1649 = MOV16o16a
19338 { 1650, 2, 0, 0, 1, 0|(1ULL<<MCID::MayStore), 0x28c00c0483ULL, ImplicitList10, nullptr, OperandInfo267, -1 ,nullptr }, // Inst #1650 = MOV16o32a
19339 { 1651, 2, 0, 0, 1, 0|(1ULL<<MCID::MayStore), 0x28c0120683ULL, ImplicitList10, nullptr, OperandInfo267, -1 ,nullptr }, // Inst #1651 = MOV16o64a
19528 { 1840, 5, 0, 0, 152, 0|(1ULL<<MCID::MayLoad), 0x3dc00000acULL, ImplicitList10, ImplicitList35, OperandInfo91, -1 ,nullptr }, // Inst #1840 = MUL16m
19529 { 1841, 1, 0, 0, 153, 0, 0x3dc00000bcULL, ImplicitList10, ImplicitList35, OperandInfo65, -1 ,nullptr }, // Inst #1841 = MUL16r
19598 { 1910, 1, 0, 0, 1, 0, 0x340080081ULL, ImplicitList10, ImplicitList9, OperandInfo3, -1 ,nullptr }, // Inst #1910 = OR16i16
19639 { 1951, 1, 0, 0, 689, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x39c0020081ULL, ImplicitList10, nullptr, OperandInfo3, -1 ,nullptr }, // Inst #1951 = OUT16ir
20449 { 2761, 1, 0, 0, 1, 0|(1ULL<<MCID::Compare), 0xb40080081ULL, ImplicitList10, ImplicitList9, OperandInfo3, -1 ,nullptr }, // Inst #2761 = SUB16i16
20565 { 2877, 1, 0, 0, 1, 0|(1ULL<<MCID::Compare), 0x2a40080081ULL, ImplicitList10, ImplicitList1, OperandInfo3, -1 ,nullptr }, // Inst #2877 = TEST16i16
32855 { 15167, 2, 1, 0, 578, 0, 0x2400000082ULL, ImplicitList10, ImplicitList10, OperandInfo127, -1 ,nullptr }, // Inst #15167 = XCHG16ar
32855 { 15167, 2, 1, 0, 578, 0, 0x2400000082ULL, ImplicitList10, ImplicitList10, OperandInfo127, -1 ,nullptr }, // Inst #15167 = XCHG16ar
32875 { 15187, 1, 0, 0, 1, 0, 0xd40080081ULL, ImplicitList10, ImplicitList9, OperandInfo3, -1 ,nullptr }, // Inst #15187 = XOR16i16