|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/X86/X86GenAsmMatcher.inc 8560 { 1932 /* decq */, X86::DEC64r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
23131 { 1918 /* dec */, X86::DEC64r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR64 }, },
gen/lib/Target/X86/X86GenDAGISel.inc39220 /* 82099*/ OPC_MorphNodeTo2, TARGET_VAL(X86::DEC64r), 0,
39470 /* 82644*/ OPC_MorphNodeTo2, TARGET_VAL(X86::DEC64r), 0,
42820 /* 89538*/ OPC_MorphNodeTo2, TARGET_VAL(X86::DEC64r), 0,
gen/lib/Target/X86/X86GenGlobalISel.inc 1132 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::DEC64r,
lib/Target/X86/X86FastISel.cpp 2915 { X86::DEC8r, X86::DEC16r, X86::DEC32r, X86::DEC64r }
lib/Target/X86/X86FixupLEAs.cpp 173 case X86::DEC64r:
348 return IsINC ? X86::INC64r : X86::DEC64r;
lib/Target/X86/X86ISelLowering.cpp30789 unsigned DecROpc = (PVT == MVT::i64) ? X86::DEC64r : X86::DEC32r;
lib/Target/X86/X86InstrFoldTables.cpp 94 { X86::DEC64r, X86::DEC64m, 0 },
lib/Target/X86/X86InstrInfo.cpp 1003 case X86::DEC64r:
1006 unsigned Opc = MIOpc == X86::DEC64r ? X86::LEA64r
3425 case X86::DEC64r: case X86::DEC32r: case X86::DEC16r: case X86::DEC8r:
lib/Target/X86/X86MacroFusion.cpp 141 case X86::DEC64r:
lib/Target/X86/X86SpeculativeLoadHardening.cpp 1342 case X86::DEC8r: case X86::DEC16r: case X86::DEC32r: case X86::DEC64r: