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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
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References
gen/lib/Target/X86/X86GenAsmMatcher.inc 8306 { 905 /* cmovaeq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_3, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8312 { 928 /* cmovaq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_7, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8318 { 963 /* cmovbeq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_6, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8324 { 986 /* cmovbq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_2, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8330 { 1013 /* cmoveq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_4, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8336 { 1048 /* cmovgeq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_13, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8342 { 1071 /* cmovgq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_15, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8348 { 1106 /* cmovleq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_14, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8354 { 1129 /* cmovlq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_12, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8360 { 1158 /* cmovneq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_5, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8366 { 1189 /* cmovnoq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8372 { 1220 /* cmovnpq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_11, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8378 { 1251 /* cmovnsq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_9, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8384 { 1280 /* cmovoq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8390 { 1307 /* cmovpq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_10, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
8396 { 1334 /* cmovsq */, X86::CMOV64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_8, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22898 { 884 /* cmova */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_7, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22904 { 890 /* cmovae */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_3, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22910 { 942 /* cmovb */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_2, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22916 { 948 /* cmovbe */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_6, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22922 { 1000 /* cmove */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_4, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22928 { 1027 /* cmovg */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_15, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22934 { 1033 /* cmovge */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_13, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22940 { 1085 /* cmovl */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_12, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22946 { 1091 /* cmovle */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_14, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22952 { 1143 /* cmovne */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_5, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22958 { 1174 /* cmovno */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22964 { 1205 /* cmovnp */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_11, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22970 { 1236 /* cmovns */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_9, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22976 { 1267 /* cmovo */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22982 { 1294 /* cmovp */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_10, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22988 { 1321 /* cmovs */, X86::CMOV64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_8, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
gen/lib/Target/X86/X86GenDAGISel.inc33520 /* 69672*/ OPC_MorphNodeTo1, TARGET_VAL(X86::CMOV64rr), 0|OPFL_GlueInput,
lib/Target/X86/X86FrameLowering.cpp 656 BuildMI(&MBB, DL, TII.get(X86::CMOV64rr), FinalReg)
lib/Target/X86/X86ISelDAGToDAG.cpp 2648 Opc == X86::CMOV64rr)
lib/Target/X86/X86InstrFoldTables.cpp 1243 { X86::CMOV64rr, X86::CMOV64rm, 0 },
lib/Target/X86/X86InstrInfo.cpp 1805 case X86::CMOV16rr: case X86::CMOV32rr: case X86::CMOV64rr: {
2207 case X86::CMOV16rr: case X86::CMOV32rr: case X86::CMOV64rr:
2307 case 8: return HasMemoryOperand ? X86::CMOV32rm : X86::CMOV64rr;