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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/X86/X86GenAsmMatcher.inc 8308 { 913 /* cmovaew */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_3, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8314 { 935 /* cmovaw */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_7, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8320 { 971 /* cmovbew */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_6, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8326 { 993 /* cmovbw */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_2, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8332 { 1020 /* cmovew */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_4, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8338 { 1056 /* cmovgew */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_13, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8344 { 1078 /* cmovgw */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_15, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8350 { 1114 /* cmovlew */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_14, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8356 { 1136 /* cmovlw */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_12, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8362 { 1166 /* cmovnew */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_5, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8368 { 1197 /* cmovnow */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8374 { 1228 /* cmovnpw */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_11, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8380 { 1259 /* cmovnsw */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_9, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8386 { 1287 /* cmovow */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8392 { 1314 /* cmovpw */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_10, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8398 { 1341 /* cmovsw */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_8, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22894 { 884 /* cmova */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_7, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22900 { 890 /* cmovae */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_3, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22906 { 942 /* cmovb */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_2, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22912 { 948 /* cmovbe */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_6, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22918 { 1000 /* cmove */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_4, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22924 { 1027 /* cmovg */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_15, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22930 { 1033 /* cmovge */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_13, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22936 { 1085 /* cmovl */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_12, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22942 { 1091 /* cmovle */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_14, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22948 { 1143 /* cmovne */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_5, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22954 { 1174 /* cmovno */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22960 { 1205 /* cmovnp */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_11, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22966 { 1236 /* cmovns */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_9, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22972 { 1267 /* cmovo */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22978 { 1294 /* cmovp */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_10, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22984 { 1321 /* cmovs */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_8, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
gen/lib/Target/X86/X86GenDAGISel.inc33489 /* 69606*/ OPC_MorphNodeTo1, TARGET_VAL(X86::CMOV16rr), 0|OPFL_GlueInput,
lib/Target/X86/X86ISelDAGToDAG.cpp 2647 else if (Opc == X86::CMOV16rr || Opc == X86::CMOV32rr ||
lib/Target/X86/X86InstrFoldTables.cpp 1241 { X86::CMOV16rr, X86::CMOV16rm, 0 },
lib/Target/X86/X86InstrInfo.cpp 1805 case X86::CMOV16rr: case X86::CMOV32rr: case X86::CMOV64rr: {
2207 case X86::CMOV16rr: case X86::CMOV32rr: case X86::CMOV64rr:
2305 case 2: return HasMemoryOperand ? X86::CMOV16rm : X86::CMOV16rr;