|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/X86/X86GenAsmMatcher.inc 8089 { 238 /* andnq */, X86::ANDN64rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
22696 { 213 /* andn */, X86::ANDN64rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
gen/lib/Target/X86/X86GenDAGISel.inc20942 /* 42551*/ OPC_MorphNodeTo2, TARGET_VAL(X86::ANDN64rr), 0,
20963 /* 42601*/ OPC_MorphNodeTo2, TARGET_VAL(X86::ANDN64rr), 0,
37120 /* 77631*/ OPC_MorphNodeTo2, TARGET_VAL(X86::ANDN64rr), 0,
37141 /* 77680*/ OPC_MorphNodeTo2, TARGET_VAL(X86::ANDN64rr), 0,
gen/lib/Target/X86/X86GenGlobalISel.inc 3418 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ANDN64rr,
3440 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ANDN64rr,
lib/Target/X86/X86DomainReassignment.cpp 683 createReplacer(X86::ANDN64rr, X86::KANDNQrr);
lib/Target/X86/X86InstrFoldTables.cpp 1232 { X86::ANDN64rr, X86::ANDN64rm, 0 },
lib/Target/X86/X86InstrInfo.cpp 3462 case X86::ANDN64rr: case X86::ANDN64rm:
lib/Target/X86/X86SpeculativeLoadHardening.cpp 1340 case X86::ANDN32rr: case X86::ANDN64rr: