|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/X86/X86GenAsmMatcher.inc 8083 { 218 /* andnl */, X86::ANDN32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
22694 { 213 /* andn */, X86::ANDN32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
gen/lib/Target/X86/X86GenDAGISel.inc20936 /* 42538*/ OPC_MorphNodeTo2, TARGET_VAL(X86::ANDN32rr), 0,
20957 /* 42588*/ OPC_MorphNodeTo2, TARGET_VAL(X86::ANDN32rr), 0,
37114 /* 77618*/ OPC_MorphNodeTo2, TARGET_VAL(X86::ANDN32rr), 0,
37135 /* 77667*/ OPC_MorphNodeTo2, TARGET_VAL(X86::ANDN32rr), 0,
gen/lib/Target/X86/X86GenGlobalISel.inc 3082 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ANDN32rr,
3104 GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ANDN32rr,
lib/Target/X86/X86DomainReassignment.cpp 682 createReplacer(X86::ANDN32rr, X86::KANDNDrr);
lib/Target/X86/X86InstrFoldTables.cpp 1231 { X86::ANDN32rr, X86::ANDN32rm, 0 },
lib/Target/X86/X86InstrInfo.cpp 3461 case X86::ANDN32rr: case X86::ANDN32rm:
lib/Target/X86/X86SpeculativeLoadHardening.cpp 1340 case X86::ANDN32rr: case X86::ANDN64rr: