|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/X86/X86GenAsmMatcher.inc 8068 { 203 /* andb */, X86::AND8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
22680 { 199 /* and */, X86::AND8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
gen/lib/Target/X86/X86GenDAGISel.inc20971 /* 42616*/ OPC_MorphNodeTo2, TARGET_VAL(X86::AND8rr), 0,
37149 /* 77695*/ OPC_MorphNodeTo2, TARGET_VAL(X86::AND8rr), 0,
gen/lib/Target/X86/X86GenFastISel.inc 6184 return fastEmitInst_rr(X86::AND8rr, &X86::GR8RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
gen/lib/Target/X86/X86GenGlobalISel.inc 2693 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::AND8rr,
lib/Target/X86/X86DomainReassignment.cpp 698 createReplacer(X86::AND8rr, X86::KANDBrr);
lib/Target/X86/X86FastISel.cpp 1474 { X86::COND_E, X86::COND_NP, X86::AND8rr },
lib/Target/X86/X86ISelDAGToDAG.cpp 1183 if (N0Opc == X86::AND8rr || N0Opc == X86::AND16rr ||
4561 case ISD::AND: ROpc = X86::AND8rr; MOpc = X86::AND8rm; break;
lib/Target/X86/X86InstrFoldTables.cpp 82 { X86::AND8rr, X86::AND8mr, 0 },
1230 { X86::AND8rr, X86::AND8rm, 0 },
lib/Target/X86/X86InstrInfo.cpp 3435 case X86::AND16rr: case X86::AND8rr: case X86::AND64rm:
7262 case X86::AND8rr:
lib/Target/X86/X86InstructionSelector.cpp 999 {X86::COND_E, X86::COND_NP, X86::AND8rr},
lib/Target/X86/X86MacroFusion.cpp 71 case X86::AND8rr:
lib/Target/X86/X86SpeculativeLoadHardening.cpp 1317 case X86::AND8rr: case X86::AND8ri: