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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/X86/X86GenAsmMatcher.inc 8095 { 256 /* andq */, X86::AND64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
22676 { 199 /* and */, X86::AND64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR64 }, },
gen/lib/Target/X86/X86GenDAGISel.inc20986 /* 42649*/ OPC_MorphNodeTo2, TARGET_VAL(X86::AND64rr), 0,
37164 /* 77728*/ OPC_MorphNodeTo2, TARGET_VAL(X86::AND64rr), 0,
gen/lib/Target/X86/X86GenFastISel.inc 6202 return fastEmitInst_rr(X86::AND64rr, &X86::GR64RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
gen/lib/Target/X86/X86GenGlobalISel.inc 3455 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::AND64rr,
lib/Target/X86/X86DomainReassignment.cpp 680 createReplacer(X86::AND64rr, X86::KANDQrr);
lib/Target/X86/X86ISelDAGToDAG.cpp 1184 N0Opc == X86::AND32rr || N0Opc == X86::AND64rr) {
4591 case ISD::AND: ROpc = X86::AND64rr; MOpc = X86::AND64rm; break;
lib/Target/X86/X86InstrFoldTables.cpp 79 { X86::AND64rr, X86::AND64mr, 0 },
1229 { X86::AND64rr, X86::AND64rm, 0 },
lib/Target/X86/X86InstrInfo.cpp 3434 case X86::AND8ri: case X86::AND64rr: case X86::AND32rr:
7265 case X86::AND64rr:
lib/Target/X86/X86MacroFusion.cpp 68 case X86::AND64rr:
lib/Target/X86/X86SpeculativeLoadHardening.cpp 1320 case X86::AND64rr: case X86::AND64ri8: case X86::AND64ri32: