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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/X86/X86GenAsmMatcher.inc 8104 { 261 /* andw */, X86::AND16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22668 { 199 /* and */, X86::AND16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
gen/lib/Target/X86/X86GenDAGISel.inc20976 /* 42627*/ OPC_MorphNodeTo2, TARGET_VAL(X86::AND16rr), 0,
37154 /* 77706*/ OPC_MorphNodeTo2, TARGET_VAL(X86::AND16rr), 0,
gen/lib/Target/X86/X86GenFastISel.inc 6190 return fastEmitInst_rr(X86::AND16rr, &X86::GR16RegClass, Op0, Op0IsKill, Op1, Op1IsKill);
gen/lib/Target/X86/X86GenGlobalISel.inc 2744 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::AND16rr,
lib/Target/X86/X86DomainReassignment.cpp 651 createReplacer(X86::AND16rr, X86::KANDWrr);
lib/Target/X86/X86ISelDAGToDAG.cpp 1183 if (N0Opc == X86::AND8rr || N0Opc == X86::AND16rr ||
4571 case ISD::AND: ROpc = X86::AND16rr; MOpc = X86::AND16rm; break;
lib/Target/X86/X86InstrFoldTables.cpp 73 { X86::AND16rr, X86::AND16mr, 0 },
1227 { X86::AND16rr, X86::AND16rm, 0 },
lib/Target/X86/X86InstrInfo.cpp 3435 case X86::AND16rr: case X86::AND8rr: case X86::AND64rm:
7263 case X86::AND16rr:
lib/Target/X86/X86MacroFusion.cpp 60 case X86::AND16rr:
lib/Target/X86/X86SpeculativeLoadHardening.cpp 1318 case X86::AND16rr: case X86::AND16ri: case X86::AND16ri8: