|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/X86/X86GenAsmMatcher.inc 8112 { 261 /* andw */, X86::AND16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
22671 { 199 /* and */, X86::AND16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
gen/lib/Target/X86/X86GenDAGISel.inc20166 /* 40726*/ OPC_MorphNodeTo2, TARGET_VAL(X86::AND16rm), 0|OPFL_Chain|OPFL_MemRefs,
20217 /* 40835*/ OPC_MorphNodeTo2, TARGET_VAL(X86::AND16rm), 0|OPFL_Chain|OPFL_MemRefs,
36735 /* 76807*/ OPC_MorphNodeTo2, TARGET_VAL(X86::AND16rm), 0|OPFL_Chain|OPFL_MemRefs,
36786 /* 76916*/ OPC_MorphNodeTo2, TARGET_VAL(X86::AND16rm), 0|OPFL_Chain|OPFL_MemRefs,
lib/Target/X86/X86ISelDAGToDAG.cpp 1193 if (N0Opc == X86::AND8rm || N0Opc == X86::AND16rm ||
1198 case X86::AND16rm: NewOpc = X86::TEST16mr; break;
4571 case ISD::AND: ROpc = X86::AND16rr; MOpc = X86::AND16rm; break;
lib/Target/X86/X86InstrFoldTables.cpp 1227 { X86::AND16rr, X86::AND16rm, 0 },
lib/Target/X86/X86InstrInfo.cpp 3436 case X86::AND32rm: case X86::AND16rm: case X86::AND8rm:
lib/Target/X86/X86MacroFusion.cpp 59 case X86::AND16rm:
lib/Target/X86/X86SpeculativeLoadHardening.cpp 1493 case X86::AND16rm: