|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/X86/X86GenAsmMatcher.inc 8034 { 83 /* addq */, X86::ADD64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR64 }, },
22618 { 57 /* add */, X86::ADD64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_GR64, MCK_Mem64 }, },
gen/lib/Target/X86/X86GenDAGISel.inc39113 /* 81870*/ OPC_MorphNodeTo2, TARGET_VAL(X86::ADD64rm), 0|OPFL_Chain|OPFL_MemRefs,
39166 /* 81979*/ OPC_MorphNodeTo2, TARGET_VAL(X86::ADD64rm), 0|OPFL_Chain|OPFL_MemRefs,
42658 /* 89199*/ OPC_MorphNodeTo2, TARGET_VAL(X86::ADD64rm), 0|OPFL_Chain|OPFL_MemRefs,
42711 /* 89308*/ OPC_MorphNodeTo2, TARGET_VAL(X86::ADD64rm), 0|OPFL_Chain|OPFL_MemRefs,
lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp 412 case X86::ADD64rm:
lib/Target/X86/X86ISelDAGToDAG.cpp 4589 case ISD::ADD: ROpc = X86::ADD64rr; MOpc = X86::ADD64rm; break;
lib/Target/X86/X86InstrFoldTables.cpp 1201 { X86::ADD64rr_DB, X86::ADD64rm, TB_NO_REVERSE },
1211 { X86::ADD64rr, X86::ADD64rm, 0 },
lib/Target/X86/X86InstrInfo.cpp 3429 case X86::ADD16rr: case X86::ADD8rr: case X86::ADD64rm:
lib/Target/X86/X86MacroFusion.cpp 111 case X86::ADD64rm:
lib/Target/X86/X86SpeculativeLoadHardening.cpp 1489 case X86::ADD64rm:
unittests/tools/llvm-exegesis/X86/TargetTest.cpp 358 Instruction I(State.getInstrInfo(), State.getRATC(), X86::ADD64rm);