reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/X86/X86GenAsmMatcher.inc

 8013   { 66 /* addl */, X86::ADD32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22611   { 57 /* add */, X86::ADD32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },

gen/lib/Target/X86/X86GenDAGISel.inc

19641 /* 39637*/          OPC_MorphNodeTo2, TARGET_VAL(X86::ADD32rr), 0,
39387 /* 82469*/          OPC_MorphNodeTo2, TARGET_VAL(X86::ADD32rr), 0,
42931 /* 89801*/          OPC_MorphNodeTo2, TARGET_VAL(X86::ADD32rr), 0,

gen/lib/Target/X86/X86GenFastISel.inc

 6004   return fastEmitInst_rr(X86::ADD32rr, &X86::GR32RegClass, Op0, Op0IsKill, Op1, Op1IsKill);

gen/lib/Target/X86/X86GenGlobalISel.inc

 1077         GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADD32rr,
11823         GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD32rr,

lib/Target/X86/X86DomainReassignment.cpp

  670     createReplacer(X86::ADD32rr, X86::KADDDrr);

lib/Target/X86/X86FixupLEAs.cpp

  177   case X86::ADD32rr:
  320     return X86::ADD32rr;

lib/Target/X86/X86FrameLowering.cpp

  124   return isLP64 ? X86::ADD64rr : X86::ADD32rr;

lib/Target/X86/X86ISelDAGToDAG.cpp

 4579       case ISD::ADD: ROpc = X86::ADD32rr; MOpc = X86::ADD32rm; break;

lib/Target/X86/X86InstrFoldTables.cpp

   64   { X86::ADD32rr,     X86::ADD32mr,    0 },
 1210   { X86::ADD32rr,                  X86::ADD32rm,                  0 },

lib/Target/X86/X86InstrInfo.cpp

 1035   case X86::ADD32rr:
 3428   case X86::ADD8ri:    case X86::ADD64rr:  case X86::ADD32rr:

lib/Target/X86/X86InstructionSelector.cpp

 1117     Opcode = X86::ADD32rr;

lib/Target/X86/X86MacroFusion.cpp

  105   case X86::ADD32rr:

lib/Target/X86/X86SpeculativeLoadHardening.cpp

 1315   case X86::ADD32rr:  case X86::ADD32ri:   case X86::ADD32ri8: