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|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/X86/X86GenAsmMatcher.inc 5373 MCK_LAST_REGISTER = MCK_VR512,
6429 return B == MCK_VR512;
7280 case X86::ZMM16: OpKind = MCK_VR512; break;
7281 case X86::ZMM17: OpKind = MCK_VR512; break;
7282 case X86::ZMM18: OpKind = MCK_VR512; break;
7283 case X86::ZMM19: OpKind = MCK_VR512; break;
7284 case X86::ZMM20: OpKind = MCK_VR512; break;
7285 case X86::ZMM21: OpKind = MCK_VR512; break;
7286 case X86::ZMM22: OpKind = MCK_VR512; break;
7287 case X86::ZMM23: OpKind = MCK_VR512; break;
7288 case X86::ZMM24: OpKind = MCK_VR512; break;
7289 case X86::ZMM25: OpKind = MCK_VR512; break;
7290 case X86::ZMM26: OpKind = MCK_VR512; break;
7291 case X86::ZMM27: OpKind = MCK_VR512; break;
7292 case X86::ZMM28: OpKind = MCK_VR512; break;
7293 case X86::ZMM29: OpKind = MCK_VR512; break;
7294 case X86::ZMM30: OpKind = MCK_VR512; break;
7295 case X86::ZMM31: OpKind = MCK_VR512; break;
7492 case MCK_VR512: return "MCK_VR512";
10522 { 7988 /* v4fmaddps */, X86::V4FMADDPSrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
10522 { 7988 /* v4fmaddps */, X86::V4FMADDPSrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
10523 { 7988 /* v4fmaddps */, X86::V4FMADDPSrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10523 { 7988 /* v4fmaddps */, X86::V4FMADDPSrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10524 { 7988 /* v4fmaddps */, X86::V4FMADDPSrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10524 { 7988 /* v4fmaddps */, X86::V4FMADDPSrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10528 { 8008 /* v4fnmaddps */, X86::V4FNMADDPSrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
10528 { 8008 /* v4fnmaddps */, X86::V4FNMADDPSrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
10529 { 8008 /* v4fnmaddps */, X86::V4FNMADDPSrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10529 { 8008 /* v4fnmaddps */, X86::V4FNMADDPSrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10530 { 8008 /* v4fnmaddps */, X86::V4FNMADDPSrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10530 { 8008 /* v4fnmaddps */, X86::V4FNMADDPSrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10538 { 8030 /* vaddpd */, X86::VADDPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10538 { 8030 /* vaddpd */, X86::VADDPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10538 { 8030 /* vaddpd */, X86::VADDPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10543 { 8030 /* vaddpd */, X86::VADDPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
10543 { 8030 /* vaddpd */, X86::VADDPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
10544 { 8030 /* vaddpd */, X86::VADDPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
10544 { 8030 /* vaddpd */, X86::VADDPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
10544 { 8030 /* vaddpd */, X86::VADDPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
10547 { 8030 /* vaddpd */, X86::VADDPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
10547 { 8030 /* vaddpd */, X86::VADDPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
10550 { 8030 /* vaddpd */, X86::VADDPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10550 { 8030 /* vaddpd */, X86::VADDPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10550 { 8030 /* vaddpd */, X86::VADDPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10553 { 8030 /* vaddpd */, X86::VADDPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10553 { 8030 /* vaddpd */, X86::VADDPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10556 { 8030 /* vaddpd */, X86::VADDPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10556 { 8030 /* vaddpd */, X86::VADDPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10556 { 8030 /* vaddpd */, X86::VADDPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10557 { 8030 /* vaddpd */, X86::VADDPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10557 { 8030 /* vaddpd */, X86::VADDPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10557 { 8030 /* vaddpd */, X86::VADDPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10560 { 8030 /* vaddpd */, X86::VADDPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10560 { 8030 /* vaddpd */, X86::VADDPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10563 { 8030 /* vaddpd */, X86::VADDPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10563 { 8030 /* vaddpd */, X86::VADDPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10564 { 8030 /* vaddpd */, X86::VADDPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10564 { 8030 /* vaddpd */, X86::VADDPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10564 { 8030 /* vaddpd */, X86::VADDPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10567 { 8030 /* vaddpd */, X86::VADDPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10567 { 8030 /* vaddpd */, X86::VADDPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10572 { 8037 /* vaddps */, X86::VADDPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10572 { 8037 /* vaddps */, X86::VADDPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10572 { 8037 /* vaddps */, X86::VADDPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10577 { 8037 /* vaddps */, X86::VADDPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
10577 { 8037 /* vaddps */, X86::VADDPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
10578 { 8037 /* vaddps */, X86::VADDPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
10578 { 8037 /* vaddps */, X86::VADDPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
10578 { 8037 /* vaddps */, X86::VADDPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
10579 { 8037 /* vaddps */, X86::VADDPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
10579 { 8037 /* vaddps */, X86::VADDPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
10584 { 8037 /* vaddps */, X86::VADDPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10584 { 8037 /* vaddps */, X86::VADDPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10584 { 8037 /* vaddps */, X86::VADDPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10587 { 8037 /* vaddps */, X86::VADDPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10587 { 8037 /* vaddps */, X86::VADDPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10590 { 8037 /* vaddps */, X86::VADDPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10590 { 8037 /* vaddps */, X86::VADDPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10590 { 8037 /* vaddps */, X86::VADDPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10591 { 8037 /* vaddps */, X86::VADDPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10591 { 8037 /* vaddps */, X86::VADDPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10591 { 8037 /* vaddps */, X86::VADDPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10594 { 8037 /* vaddps */, X86::VADDPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10594 { 8037 /* vaddps */, X86::VADDPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10597 { 8037 /* vaddps */, X86::VADDPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10597 { 8037 /* vaddps */, X86::VADDPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10598 { 8037 /* vaddps */, X86::VADDPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10598 { 8037 /* vaddps */, X86::VADDPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10598 { 8037 /* vaddps */, X86::VADDPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10599 { 8037 /* vaddps */, X86::VADDPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10599 { 8037 /* vaddps */, X86::VADDPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10636 { 8078 /* vaesdec */, X86::VAESDECZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10636 { 8078 /* vaesdec */, X86::VAESDECZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10636 { 8078 /* vaesdec */, X86::VAESDECZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10641 { 8078 /* vaesdec */, X86::VAESDECZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
10641 { 8078 /* vaesdec */, X86::VAESDECZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
10646 { 8086 /* vaesdeclast */, X86::VAESDECLASTZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10646 { 8086 /* vaesdeclast */, X86::VAESDECLASTZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10646 { 8086 /* vaesdeclast */, X86::VAESDECLASTZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10651 { 8086 /* vaesdeclast */, X86::VAESDECLASTZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
10651 { 8086 /* vaesdeclast */, X86::VAESDECLASTZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
10656 { 8098 /* vaesenc */, X86::VAESENCZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10656 { 8098 /* vaesenc */, X86::VAESENCZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10656 { 8098 /* vaesenc */, X86::VAESENCZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10661 { 8098 /* vaesenc */, X86::VAESENCZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
10661 { 8098 /* vaesenc */, X86::VAESENCZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
10666 { 8106 /* vaesenclast */, X86::VAESENCLASTZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10666 { 8106 /* vaesenclast */, X86::VAESENCLASTZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10666 { 8106 /* vaesenclast */, X86::VAESENCLASTZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10671 { 8106 /* vaesenclast */, X86::VAESENCLASTZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
10671 { 8106 /* vaesenclast */, X86::VAESENCLASTZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
10678 { 8143 /* valignd */, X86::VALIGNDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
10678 { 8143 /* valignd */, X86::VALIGNDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
10678 { 8143 /* valignd */, X86::VALIGNDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
10681 { 8143 /* valignd */, X86::VALIGNDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
10681 { 8143 /* valignd */, X86::VALIGNDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
10682 { 8143 /* valignd */, X86::VALIGNDZrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
10682 { 8143 /* valignd */, X86::VALIGNDZrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
10687 { 8143 /* valignd */, X86::VALIGNDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10687 { 8143 /* valignd */, X86::VALIGNDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10687 { 8143 /* valignd */, X86::VALIGNDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10690 { 8143 /* valignd */, X86::VALIGNDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10690 { 8143 /* valignd */, X86::VALIGNDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10693 { 8143 /* valignd */, X86::VALIGNDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10693 { 8143 /* valignd */, X86::VALIGNDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10693 { 8143 /* valignd */, X86::VALIGNDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10696 { 8143 /* valignd */, X86::VALIGNDZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10696 { 8143 /* valignd */, X86::VALIGNDZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10699 { 8143 /* valignd */, X86::VALIGNDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10699 { 8143 /* valignd */, X86::VALIGNDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10700 { 8143 /* valignd */, X86::VALIGNDZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10700 { 8143 /* valignd */, X86::VALIGNDZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10705 { 8151 /* valignq */, X86::VALIGNQZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
10705 { 8151 /* valignq */, X86::VALIGNQZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
10705 { 8151 /* valignq */, X86::VALIGNQZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
10708 { 8151 /* valignq */, X86::VALIGNQZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
10708 { 8151 /* valignq */, X86::VALIGNQZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
10711 { 8151 /* valignq */, X86::VALIGNQZrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
10711 { 8151 /* valignq */, X86::VALIGNQZrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
10714 { 8151 /* valignq */, X86::VALIGNQZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10714 { 8151 /* valignq */, X86::VALIGNQZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10714 { 8151 /* valignq */, X86::VALIGNQZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10717 { 8151 /* valignq */, X86::VALIGNQZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10717 { 8151 /* valignq */, X86::VALIGNQZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10720 { 8151 /* valignq */, X86::VALIGNQZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10720 { 8151 /* valignq */, X86::VALIGNQZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10720 { 8151 /* valignq */, X86::VALIGNQZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10723 { 8151 /* valignq */, X86::VALIGNQZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10723 { 8151 /* valignq */, X86::VALIGNQZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10726 { 8151 /* valignq */, X86::VALIGNQZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10726 { 8151 /* valignq */, X86::VALIGNQZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10729 { 8151 /* valignq */, X86::VALIGNQZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10729 { 8151 /* valignq */, X86::VALIGNQZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10734 { 8159 /* vandnpd */, X86::VANDNPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10734 { 8159 /* vandnpd */, X86::VANDNPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10734 { 8159 /* vandnpd */, X86::VANDNPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10739 { 8159 /* vandnpd */, X86::VANDNPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
10739 { 8159 /* vandnpd */, X86::VANDNPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
10742 { 8159 /* vandnpd */, X86::VANDNPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
10742 { 8159 /* vandnpd */, X86::VANDNPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
10745 { 8159 /* vandnpd */, X86::VANDNPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10745 { 8159 /* vandnpd */, X86::VANDNPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10745 { 8159 /* vandnpd */, X86::VANDNPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10748 { 8159 /* vandnpd */, X86::VANDNPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10748 { 8159 /* vandnpd */, X86::VANDNPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10751 { 8159 /* vandnpd */, X86::VANDNPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10751 { 8159 /* vandnpd */, X86::VANDNPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10751 { 8159 /* vandnpd */, X86::VANDNPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10754 { 8159 /* vandnpd */, X86::VANDNPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10754 { 8159 /* vandnpd */, X86::VANDNPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10757 { 8159 /* vandnpd */, X86::VANDNPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10757 { 8159 /* vandnpd */, X86::VANDNPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10760 { 8159 /* vandnpd */, X86::VANDNPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10760 { 8159 /* vandnpd */, X86::VANDNPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10765 { 8167 /* vandnps */, X86::VANDNPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10765 { 8167 /* vandnps */, X86::VANDNPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10765 { 8167 /* vandnps */, X86::VANDNPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10770 { 8167 /* vandnps */, X86::VANDNPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
10770 { 8167 /* vandnps */, X86::VANDNPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
10771 { 8167 /* vandnps */, X86::VANDNPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
10771 { 8167 /* vandnps */, X86::VANDNPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
10776 { 8167 /* vandnps */, X86::VANDNPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10776 { 8167 /* vandnps */, X86::VANDNPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10776 { 8167 /* vandnps */, X86::VANDNPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10779 { 8167 /* vandnps */, X86::VANDNPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10779 { 8167 /* vandnps */, X86::VANDNPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10782 { 8167 /* vandnps */, X86::VANDNPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10782 { 8167 /* vandnps */, X86::VANDNPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10782 { 8167 /* vandnps */, X86::VANDNPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10785 { 8167 /* vandnps */, X86::VANDNPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10785 { 8167 /* vandnps */, X86::VANDNPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10788 { 8167 /* vandnps */, X86::VANDNPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10788 { 8167 /* vandnps */, X86::VANDNPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10789 { 8167 /* vandnps */, X86::VANDNPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10789 { 8167 /* vandnps */, X86::VANDNPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10796 { 8175 /* vandpd */, X86::VANDPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10796 { 8175 /* vandpd */, X86::VANDPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10796 { 8175 /* vandpd */, X86::VANDPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10801 { 8175 /* vandpd */, X86::VANDPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
10801 { 8175 /* vandpd */, X86::VANDPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
10804 { 8175 /* vandpd */, X86::VANDPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
10804 { 8175 /* vandpd */, X86::VANDPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
10807 { 8175 /* vandpd */, X86::VANDPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10807 { 8175 /* vandpd */, X86::VANDPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10807 { 8175 /* vandpd */, X86::VANDPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10810 { 8175 /* vandpd */, X86::VANDPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10810 { 8175 /* vandpd */, X86::VANDPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10813 { 8175 /* vandpd */, X86::VANDPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10813 { 8175 /* vandpd */, X86::VANDPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10813 { 8175 /* vandpd */, X86::VANDPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10816 { 8175 /* vandpd */, X86::VANDPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10816 { 8175 /* vandpd */, X86::VANDPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10819 { 8175 /* vandpd */, X86::VANDPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10819 { 8175 /* vandpd */, X86::VANDPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10822 { 8175 /* vandpd */, X86::VANDPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10822 { 8175 /* vandpd */, X86::VANDPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10827 { 8182 /* vandps */, X86::VANDPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10827 { 8182 /* vandps */, X86::VANDPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10827 { 8182 /* vandps */, X86::VANDPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10832 { 8182 /* vandps */, X86::VANDPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
10832 { 8182 /* vandps */, X86::VANDPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
10833 { 8182 /* vandps */, X86::VANDPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
10833 { 8182 /* vandps */, X86::VANDPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
10838 { 8182 /* vandps */, X86::VANDPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10838 { 8182 /* vandps */, X86::VANDPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10838 { 8182 /* vandps */, X86::VANDPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10841 { 8182 /* vandps */, X86::VANDPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10841 { 8182 /* vandps */, X86::VANDPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10844 { 8182 /* vandps */, X86::VANDPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10844 { 8182 /* vandps */, X86::VANDPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10844 { 8182 /* vandps */, X86::VANDPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10847 { 8182 /* vandps */, X86::VANDPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10847 { 8182 /* vandps */, X86::VANDPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10850 { 8182 /* vandps */, X86::VANDPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10850 { 8182 /* vandps */, X86::VANDPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10851 { 8182 /* vandps */, X86::VANDPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10851 { 8182 /* vandps */, X86::VANDPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10856 { 8189 /* vblendmpd */, X86::VBLENDMPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10856 { 8189 /* vblendmpd */, X86::VBLENDMPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10856 { 8189 /* vblendmpd */, X86::VBLENDMPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10859 { 8189 /* vblendmpd */, X86::VBLENDMPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
10859 { 8189 /* vblendmpd */, X86::VBLENDMPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
10862 { 8189 /* vblendmpd */, X86::VBLENDMPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
10862 { 8189 /* vblendmpd */, X86::VBLENDMPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
10865 { 8189 /* vblendmpd */, X86::VBLENDMPDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10865 { 8189 /* vblendmpd */, X86::VBLENDMPDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10865 { 8189 /* vblendmpd */, X86::VBLENDMPDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10868 { 8189 /* vblendmpd */, X86::VBLENDMPDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10868 { 8189 /* vblendmpd */, X86::VBLENDMPDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10871 { 8189 /* vblendmpd */, X86::VBLENDMPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10871 { 8189 /* vblendmpd */, X86::VBLENDMPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10871 { 8189 /* vblendmpd */, X86::VBLENDMPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10874 { 8189 /* vblendmpd */, X86::VBLENDMPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10874 { 8189 /* vblendmpd */, X86::VBLENDMPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10877 { 8189 /* vblendmpd */, X86::VBLENDMPDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10877 { 8189 /* vblendmpd */, X86::VBLENDMPDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10880 { 8189 /* vblendmpd */, X86::VBLENDMPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10880 { 8189 /* vblendmpd */, X86::VBLENDMPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10883 { 8199 /* vblendmps */, X86::VBLENDMPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10883 { 8199 /* vblendmps */, X86::VBLENDMPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10883 { 8199 /* vblendmps */, X86::VBLENDMPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10886 { 8199 /* vblendmps */, X86::VBLENDMPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
10886 { 8199 /* vblendmps */, X86::VBLENDMPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
10887 { 8199 /* vblendmps */, X86::VBLENDMPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
10887 { 8199 /* vblendmps */, X86::VBLENDMPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
10892 { 8199 /* vblendmps */, X86::VBLENDMPSZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10892 { 8199 /* vblendmps */, X86::VBLENDMPSZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10892 { 8199 /* vblendmps */, X86::VBLENDMPSZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10895 { 8199 /* vblendmps */, X86::VBLENDMPSZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10895 { 8199 /* vblendmps */, X86::VBLENDMPSZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10898 { 8199 /* vblendmps */, X86::VBLENDMPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10898 { 8199 /* vblendmps */, X86::VBLENDMPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10898 { 8199 /* vblendmps */, X86::VBLENDMPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10901 { 8199 /* vblendmps */, X86::VBLENDMPSZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10901 { 8199 /* vblendmps */, X86::VBLENDMPSZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10904 { 8199 /* vblendmps */, X86::VBLENDMPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10904 { 8199 /* vblendmps */, X86::VBLENDMPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10905 { 8199 /* vblendmps */, X86::VBLENDMPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10905 { 8199 /* vblendmps */, X86::VBLENDMPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10926 { 8262 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
10928 { 8262 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512 }, },
10930 { 8262 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10932 { 8262 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10934 { 8262 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10936 { 8262 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10938 { 8278 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512 }, },
10940 { 8278 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10942 { 8278 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10943 { 8294 /* vbroadcastf32x8 */, X86::VBROADCASTF32X8rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
10944 { 8294 /* vbroadcastf32x8 */, X86::VBROADCASTF32X8rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10945 { 8294 /* vbroadcastf32x8 */, X86::VBROADCASTF32X8rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10947 { 8310 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512 }, },
10949 { 8310 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10951 { 8310 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10952 { 8326 /* vbroadcastf64x4 */, X86::VBROADCASTF64X4rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
10953 { 8326 /* vbroadcastf64x4 */, X86::VBROADCASTF64X4rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10954 { 8326 /* vbroadcastf64x4 */, X86::VBROADCASTF64X4rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10958 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
10961 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512 }, },
10964 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10967 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10970 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10973 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10975 { 8373 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512 }, },
10977 { 8373 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10979 { 8373 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10980 { 8389 /* vbroadcasti32x8 */, X86::VBROADCASTI32X8rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
10981 { 8389 /* vbroadcasti32x8 */, X86::VBROADCASTI32X8rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10982 { 8389 /* vbroadcasti32x8 */, X86::VBROADCASTI32X8rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10984 { 8405 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2rm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512 }, },
10986 { 8405 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10988 { 8405 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10989 { 8421 /* vbroadcasti64x4 */, X86::VBROADCASTI64X4rm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
10990 { 8421 /* vbroadcasti64x4 */, X86::VBROADCASTI64X4rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10991 { 8421 /* vbroadcasti64x4 */, X86::VBROADCASTI64X4rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10994 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
10997 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDZm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512 }, },
10999 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11001 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11003 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11005 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDZmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11010 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
11015 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR512 }, },
11018 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11021 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11024 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11027 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZmkz, Convert__Reg1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11032 { 8463 /* vcmppd */, X86::VCMPPDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
11032 { 8463 /* vcmppd */, X86::VCMPPDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
11037 { 8463 /* vcmppd */, X86::VCMPPDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
11038 { 8463 /* vcmppd */, X86::VCMPPDZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1 }, },
11038 { 8463 /* vcmppd */, X86::VCMPPDZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1 }, },
11041 { 8463 /* vcmppd */, X86::VCMPPDZrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
11044 { 8463 /* vcmppd */, X86::VCMPPDZrrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11044 { 8463 /* vcmppd */, X86::VCMPPDZrrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11047 { 8463 /* vcmppd */, X86::VCMPPDZrmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11048 { 8463 /* vcmppd */, X86::VCMPPDZrribk, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11048 { 8463 /* vcmppd */, X86::VCMPPDZrribk, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11051 { 8463 /* vcmppd */, X86::VCMPPDZrmbik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11056 { 8470 /* vcmpps */, X86::VCMPPSZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
11056 { 8470 /* vcmpps */, X86::VCMPPSZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
11061 { 8470 /* vcmpps */, X86::VCMPPSZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
11062 { 8470 /* vcmpps */, X86::VCMPPSZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1 }, },
11062 { 8470 /* vcmpps */, X86::VCMPPSZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1 }, },
11063 { 8470 /* vcmpps */, X86::VCMPPSZrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
11068 { 8470 /* vcmpps */, X86::VCMPPSZrrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11068 { 8470 /* vcmpps */, X86::VCMPPSZrrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11071 { 8470 /* vcmpps */, X86::VCMPPSZrmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11072 { 8470 /* vcmpps */, X86::VCMPPSZrribk, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11072 { 8470 /* vcmpps */, X86::VCMPPSZrribk, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11073 { 8470 /* vcmpps */, X86::VCMPPSZrmbik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11106 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
11106 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
11107 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
11112 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11112 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11113 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11116 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11116 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11121 { 8519 /* vcompressps */, X86::VCOMPRESSPSZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
11121 { 8519 /* vcompressps */, X86::VCOMPRESSPSZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
11122 { 8519 /* vcompressps */, X86::VCOMPRESSPSZmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
11127 { 8519 /* vcompressps */, X86::VCOMPRESSPSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11127 { 8519 /* vcompressps */, X86::VCOMPRESSPSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11128 { 8519 /* vcompressps */, X86::VCOMPRESSPSZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11131 { 8519 /* vcompressps */, X86::VCOMPRESSPSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11131 { 8519 /* vcompressps */, X86::VCOMPRESSPSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11136 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
11139 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
11144 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512 }, },
11147 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11149 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11153 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11155 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11158 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11162 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11167 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
11167 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
11172 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
11173 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
11173 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
11174 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
11179 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11179 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11182 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11185 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11185 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11186 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11186 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11189 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11192 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11193 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11193 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11194 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11199 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11199 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11199 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11202 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11202 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11203 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
11203 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
11208 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11208 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11208 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11211 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11211 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11214 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11214 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11214 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11217 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11217 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11220 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11220 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11221 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11221 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11226 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
11233 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11237 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11257 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
11259 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X }, },
11265 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11269 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11270 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11275 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11305 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
11307 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X }, },
11313 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11317 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11318 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11323 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11351 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
11351 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
11354 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
11355 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
11355 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
11358 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
11361 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11361 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11364 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11367 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11367 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11368 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11368 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11371 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11374 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11375 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11375 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11378 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11381 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
11383 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X }, },
11389 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11393 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11394 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11399 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11423 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
11423 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
11426 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
11427 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
11427 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
11430 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
11433 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11433 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11436 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11439 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11439 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11440 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11440 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11443 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11446 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11447 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11447 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11450 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11455 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
11458 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
11461 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512 }, },
11464 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11466 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11468 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11471 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11473 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11475 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11480 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
11480 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
11485 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
11486 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
11486 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
11487 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
11492 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11492 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11495 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11498 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11498 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11499 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11499 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11502 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11505 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11506 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11506 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11507 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11514 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
11517 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
11520 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512 }, },
11523 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512 }, },
11526 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11528 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11530 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11533 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11535 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11538 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11540 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11543 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11552 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X }, },
11553 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZmr, Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256 }, },
11554 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZrrb, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR256X }, },
11559 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11560 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZmrk, Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11561 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11564 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11565 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11568 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
11570 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
11572 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR256X, MCK_VR512 }, },
11575 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512 }, },
11578 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11580 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11584 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11585 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11587 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11590 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11592 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11595 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11598 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
11598 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
11601 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
11602 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
11602 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
11603 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
11608 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11608 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11611 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11614 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11614 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11615 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11615 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11618 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11621 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11622 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11622 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11623 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11628 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
11630 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
11632 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR256X, MCK_VR512 }, },
11635 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512 }, },
11638 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11640 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11644 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11645 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11647 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11650 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11652 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11655 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11658 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
11658 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
11661 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
11662 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
11662 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
11665 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
11668 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11668 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11671 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11674 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11674 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11675 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11675 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11678 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11681 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11682 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11682 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11685 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11688 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
11690 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X }, },
11696 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11700 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11701 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11706 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11852 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
11854 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X }, },
11860 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11862 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11865 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11870 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11898 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
11898 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
11901 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
11902 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
11902 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
11905 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
11908 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11908 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11911 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11912 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11912 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11915 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11915 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11918 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11921 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11922 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11922 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11925 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11928 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
11930 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X }, },
11936 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11938 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11941 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11946 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11970 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
11970 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
11973 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
11974 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
11974 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
11977 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
11980 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11980 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11983 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11984 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11984 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11987 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11987 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11990 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11993 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11994 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11994 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11997 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12002 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
12002 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
12007 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
12008 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
12008 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
12009 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
12014 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12014 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12017 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12018 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12018 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12021 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12021 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12024 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12027 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12028 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12028 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12029 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12034 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
12036 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
12038 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512 }, },
12041 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512 }, },
12044 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12046 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12048 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12051 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12053 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12056 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12058 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12061 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12064 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
12064 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
12067 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
12068 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
12068 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
12069 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
12074 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12074 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12077 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12078 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12078 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12081 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12081 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12084 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12087 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12088 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12088 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12089 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12094 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
12096 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
12098 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512 }, },
12101 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512 }, },
12104 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12106 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12108 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12111 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12113 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12116 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12118 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12121 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12188 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
12190 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
12194 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512 }, },
12197 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12199 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12203 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12205 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12208 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12212 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12215 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
12215 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
12218 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
12219 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
12219 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
12220 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
12225 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12225 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12228 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12231 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12231 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12232 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12232 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12235 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12238 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12239 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12239 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12240 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12245 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
12245 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
12248 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
12249 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
12249 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
12252 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
12255 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12255 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12258 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12261 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12261 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12262 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12262 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12265 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12268 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12269 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12269 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12272 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12275 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
12277 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X }, },
12283 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12287 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12288 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12293 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12337 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12337 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12337 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12340 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12340 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12343 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12343 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12343 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12346 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12346 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12349 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12349 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12349 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12352 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12352 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12357 { 9498 /* vdivpd */, X86::VDIVPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12357 { 9498 /* vdivpd */, X86::VDIVPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12357 { 9498 /* vdivpd */, X86::VDIVPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12362 { 9498 /* vdivpd */, X86::VDIVPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12362 { 9498 /* vdivpd */, X86::VDIVPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12363 { 9498 /* vdivpd */, X86::VDIVPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12363 { 9498 /* vdivpd */, X86::VDIVPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12363 { 9498 /* vdivpd */, X86::VDIVPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12366 { 9498 /* vdivpd */, X86::VDIVPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12366 { 9498 /* vdivpd */, X86::VDIVPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12369 { 9498 /* vdivpd */, X86::VDIVPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12369 { 9498 /* vdivpd */, X86::VDIVPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12369 { 9498 /* vdivpd */, X86::VDIVPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12372 { 9498 /* vdivpd */, X86::VDIVPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12372 { 9498 /* vdivpd */, X86::VDIVPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12375 { 9498 /* vdivpd */, X86::VDIVPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12375 { 9498 /* vdivpd */, X86::VDIVPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12375 { 9498 /* vdivpd */, X86::VDIVPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12376 { 9498 /* vdivpd */, X86::VDIVPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12376 { 9498 /* vdivpd */, X86::VDIVPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12376 { 9498 /* vdivpd */, X86::VDIVPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12379 { 9498 /* vdivpd */, X86::VDIVPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12379 { 9498 /* vdivpd */, X86::VDIVPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12382 { 9498 /* vdivpd */, X86::VDIVPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12382 { 9498 /* vdivpd */, X86::VDIVPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12383 { 9498 /* vdivpd */, X86::VDIVPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12383 { 9498 /* vdivpd */, X86::VDIVPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12383 { 9498 /* vdivpd */, X86::VDIVPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12386 { 9498 /* vdivpd */, X86::VDIVPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12386 { 9498 /* vdivpd */, X86::VDIVPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12391 { 9505 /* vdivps */, X86::VDIVPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12391 { 9505 /* vdivps */, X86::VDIVPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12391 { 9505 /* vdivps */, X86::VDIVPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12396 { 9505 /* vdivps */, X86::VDIVPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12396 { 9505 /* vdivps */, X86::VDIVPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12397 { 9505 /* vdivps */, X86::VDIVPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12397 { 9505 /* vdivps */, X86::VDIVPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12397 { 9505 /* vdivps */, X86::VDIVPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12398 { 9505 /* vdivps */, X86::VDIVPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12398 { 9505 /* vdivps */, X86::VDIVPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12403 { 9505 /* vdivps */, X86::VDIVPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12403 { 9505 /* vdivps */, X86::VDIVPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12403 { 9505 /* vdivps */, X86::VDIVPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12406 { 9505 /* vdivps */, X86::VDIVPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12406 { 9505 /* vdivps */, X86::VDIVPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12409 { 9505 /* vdivps */, X86::VDIVPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12409 { 9505 /* vdivps */, X86::VDIVPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12409 { 9505 /* vdivps */, X86::VDIVPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12410 { 9505 /* vdivps */, X86::VDIVPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12410 { 9505 /* vdivps */, X86::VDIVPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12410 { 9505 /* vdivps */, X86::VDIVPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12413 { 9505 /* vdivps */, X86::VDIVPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12413 { 9505 /* vdivps */, X86::VDIVPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12416 { 9505 /* vdivps */, X86::VDIVPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12416 { 9505 /* vdivps */, X86::VDIVPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12417 { 9505 /* vdivps */, X86::VDIVPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12417 { 9505 /* vdivps */, X86::VDIVPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12417 { 9505 /* vdivps */, X86::VDIVPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12418 { 9505 /* vdivps */, X86::VDIVPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12418 { 9505 /* vdivps */, X86::VDIVPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12445 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12445 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12445 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12448 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12448 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12449 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12449 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12454 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12454 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12454 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12457 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12457 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12460 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12460 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12460 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12463 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12463 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12466 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12466 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12467 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12467 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12480 { 9558 /* vexp2pd */, X86::VEXP2PDZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
12480 { 9558 /* vexp2pd */, X86::VEXP2PDZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
12481 { 9558 /* vexp2pd */, X86::VEXP2PDZm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
12482 { 9558 /* vexp2pd */, X86::VEXP2PDZrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
12482 { 9558 /* vexp2pd */, X86::VEXP2PDZrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
12483 { 9558 /* vexp2pd */, X86::VEXP2PDZmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
12484 { 9558 /* vexp2pd */, X86::VEXP2PDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12484 { 9558 /* vexp2pd */, X86::VEXP2PDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12485 { 9558 /* vexp2pd */, X86::VEXP2PDZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12486 { 9558 /* vexp2pd */, X86::VEXP2PDZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12486 { 9558 /* vexp2pd */, X86::VEXP2PDZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12487 { 9558 /* vexp2pd */, X86::VEXP2PDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12487 { 9558 /* vexp2pd */, X86::VEXP2PDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12488 { 9558 /* vexp2pd */, X86::VEXP2PDZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12489 { 9558 /* vexp2pd */, X86::VEXP2PDZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12490 { 9558 /* vexp2pd */, X86::VEXP2PDZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12490 { 9558 /* vexp2pd */, X86::VEXP2PDZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12491 { 9558 /* vexp2pd */, X86::VEXP2PDZmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12492 { 9566 /* vexp2ps */, X86::VEXP2PSZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
12492 { 9566 /* vexp2ps */, X86::VEXP2PSZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
12493 { 9566 /* vexp2ps */, X86::VEXP2PSZm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
12494 { 9566 /* vexp2ps */, X86::VEXP2PSZrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
12494 { 9566 /* vexp2ps */, X86::VEXP2PSZrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
12495 { 9566 /* vexp2ps */, X86::VEXP2PSZmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
12496 { 9566 /* vexp2ps */, X86::VEXP2PSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12496 { 9566 /* vexp2ps */, X86::VEXP2PSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12497 { 9566 /* vexp2ps */, X86::VEXP2PSZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12498 { 9566 /* vexp2ps */, X86::VEXP2PSZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12498 { 9566 /* vexp2ps */, X86::VEXP2PSZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12499 { 9566 /* vexp2ps */, X86::VEXP2PSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12499 { 9566 /* vexp2ps */, X86::VEXP2PSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12500 { 9566 /* vexp2ps */, X86::VEXP2PSZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12501 { 9566 /* vexp2ps */, X86::VEXP2PSZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12502 { 9566 /* vexp2ps */, X86::VEXP2PSZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12502 { 9566 /* vexp2ps */, X86::VEXP2PSZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12503 { 9566 /* vexp2ps */, X86::VEXP2PSZmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12506 { 9574 /* vexpandpd */, X86::VEXPANDPDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
12506 { 9574 /* vexpandpd */, X86::VEXPANDPDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
12509 { 9574 /* vexpandpd */, X86::VEXPANDPDZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
12512 { 9574 /* vexpandpd */, X86::VEXPANDPDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12512 { 9574 /* vexpandpd */, X86::VEXPANDPDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12515 { 9574 /* vexpandpd */, X86::VEXPANDPDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12518 { 9574 /* vexpandpd */, X86::VEXPANDPDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12518 { 9574 /* vexpandpd */, X86::VEXPANDPDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12521 { 9574 /* vexpandpd */, X86::VEXPANDPDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12524 { 9584 /* vexpandps */, X86::VEXPANDPSZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
12524 { 9584 /* vexpandps */, X86::VEXPANDPSZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
12527 { 9584 /* vexpandps */, X86::VEXPANDPSZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
12530 { 9584 /* vexpandps */, X86::VEXPANDPSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12530 { 9584 /* vexpandps */, X86::VEXPANDPSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12533 { 9584 /* vexpandps */, X86::VEXPANDPSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12536 { 9584 /* vexpandps */, X86::VEXPANDPSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12536 { 9584 /* vexpandps */, X86::VEXPANDPSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12539 { 9584 /* vexpandps */, X86::VEXPANDPSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12544 { 9607 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X }, },
12545 { 9607 /* vextractf32x4 */, X86::VEXTRACTF32x4Zmr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128 }, },
12548 { 9607 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12549 { 9607 /* vextractf32x4 */, X86::VEXTRACTF32x4Zmrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12551 { 9607 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12552 { 9621 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X }, },
12553 { 9621 /* vextractf32x8 */, X86::VEXTRACTF32x8Zmr, Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256 }, },
12554 { 9621 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12555 { 9621 /* vextractf32x8 */, X86::VEXTRACTF32x8Zmrk, Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12556 { 9621 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12559 { 9635 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X }, },
12560 { 9635 /* vextractf64x2 */, X86::VEXTRACTF64x2Zmr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128 }, },
12563 { 9635 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12564 { 9635 /* vextractf64x2 */, X86::VEXTRACTF64x2Zmrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12566 { 9635 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12567 { 9649 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X }, },
12568 { 9649 /* vextractf64x4 */, X86::VEXTRACTF64x4Zmr, Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256 }, },
12569 { 9649 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12570 { 9649 /* vextractf64x4 */, X86::VEXTRACTF64x4Zmrk, Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12571 { 9649 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12576 { 9676 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X }, },
12577 { 9676 /* vextracti32x4 */, X86::VEXTRACTI32x4Zmr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128 }, },
12580 { 9676 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12581 { 9676 /* vextracti32x4 */, X86::VEXTRACTI32x4Zmrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12583 { 9676 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12584 { 9690 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X }, },
12585 { 9690 /* vextracti32x8 */, X86::VEXTRACTI32x8Zmr, Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256 }, },
12586 { 9690 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12587 { 9690 /* vextracti32x8 */, X86::VEXTRACTI32x8Zmrk, Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12588 { 9690 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12591 { 9704 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X }, },
12592 { 9704 /* vextracti64x2 */, X86::VEXTRACTI64x2Zmr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128 }, },
12595 { 9704 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12596 { 9704 /* vextracti64x2 */, X86::VEXTRACTI64x2Zmrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12598 { 9704 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12599 { 9718 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X }, },
12600 { 9718 /* vextracti64x4 */, X86::VEXTRACTI64x4Zmr, Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256 }, },
12601 { 9718 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12602 { 9718 /* vextracti64x4 */, X86::VEXTRACTI64x4Zmrk, Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12603 { 9718 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12610 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12610 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12610 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12613 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12613 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12614 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrib, Convert__Reg1_4__Tie0_1_1__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12614 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrib, Convert__Reg1_4__Tie0_1_1__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12614 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrib, Convert__Reg1_4__Tie0_1_1__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12617 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12617 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12620 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12620 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12620 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12623 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12623 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12624 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12624 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12624 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12627 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12627 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12627 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12630 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12630 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12633 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12633 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12634 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrribkz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12634 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrribkz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12634 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrribkz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12637 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12637 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12640 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12640 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12640 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12643 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12643 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12644 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrrib, Convert__Reg1_4__Tie0_1_1__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12644 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrrib, Convert__Reg1_4__Tie0_1_1__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12644 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrrib, Convert__Reg1_4__Tie0_1_1__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12645 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12645 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12650 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12650 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12650 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12653 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12653 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12654 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12654 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12654 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12657 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12657 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12657 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12660 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12660 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12663 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12663 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12664 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrribkz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12664 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrribkz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12664 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrribkz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12665 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12665 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12690 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12690 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12690 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12695 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12695 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12696 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12696 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12696 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12699 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12699 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12702 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12702 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12702 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12705 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12705 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12708 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12708 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12708 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12709 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12709 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12709 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12712 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12712 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12715 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12715 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12716 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12716 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12716 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12719 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12719 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12724 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12724 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12724 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12729 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12729 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12730 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12730 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12730 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12731 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12731 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12736 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12736 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12736 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12739 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12739 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12742 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12742 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12742 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12743 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12743 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12743 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12746 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12746 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12749 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12749 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12750 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12750 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12750 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12751 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12751 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12780 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12780 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12780 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12785 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12785 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12786 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12786 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12786 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12789 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12789 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12792 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12792 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12792 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12795 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12795 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12798 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12798 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12798 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12799 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12799 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12799 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12802 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12802 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12805 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12805 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12806 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12806 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12806 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12809 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12809 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12814 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12814 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12814 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12819 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12819 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12820 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12820 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12820 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12821 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12821 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12826 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12826 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12826 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12829 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12829 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12832 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12832 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12832 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12833 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12833 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12833 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12836 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12836 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12839 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12839 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12840 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12840 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12840 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12841 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12841 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12870 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12870 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12870 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12875 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12875 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12876 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12876 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12876 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12879 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12879 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12882 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12882 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12882 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12885 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12885 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12888 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12888 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12888 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12889 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12889 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12889 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12892 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12892 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12895 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12895 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12896 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12896 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12896 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12899 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12899 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12904 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12904 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12904 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12909 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12909 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12910 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12910 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12910 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12911 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12911 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12916 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12916 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12916 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12919 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12919 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12922 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12922 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12922 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12923 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12923 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12923 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12926 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12926 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12929 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12929 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12930 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12930 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12930 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12931 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12931 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12978 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12978 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12978 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12983 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12983 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12984 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12984 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12984 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12987 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12987 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12990 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12990 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12990 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12993 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12993 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12996 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12996 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12996 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12997 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12997 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12997 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13000 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13000 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13003 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13003 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13004 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13004 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13004 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13007 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13007 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13012 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13012 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13012 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13017 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13017 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13018 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13018 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13018 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13019 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13019 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13024 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13024 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13024 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13027 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13027 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13030 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13030 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13030 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13031 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13031 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13031 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13034 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13034 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13037 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13037 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13038 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13038 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13038 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13039 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13039 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13046 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13046 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13046 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13051 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13051 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13052 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13052 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13052 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13055 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13055 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13058 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13058 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13058 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13061 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13061 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13064 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13064 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13064 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13065 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13065 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13065 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13068 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13068 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13071 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13071 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13072 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13072 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13072 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13075 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13075 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13080 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13080 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13080 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13085 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13085 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13086 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13086 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13086 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13087 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13087 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13092 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13092 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13092 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13095 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13095 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13098 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13098 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13098 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13099 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13099 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13099 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13102 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13102 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13105 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13105 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13106 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13106 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13106 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13107 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13107 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13114 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13114 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13114 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13119 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13119 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13120 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13120 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13120 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13123 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13123 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13126 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13126 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13126 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13129 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13129 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13132 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13132 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13132 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13133 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13133 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13133 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13136 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13136 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13139 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13139 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13140 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13140 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13140 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13143 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13143 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13148 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13148 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13148 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13153 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13153 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13154 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13154 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13154 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13155 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13155 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13160 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13160 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13160 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13163 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13163 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13166 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13166 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13166 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13167 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13167 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13167 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13170 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13170 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13173 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13173 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13174 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13174 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13174 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13175 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13175 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13194 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13194 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13194 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13199 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13199 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13200 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13200 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13200 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13203 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13203 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13206 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13206 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13206 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13209 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13209 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13212 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13212 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13212 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13213 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13213 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13213 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13216 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13216 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13219 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13219 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13220 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13220 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13220 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13223 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13223 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13228 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13228 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13228 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13233 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13233 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13234 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13234 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13234 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13235 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13235 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13240 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13240 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13240 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13243 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13243 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13246 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13246 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13246 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13247 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13247 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13247 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13250 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13250 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13253 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13253 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13254 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13254 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13254 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13255 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13255 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13284 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13284 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13284 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13289 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13289 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13290 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13290 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13290 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13293 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13293 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13296 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13296 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13296 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13299 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13299 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13302 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13302 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13302 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13303 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13303 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13303 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13306 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13306 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13309 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13309 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13310 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13310 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13310 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13313 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13313 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13318 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13318 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13318 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13323 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13323 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13324 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13324 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13324 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13325 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13325 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13330 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13330 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13330 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13333 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13333 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13336 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13336 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13336 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13337 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13337 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13337 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13340 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13340 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13343 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13343 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13344 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13344 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13344 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13345 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13345 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13374 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13374 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13374 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13379 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13379 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13380 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13380 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13380 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13383 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13383 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13386 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13386 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13386 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13389 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13389 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13392 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13392 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13392 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13393 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13393 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13393 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13396 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13396 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13399 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13399 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13400 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13400 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13400 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13403 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13403 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13408 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13408 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13408 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13413 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13413 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13414 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13414 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13414 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13415 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13415 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13420 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13420 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13420 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13423 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13423 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13426 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13426 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13426 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13427 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13427 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13427 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13430 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13430 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13433 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13433 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13434 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13434 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13434 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13435 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13435 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13464 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13464 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13464 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13469 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13469 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13470 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13470 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13470 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13473 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13473 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13476 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13476 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13476 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13479 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13479 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13482 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13482 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13482 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13483 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13483 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13483 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13486 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13486 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13489 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13489 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13490 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13490 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13490 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13493 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13493 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13498 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13498 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13498 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13503 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13503 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13504 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13504 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13504 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13505 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13505 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13510 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13510 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13510 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13513 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13513 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13516 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13516 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13516 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13517 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13517 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13517 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13520 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13520 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13523 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13523 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13524 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13524 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13524 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13525 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13525 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13532 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13532 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13532 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13537 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13537 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13538 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13538 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13538 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13541 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13541 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13544 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13544 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13544 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13547 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13547 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13550 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13550 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13550 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13551 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13551 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13551 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13554 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13554 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13557 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13557 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13558 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13558 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13558 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13561 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13561 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13566 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13566 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13566 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13571 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13571 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13572 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13572 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13572 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13573 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13573 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13578 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13578 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13578 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13581 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13581 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13584 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13584 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13584 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13585 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13585 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13585 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13588 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13588 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13591 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13591 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13592 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13592 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13592 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13593 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13593 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13600 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13600 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13600 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13605 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13605 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13606 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13606 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13606 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13609 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13609 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13612 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13612 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13612 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13615 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13615 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13618 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13618 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13618 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13619 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13619 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13619 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13622 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13622 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13625 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13625 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13626 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13626 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13626 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13629 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13629 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13634 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13634 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13634 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13639 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13639 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13640 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13640 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13640 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13641 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13641 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13646 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13646 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13646 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13649 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13649 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13652 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13652 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13652 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13653 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13653 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13653 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13656 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13656 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13659 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13659 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13660 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13660 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13660 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13661 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13661 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13698 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13698 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13698 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13703 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13703 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13704 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13704 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13704 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13707 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13707 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13710 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13710 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13710 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13713 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13713 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13716 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13716 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13716 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13717 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13717 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13717 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13720 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13720 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13723 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13723 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13724 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13724 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13724 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13727 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13727 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13732 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13732 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13732 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13737 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13737 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13738 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13738 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13738 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13739 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13739 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13744 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13744 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13744 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13747 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13747 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13750 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13750 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13750 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13751 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13751 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13751 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13754 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13754 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13757 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13757 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13758 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13758 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13758 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13759 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13759 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13788 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13788 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13788 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13793 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13793 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13794 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13794 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13794 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13797 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13797 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13800 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13800 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13800 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13803 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13803 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13806 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13806 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13806 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13807 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13807 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13807 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13810 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13810 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13813 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13813 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13814 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13814 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13814 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13817 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13817 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13822 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13822 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13822 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13827 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13827 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13828 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13828 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13828 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13829 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13829 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13834 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13834 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13834 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13837 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13837 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13840 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13840 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13840 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13841 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13841 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13841 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13844 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13844 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13847 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13847 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13848 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13848 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13848 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13849 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13849 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13878 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13878 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13878 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13883 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13883 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13884 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13884 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13884 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13887 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13887 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13890 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13890 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13890 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13893 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13893 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13896 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13896 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13896 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13897 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13897 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13897 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13900 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13900 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13903 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13903 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13904 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13904 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13904 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13907 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13907 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13912 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13912 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13912 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13917 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13917 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13918 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13918 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13918 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13919 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13919 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13924 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13924 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13924 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13927 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13927 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13930 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13930 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13930 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13931 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13931 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13931 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13934 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13934 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13937 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13937 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13938 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13938 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13938 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13939 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13939 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13986 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13986 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13986 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13991 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13991 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13992 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13992 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13992 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13995 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13995 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13998 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13998 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13998 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14001 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14001 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14004 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14004 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14004 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14005 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14005 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14005 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14008 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14008 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14011 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14011 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14012 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14012 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14012 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14015 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14015 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14020 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14020 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14020 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14025 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14025 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14026 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14026 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14026 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14027 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
14027 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
14032 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14032 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14032 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14035 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14035 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14038 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14038 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14038 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14039 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14039 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14039 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14042 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14042 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14045 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14045 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14046 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14046 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14046 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14047 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14047 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14076 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14076 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14076 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14081 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14081 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14082 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14082 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14082 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14085 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
14085 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
14088 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14088 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14088 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14091 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14091 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14094 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14094 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14094 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14095 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14095 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14095 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14098 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14098 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14101 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14101 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14102 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14102 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14102 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14105 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14105 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14110 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14110 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14110 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14115 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14115 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14116 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14116 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14116 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14117 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
14117 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
14122 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14122 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14122 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14125 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14125 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14128 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14128 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14128 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14129 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14129 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14129 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14132 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14132 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14135 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14135 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14136 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14136 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14136 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14137 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14137 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14166 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14166 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14166 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14171 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14171 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14172 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14172 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14172 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14175 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
14175 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
14178 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14178 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14178 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14181 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14181 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14184 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14184 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14184 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14185 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14185 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14185 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14188 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14188 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14191 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14191 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14192 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14192 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14192 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14195 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14195 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14200 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14200 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14200 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14205 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14205 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14206 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14206 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14206 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14207 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
14207 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
14212 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14212 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14212 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14215 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14215 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14218 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14218 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14218 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14219 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14219 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14219 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14222 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14222 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14225 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14225 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14226 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14226 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14226 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14227 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14227 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14272 { 10771 /* vfpclasspd */, X86::VFPCLASSPDZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1 }, },
14278 { 10771 /* vfpclasspd */, X86::VFPCLASSPDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14294 { 10806 /* vfpclasspdz */, X86::VFPCLASSPDZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1 }, },
14297 { 10806 /* vfpclasspdz */, X86::VFPCLASSPDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14302 { 10818 /* vfpclassps */, X86::VFPCLASSPSZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1 }, },
14308 { 10818 /* vfpclassps */, X86::VFPCLASSPSZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14324 { 10853 /* vfpclasspsz */, X86::VFPCLASSPSZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1 }, },
14327 { 10853 /* vfpclasspsz */, X86::VFPCLASSPSZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14354 { 10919 /* vgatherdpd */, X86::VGATHERDPDZrm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC256X5_0, AMFBS_None, { MCK_Mem512_RC256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14359 { 10930 /* vgatherdps */, X86::VGATHERDPSZrm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC5125_0, AMFBS_None, { MCK_Mem512_RC512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14372 { 11053 /* vgatherqpd */, X86::VGATHERQPDZrm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC5125_0, AMFBS_None, { MCK_Mem512_RC512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14380 { 11075 /* vgetexppd */, X86::VGETEXPPDZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
14380 { 11075 /* vgetexppd */, X86::VGETEXPPDZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
14383 { 11075 /* vgetexppd */, X86::VGETEXPPDZm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
14384 { 11075 /* vgetexppd */, X86::VGETEXPPDZrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
14384 { 11075 /* vgetexppd */, X86::VGETEXPPDZrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
14387 { 11075 /* vgetexppd */, X86::VGETEXPPDZmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
14390 { 11075 /* vgetexppd */, X86::VGETEXPPDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14390 { 11075 /* vgetexppd */, X86::VGETEXPPDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14393 { 11075 /* vgetexppd */, X86::VGETEXPPDZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14394 { 11075 /* vgetexppd */, X86::VGETEXPPDZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14394 { 11075 /* vgetexppd */, X86::VGETEXPPDZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14397 { 11075 /* vgetexppd */, X86::VGETEXPPDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14397 { 11075 /* vgetexppd */, X86::VGETEXPPDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14400 { 11075 /* vgetexppd */, X86::VGETEXPPDZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14403 { 11075 /* vgetexppd */, X86::VGETEXPPDZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14404 { 11075 /* vgetexppd */, X86::VGETEXPPDZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14404 { 11075 /* vgetexppd */, X86::VGETEXPPDZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14407 { 11075 /* vgetexppd */, X86::VGETEXPPDZmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14410 { 11085 /* vgetexpps */, X86::VGETEXPPSZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
14410 { 11085 /* vgetexpps */, X86::VGETEXPPSZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
14413 { 11085 /* vgetexpps */, X86::VGETEXPPSZm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
14414 { 11085 /* vgetexpps */, X86::VGETEXPPSZrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
14414 { 11085 /* vgetexpps */, X86::VGETEXPPSZrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
14415 { 11085 /* vgetexpps */, X86::VGETEXPPSZmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
14420 { 11085 /* vgetexpps */, X86::VGETEXPPSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14420 { 11085 /* vgetexpps */, X86::VGETEXPPSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14423 { 11085 /* vgetexpps */, X86::VGETEXPPSZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14424 { 11085 /* vgetexpps */, X86::VGETEXPPSZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14424 { 11085 /* vgetexpps */, X86::VGETEXPPSZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14427 { 11085 /* vgetexpps */, X86::VGETEXPPSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14427 { 11085 /* vgetexpps */, X86::VGETEXPPSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14430 { 11085 /* vgetexpps */, X86::VGETEXPPSZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14433 { 11085 /* vgetexpps */, X86::VGETEXPPSZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14434 { 11085 /* vgetexpps */, X86::VGETEXPPSZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14434 { 11085 /* vgetexpps */, X86::VGETEXPPSZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14435 { 11085 /* vgetexpps */, X86::VGETEXPPSZmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14458 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
14458 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
14461 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
14462 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
14462 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
14465 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
14468 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14468 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14471 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14472 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrribk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14472 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrribk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14475 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14475 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14478 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14481 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14482 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14482 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14485 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14488 { 11126 /* vgetmantps */, X86::VGETMANTPSZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
14488 { 11126 /* vgetmantps */, X86::VGETMANTPSZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
14491 { 11126 /* vgetmantps */, X86::VGETMANTPSZrmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
14492 { 11126 /* vgetmantps */, X86::VGETMANTPSZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
14492 { 11126 /* vgetmantps */, X86::VGETMANTPSZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
14493 { 11126 /* vgetmantps */, X86::VGETMANTPSZrmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
14498 { 11126 /* vgetmantps */, X86::VGETMANTPSZrrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14498 { 11126 /* vgetmantps */, X86::VGETMANTPSZrrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14501 { 11126 /* vgetmantps */, X86::VGETMANTPSZrmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14502 { 11126 /* vgetmantps */, X86::VGETMANTPSZrribk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14502 { 11126 /* vgetmantps */, X86::VGETMANTPSZrribk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14505 { 11126 /* vgetmantps */, X86::VGETMANTPSZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14505 { 11126 /* vgetmantps */, X86::VGETMANTPSZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14508 { 11126 /* vgetmantps */, X86::VGETMANTPSZrmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14511 { 11126 /* vgetmantps */, X86::VGETMANTPSZrmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14512 { 11126 /* vgetmantps */, X86::VGETMANTPSZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14512 { 11126 /* vgetmantps */, X86::VGETMANTPSZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14513 { 11126 /* vgetmantps */, X86::VGETMANTPSZrmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14538 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14538 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14538 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14543 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14543 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14546 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmbi, Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
14546 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmbi, Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
14549 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14549 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14549 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14552 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14552 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14555 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14555 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14555 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14558 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14558 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14561 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14561 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14564 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14564 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14569 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14569 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14569 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14574 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14574 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14577 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmbi, Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
14577 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmbi, Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
14580 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14580 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14580 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14583 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14583 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14586 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14586 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14586 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14589 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14589 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14592 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14592 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14595 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14595 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14600 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14600 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14600 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14605 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14605 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14608 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14608 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14608 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14611 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14611 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14614 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14614 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14614 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14617 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14617 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14637 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512 }, },
14637 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512 }, },
14639 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Zrm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512 }, },
14639 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Zrm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512 }, },
14641 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14641 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14643 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14643 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14645 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14645 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14647 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14647 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14648 { 11260 /* vinsertf32x8 */, X86::VINSERTF32x8Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512 }, },
14648 { 11260 /* vinsertf32x8 */, X86::VINSERTF32x8Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512 }, },
14649 { 11260 /* vinsertf32x8 */, X86::VINSERTF32x8Zrm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512 }, },
14649 { 11260 /* vinsertf32x8 */, X86::VINSERTF32x8Zrm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512 }, },
14650 { 11260 /* vinsertf32x8 */, X86::VINSERTF32x8Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14650 { 11260 /* vinsertf32x8 */, X86::VINSERTF32x8Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14651 { 11260 /* vinsertf32x8 */, X86::VINSERTF32x8Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14651 { 11260 /* vinsertf32x8 */, X86::VINSERTF32x8Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14652 { 11260 /* vinsertf32x8 */, X86::VINSERTF32x8Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14652 { 11260 /* vinsertf32x8 */, X86::VINSERTF32x8Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14653 { 11260 /* vinsertf32x8 */, X86::VINSERTF32x8Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14653 { 11260 /* vinsertf32x8 */, X86::VINSERTF32x8Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14655 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512 }, },
14655 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512 }, },
14657 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Zrm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512 }, },
14657 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Zrm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512 }, },
14659 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14659 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14661 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14661 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14663 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14663 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14665 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14665 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14666 { 11286 /* vinsertf64x4 */, X86::VINSERTF64x4Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512 }, },
14666 { 11286 /* vinsertf64x4 */, X86::VINSERTF64x4Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512 }, },
14667 { 11286 /* vinsertf64x4 */, X86::VINSERTF64x4Zrm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512 }, },
14667 { 11286 /* vinsertf64x4 */, X86::VINSERTF64x4Zrm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512 }, },
14668 { 11286 /* vinsertf64x4 */, X86::VINSERTF64x4Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14668 { 11286 /* vinsertf64x4 */, X86::VINSERTF64x4Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14669 { 11286 /* vinsertf64x4 */, X86::VINSERTF64x4Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14669 { 11286 /* vinsertf64x4 */, X86::VINSERTF64x4Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14670 { 11286 /* vinsertf64x4 */, X86::VINSERTF64x4Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14670 { 11286 /* vinsertf64x4 */, X86::VINSERTF64x4Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14671 { 11286 /* vinsertf64x4 */, X86::VINSERTF64x4Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14671 { 11286 /* vinsertf64x4 */, X86::VINSERTF64x4Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14675 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512 }, },
14675 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512 }, },
14677 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Zrm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512 }, },
14677 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Zrm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512 }, },
14679 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14679 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14681 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14681 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14683 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14683 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14685 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14685 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14686 { 11324 /* vinserti32x8 */, X86::VINSERTI32x8Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512 }, },
14686 { 11324 /* vinserti32x8 */, X86::VINSERTI32x8Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512 }, },
14687 { 11324 /* vinserti32x8 */, X86::VINSERTI32x8Zrm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512 }, },
14687 { 11324 /* vinserti32x8 */, X86::VINSERTI32x8Zrm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512 }, },
14688 { 11324 /* vinserti32x8 */, X86::VINSERTI32x8Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14688 { 11324 /* vinserti32x8 */, X86::VINSERTI32x8Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14689 { 11324 /* vinserti32x8 */, X86::VINSERTI32x8Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14689 { 11324 /* vinserti32x8 */, X86::VINSERTI32x8Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14690 { 11324 /* vinserti32x8 */, X86::VINSERTI32x8Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14690 { 11324 /* vinserti32x8 */, X86::VINSERTI32x8Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14691 { 11324 /* vinserti32x8 */, X86::VINSERTI32x8Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14691 { 11324 /* vinserti32x8 */, X86::VINSERTI32x8Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14693 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512 }, },
14693 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512 }, },
14695 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Zrm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512 }, },
14695 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Zrm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512 }, },
14697 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14697 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14699 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14699 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14701 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14701 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14703 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14703 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14704 { 11350 /* vinserti64x4 */, X86::VINSERTI64x4Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512 }, },
14704 { 11350 /* vinserti64x4 */, X86::VINSERTI64x4Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512 }, },
14705 { 11350 /* vinserti64x4 */, X86::VINSERTI64x4Zrm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512 }, },
14705 { 11350 /* vinserti64x4 */, X86::VINSERTI64x4Zrm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512 }, },
14706 { 11350 /* vinserti64x4 */, X86::VINSERTI64x4Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14706 { 11350 /* vinserti64x4 */, X86::VINSERTI64x4Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14707 { 11350 /* vinserti64x4 */, X86::VINSERTI64x4Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14707 { 11350 /* vinserti64x4 */, X86::VINSERTI64x4Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14708 { 11350 /* vinserti64x4 */, X86::VINSERTI64x4Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14708 { 11350 /* vinserti64x4 */, X86::VINSERTI64x4Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14709 { 11350 /* vinserti64x4 */, X86::VINSERTI64x4Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14709 { 11350 /* vinserti64x4 */, X86::VINSERTI64x4Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14731 { 11423 /* vmaxpd */, X86::VMAXPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14731 { 11423 /* vmaxpd */, X86::VMAXPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14731 { 11423 /* vmaxpd */, X86::VMAXPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14736 { 11423 /* vmaxpd */, X86::VMAXPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14736 { 11423 /* vmaxpd */, X86::VMAXPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14737 { 11423 /* vmaxpd */, X86::VMAXPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14737 { 11423 /* vmaxpd */, X86::VMAXPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14737 { 11423 /* vmaxpd */, X86::VMAXPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14740 { 11423 /* vmaxpd */, X86::VMAXPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
14740 { 11423 /* vmaxpd */, X86::VMAXPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
14743 { 11423 /* vmaxpd */, X86::VMAXPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14743 { 11423 /* vmaxpd */, X86::VMAXPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14743 { 11423 /* vmaxpd */, X86::VMAXPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14746 { 11423 /* vmaxpd */, X86::VMAXPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14746 { 11423 /* vmaxpd */, X86::VMAXPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14747 { 11423 /* vmaxpd */, X86::VMAXPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14747 { 11423 /* vmaxpd */, X86::VMAXPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14747 { 11423 /* vmaxpd */, X86::VMAXPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14750 { 11423 /* vmaxpd */, X86::VMAXPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14750 { 11423 /* vmaxpd */, X86::VMAXPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14750 { 11423 /* vmaxpd */, X86::VMAXPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14753 { 11423 /* vmaxpd */, X86::VMAXPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14753 { 11423 /* vmaxpd */, X86::VMAXPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14756 { 11423 /* vmaxpd */, X86::VMAXPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14756 { 11423 /* vmaxpd */, X86::VMAXPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14757 { 11423 /* vmaxpd */, X86::VMAXPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14757 { 11423 /* vmaxpd */, X86::VMAXPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14757 { 11423 /* vmaxpd */, X86::VMAXPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14760 { 11423 /* vmaxpd */, X86::VMAXPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14760 { 11423 /* vmaxpd */, X86::VMAXPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14765 { 11430 /* vmaxps */, X86::VMAXPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14765 { 11430 /* vmaxps */, X86::VMAXPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14765 { 11430 /* vmaxps */, X86::VMAXPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14770 { 11430 /* vmaxps */, X86::VMAXPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14770 { 11430 /* vmaxps */, X86::VMAXPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14771 { 11430 /* vmaxps */, X86::VMAXPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14771 { 11430 /* vmaxps */, X86::VMAXPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14771 { 11430 /* vmaxps */, X86::VMAXPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14772 { 11430 /* vmaxps */, X86::VMAXPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
14772 { 11430 /* vmaxps */, X86::VMAXPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
14777 { 11430 /* vmaxps */, X86::VMAXPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14777 { 11430 /* vmaxps */, X86::VMAXPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14777 { 11430 /* vmaxps */, X86::VMAXPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14780 { 11430 /* vmaxps */, X86::VMAXPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14780 { 11430 /* vmaxps */, X86::VMAXPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14781 { 11430 /* vmaxps */, X86::VMAXPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14781 { 11430 /* vmaxps */, X86::VMAXPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14781 { 11430 /* vmaxps */, X86::VMAXPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14784 { 11430 /* vmaxps */, X86::VMAXPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14784 { 11430 /* vmaxps */, X86::VMAXPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14784 { 11430 /* vmaxps */, X86::VMAXPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14787 { 11430 /* vmaxps */, X86::VMAXPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14787 { 11430 /* vmaxps */, X86::VMAXPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14790 { 11430 /* vmaxps */, X86::VMAXPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14790 { 11430 /* vmaxps */, X86::VMAXPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14791 { 11430 /* vmaxps */, X86::VMAXPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14791 { 11430 /* vmaxps */, X86::VMAXPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14791 { 11430 /* vmaxps */, X86::VMAXPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14792 { 11430 /* vmaxps */, X86::VMAXPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14792 { 11430 /* vmaxps */, X86::VMAXPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14824 { 11473 /* vminpd */, X86::VMINPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14824 { 11473 /* vminpd */, X86::VMINPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14824 { 11473 /* vminpd */, X86::VMINPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14829 { 11473 /* vminpd */, X86::VMINPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14829 { 11473 /* vminpd */, X86::VMINPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14830 { 11473 /* vminpd */, X86::VMINPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14830 { 11473 /* vminpd */, X86::VMINPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14830 { 11473 /* vminpd */, X86::VMINPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14833 { 11473 /* vminpd */, X86::VMINPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
14833 { 11473 /* vminpd */, X86::VMINPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
14836 { 11473 /* vminpd */, X86::VMINPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14836 { 11473 /* vminpd */, X86::VMINPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14836 { 11473 /* vminpd */, X86::VMINPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14839 { 11473 /* vminpd */, X86::VMINPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14839 { 11473 /* vminpd */, X86::VMINPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14840 { 11473 /* vminpd */, X86::VMINPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14840 { 11473 /* vminpd */, X86::VMINPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14840 { 11473 /* vminpd */, X86::VMINPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14843 { 11473 /* vminpd */, X86::VMINPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14843 { 11473 /* vminpd */, X86::VMINPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14843 { 11473 /* vminpd */, X86::VMINPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14846 { 11473 /* vminpd */, X86::VMINPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14846 { 11473 /* vminpd */, X86::VMINPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14849 { 11473 /* vminpd */, X86::VMINPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14849 { 11473 /* vminpd */, X86::VMINPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14850 { 11473 /* vminpd */, X86::VMINPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14850 { 11473 /* vminpd */, X86::VMINPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14850 { 11473 /* vminpd */, X86::VMINPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14853 { 11473 /* vminpd */, X86::VMINPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14853 { 11473 /* vminpd */, X86::VMINPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14858 { 11480 /* vminps */, X86::VMINPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14858 { 11480 /* vminps */, X86::VMINPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14858 { 11480 /* vminps */, X86::VMINPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14863 { 11480 /* vminps */, X86::VMINPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14863 { 11480 /* vminps */, X86::VMINPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14864 { 11480 /* vminps */, X86::VMINPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14864 { 11480 /* vminps */, X86::VMINPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14864 { 11480 /* vminps */, X86::VMINPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14865 { 11480 /* vminps */, X86::VMINPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
14865 { 11480 /* vminps */, X86::VMINPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
14870 { 11480 /* vminps */, X86::VMINPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14870 { 11480 /* vminps */, X86::VMINPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14870 { 11480 /* vminps */, X86::VMINPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14873 { 11480 /* vminps */, X86::VMINPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14873 { 11480 /* vminps */, X86::VMINPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14874 { 11480 /* vminps */, X86::VMINPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14874 { 11480 /* vminps */, X86::VMINPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14874 { 11480 /* vminps */, X86::VMINPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14877 { 11480 /* vminps */, X86::VMINPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14877 { 11480 /* vminps */, X86::VMINPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14877 { 11480 /* vminps */, X86::VMINPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14880 { 11480 /* vminps */, X86::VMINPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14880 { 11480 /* vminps */, X86::VMINPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14883 { 11480 /* vminps */, X86::VMINPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14883 { 11480 /* vminps */, X86::VMINPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14884 { 11480 /* vminps */, X86::VMINPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14884 { 11480 /* vminps */, X86::VMINPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14884 { 11480 /* vminps */, X86::VMINPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14885 { 11480 /* vminps */, X86::VMINPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14885 { 11480 /* vminps */, X86::VMINPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14922 { 11525 /* vmovapd */, X86::VMOVAPDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
14922 { 11525 /* vmovapd */, X86::VMOVAPDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
14923 { 11525 /* vmovapd */, X86::VMOVAPDZmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
14928 { 11525 /* vmovapd */, X86::VMOVAPDZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
14933 { 11525 /* vmovapd */, X86::VMOVAPDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14933 { 11525 /* vmovapd */, X86::VMOVAPDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14934 { 11525 /* vmovapd */, X86::VMOVAPDZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14937 { 11525 /* vmovapd */, X86::VMOVAPDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14940 { 11525 /* vmovapd */, X86::VMOVAPDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14940 { 11525 /* vmovapd */, X86::VMOVAPDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14943 { 11525 /* vmovapd */, X86::VMOVAPDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14948 { 11533 /* vmovapd.s */, X86::VMOVAPDZrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
14948 { 11533 /* vmovapd.s */, X86::VMOVAPDZrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
14951 { 11533 /* vmovapd.s */, X86::VMOVAPDZrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14951 { 11533 /* vmovapd.s */, X86::VMOVAPDZrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14954 { 11533 /* vmovapd.s */, X86::VMOVAPDZrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14954 { 11533 /* vmovapd.s */, X86::VMOVAPDZrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14963 { 11543 /* vmovaps */, X86::VMOVAPSZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
14963 { 11543 /* vmovaps */, X86::VMOVAPSZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
14964 { 11543 /* vmovaps */, X86::VMOVAPSZmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
14969 { 11543 /* vmovaps */, X86::VMOVAPSZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
14974 { 11543 /* vmovaps */, X86::VMOVAPSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14974 { 11543 /* vmovaps */, X86::VMOVAPSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14975 { 11543 /* vmovaps */, X86::VMOVAPSZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14978 { 11543 /* vmovaps */, X86::VMOVAPSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14981 { 11543 /* vmovaps */, X86::VMOVAPSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14981 { 11543 /* vmovaps */, X86::VMOVAPSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14984 { 11543 /* vmovaps */, X86::VMOVAPSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14989 { 11551 /* vmovaps.s */, X86::VMOVAPSZrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
14989 { 11551 /* vmovaps.s */, X86::VMOVAPSZrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
14992 { 11551 /* vmovaps.s */, X86::VMOVAPSZrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14992 { 11551 /* vmovaps.s */, X86::VMOVAPSZrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14995 { 11551 /* vmovaps.s */, X86::VMOVAPSZrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14995 { 11551 /* vmovaps.s */, X86::VMOVAPSZrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15012 { 11567 /* vmovddup */, X86::VMOVDDUPZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15012 { 11567 /* vmovddup */, X86::VMOVDDUPZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15015 { 11567 /* vmovddup */, X86::VMOVDDUPZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
15020 { 11567 /* vmovddup */, X86::VMOVDDUPZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15020 { 11567 /* vmovddup */, X86::VMOVDDUPZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15022 { 11567 /* vmovddup */, X86::VMOVDDUPZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15026 { 11567 /* vmovddup */, X86::VMOVDDUPZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15026 { 11567 /* vmovddup */, X86::VMOVDDUPZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15028 { 11567 /* vmovddup */, X86::VMOVDDUPZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15042 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Zrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15042 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Zrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15043 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Zmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
15046 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Zrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
15051 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15051 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15052 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Zmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15055 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Zrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15058 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15058 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15061 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15064 { 11604 /* vmovdqa32.s */, X86::VMOVDQA32Zrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15064 { 11604 /* vmovdqa32.s */, X86::VMOVDQA32Zrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15067 { 11604 /* vmovdqa32.s */, X86::VMOVDQA32Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15067 { 11604 /* vmovdqa32.s */, X86::VMOVDQA32Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15070 { 11604 /* vmovdqa32.s */, X86::VMOVDQA32Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15070 { 11604 /* vmovdqa32.s */, X86::VMOVDQA32Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15075 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Zrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15075 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Zrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15076 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Zmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
15079 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Zrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
15084 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15084 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15085 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Zmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15088 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Zrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15091 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15091 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15094 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15097 { 11626 /* vmovdqa64.s */, X86::VMOVDQA64Zrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15097 { 11626 /* vmovdqa64.s */, X86::VMOVDQA64Zrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15100 { 11626 /* vmovdqa64.s */, X86::VMOVDQA64Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15100 { 11626 /* vmovdqa64.s */, X86::VMOVDQA64Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15103 { 11626 /* vmovdqa64.s */, X86::VMOVDQA64Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15103 { 11626 /* vmovdqa64.s */, X86::VMOVDQA64Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15116 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Zrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15116 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Zrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15117 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Zmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
15120 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Zrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
15125 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15125 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15126 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Zmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15129 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Zrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15132 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15132 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15135 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15138 { 11666 /* vmovdqu16.s */, X86::VMOVDQU16Zrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15138 { 11666 /* vmovdqu16.s */, X86::VMOVDQU16Zrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15141 { 11666 /* vmovdqu16.s */, X86::VMOVDQU16Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15141 { 11666 /* vmovdqu16.s */, X86::VMOVDQU16Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15144 { 11666 /* vmovdqu16.s */, X86::VMOVDQU16Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15144 { 11666 /* vmovdqu16.s */, X86::VMOVDQU16Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15149 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Zrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15149 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Zrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15150 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Zmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
15153 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Zrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
15158 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15158 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15159 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Zmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15162 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Zrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15165 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15165 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15168 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15171 { 11688 /* vmovdqu32.s */, X86::VMOVDQU32Zrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15171 { 11688 /* vmovdqu32.s */, X86::VMOVDQU32Zrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15174 { 11688 /* vmovdqu32.s */, X86::VMOVDQU32Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15174 { 11688 /* vmovdqu32.s */, X86::VMOVDQU32Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15177 { 11688 /* vmovdqu32.s */, X86::VMOVDQU32Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15177 { 11688 /* vmovdqu32.s */, X86::VMOVDQU32Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15182 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Zrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15182 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Zrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15183 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Zmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
15186 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Zrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
15191 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15191 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15192 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Zmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15195 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Zrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15198 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15198 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15201 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15204 { 11710 /* vmovdqu64.s */, X86::VMOVDQU64Zrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15204 { 11710 /* vmovdqu64.s */, X86::VMOVDQU64Zrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15207 { 11710 /* vmovdqu64.s */, X86::VMOVDQU64Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15207 { 11710 /* vmovdqu64.s */, X86::VMOVDQU64Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15210 { 11710 /* vmovdqu64.s */, X86::VMOVDQU64Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15210 { 11710 /* vmovdqu64.s */, X86::VMOVDQU64Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15215 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Zrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15215 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Zrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15216 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Zmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
15219 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Zrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
15224 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15224 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15225 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Zmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15228 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Zrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15231 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15231 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15234 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15237 { 11731 /* vmovdqu8.s */, X86::VMOVDQU8Zrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15237 { 11731 /* vmovdqu8.s */, X86::VMOVDQU8Zrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15240 { 11731 /* vmovdqu8.s */, X86::VMOVDQU8Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15240 { 11731 /* vmovdqu8.s */, X86::VMOVDQU8Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15243 { 11731 /* vmovdqu8.s */, X86::VMOVDQU8Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15243 { 11731 /* vmovdqu8.s */, X86::VMOVDQU8Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15272 { 11812 /* vmovntdq */, X86::VMOVNTDQZmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
15277 { 11821 /* vmovntdqa */, X86::VMOVNTDQAZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
15282 { 11831 /* vmovntpd */, X86::VMOVNTPDZmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
15287 { 11840 /* vmovntps */, X86::VMOVNTPSZmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
15319 { 11879 /* vmovshdup */, X86::VMOVSHDUPZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15319 { 11879 /* vmovshdup */, X86::VMOVSHDUPZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15324 { 11879 /* vmovshdup */, X86::VMOVSHDUPZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
15327 { 11879 /* vmovshdup */, X86::VMOVSHDUPZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15327 { 11879 /* vmovshdup */, X86::VMOVSHDUPZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15330 { 11879 /* vmovshdup */, X86::VMOVSHDUPZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15333 { 11879 /* vmovshdup */, X86::VMOVSHDUPZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15333 { 11879 /* vmovshdup */, X86::VMOVSHDUPZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15336 { 11879 /* vmovshdup */, X86::VMOVSHDUPZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15341 { 11889 /* vmovsldup */, X86::VMOVSLDUPZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15341 { 11889 /* vmovsldup */, X86::VMOVSLDUPZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15346 { 11889 /* vmovsldup */, X86::VMOVSLDUPZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
15349 { 11889 /* vmovsldup */, X86::VMOVSLDUPZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15349 { 11889 /* vmovsldup */, X86::VMOVSLDUPZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15352 { 11889 /* vmovsldup */, X86::VMOVSLDUPZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15355 { 11889 /* vmovsldup */, X86::VMOVSLDUPZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15355 { 11889 /* vmovsldup */, X86::VMOVSLDUPZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15358 { 11889 /* vmovsldup */, X86::VMOVSLDUPZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15382 { 11915 /* vmovupd */, X86::VMOVUPDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15382 { 11915 /* vmovupd */, X86::VMOVUPDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15383 { 11915 /* vmovupd */, X86::VMOVUPDZmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
15388 { 11915 /* vmovupd */, X86::VMOVUPDZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
15393 { 11915 /* vmovupd */, X86::VMOVUPDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15393 { 11915 /* vmovupd */, X86::VMOVUPDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15394 { 11915 /* vmovupd */, X86::VMOVUPDZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15397 { 11915 /* vmovupd */, X86::VMOVUPDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15400 { 11915 /* vmovupd */, X86::VMOVUPDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15400 { 11915 /* vmovupd */, X86::VMOVUPDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15403 { 11915 /* vmovupd */, X86::VMOVUPDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15408 { 11923 /* vmovupd.s */, X86::VMOVUPDZrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15408 { 11923 /* vmovupd.s */, X86::VMOVUPDZrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15411 { 11923 /* vmovupd.s */, X86::VMOVUPDZrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15411 { 11923 /* vmovupd.s */, X86::VMOVUPDZrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15414 { 11923 /* vmovupd.s */, X86::VMOVUPDZrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15414 { 11923 /* vmovupd.s */, X86::VMOVUPDZrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15423 { 11933 /* vmovups */, X86::VMOVUPSZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15423 { 11933 /* vmovups */, X86::VMOVUPSZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15424 { 11933 /* vmovups */, X86::VMOVUPSZmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
15429 { 11933 /* vmovups */, X86::VMOVUPSZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
15434 { 11933 /* vmovups */, X86::VMOVUPSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15434 { 11933 /* vmovups */, X86::VMOVUPSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15435 { 11933 /* vmovups */, X86::VMOVUPSZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15438 { 11933 /* vmovups */, X86::VMOVUPSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15441 { 11933 /* vmovups */, X86::VMOVUPSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15441 { 11933 /* vmovups */, X86::VMOVUPSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15444 { 11933 /* vmovups */, X86::VMOVUPSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15449 { 11941 /* vmovups.s */, X86::VMOVUPSZrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15449 { 11941 /* vmovups.s */, X86::VMOVUPSZrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15452 { 11941 /* vmovups.s */, X86::VMOVUPSZrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15452 { 11941 /* vmovups.s */, X86::VMOVUPSZrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15455 { 11941 /* vmovups.s */, X86::VMOVUPSZrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15455 { 11941 /* vmovups.s */, X86::VMOVUPSZrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15475 { 12021 /* vmulpd */, X86::VMULPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15475 { 12021 /* vmulpd */, X86::VMULPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15475 { 12021 /* vmulpd */, X86::VMULPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15480 { 12021 /* vmulpd */, X86::VMULPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15480 { 12021 /* vmulpd */, X86::VMULPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15481 { 12021 /* vmulpd */, X86::VMULPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
15481 { 12021 /* vmulpd */, X86::VMULPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
15481 { 12021 /* vmulpd */, X86::VMULPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
15484 { 12021 /* vmulpd */, X86::VMULPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
15484 { 12021 /* vmulpd */, X86::VMULPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
15487 { 12021 /* vmulpd */, X86::VMULPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15487 { 12021 /* vmulpd */, X86::VMULPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15487 { 12021 /* vmulpd */, X86::VMULPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15490 { 12021 /* vmulpd */, X86::VMULPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15490 { 12021 /* vmulpd */, X86::VMULPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15493 { 12021 /* vmulpd */, X86::VMULPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15493 { 12021 /* vmulpd */, X86::VMULPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15493 { 12021 /* vmulpd */, X86::VMULPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15494 { 12021 /* vmulpd */, X86::VMULPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15494 { 12021 /* vmulpd */, X86::VMULPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15494 { 12021 /* vmulpd */, X86::VMULPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15497 { 12021 /* vmulpd */, X86::VMULPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15497 { 12021 /* vmulpd */, X86::VMULPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15500 { 12021 /* vmulpd */, X86::VMULPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15500 { 12021 /* vmulpd */, X86::VMULPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15501 { 12021 /* vmulpd */, X86::VMULPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15501 { 12021 /* vmulpd */, X86::VMULPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15501 { 12021 /* vmulpd */, X86::VMULPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15504 { 12021 /* vmulpd */, X86::VMULPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15504 { 12021 /* vmulpd */, X86::VMULPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15509 { 12028 /* vmulps */, X86::VMULPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15509 { 12028 /* vmulps */, X86::VMULPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15509 { 12028 /* vmulps */, X86::VMULPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15514 { 12028 /* vmulps */, X86::VMULPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15514 { 12028 /* vmulps */, X86::VMULPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15515 { 12028 /* vmulps */, X86::VMULPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
15515 { 12028 /* vmulps */, X86::VMULPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
15515 { 12028 /* vmulps */, X86::VMULPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
15516 { 12028 /* vmulps */, X86::VMULPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
15516 { 12028 /* vmulps */, X86::VMULPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
15521 { 12028 /* vmulps */, X86::VMULPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15521 { 12028 /* vmulps */, X86::VMULPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15521 { 12028 /* vmulps */, X86::VMULPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15524 { 12028 /* vmulps */, X86::VMULPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15524 { 12028 /* vmulps */, X86::VMULPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15527 { 12028 /* vmulps */, X86::VMULPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15527 { 12028 /* vmulps */, X86::VMULPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15527 { 12028 /* vmulps */, X86::VMULPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15528 { 12028 /* vmulps */, X86::VMULPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15528 { 12028 /* vmulps */, X86::VMULPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15528 { 12028 /* vmulps */, X86::VMULPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15531 { 12028 /* vmulps */, X86::VMULPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15531 { 12028 /* vmulps */, X86::VMULPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15534 { 12028 /* vmulps */, X86::VMULPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15534 { 12028 /* vmulps */, X86::VMULPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15535 { 12028 /* vmulps */, X86::VMULPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15535 { 12028 /* vmulps */, X86::VMULPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15535 { 12028 /* vmulps */, X86::VMULPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15536 { 12028 /* vmulps */, X86::VMULPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15536 { 12028 /* vmulps */, X86::VMULPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15571 { 12088 /* vorpd */, X86::VORPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15571 { 12088 /* vorpd */, X86::VORPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15571 { 12088 /* vorpd */, X86::VORPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15576 { 12088 /* vorpd */, X86::VORPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15576 { 12088 /* vorpd */, X86::VORPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15579 { 12088 /* vorpd */, X86::VORPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
15579 { 12088 /* vorpd */, X86::VORPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
15582 { 12088 /* vorpd */, X86::VORPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15582 { 12088 /* vorpd */, X86::VORPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15582 { 12088 /* vorpd */, X86::VORPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15585 { 12088 /* vorpd */, X86::VORPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15585 { 12088 /* vorpd */, X86::VORPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15588 { 12088 /* vorpd */, X86::VORPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15588 { 12088 /* vorpd */, X86::VORPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15588 { 12088 /* vorpd */, X86::VORPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15591 { 12088 /* vorpd */, X86::VORPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15591 { 12088 /* vorpd */, X86::VORPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15594 { 12088 /* vorpd */, X86::VORPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15594 { 12088 /* vorpd */, X86::VORPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15597 { 12088 /* vorpd */, X86::VORPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15597 { 12088 /* vorpd */, X86::VORPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15602 { 12094 /* vorps */, X86::VORPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15602 { 12094 /* vorps */, X86::VORPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15602 { 12094 /* vorps */, X86::VORPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15607 { 12094 /* vorps */, X86::VORPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15607 { 12094 /* vorps */, X86::VORPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15608 { 12094 /* vorps */, X86::VORPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
15608 { 12094 /* vorps */, X86::VORPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
15613 { 12094 /* vorps */, X86::VORPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15613 { 12094 /* vorps */, X86::VORPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15613 { 12094 /* vorps */, X86::VORPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15616 { 12094 /* vorps */, X86::VORPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15616 { 12094 /* vorps */, X86::VORPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15619 { 12094 /* vorps */, X86::VORPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15619 { 12094 /* vorps */, X86::VORPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15619 { 12094 /* vorps */, X86::VORPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15622 { 12094 /* vorps */, X86::VORPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15622 { 12094 /* vorps */, X86::VORPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15625 { 12094 /* vorps */, X86::VORPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15625 { 12094 /* vorps */, X86::VORPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15626 { 12094 /* vorps */, X86::VORPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15626 { 12094 /* vorps */, X86::VORPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15631 { 12100 /* vp2intersectd */, X86::VP2INTERSECTDZrr, Convert__VK16Pair1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK16Pair }, },
15631 { 12100 /* vp2intersectd */, X86::VP2INTERSECTDZrr, Convert__VK16Pair1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK16Pair }, },
15634 { 12100 /* vp2intersectd */, X86::VP2INTERSECTDZrm, Convert__VK16Pair1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK16Pair }, },
15635 { 12100 /* vp2intersectd */, X86::VP2INTERSECTDZrmb, Convert__VK16Pair1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK16Pair }, },
15640 { 12114 /* vp2intersectq */, X86::VP2INTERSECTQZrr, Convert__VK8Pair1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK8Pair }, },
15640 { 12114 /* vp2intersectq */, X86::VP2INTERSECTQZrr, Convert__VK8Pair1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK8Pair }, },
15643 { 12114 /* vp2intersectq */, X86::VP2INTERSECTQZrm, Convert__VK8Pair1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK8Pair }, },
15646 { 12114 /* vp2intersectq */, X86::VP2INTERSECTQZrmb, Convert__VK8Pair1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK8Pair }, },
15647 { 12128 /* vp4dpwssd */, X86::VP4DPWSSDrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
15647 { 12128 /* vp4dpwssd */, X86::VP4DPWSSDrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
15648 { 12128 /* vp4dpwssd */, X86::VP4DPWSSDrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15648 { 12128 /* vp4dpwssd */, X86::VP4DPWSSDrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15649 { 12128 /* vp4dpwssd */, X86::VP4DPWSSDrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15649 { 12128 /* vp4dpwssd */, X86::VP4DPWSSDrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15650 { 12138 /* vp4dpwssds */, X86::VP4DPWSSDSrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
15650 { 12138 /* vp4dpwssds */, X86::VP4DPWSSDSrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
15651 { 12138 /* vp4dpwssds */, X86::VP4DPWSSDSrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15651 { 12138 /* vp4dpwssds */, X86::VP4DPWSSDSrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15652 { 12138 /* vp4dpwssds */, X86::VP4DPWSSDSrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15652 { 12138 /* vp4dpwssds */, X86::VP4DPWSSDSrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15657 { 12149 /* vpabsb */, X86::VPABSBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15657 { 12149 /* vpabsb */, X86::VPABSBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15662 { 12149 /* vpabsb */, X86::VPABSBZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
15665 { 12149 /* vpabsb */, X86::VPABSBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15665 { 12149 /* vpabsb */, X86::VPABSBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15668 { 12149 /* vpabsb */, X86::VPABSBZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15671 { 12149 /* vpabsb */, X86::VPABSBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15671 { 12149 /* vpabsb */, X86::VPABSBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15674 { 12149 /* vpabsb */, X86::VPABSBZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15679 { 12156 /* vpabsd */, X86::VPABSDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15679 { 12156 /* vpabsd */, X86::VPABSDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15684 { 12156 /* vpabsd */, X86::VPABSDZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
15685 { 12156 /* vpabsd */, X86::VPABSDZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
15690 { 12156 /* vpabsd */, X86::VPABSDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15690 { 12156 /* vpabsd */, X86::VPABSDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15693 { 12156 /* vpabsd */, X86::VPABSDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15696 { 12156 /* vpabsd */, X86::VPABSDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15696 { 12156 /* vpabsd */, X86::VPABSDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15699 { 12156 /* vpabsd */, X86::VPABSDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15702 { 12156 /* vpabsd */, X86::VPABSDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15703 { 12156 /* vpabsd */, X86::VPABSDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15708 { 12163 /* vpabsq */, X86::VPABSQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15708 { 12163 /* vpabsq */, X86::VPABSQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15711 { 12163 /* vpabsq */, X86::VPABSQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
15714 { 12163 /* vpabsq */, X86::VPABSQZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
15717 { 12163 /* vpabsq */, X86::VPABSQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15717 { 12163 /* vpabsq */, X86::VPABSQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15720 { 12163 /* vpabsq */, X86::VPABSQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15723 { 12163 /* vpabsq */, X86::VPABSQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15723 { 12163 /* vpabsq */, X86::VPABSQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15726 { 12163 /* vpabsq */, X86::VPABSQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15729 { 12163 /* vpabsq */, X86::VPABSQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15732 { 12163 /* vpabsq */, X86::VPABSQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15737 { 12170 /* vpabsw */, X86::VPABSWZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15737 { 12170 /* vpabsw */, X86::VPABSWZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
15742 { 12170 /* vpabsw */, X86::VPABSWZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
15745 { 12170 /* vpabsw */, X86::VPABSWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15745 { 12170 /* vpabsw */, X86::VPABSWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15748 { 12170 /* vpabsw */, X86::VPABSWZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15751 { 12170 /* vpabsw */, X86::VPABSWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15751 { 12170 /* vpabsw */, X86::VPABSWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15754 { 12170 /* vpabsw */, X86::VPABSWZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15759 { 12177 /* vpackssdw */, X86::VPACKSSDWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15759 { 12177 /* vpackssdw */, X86::VPACKSSDWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15759 { 12177 /* vpackssdw */, X86::VPACKSSDWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15764 { 12177 /* vpackssdw */, X86::VPACKSSDWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15764 { 12177 /* vpackssdw */, X86::VPACKSSDWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15765 { 12177 /* vpackssdw */, X86::VPACKSSDWZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
15765 { 12177 /* vpackssdw */, X86::VPACKSSDWZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
15770 { 12177 /* vpackssdw */, X86::VPACKSSDWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15770 { 12177 /* vpackssdw */, X86::VPACKSSDWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15770 { 12177 /* vpackssdw */, X86::VPACKSSDWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15773 { 12177 /* vpackssdw */, X86::VPACKSSDWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15773 { 12177 /* vpackssdw */, X86::VPACKSSDWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15776 { 12177 /* vpackssdw */, X86::VPACKSSDWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15776 { 12177 /* vpackssdw */, X86::VPACKSSDWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15776 { 12177 /* vpackssdw */, X86::VPACKSSDWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15779 { 12177 /* vpackssdw */, X86::VPACKSSDWZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15779 { 12177 /* vpackssdw */, X86::VPACKSSDWZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15782 { 12177 /* vpackssdw */, X86::VPACKSSDWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15782 { 12177 /* vpackssdw */, X86::VPACKSSDWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15783 { 12177 /* vpackssdw */, X86::VPACKSSDWZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15783 { 12177 /* vpackssdw */, X86::VPACKSSDWZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15790 { 12187 /* vpacksswb */, X86::VPACKSSWBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15790 { 12187 /* vpacksswb */, X86::VPACKSSWBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15790 { 12187 /* vpacksswb */, X86::VPACKSSWBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15795 { 12187 /* vpacksswb */, X86::VPACKSSWBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15795 { 12187 /* vpacksswb */, X86::VPACKSSWBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15798 { 12187 /* vpacksswb */, X86::VPACKSSWBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15798 { 12187 /* vpacksswb */, X86::VPACKSSWBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15798 { 12187 /* vpacksswb */, X86::VPACKSSWBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15801 { 12187 /* vpacksswb */, X86::VPACKSSWBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15801 { 12187 /* vpacksswb */, X86::VPACKSSWBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15804 { 12187 /* vpacksswb */, X86::VPACKSSWBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15804 { 12187 /* vpacksswb */, X86::VPACKSSWBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15804 { 12187 /* vpacksswb */, X86::VPACKSSWBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15807 { 12187 /* vpacksswb */, X86::VPACKSSWBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15807 { 12187 /* vpacksswb */, X86::VPACKSSWBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15812 { 12197 /* vpackusdw */, X86::VPACKUSDWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15812 { 12197 /* vpackusdw */, X86::VPACKUSDWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15812 { 12197 /* vpackusdw */, X86::VPACKUSDWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15817 { 12197 /* vpackusdw */, X86::VPACKUSDWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15817 { 12197 /* vpackusdw */, X86::VPACKUSDWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15818 { 12197 /* vpackusdw */, X86::VPACKUSDWZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
15818 { 12197 /* vpackusdw */, X86::VPACKUSDWZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
15823 { 12197 /* vpackusdw */, X86::VPACKUSDWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15823 { 12197 /* vpackusdw */, X86::VPACKUSDWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15823 { 12197 /* vpackusdw */, X86::VPACKUSDWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15826 { 12197 /* vpackusdw */, X86::VPACKUSDWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15826 { 12197 /* vpackusdw */, X86::VPACKUSDWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15829 { 12197 /* vpackusdw */, X86::VPACKUSDWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15829 { 12197 /* vpackusdw */, X86::VPACKUSDWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15829 { 12197 /* vpackusdw */, X86::VPACKUSDWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15832 { 12197 /* vpackusdw */, X86::VPACKUSDWZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15832 { 12197 /* vpackusdw */, X86::VPACKUSDWZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15835 { 12197 /* vpackusdw */, X86::VPACKUSDWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15835 { 12197 /* vpackusdw */, X86::VPACKUSDWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15836 { 12197 /* vpackusdw */, X86::VPACKUSDWZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15836 { 12197 /* vpackusdw */, X86::VPACKUSDWZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15843 { 12207 /* vpackuswb */, X86::VPACKUSWBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15843 { 12207 /* vpackuswb */, X86::VPACKUSWBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15843 { 12207 /* vpackuswb */, X86::VPACKUSWBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15848 { 12207 /* vpackuswb */, X86::VPACKUSWBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15848 { 12207 /* vpackuswb */, X86::VPACKUSWBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15851 { 12207 /* vpackuswb */, X86::VPACKUSWBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15851 { 12207 /* vpackuswb */, X86::VPACKUSWBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15851 { 12207 /* vpackuswb */, X86::VPACKUSWBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15854 { 12207 /* vpackuswb */, X86::VPACKUSWBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15854 { 12207 /* vpackuswb */, X86::VPACKUSWBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15857 { 12207 /* vpackuswb */, X86::VPACKUSWBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15857 { 12207 /* vpackuswb */, X86::VPACKUSWBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15857 { 12207 /* vpackuswb */, X86::VPACKUSWBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15860 { 12207 /* vpackuswb */, X86::VPACKUSWBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15860 { 12207 /* vpackuswb */, X86::VPACKUSWBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15865 { 12217 /* vpaddb */, X86::VPADDBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15865 { 12217 /* vpaddb */, X86::VPADDBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15865 { 12217 /* vpaddb */, X86::VPADDBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15870 { 12217 /* vpaddb */, X86::VPADDBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15870 { 12217 /* vpaddb */, X86::VPADDBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15873 { 12217 /* vpaddb */, X86::VPADDBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15873 { 12217 /* vpaddb */, X86::VPADDBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15873 { 12217 /* vpaddb */, X86::VPADDBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15876 { 12217 /* vpaddb */, X86::VPADDBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15876 { 12217 /* vpaddb */, X86::VPADDBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15879 { 12217 /* vpaddb */, X86::VPADDBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15879 { 12217 /* vpaddb */, X86::VPADDBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15879 { 12217 /* vpaddb */, X86::VPADDBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15882 { 12217 /* vpaddb */, X86::VPADDBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15882 { 12217 /* vpaddb */, X86::VPADDBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15887 { 12224 /* vpaddd */, X86::VPADDDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15887 { 12224 /* vpaddd */, X86::VPADDDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15887 { 12224 /* vpaddd */, X86::VPADDDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15892 { 12224 /* vpaddd */, X86::VPADDDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15892 { 12224 /* vpaddd */, X86::VPADDDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15893 { 12224 /* vpaddd */, X86::VPADDDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
15893 { 12224 /* vpaddd */, X86::VPADDDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
15898 { 12224 /* vpaddd */, X86::VPADDDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15898 { 12224 /* vpaddd */, X86::VPADDDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15898 { 12224 /* vpaddd */, X86::VPADDDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15901 { 12224 /* vpaddd */, X86::VPADDDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15901 { 12224 /* vpaddd */, X86::VPADDDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15904 { 12224 /* vpaddd */, X86::VPADDDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15904 { 12224 /* vpaddd */, X86::VPADDDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15904 { 12224 /* vpaddd */, X86::VPADDDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15907 { 12224 /* vpaddd */, X86::VPADDDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15907 { 12224 /* vpaddd */, X86::VPADDDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15910 { 12224 /* vpaddd */, X86::VPADDDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15910 { 12224 /* vpaddd */, X86::VPADDDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15911 { 12224 /* vpaddd */, X86::VPADDDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15911 { 12224 /* vpaddd */, X86::VPADDDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15918 { 12231 /* vpaddq */, X86::VPADDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15918 { 12231 /* vpaddq */, X86::VPADDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15918 { 12231 /* vpaddq */, X86::VPADDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15923 { 12231 /* vpaddq */, X86::VPADDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15923 { 12231 /* vpaddq */, X86::VPADDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15926 { 12231 /* vpaddq */, X86::VPADDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
15926 { 12231 /* vpaddq */, X86::VPADDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
15929 { 12231 /* vpaddq */, X86::VPADDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15929 { 12231 /* vpaddq */, X86::VPADDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15929 { 12231 /* vpaddq */, X86::VPADDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15932 { 12231 /* vpaddq */, X86::VPADDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15932 { 12231 /* vpaddq */, X86::VPADDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15935 { 12231 /* vpaddq */, X86::VPADDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15935 { 12231 /* vpaddq */, X86::VPADDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15935 { 12231 /* vpaddq */, X86::VPADDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15938 { 12231 /* vpaddq */, X86::VPADDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15938 { 12231 /* vpaddq */, X86::VPADDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15941 { 12231 /* vpaddq */, X86::VPADDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15941 { 12231 /* vpaddq */, X86::VPADDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15944 { 12231 /* vpaddq */, X86::VPADDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15944 { 12231 /* vpaddq */, X86::VPADDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15949 { 12238 /* vpaddsb */, X86::VPADDSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15949 { 12238 /* vpaddsb */, X86::VPADDSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15949 { 12238 /* vpaddsb */, X86::VPADDSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15954 { 12238 /* vpaddsb */, X86::VPADDSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15954 { 12238 /* vpaddsb */, X86::VPADDSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15957 { 12238 /* vpaddsb */, X86::VPADDSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15957 { 12238 /* vpaddsb */, X86::VPADDSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15957 { 12238 /* vpaddsb */, X86::VPADDSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15960 { 12238 /* vpaddsb */, X86::VPADDSBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15960 { 12238 /* vpaddsb */, X86::VPADDSBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15963 { 12238 /* vpaddsb */, X86::VPADDSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15963 { 12238 /* vpaddsb */, X86::VPADDSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15963 { 12238 /* vpaddsb */, X86::VPADDSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15966 { 12238 /* vpaddsb */, X86::VPADDSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15966 { 12238 /* vpaddsb */, X86::VPADDSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15971 { 12246 /* vpaddsw */, X86::VPADDSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15971 { 12246 /* vpaddsw */, X86::VPADDSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15971 { 12246 /* vpaddsw */, X86::VPADDSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15976 { 12246 /* vpaddsw */, X86::VPADDSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15976 { 12246 /* vpaddsw */, X86::VPADDSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15979 { 12246 /* vpaddsw */, X86::VPADDSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15979 { 12246 /* vpaddsw */, X86::VPADDSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15979 { 12246 /* vpaddsw */, X86::VPADDSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15982 { 12246 /* vpaddsw */, X86::VPADDSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15982 { 12246 /* vpaddsw */, X86::VPADDSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15985 { 12246 /* vpaddsw */, X86::VPADDSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15985 { 12246 /* vpaddsw */, X86::VPADDSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15985 { 12246 /* vpaddsw */, X86::VPADDSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15988 { 12246 /* vpaddsw */, X86::VPADDSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15988 { 12246 /* vpaddsw */, X86::VPADDSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15993 { 12254 /* vpaddusb */, X86::VPADDUSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15993 { 12254 /* vpaddusb */, X86::VPADDUSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15993 { 12254 /* vpaddusb */, X86::VPADDUSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15998 { 12254 /* vpaddusb */, X86::VPADDUSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15998 { 12254 /* vpaddusb */, X86::VPADDUSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16001 { 12254 /* vpaddusb */, X86::VPADDUSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16001 { 12254 /* vpaddusb */, X86::VPADDUSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16001 { 12254 /* vpaddusb */, X86::VPADDUSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16004 { 12254 /* vpaddusb */, X86::VPADDUSBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16004 { 12254 /* vpaddusb */, X86::VPADDUSBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16007 { 12254 /* vpaddusb */, X86::VPADDUSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16007 { 12254 /* vpaddusb */, X86::VPADDUSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16007 { 12254 /* vpaddusb */, X86::VPADDUSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16010 { 12254 /* vpaddusb */, X86::VPADDUSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16010 { 12254 /* vpaddusb */, X86::VPADDUSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16015 { 12263 /* vpaddusw */, X86::VPADDUSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16015 { 12263 /* vpaddusw */, X86::VPADDUSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16015 { 12263 /* vpaddusw */, X86::VPADDUSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16020 { 12263 /* vpaddusw */, X86::VPADDUSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16020 { 12263 /* vpaddusw */, X86::VPADDUSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16023 { 12263 /* vpaddusw */, X86::VPADDUSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16023 { 12263 /* vpaddusw */, X86::VPADDUSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16023 { 12263 /* vpaddusw */, X86::VPADDUSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16026 { 12263 /* vpaddusw */, X86::VPADDUSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16026 { 12263 /* vpaddusw */, X86::VPADDUSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16029 { 12263 /* vpaddusw */, X86::VPADDUSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16029 { 12263 /* vpaddusw */, X86::VPADDUSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16029 { 12263 /* vpaddusw */, X86::VPADDUSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16032 { 12263 /* vpaddusw */, X86::VPADDUSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16032 { 12263 /* vpaddusw */, X86::VPADDUSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16037 { 12272 /* vpaddw */, X86::VPADDWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16037 { 12272 /* vpaddw */, X86::VPADDWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16037 { 12272 /* vpaddw */, X86::VPADDWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16042 { 12272 /* vpaddw */, X86::VPADDWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16042 { 12272 /* vpaddw */, X86::VPADDWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16045 { 12272 /* vpaddw */, X86::VPADDWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16045 { 12272 /* vpaddw */, X86::VPADDWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16045 { 12272 /* vpaddw */, X86::VPADDWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16048 { 12272 /* vpaddw */, X86::VPADDWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16048 { 12272 /* vpaddw */, X86::VPADDWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16051 { 12272 /* vpaddw */, X86::VPADDWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16051 { 12272 /* vpaddw */, X86::VPADDWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16051 { 12272 /* vpaddw */, X86::VPADDWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16054 { 12272 /* vpaddw */, X86::VPADDWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16054 { 12272 /* vpaddw */, X86::VPADDWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16059 { 12279 /* vpalignr */, X86::VPALIGNRZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
16059 { 12279 /* vpalignr */, X86::VPALIGNRZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
16059 { 12279 /* vpalignr */, X86::VPALIGNRZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
16064 { 12279 /* vpalignr */, X86::VPALIGNRZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16064 { 12279 /* vpalignr */, X86::VPALIGNRZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16067 { 12279 /* vpalignr */, X86::VPALIGNRZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16067 { 12279 /* vpalignr */, X86::VPALIGNRZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16067 { 12279 /* vpalignr */, X86::VPALIGNRZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16070 { 12279 /* vpalignr */, X86::VPALIGNRZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16070 { 12279 /* vpalignr */, X86::VPALIGNRZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16073 { 12279 /* vpalignr */, X86::VPALIGNRZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16073 { 12279 /* vpalignr */, X86::VPALIGNRZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16073 { 12279 /* vpalignr */, X86::VPALIGNRZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16076 { 12279 /* vpalignr */, X86::VPALIGNRZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16076 { 12279 /* vpalignr */, X86::VPALIGNRZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16083 { 12294 /* vpandd */, X86::VPANDDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16083 { 12294 /* vpandd */, X86::VPANDDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16083 { 12294 /* vpandd */, X86::VPANDDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16086 { 12294 /* vpandd */, X86::VPANDDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16086 { 12294 /* vpandd */, X86::VPANDDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16087 { 12294 /* vpandd */, X86::VPANDDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
16087 { 12294 /* vpandd */, X86::VPANDDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
16092 { 12294 /* vpandd */, X86::VPANDDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16092 { 12294 /* vpandd */, X86::VPANDDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16092 { 12294 /* vpandd */, X86::VPANDDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16095 { 12294 /* vpandd */, X86::VPANDDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16095 { 12294 /* vpandd */, X86::VPANDDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16098 { 12294 /* vpandd */, X86::VPANDDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16098 { 12294 /* vpandd */, X86::VPANDDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16098 { 12294 /* vpandd */, X86::VPANDDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16101 { 12294 /* vpandd */, X86::VPANDDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16101 { 12294 /* vpandd */, X86::VPANDDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16104 { 12294 /* vpandd */, X86::VPANDDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16104 { 12294 /* vpandd */, X86::VPANDDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16105 { 12294 /* vpandd */, X86::VPANDDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16105 { 12294 /* vpandd */, X86::VPANDDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16114 { 12308 /* vpandnd */, X86::VPANDNDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16114 { 12308 /* vpandnd */, X86::VPANDNDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16114 { 12308 /* vpandnd */, X86::VPANDNDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16117 { 12308 /* vpandnd */, X86::VPANDNDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16117 { 12308 /* vpandnd */, X86::VPANDNDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16118 { 12308 /* vpandnd */, X86::VPANDNDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
16118 { 12308 /* vpandnd */, X86::VPANDNDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
16123 { 12308 /* vpandnd */, X86::VPANDNDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16123 { 12308 /* vpandnd */, X86::VPANDNDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16123 { 12308 /* vpandnd */, X86::VPANDNDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16126 { 12308 /* vpandnd */, X86::VPANDNDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16126 { 12308 /* vpandnd */, X86::VPANDNDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16129 { 12308 /* vpandnd */, X86::VPANDNDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16129 { 12308 /* vpandnd */, X86::VPANDNDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16129 { 12308 /* vpandnd */, X86::VPANDNDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16132 { 12308 /* vpandnd */, X86::VPANDNDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16132 { 12308 /* vpandnd */, X86::VPANDNDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16135 { 12308 /* vpandnd */, X86::VPANDNDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16135 { 12308 /* vpandnd */, X86::VPANDNDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16136 { 12308 /* vpandnd */, X86::VPANDNDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16136 { 12308 /* vpandnd */, X86::VPANDNDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16141 { 12316 /* vpandnq */, X86::VPANDNQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16141 { 12316 /* vpandnq */, X86::VPANDNQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16141 { 12316 /* vpandnq */, X86::VPANDNQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16144 { 12316 /* vpandnq */, X86::VPANDNQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16144 { 12316 /* vpandnq */, X86::VPANDNQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16147 { 12316 /* vpandnq */, X86::VPANDNQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
16147 { 12316 /* vpandnq */, X86::VPANDNQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
16150 { 12316 /* vpandnq */, X86::VPANDNQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16150 { 12316 /* vpandnq */, X86::VPANDNQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16150 { 12316 /* vpandnq */, X86::VPANDNQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16153 { 12316 /* vpandnq */, X86::VPANDNQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16153 { 12316 /* vpandnq */, X86::VPANDNQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16156 { 12316 /* vpandnq */, X86::VPANDNQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16156 { 12316 /* vpandnq */, X86::VPANDNQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16156 { 12316 /* vpandnq */, X86::VPANDNQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16159 { 12316 /* vpandnq */, X86::VPANDNQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16159 { 12316 /* vpandnq */, X86::VPANDNQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16162 { 12316 /* vpandnq */, X86::VPANDNQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16162 { 12316 /* vpandnq */, X86::VPANDNQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16165 { 12316 /* vpandnq */, X86::VPANDNQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16165 { 12316 /* vpandnq */, X86::VPANDNQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16168 { 12324 /* vpandq */, X86::VPANDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16168 { 12324 /* vpandq */, X86::VPANDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16168 { 12324 /* vpandq */, X86::VPANDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16171 { 12324 /* vpandq */, X86::VPANDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16171 { 12324 /* vpandq */, X86::VPANDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16174 { 12324 /* vpandq */, X86::VPANDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
16174 { 12324 /* vpandq */, X86::VPANDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
16177 { 12324 /* vpandq */, X86::VPANDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16177 { 12324 /* vpandq */, X86::VPANDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16177 { 12324 /* vpandq */, X86::VPANDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16180 { 12324 /* vpandq */, X86::VPANDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16180 { 12324 /* vpandq */, X86::VPANDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16183 { 12324 /* vpandq */, X86::VPANDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16183 { 12324 /* vpandq */, X86::VPANDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16183 { 12324 /* vpandq */, X86::VPANDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16186 { 12324 /* vpandq */, X86::VPANDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16186 { 12324 /* vpandq */, X86::VPANDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16189 { 12324 /* vpandq */, X86::VPANDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16189 { 12324 /* vpandq */, X86::VPANDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16192 { 12324 /* vpandq */, X86::VPANDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16192 { 12324 /* vpandq */, X86::VPANDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16197 { 12331 /* vpavgb */, X86::VPAVGBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16197 { 12331 /* vpavgb */, X86::VPAVGBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16197 { 12331 /* vpavgb */, X86::VPAVGBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16202 { 12331 /* vpavgb */, X86::VPAVGBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16202 { 12331 /* vpavgb */, X86::VPAVGBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16205 { 12331 /* vpavgb */, X86::VPAVGBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16205 { 12331 /* vpavgb */, X86::VPAVGBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16205 { 12331 /* vpavgb */, X86::VPAVGBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16208 { 12331 /* vpavgb */, X86::VPAVGBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16208 { 12331 /* vpavgb */, X86::VPAVGBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16211 { 12331 /* vpavgb */, X86::VPAVGBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16211 { 12331 /* vpavgb */, X86::VPAVGBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16211 { 12331 /* vpavgb */, X86::VPAVGBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16214 { 12331 /* vpavgb */, X86::VPAVGBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16214 { 12331 /* vpavgb */, X86::VPAVGBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16219 { 12338 /* vpavgw */, X86::VPAVGWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16219 { 12338 /* vpavgw */, X86::VPAVGWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16219 { 12338 /* vpavgw */, X86::VPAVGWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16224 { 12338 /* vpavgw */, X86::VPAVGWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16224 { 12338 /* vpavgw */, X86::VPAVGWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16227 { 12338 /* vpavgw */, X86::VPAVGWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16227 { 12338 /* vpavgw */, X86::VPAVGWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16227 { 12338 /* vpavgw */, X86::VPAVGWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16230 { 12338 /* vpavgw */, X86::VPAVGWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16230 { 12338 /* vpavgw */, X86::VPAVGWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16233 { 12338 /* vpavgw */, X86::VPAVGWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16233 { 12338 /* vpavgw */, X86::VPAVGWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16233 { 12338 /* vpavgw */, X86::VPAVGWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16236 { 12338 /* vpavgw */, X86::VPAVGWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16236 { 12338 /* vpavgw */, X86::VPAVGWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16243 { 12354 /* vpblendmb */, X86::VPBLENDMBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16243 { 12354 /* vpblendmb */, X86::VPBLENDMBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16243 { 12354 /* vpblendmb */, X86::VPBLENDMBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16246 { 12354 /* vpblendmb */, X86::VPBLENDMBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16246 { 12354 /* vpblendmb */, X86::VPBLENDMBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16249 { 12354 /* vpblendmb */, X86::VPBLENDMBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16249 { 12354 /* vpblendmb */, X86::VPBLENDMBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16249 { 12354 /* vpblendmb */, X86::VPBLENDMBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16252 { 12354 /* vpblendmb */, X86::VPBLENDMBZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16252 { 12354 /* vpblendmb */, X86::VPBLENDMBZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16255 { 12354 /* vpblendmb */, X86::VPBLENDMBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16255 { 12354 /* vpblendmb */, X86::VPBLENDMBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16255 { 12354 /* vpblendmb */, X86::VPBLENDMBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16258 { 12354 /* vpblendmb */, X86::VPBLENDMBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16258 { 12354 /* vpblendmb */, X86::VPBLENDMBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16261 { 12364 /* vpblendmd */, X86::VPBLENDMDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16261 { 12364 /* vpblendmd */, X86::VPBLENDMDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16261 { 12364 /* vpblendmd */, X86::VPBLENDMDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16264 { 12364 /* vpblendmd */, X86::VPBLENDMDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16264 { 12364 /* vpblendmd */, X86::VPBLENDMDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16265 { 12364 /* vpblendmd */, X86::VPBLENDMDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
16265 { 12364 /* vpblendmd */, X86::VPBLENDMDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
16270 { 12364 /* vpblendmd */, X86::VPBLENDMDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16270 { 12364 /* vpblendmd */, X86::VPBLENDMDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16270 { 12364 /* vpblendmd */, X86::VPBLENDMDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16273 { 12364 /* vpblendmd */, X86::VPBLENDMDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16273 { 12364 /* vpblendmd */, X86::VPBLENDMDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16276 { 12364 /* vpblendmd */, X86::VPBLENDMDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16276 { 12364 /* vpblendmd */, X86::VPBLENDMDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16276 { 12364 /* vpblendmd */, X86::VPBLENDMDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16279 { 12364 /* vpblendmd */, X86::VPBLENDMDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16279 { 12364 /* vpblendmd */, X86::VPBLENDMDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16282 { 12364 /* vpblendmd */, X86::VPBLENDMDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16282 { 12364 /* vpblendmd */, X86::VPBLENDMDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16283 { 12364 /* vpblendmd */, X86::VPBLENDMDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16283 { 12364 /* vpblendmd */, X86::VPBLENDMDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16288 { 12374 /* vpblendmq */, X86::VPBLENDMQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16288 { 12374 /* vpblendmq */, X86::VPBLENDMQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16288 { 12374 /* vpblendmq */, X86::VPBLENDMQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16291 { 12374 /* vpblendmq */, X86::VPBLENDMQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16291 { 12374 /* vpblendmq */, X86::VPBLENDMQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16294 { 12374 /* vpblendmq */, X86::VPBLENDMQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
16294 { 12374 /* vpblendmq */, X86::VPBLENDMQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
16297 { 12374 /* vpblendmq */, X86::VPBLENDMQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16297 { 12374 /* vpblendmq */, X86::VPBLENDMQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16297 { 12374 /* vpblendmq */, X86::VPBLENDMQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16300 { 12374 /* vpblendmq */, X86::VPBLENDMQZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16300 { 12374 /* vpblendmq */, X86::VPBLENDMQZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16303 { 12374 /* vpblendmq */, X86::VPBLENDMQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16303 { 12374 /* vpblendmq */, X86::VPBLENDMQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16303 { 12374 /* vpblendmq */, X86::VPBLENDMQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16306 { 12374 /* vpblendmq */, X86::VPBLENDMQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16306 { 12374 /* vpblendmq */, X86::VPBLENDMQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16309 { 12374 /* vpblendmq */, X86::VPBLENDMQZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16309 { 12374 /* vpblendmq */, X86::VPBLENDMQZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16312 { 12374 /* vpblendmq */, X86::VPBLENDMQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16312 { 12374 /* vpblendmq */, X86::VPBLENDMQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16315 { 12384 /* vpblendmw */, X86::VPBLENDMWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16315 { 12384 /* vpblendmw */, X86::VPBLENDMWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16315 { 12384 /* vpblendmw */, X86::VPBLENDMWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16318 { 12384 /* vpblendmw */, X86::VPBLENDMWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16318 { 12384 /* vpblendmw */, X86::VPBLENDMWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16321 { 12384 /* vpblendmw */, X86::VPBLENDMWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16321 { 12384 /* vpblendmw */, X86::VPBLENDMWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16321 { 12384 /* vpblendmw */, X86::VPBLENDMWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16324 { 12384 /* vpblendmw */, X86::VPBLENDMWZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16324 { 12384 /* vpblendmw */, X86::VPBLENDMWZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16327 { 12384 /* vpblendmw */, X86::VPBLENDMWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16327 { 12384 /* vpblendmw */, X86::VPBLENDMWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16327 { 12384 /* vpblendmw */, X86::VPBLENDMWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16330 { 12384 /* vpblendmw */, X86::VPBLENDMWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16330 { 12384 /* vpblendmw */, X86::VPBLENDMWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16343 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR512 }, },
16346 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
16351 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZm, Convert__Reg1_1__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_VR512 }, },
16354 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16357 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16360 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16363 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16366 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16369 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZmkz, Convert__Reg1_1__Reg1_3__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16374 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR512 }, },
16377 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
16382 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR512 }, },
16385 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16388 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16391 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16394 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16397 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16400 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZmkz, Convert__Reg1_1__Reg1_3__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16403 { 12439 /* vpbroadcastmb2q */, X86::VPBROADCASTMB2QZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VR512 }, },
16406 { 12455 /* vpbroadcastmw2d */, X86::VPBROADCASTMW2DZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VR512 }, },
16411 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_VR512 }, },
16414 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
16419 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512 }, },
16422 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16425 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16428 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16431 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16434 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16437 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16442 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR512 }, },
16445 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
16450 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_VR512 }, },
16453 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16456 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16459 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16462 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16465 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16468 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZmkz, Convert__Reg1_1__Reg1_3__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16473 { 12497 /* vpclmulhqhqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16473 { 12497 /* vpclmulhqhqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16473 { 12497 /* vpclmulhqhqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16478 { 12497 /* vpclmulhqhqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_17, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16478 { 12497 /* vpclmulhqhqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_17, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16483 { 12511 /* vpclmulhqlqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16483 { 12511 /* vpclmulhqlqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16483 { 12511 /* vpclmulhqlqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16488 { 12511 /* vpclmulhqlqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_1, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16488 { 12511 /* vpclmulhqlqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_1, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16493 { 12525 /* vpclmullqhqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16493 { 12525 /* vpclmullqhqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16493 { 12525 /* vpclmullqhqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16498 { 12525 /* vpclmullqhqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_16, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16498 { 12525 /* vpclmullqhqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_16, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16503 { 12539 /* vpclmullqlqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16503 { 12539 /* vpclmullqlqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16503 { 12539 /* vpclmullqlqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16508 { 12539 /* vpclmullqlqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16508 { 12539 /* vpclmullqlqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16513 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
16513 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
16513 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
16518 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16518 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16527 { 12571 /* vpcmpb */, X86::VPCMPBZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
16527 { 12571 /* vpcmpb */, X86::VPCMPBZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
16530 { 12571 /* vpcmpb */, X86::VPCMPBZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
16533 { 12571 /* vpcmpb */, X86::VPCMPBZrrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16533 { 12571 /* vpcmpb */, X86::VPCMPBZrrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16536 { 12571 /* vpcmpb */, X86::VPCMPBZrmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16539 { 12578 /* vpcmpd */, X86::VPCMPDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
16539 { 12578 /* vpcmpd */, X86::VPCMPDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
16542 { 12578 /* vpcmpd */, X86::VPCMPDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
16543 { 12578 /* vpcmpd */, X86::VPCMPDZrmib, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
16548 { 12578 /* vpcmpd */, X86::VPCMPDZrrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16548 { 12578 /* vpcmpd */, X86::VPCMPDZrrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16551 { 12578 /* vpcmpd */, X86::VPCMPDZrmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16552 { 12578 /* vpcmpd */, X86::VPCMPDZrmibk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16559 { 12585 /* vpcmpeqb */, X86::VPCMPEQBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
16559 { 12585 /* vpcmpeqb */, X86::VPCMPEQBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
16564 { 12585 /* vpcmpeqb */, X86::VPCMPEQBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
16567 { 12585 /* vpcmpeqb */, X86::VPCMPEQBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16567 { 12585 /* vpcmpeqb */, X86::VPCMPEQBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16570 { 12585 /* vpcmpeqb */, X86::VPCMPEQBZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16575 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
16575 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
16580 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
16581 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
16586 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16586 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16589 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16590 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16597 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
16597 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
16602 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
16605 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
16608 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16608 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16611 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16614 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16619 { 12612 /* vpcmpeqw */, X86::VPCMPEQWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
16619 { 12612 /* vpcmpeqw */, X86::VPCMPEQWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
16624 { 12612 /* vpcmpeqw */, X86::VPCMPEQWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
16627 { 12612 /* vpcmpeqw */, X86::VPCMPEQWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16627 { 12612 /* vpcmpeqw */, X86::VPCMPEQWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16630 { 12612 /* vpcmpeqw */, X86::VPCMPEQWZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16639 { 12643 /* vpcmpgtb */, X86::VPCMPGTBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
16639 { 12643 /* vpcmpgtb */, X86::VPCMPGTBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
16644 { 12643 /* vpcmpgtb */, X86::VPCMPGTBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
16647 { 12643 /* vpcmpgtb */, X86::VPCMPGTBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16647 { 12643 /* vpcmpgtb */, X86::VPCMPGTBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16650 { 12643 /* vpcmpgtb */, X86::VPCMPGTBZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16655 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
16655 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
16660 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
16661 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
16666 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16666 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16669 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16670 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16677 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
16677 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
16682 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
16685 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
16688 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16688 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16691 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16694 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16699 { 12670 /* vpcmpgtw */, X86::VPCMPGTWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
16699 { 12670 /* vpcmpgtw */, X86::VPCMPGTWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
16704 { 12670 /* vpcmpgtw */, X86::VPCMPGTWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
16707 { 12670 /* vpcmpgtw */, X86::VPCMPGTWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16707 { 12670 /* vpcmpgtw */, X86::VPCMPGTWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16710 { 12670 /* vpcmpgtw */, X86::VPCMPGTWZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16717 { 12701 /* vpcmpq */, X86::VPCMPQZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
16717 { 12701 /* vpcmpq */, X86::VPCMPQZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
16720 { 12701 /* vpcmpq */, X86::VPCMPQZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
16723 { 12701 /* vpcmpq */, X86::VPCMPQZrmib, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
16726 { 12701 /* vpcmpq */, X86::VPCMPQZrrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16726 { 12701 /* vpcmpq */, X86::VPCMPQZrrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16729 { 12701 /* vpcmpq */, X86::VPCMPQZrmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16732 { 12701 /* vpcmpq */, X86::VPCMPQZrmibk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16735 { 12708 /* vpcmpub */, X86::VPCMPUBZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
16735 { 12708 /* vpcmpub */, X86::VPCMPUBZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
16738 { 12708 /* vpcmpub */, X86::VPCMPUBZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
16741 { 12708 /* vpcmpub */, X86::VPCMPUBZrrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16741 { 12708 /* vpcmpub */, X86::VPCMPUBZrrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16744 { 12708 /* vpcmpub */, X86::VPCMPUBZrmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16747 { 12716 /* vpcmpud */, X86::VPCMPUDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
16747 { 12716 /* vpcmpud */, X86::VPCMPUDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
16750 { 12716 /* vpcmpud */, X86::VPCMPUDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
16751 { 12716 /* vpcmpud */, X86::VPCMPUDZrmib, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
16756 { 12716 /* vpcmpud */, X86::VPCMPUDZrrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16756 { 12716 /* vpcmpud */, X86::VPCMPUDZrrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16759 { 12716 /* vpcmpud */, X86::VPCMPUDZrmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16760 { 12716 /* vpcmpud */, X86::VPCMPUDZrmibk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16765 { 12724 /* vpcmpuq */, X86::VPCMPUQZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
16765 { 12724 /* vpcmpuq */, X86::VPCMPUQZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
16768 { 12724 /* vpcmpuq */, X86::VPCMPUQZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
16771 { 12724 /* vpcmpuq */, X86::VPCMPUQZrmib, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
16774 { 12724 /* vpcmpuq */, X86::VPCMPUQZrrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16774 { 12724 /* vpcmpuq */, X86::VPCMPUQZrrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16777 { 12724 /* vpcmpuq */, X86::VPCMPUQZrmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16780 { 12724 /* vpcmpuq */, X86::VPCMPUQZrmibk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16783 { 12732 /* vpcmpuw */, X86::VPCMPUWZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
16783 { 12732 /* vpcmpuw */, X86::VPCMPUWZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
16786 { 12732 /* vpcmpuw */, X86::VPCMPUWZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
16789 { 12732 /* vpcmpuw */, X86::VPCMPUWZrrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16789 { 12732 /* vpcmpuw */, X86::VPCMPUWZrrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16792 { 12732 /* vpcmpuw */, X86::VPCMPUWZrmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16795 { 12740 /* vpcmpw */, X86::VPCMPWZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
16795 { 12740 /* vpcmpw */, X86::VPCMPWZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
16798 { 12740 /* vpcmpw */, X86::VPCMPWZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
16801 { 12740 /* vpcmpw */, X86::VPCMPWZrrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16801 { 12740 /* vpcmpw */, X86::VPCMPWZrrik, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16804 { 12740 /* vpcmpw */, X86::VPCMPWZrmik, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16813 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
16813 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
16814 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
16819 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16819 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16820 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16823 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16823 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16828 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
16828 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
16829 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
16834 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16834 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16835 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16838 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16838 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16843 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
16843 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
16844 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
16849 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16849 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16850 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16853 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16853 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16858 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
16858 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
16859 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZmr, Convert__Mem5125_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
16864 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16864 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16865 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16868 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16868 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16883 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
16883 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
16886 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
16887 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
16892 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16892 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16895 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16898 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16898 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16901 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16904 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16905 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16910 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
16910 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
16913 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
16916 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
16919 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16919 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16922 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16925 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16925 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16928 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16931 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16934 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16937 { 12879 /* vpdpbusd */, X86::VPDPBUSDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16937 { 12879 /* vpdpbusd */, X86::VPDPBUSDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16937 { 12879 /* vpdpbusd */, X86::VPDPBUSDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16940 { 12879 /* vpdpbusd */, X86::VPDPBUSDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16940 { 12879 /* vpdpbusd */, X86::VPDPBUSDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16941 { 12879 /* vpdpbusd */, X86::VPDPBUSDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
16941 { 12879 /* vpdpbusd */, X86::VPDPBUSDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
16946 { 12879 /* vpdpbusd */, X86::VPDPBUSDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16946 { 12879 /* vpdpbusd */, X86::VPDPBUSDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16946 { 12879 /* vpdpbusd */, X86::VPDPBUSDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16949 { 12879 /* vpdpbusd */, X86::VPDPBUSDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16949 { 12879 /* vpdpbusd */, X86::VPDPBUSDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16952 { 12879 /* vpdpbusd */, X86::VPDPBUSDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16952 { 12879 /* vpdpbusd */, X86::VPDPBUSDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16952 { 12879 /* vpdpbusd */, X86::VPDPBUSDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16955 { 12879 /* vpdpbusd */, X86::VPDPBUSDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16955 { 12879 /* vpdpbusd */, X86::VPDPBUSDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16958 { 12879 /* vpdpbusd */, X86::VPDPBUSDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16958 { 12879 /* vpdpbusd */, X86::VPDPBUSDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16959 { 12879 /* vpdpbusd */, X86::VPDPBUSDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16959 { 12879 /* vpdpbusd */, X86::VPDPBUSDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16964 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16964 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16964 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16967 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16967 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16968 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
16968 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
16973 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16973 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16973 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16976 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16976 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16979 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16979 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16979 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16982 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16982 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16985 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16985 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16986 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16986 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16991 { 12898 /* vpdpwssd */, X86::VPDPWSSDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16991 { 12898 /* vpdpwssd */, X86::VPDPWSSDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16991 { 12898 /* vpdpwssd */, X86::VPDPWSSDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16994 { 12898 /* vpdpwssd */, X86::VPDPWSSDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16994 { 12898 /* vpdpwssd */, X86::VPDPWSSDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16995 { 12898 /* vpdpwssd */, X86::VPDPWSSDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
16995 { 12898 /* vpdpwssd */, X86::VPDPWSSDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
17000 { 12898 /* vpdpwssd */, X86::VPDPWSSDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17000 { 12898 /* vpdpwssd */, X86::VPDPWSSDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17000 { 12898 /* vpdpwssd */, X86::VPDPWSSDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17003 { 12898 /* vpdpwssd */, X86::VPDPWSSDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17003 { 12898 /* vpdpwssd */, X86::VPDPWSSDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17006 { 12898 /* vpdpwssd */, X86::VPDPWSSDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17006 { 12898 /* vpdpwssd */, X86::VPDPWSSDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17006 { 12898 /* vpdpwssd */, X86::VPDPWSSDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17009 { 12898 /* vpdpwssd */, X86::VPDPWSSDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17009 { 12898 /* vpdpwssd */, X86::VPDPWSSDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17012 { 12898 /* vpdpwssd */, X86::VPDPWSSDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17012 { 12898 /* vpdpwssd */, X86::VPDPWSSDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17013 { 12898 /* vpdpwssd */, X86::VPDPWSSDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17013 { 12898 /* vpdpwssd */, X86::VPDPWSSDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17018 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17018 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17018 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17021 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17021 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17022 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
17022 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
17027 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17027 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17027 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17030 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17030 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17033 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17033 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17033 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17036 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17036 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17039 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17039 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17040 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17040 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17049 { 12939 /* vpermb */, X86::VPERMBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17049 { 12939 /* vpermb */, X86::VPERMBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17049 { 12939 /* vpermb */, X86::VPERMBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17052 { 12939 /* vpermb */, X86::VPERMBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17052 { 12939 /* vpermb */, X86::VPERMBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17055 { 12939 /* vpermb */, X86::VPERMBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17055 { 12939 /* vpermb */, X86::VPERMBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17055 { 12939 /* vpermb */, X86::VPERMBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17058 { 12939 /* vpermb */, X86::VPERMBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17058 { 12939 /* vpermb */, X86::VPERMBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17061 { 12939 /* vpermb */, X86::VPERMBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17061 { 12939 /* vpermb */, X86::VPERMBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17061 { 12939 /* vpermb */, X86::VPERMBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17064 { 12939 /* vpermb */, X86::VPERMBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17064 { 12939 /* vpermb */, X86::VPERMBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17067 { 12946 /* vpermd */, X86::VPERMDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17067 { 12946 /* vpermd */, X86::VPERMDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17067 { 12946 /* vpermd */, X86::VPERMDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17070 { 12946 /* vpermd */, X86::VPERMDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17070 { 12946 /* vpermd */, X86::VPERMDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17071 { 12946 /* vpermd */, X86::VPERMDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
17071 { 12946 /* vpermd */, X86::VPERMDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
17074 { 12946 /* vpermd */, X86::VPERMDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17074 { 12946 /* vpermd */, X86::VPERMDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17074 { 12946 /* vpermd */, X86::VPERMDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17076 { 12946 /* vpermd */, X86::VPERMDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17076 { 12946 /* vpermd */, X86::VPERMDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17078 { 12946 /* vpermd */, X86::VPERMDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17078 { 12946 /* vpermd */, X86::VPERMDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17078 { 12946 /* vpermd */, X86::VPERMDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17080 { 12946 /* vpermd */, X86::VPERMDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17080 { 12946 /* vpermd */, X86::VPERMDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17082 { 12946 /* vpermd */, X86::VPERMDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17082 { 12946 /* vpermd */, X86::VPERMDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17083 { 12946 /* vpermd */, X86::VPERMDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17083 { 12946 /* vpermd */, X86::VPERMDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17087 { 12953 /* vpermi2b */, X86::VPERMI2Brr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17087 { 12953 /* vpermi2b */, X86::VPERMI2Brr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17087 { 12953 /* vpermi2b */, X86::VPERMI2Brr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17090 { 12953 /* vpermi2b */, X86::VPERMI2Brm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17090 { 12953 /* vpermi2b */, X86::VPERMI2Brm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17093 { 12953 /* vpermi2b */, X86::VPERMI2Brrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17093 { 12953 /* vpermi2b */, X86::VPERMI2Brrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17093 { 12953 /* vpermi2b */, X86::VPERMI2Brrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17096 { 12953 /* vpermi2b */, X86::VPERMI2Brmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17096 { 12953 /* vpermi2b */, X86::VPERMI2Brmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17099 { 12953 /* vpermi2b */, X86::VPERMI2Brrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17099 { 12953 /* vpermi2b */, X86::VPERMI2Brrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17099 { 12953 /* vpermi2b */, X86::VPERMI2Brrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17102 { 12953 /* vpermi2b */, X86::VPERMI2Brmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17102 { 12953 /* vpermi2b */, X86::VPERMI2Brmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17105 { 12962 /* vpermi2d */, X86::VPERMI2Drr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17105 { 12962 /* vpermi2d */, X86::VPERMI2Drr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17105 { 12962 /* vpermi2d */, X86::VPERMI2Drr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17108 { 12962 /* vpermi2d */, X86::VPERMI2Drm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17108 { 12962 /* vpermi2d */, X86::VPERMI2Drm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17109 { 12962 /* vpermi2d */, X86::VPERMI2Drmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
17109 { 12962 /* vpermi2d */, X86::VPERMI2Drmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
17114 { 12962 /* vpermi2d */, X86::VPERMI2Drrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17114 { 12962 /* vpermi2d */, X86::VPERMI2Drrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17114 { 12962 /* vpermi2d */, X86::VPERMI2Drrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17117 { 12962 /* vpermi2d */, X86::VPERMI2Drmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17117 { 12962 /* vpermi2d */, X86::VPERMI2Drmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17120 { 12962 /* vpermi2d */, X86::VPERMI2Drrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17120 { 12962 /* vpermi2d */, X86::VPERMI2Drrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17120 { 12962 /* vpermi2d */, X86::VPERMI2Drrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17123 { 12962 /* vpermi2d */, X86::VPERMI2Drmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17123 { 12962 /* vpermi2d */, X86::VPERMI2Drmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17126 { 12962 /* vpermi2d */, X86::VPERMI2Drmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17126 { 12962 /* vpermi2d */, X86::VPERMI2Drmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17127 { 12962 /* vpermi2d */, X86::VPERMI2Drmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17127 { 12962 /* vpermi2d */, X86::VPERMI2Drmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17132 { 12971 /* vpermi2pd */, X86::VPERMI2PDrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17132 { 12971 /* vpermi2pd */, X86::VPERMI2PDrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17132 { 12971 /* vpermi2pd */, X86::VPERMI2PDrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17135 { 12971 /* vpermi2pd */, X86::VPERMI2PDrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17135 { 12971 /* vpermi2pd */, X86::VPERMI2PDrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17138 { 12971 /* vpermi2pd */, X86::VPERMI2PDrmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
17138 { 12971 /* vpermi2pd */, X86::VPERMI2PDrmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
17141 { 12971 /* vpermi2pd */, X86::VPERMI2PDrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17141 { 12971 /* vpermi2pd */, X86::VPERMI2PDrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17141 { 12971 /* vpermi2pd */, X86::VPERMI2PDrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17144 { 12971 /* vpermi2pd */, X86::VPERMI2PDrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17144 { 12971 /* vpermi2pd */, X86::VPERMI2PDrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17147 { 12971 /* vpermi2pd */, X86::VPERMI2PDrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17147 { 12971 /* vpermi2pd */, X86::VPERMI2PDrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17147 { 12971 /* vpermi2pd */, X86::VPERMI2PDrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17150 { 12971 /* vpermi2pd */, X86::VPERMI2PDrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17150 { 12971 /* vpermi2pd */, X86::VPERMI2PDrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17153 { 12971 /* vpermi2pd */, X86::VPERMI2PDrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17153 { 12971 /* vpermi2pd */, X86::VPERMI2PDrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17156 { 12971 /* vpermi2pd */, X86::VPERMI2PDrmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17156 { 12971 /* vpermi2pd */, X86::VPERMI2PDrmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17159 { 12981 /* vpermi2ps */, X86::VPERMI2PSrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17159 { 12981 /* vpermi2ps */, X86::VPERMI2PSrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17159 { 12981 /* vpermi2ps */, X86::VPERMI2PSrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17162 { 12981 /* vpermi2ps */, X86::VPERMI2PSrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17162 { 12981 /* vpermi2ps */, X86::VPERMI2PSrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17163 { 12981 /* vpermi2ps */, X86::VPERMI2PSrmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
17163 { 12981 /* vpermi2ps */, X86::VPERMI2PSrmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
17168 { 12981 /* vpermi2ps */, X86::VPERMI2PSrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17168 { 12981 /* vpermi2ps */, X86::VPERMI2PSrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17168 { 12981 /* vpermi2ps */, X86::VPERMI2PSrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17171 { 12981 /* vpermi2ps */, X86::VPERMI2PSrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17171 { 12981 /* vpermi2ps */, X86::VPERMI2PSrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17174 { 12981 /* vpermi2ps */, X86::VPERMI2PSrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17174 { 12981 /* vpermi2ps */, X86::VPERMI2PSrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17174 { 12981 /* vpermi2ps */, X86::VPERMI2PSrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17177 { 12981 /* vpermi2ps */, X86::VPERMI2PSrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17177 { 12981 /* vpermi2ps */, X86::VPERMI2PSrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17180 { 12981 /* vpermi2ps */, X86::VPERMI2PSrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17180 { 12981 /* vpermi2ps */, X86::VPERMI2PSrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17181 { 12981 /* vpermi2ps */, X86::VPERMI2PSrmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17181 { 12981 /* vpermi2ps */, X86::VPERMI2PSrmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17186 { 12991 /* vpermi2q */, X86::VPERMI2Qrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17186 { 12991 /* vpermi2q */, X86::VPERMI2Qrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17186 { 12991 /* vpermi2q */, X86::VPERMI2Qrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17189 { 12991 /* vpermi2q */, X86::VPERMI2Qrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17189 { 12991 /* vpermi2q */, X86::VPERMI2Qrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17192 { 12991 /* vpermi2q */, X86::VPERMI2Qrmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
17192 { 12991 /* vpermi2q */, X86::VPERMI2Qrmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
17195 { 12991 /* vpermi2q */, X86::VPERMI2Qrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17195 { 12991 /* vpermi2q */, X86::VPERMI2Qrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17195 { 12991 /* vpermi2q */, X86::VPERMI2Qrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17198 { 12991 /* vpermi2q */, X86::VPERMI2Qrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17198 { 12991 /* vpermi2q */, X86::VPERMI2Qrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17201 { 12991 /* vpermi2q */, X86::VPERMI2Qrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17201 { 12991 /* vpermi2q */, X86::VPERMI2Qrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17201 { 12991 /* vpermi2q */, X86::VPERMI2Qrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17204 { 12991 /* vpermi2q */, X86::VPERMI2Qrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17204 { 12991 /* vpermi2q */, X86::VPERMI2Qrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17207 { 12991 /* vpermi2q */, X86::VPERMI2Qrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17207 { 12991 /* vpermi2q */, X86::VPERMI2Qrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17210 { 12991 /* vpermi2q */, X86::VPERMI2Qrmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17210 { 12991 /* vpermi2q */, X86::VPERMI2Qrmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17213 { 13000 /* vpermi2w */, X86::VPERMI2Wrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17213 { 13000 /* vpermi2w */, X86::VPERMI2Wrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17213 { 13000 /* vpermi2w */, X86::VPERMI2Wrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17216 { 13000 /* vpermi2w */, X86::VPERMI2Wrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17216 { 13000 /* vpermi2w */, X86::VPERMI2Wrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17219 { 13000 /* vpermi2w */, X86::VPERMI2Wrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17219 { 13000 /* vpermi2w */, X86::VPERMI2Wrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17219 { 13000 /* vpermi2w */, X86::VPERMI2Wrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17222 { 13000 /* vpermi2w */, X86::VPERMI2Wrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17222 { 13000 /* vpermi2w */, X86::VPERMI2Wrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17225 { 13000 /* vpermi2w */, X86::VPERMI2Wrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17225 { 13000 /* vpermi2w */, X86::VPERMI2Wrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17225 { 13000 /* vpermi2w */, X86::VPERMI2Wrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17228 { 13000 /* vpermi2w */, X86::VPERMI2Wrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17228 { 13000 /* vpermi2w */, X86::VPERMI2Wrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17245 { 13031 /* vpermilpd */, X86::VPERMILPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17245 { 13031 /* vpermilpd */, X86::VPERMILPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17245 { 13031 /* vpermilpd */, X86::VPERMILPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17250 { 13031 /* vpermilpd */, X86::VPERMILPDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
17250 { 13031 /* vpermilpd */, X86::VPERMILPDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
17255 { 13031 /* vpermilpd */, X86::VPERMILPDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
17260 { 13031 /* vpermilpd */, X86::VPERMILPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17260 { 13031 /* vpermilpd */, X86::VPERMILPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17263 { 13031 /* vpermilpd */, X86::VPERMILPDZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
17266 { 13031 /* vpermilpd */, X86::VPERMILPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
17266 { 13031 /* vpermilpd */, X86::VPERMILPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
17269 { 13031 /* vpermilpd */, X86::VPERMILPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17269 { 13031 /* vpermilpd */, X86::VPERMILPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17269 { 13031 /* vpermilpd */, X86::VPERMILPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17272 { 13031 /* vpermilpd */, X86::VPERMILPDZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17272 { 13031 /* vpermilpd */, X86::VPERMILPDZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17275 { 13031 /* vpermilpd */, X86::VPERMILPDZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17278 { 13031 /* vpermilpd */, X86::VPERMILPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17278 { 13031 /* vpermilpd */, X86::VPERMILPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17281 { 13031 /* vpermilpd */, X86::VPERMILPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17281 { 13031 /* vpermilpd */, X86::VPERMILPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17281 { 13031 /* vpermilpd */, X86::VPERMILPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17284 { 13031 /* vpermilpd */, X86::VPERMILPDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17284 { 13031 /* vpermilpd */, X86::VPERMILPDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17287 { 13031 /* vpermilpd */, X86::VPERMILPDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17290 { 13031 /* vpermilpd */, X86::VPERMILPDZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17293 { 13031 /* vpermilpd */, X86::VPERMILPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17293 { 13031 /* vpermilpd */, X86::VPERMILPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17296 { 13031 /* vpermilpd */, X86::VPERMILPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17296 { 13031 /* vpermilpd */, X86::VPERMILPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17299 { 13031 /* vpermilpd */, X86::VPERMILPDZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17302 { 13031 /* vpermilpd */, X86::VPERMILPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17302 { 13031 /* vpermilpd */, X86::VPERMILPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17307 { 13041 /* vpermilps */, X86::VPERMILPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17307 { 13041 /* vpermilps */, X86::VPERMILPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17307 { 13041 /* vpermilps */, X86::VPERMILPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17312 { 13041 /* vpermilps */, X86::VPERMILPSZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
17312 { 13041 /* vpermilps */, X86::VPERMILPSZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
17317 { 13041 /* vpermilps */, X86::VPERMILPSZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
17322 { 13041 /* vpermilps */, X86::VPERMILPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17322 { 13041 /* vpermilps */, X86::VPERMILPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17323 { 13041 /* vpermilps */, X86::VPERMILPSZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
17326 { 13041 /* vpermilps */, X86::VPERMILPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
17326 { 13041 /* vpermilps */, X86::VPERMILPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
17331 { 13041 /* vpermilps */, X86::VPERMILPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17331 { 13041 /* vpermilps */, X86::VPERMILPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17331 { 13041 /* vpermilps */, X86::VPERMILPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17334 { 13041 /* vpermilps */, X86::VPERMILPSZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17334 { 13041 /* vpermilps */, X86::VPERMILPSZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17337 { 13041 /* vpermilps */, X86::VPERMILPSZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17340 { 13041 /* vpermilps */, X86::VPERMILPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17340 { 13041 /* vpermilps */, X86::VPERMILPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17343 { 13041 /* vpermilps */, X86::VPERMILPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17343 { 13041 /* vpermilps */, X86::VPERMILPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17343 { 13041 /* vpermilps */, X86::VPERMILPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17346 { 13041 /* vpermilps */, X86::VPERMILPSZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17346 { 13041 /* vpermilps */, X86::VPERMILPSZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17349 { 13041 /* vpermilps */, X86::VPERMILPSZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17352 { 13041 /* vpermilps */, X86::VPERMILPSZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17355 { 13041 /* vpermilps */, X86::VPERMILPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17355 { 13041 /* vpermilps */, X86::VPERMILPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17358 { 13041 /* vpermilps */, X86::VPERMILPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17358 { 13041 /* vpermilps */, X86::VPERMILPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17359 { 13041 /* vpermilps */, X86::VPERMILPSZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17362 { 13041 /* vpermilps */, X86::VPERMILPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17362 { 13041 /* vpermilps */, X86::VPERMILPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17366 { 13051 /* vpermpd */, X86::VPERMPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17366 { 13051 /* vpermpd */, X86::VPERMPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17366 { 13051 /* vpermpd */, X86::VPERMPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17369 { 13051 /* vpermpd */, X86::VPERMPDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
17369 { 13051 /* vpermpd */, X86::VPERMPDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
17372 { 13051 /* vpermpd */, X86::VPERMPDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
17374 { 13051 /* vpermpd */, X86::VPERMPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17374 { 13051 /* vpermpd */, X86::VPERMPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17376 { 13051 /* vpermpd */, X86::VPERMPDZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
17378 { 13051 /* vpermpd */, X86::VPERMPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
17378 { 13051 /* vpermpd */, X86::VPERMPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
17380 { 13051 /* vpermpd */, X86::VPERMPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17380 { 13051 /* vpermpd */, X86::VPERMPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17380 { 13051 /* vpermpd */, X86::VPERMPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17382 { 13051 /* vpermpd */, X86::VPERMPDZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17382 { 13051 /* vpermpd */, X86::VPERMPDZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17384 { 13051 /* vpermpd */, X86::VPERMPDZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17386 { 13051 /* vpermpd */, X86::VPERMPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17386 { 13051 /* vpermpd */, X86::VPERMPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17388 { 13051 /* vpermpd */, X86::VPERMPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17388 { 13051 /* vpermpd */, X86::VPERMPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17388 { 13051 /* vpermpd */, X86::VPERMPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17390 { 13051 /* vpermpd */, X86::VPERMPDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17390 { 13051 /* vpermpd */, X86::VPERMPDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17392 { 13051 /* vpermpd */, X86::VPERMPDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17394 { 13051 /* vpermpd */, X86::VPERMPDZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17396 { 13051 /* vpermpd */, X86::VPERMPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17396 { 13051 /* vpermpd */, X86::VPERMPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17398 { 13051 /* vpermpd */, X86::VPERMPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17398 { 13051 /* vpermpd */, X86::VPERMPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17400 { 13051 /* vpermpd */, X86::VPERMPDZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17402 { 13051 /* vpermpd */, X86::VPERMPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17402 { 13051 /* vpermpd */, X86::VPERMPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17405 { 13059 /* vpermps */, X86::VPERMPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17405 { 13059 /* vpermps */, X86::VPERMPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17405 { 13059 /* vpermps */, X86::VPERMPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17408 { 13059 /* vpermps */, X86::VPERMPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17408 { 13059 /* vpermps */, X86::VPERMPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17409 { 13059 /* vpermps */, X86::VPERMPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
17409 { 13059 /* vpermps */, X86::VPERMPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
17412 { 13059 /* vpermps */, X86::VPERMPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17412 { 13059 /* vpermps */, X86::VPERMPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17412 { 13059 /* vpermps */, X86::VPERMPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17414 { 13059 /* vpermps */, X86::VPERMPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17414 { 13059 /* vpermps */, X86::VPERMPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17416 { 13059 /* vpermps */, X86::VPERMPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17416 { 13059 /* vpermps */, X86::VPERMPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17416 { 13059 /* vpermps */, X86::VPERMPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17418 { 13059 /* vpermps */, X86::VPERMPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17418 { 13059 /* vpermps */, X86::VPERMPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17420 { 13059 /* vpermps */, X86::VPERMPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17420 { 13059 /* vpermps */, X86::VPERMPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17421 { 13059 /* vpermps */, X86::VPERMPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17421 { 13059 /* vpermps */, X86::VPERMPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17424 { 13067 /* vpermq */, X86::VPERMQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17424 { 13067 /* vpermq */, X86::VPERMQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17424 { 13067 /* vpermq */, X86::VPERMQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17427 { 13067 /* vpermq */, X86::VPERMQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
17427 { 13067 /* vpermq */, X86::VPERMQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
17430 { 13067 /* vpermq */, X86::VPERMQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
17432 { 13067 /* vpermq */, X86::VPERMQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17432 { 13067 /* vpermq */, X86::VPERMQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17434 { 13067 /* vpermq */, X86::VPERMQZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
17436 { 13067 /* vpermq */, X86::VPERMQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
17436 { 13067 /* vpermq */, X86::VPERMQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
17438 { 13067 /* vpermq */, X86::VPERMQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17438 { 13067 /* vpermq */, X86::VPERMQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17438 { 13067 /* vpermq */, X86::VPERMQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17440 { 13067 /* vpermq */, X86::VPERMQZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17440 { 13067 /* vpermq */, X86::VPERMQZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17442 { 13067 /* vpermq */, X86::VPERMQZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17444 { 13067 /* vpermq */, X86::VPERMQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17444 { 13067 /* vpermq */, X86::VPERMQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17446 { 13067 /* vpermq */, X86::VPERMQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17446 { 13067 /* vpermq */, X86::VPERMQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17446 { 13067 /* vpermq */, X86::VPERMQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17448 { 13067 /* vpermq */, X86::VPERMQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17448 { 13067 /* vpermq */, X86::VPERMQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17450 { 13067 /* vpermq */, X86::VPERMQZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17452 { 13067 /* vpermq */, X86::VPERMQZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17454 { 13067 /* vpermq */, X86::VPERMQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17454 { 13067 /* vpermq */, X86::VPERMQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17456 { 13067 /* vpermq */, X86::VPERMQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17456 { 13067 /* vpermq */, X86::VPERMQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17458 { 13067 /* vpermq */, X86::VPERMQZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17460 { 13067 /* vpermq */, X86::VPERMQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17460 { 13067 /* vpermq */, X86::VPERMQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17463 { 13074 /* vpermt2b */, X86::VPERMT2Brr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17463 { 13074 /* vpermt2b */, X86::VPERMT2Brr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17463 { 13074 /* vpermt2b */, X86::VPERMT2Brr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17466 { 13074 /* vpermt2b */, X86::VPERMT2Brm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17466 { 13074 /* vpermt2b */, X86::VPERMT2Brm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17469 { 13074 /* vpermt2b */, X86::VPERMT2Brrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17469 { 13074 /* vpermt2b */, X86::VPERMT2Brrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17469 { 13074 /* vpermt2b */, X86::VPERMT2Brrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17472 { 13074 /* vpermt2b */, X86::VPERMT2Brmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17472 { 13074 /* vpermt2b */, X86::VPERMT2Brmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17475 { 13074 /* vpermt2b */, X86::VPERMT2Brrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17475 { 13074 /* vpermt2b */, X86::VPERMT2Brrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17475 { 13074 /* vpermt2b */, X86::VPERMT2Brrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17478 { 13074 /* vpermt2b */, X86::VPERMT2Brmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17478 { 13074 /* vpermt2b */, X86::VPERMT2Brmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17481 { 13083 /* vpermt2d */, X86::VPERMT2Drr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17481 { 13083 /* vpermt2d */, X86::VPERMT2Drr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17481 { 13083 /* vpermt2d */, X86::VPERMT2Drr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17484 { 13083 /* vpermt2d */, X86::VPERMT2Drm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17484 { 13083 /* vpermt2d */, X86::VPERMT2Drm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17485 { 13083 /* vpermt2d */, X86::VPERMT2Drmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
17485 { 13083 /* vpermt2d */, X86::VPERMT2Drmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
17490 { 13083 /* vpermt2d */, X86::VPERMT2Drrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17490 { 13083 /* vpermt2d */, X86::VPERMT2Drrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17490 { 13083 /* vpermt2d */, X86::VPERMT2Drrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17493 { 13083 /* vpermt2d */, X86::VPERMT2Drmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17493 { 13083 /* vpermt2d */, X86::VPERMT2Drmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17496 { 13083 /* vpermt2d */, X86::VPERMT2Drrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17496 { 13083 /* vpermt2d */, X86::VPERMT2Drrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17496 { 13083 /* vpermt2d */, X86::VPERMT2Drrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17499 { 13083 /* vpermt2d */, X86::VPERMT2Drmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17499 { 13083 /* vpermt2d */, X86::VPERMT2Drmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17502 { 13083 /* vpermt2d */, X86::VPERMT2Drmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17502 { 13083 /* vpermt2d */, X86::VPERMT2Drmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17503 { 13083 /* vpermt2d */, X86::VPERMT2Drmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17503 { 13083 /* vpermt2d */, X86::VPERMT2Drmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17508 { 13092 /* vpermt2pd */, X86::VPERMT2PDrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17508 { 13092 /* vpermt2pd */, X86::VPERMT2PDrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17508 { 13092 /* vpermt2pd */, X86::VPERMT2PDrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17511 { 13092 /* vpermt2pd */, X86::VPERMT2PDrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17511 { 13092 /* vpermt2pd */, X86::VPERMT2PDrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17514 { 13092 /* vpermt2pd */, X86::VPERMT2PDrmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
17514 { 13092 /* vpermt2pd */, X86::VPERMT2PDrmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
17517 { 13092 /* vpermt2pd */, X86::VPERMT2PDrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17517 { 13092 /* vpermt2pd */, X86::VPERMT2PDrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17517 { 13092 /* vpermt2pd */, X86::VPERMT2PDrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17520 { 13092 /* vpermt2pd */, X86::VPERMT2PDrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17520 { 13092 /* vpermt2pd */, X86::VPERMT2PDrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17523 { 13092 /* vpermt2pd */, X86::VPERMT2PDrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17523 { 13092 /* vpermt2pd */, X86::VPERMT2PDrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17523 { 13092 /* vpermt2pd */, X86::VPERMT2PDrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17526 { 13092 /* vpermt2pd */, X86::VPERMT2PDrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17526 { 13092 /* vpermt2pd */, X86::VPERMT2PDrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17529 { 13092 /* vpermt2pd */, X86::VPERMT2PDrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17529 { 13092 /* vpermt2pd */, X86::VPERMT2PDrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17532 { 13092 /* vpermt2pd */, X86::VPERMT2PDrmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17532 { 13092 /* vpermt2pd */, X86::VPERMT2PDrmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17535 { 13102 /* vpermt2ps */, X86::VPERMT2PSrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17535 { 13102 /* vpermt2ps */, X86::VPERMT2PSrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17535 { 13102 /* vpermt2ps */, X86::VPERMT2PSrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17538 { 13102 /* vpermt2ps */, X86::VPERMT2PSrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17538 { 13102 /* vpermt2ps */, X86::VPERMT2PSrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17539 { 13102 /* vpermt2ps */, X86::VPERMT2PSrmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
17539 { 13102 /* vpermt2ps */, X86::VPERMT2PSrmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
17544 { 13102 /* vpermt2ps */, X86::VPERMT2PSrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17544 { 13102 /* vpermt2ps */, X86::VPERMT2PSrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17544 { 13102 /* vpermt2ps */, X86::VPERMT2PSrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17547 { 13102 /* vpermt2ps */, X86::VPERMT2PSrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17547 { 13102 /* vpermt2ps */, X86::VPERMT2PSrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17550 { 13102 /* vpermt2ps */, X86::VPERMT2PSrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17550 { 13102 /* vpermt2ps */, X86::VPERMT2PSrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17550 { 13102 /* vpermt2ps */, X86::VPERMT2PSrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17553 { 13102 /* vpermt2ps */, X86::VPERMT2PSrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17553 { 13102 /* vpermt2ps */, X86::VPERMT2PSrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17556 { 13102 /* vpermt2ps */, X86::VPERMT2PSrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17556 { 13102 /* vpermt2ps */, X86::VPERMT2PSrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17557 { 13102 /* vpermt2ps */, X86::VPERMT2PSrmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17557 { 13102 /* vpermt2ps */, X86::VPERMT2PSrmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17562 { 13112 /* vpermt2q */, X86::VPERMT2Qrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17562 { 13112 /* vpermt2q */, X86::VPERMT2Qrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17562 { 13112 /* vpermt2q */, X86::VPERMT2Qrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17565 { 13112 /* vpermt2q */, X86::VPERMT2Qrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17565 { 13112 /* vpermt2q */, X86::VPERMT2Qrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17568 { 13112 /* vpermt2q */, X86::VPERMT2Qrmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
17568 { 13112 /* vpermt2q */, X86::VPERMT2Qrmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
17571 { 13112 /* vpermt2q */, X86::VPERMT2Qrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17571 { 13112 /* vpermt2q */, X86::VPERMT2Qrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17571 { 13112 /* vpermt2q */, X86::VPERMT2Qrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17574 { 13112 /* vpermt2q */, X86::VPERMT2Qrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17574 { 13112 /* vpermt2q */, X86::VPERMT2Qrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17577 { 13112 /* vpermt2q */, X86::VPERMT2Qrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17577 { 13112 /* vpermt2q */, X86::VPERMT2Qrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17577 { 13112 /* vpermt2q */, X86::VPERMT2Qrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17580 { 13112 /* vpermt2q */, X86::VPERMT2Qrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17580 { 13112 /* vpermt2q */, X86::VPERMT2Qrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17583 { 13112 /* vpermt2q */, X86::VPERMT2Qrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17583 { 13112 /* vpermt2q */, X86::VPERMT2Qrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17586 { 13112 /* vpermt2q */, X86::VPERMT2Qrmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17586 { 13112 /* vpermt2q */, X86::VPERMT2Qrmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17589 { 13121 /* vpermt2w */, X86::VPERMT2Wrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17589 { 13121 /* vpermt2w */, X86::VPERMT2Wrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17589 { 13121 /* vpermt2w */, X86::VPERMT2Wrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17592 { 13121 /* vpermt2w */, X86::VPERMT2Wrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17592 { 13121 /* vpermt2w */, X86::VPERMT2Wrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17595 { 13121 /* vpermt2w */, X86::VPERMT2Wrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17595 { 13121 /* vpermt2w */, X86::VPERMT2Wrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17595 { 13121 /* vpermt2w */, X86::VPERMT2Wrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17598 { 13121 /* vpermt2w */, X86::VPERMT2Wrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17598 { 13121 /* vpermt2w */, X86::VPERMT2Wrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17601 { 13121 /* vpermt2w */, X86::VPERMT2Wrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17601 { 13121 /* vpermt2w */, X86::VPERMT2Wrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17601 { 13121 /* vpermt2w */, X86::VPERMT2Wrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17604 { 13121 /* vpermt2w */, X86::VPERMT2Wrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17604 { 13121 /* vpermt2w */, X86::VPERMT2Wrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17607 { 13130 /* vpermw */, X86::VPERMWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17607 { 13130 /* vpermw */, X86::VPERMWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17607 { 13130 /* vpermw */, X86::VPERMWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17610 { 13130 /* vpermw */, X86::VPERMWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17610 { 13130 /* vpermw */, X86::VPERMWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17613 { 13130 /* vpermw */, X86::VPERMWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17613 { 13130 /* vpermw */, X86::VPERMWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17613 { 13130 /* vpermw */, X86::VPERMWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17616 { 13130 /* vpermw */, X86::VPERMWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17616 { 13130 /* vpermw */, X86::VPERMWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17619 { 13130 /* vpermw */, X86::VPERMWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17619 { 13130 /* vpermw */, X86::VPERMWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17619 { 13130 /* vpermw */, X86::VPERMWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17622 { 13130 /* vpermw */, X86::VPERMWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17622 { 13130 /* vpermw */, X86::VPERMWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17625 { 13137 /* vpexpandb */, X86::VPEXPANDBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
17625 { 13137 /* vpexpandb */, X86::VPEXPANDBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
17628 { 13137 /* vpexpandb */, X86::VPEXPANDBZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
17631 { 13137 /* vpexpandb */, X86::VPEXPANDBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17631 { 13137 /* vpexpandb */, X86::VPEXPANDBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17634 { 13137 /* vpexpandb */, X86::VPEXPANDBZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17637 { 13137 /* vpexpandb */, X86::VPEXPANDBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17637 { 13137 /* vpexpandb */, X86::VPEXPANDBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17640 { 13137 /* vpexpandb */, X86::VPEXPANDBZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17643 { 13147 /* vpexpandd */, X86::VPEXPANDDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
17643 { 13147 /* vpexpandd */, X86::VPEXPANDDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
17646 { 13147 /* vpexpandd */, X86::VPEXPANDDZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
17649 { 13147 /* vpexpandd */, X86::VPEXPANDDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17649 { 13147 /* vpexpandd */, X86::VPEXPANDDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17652 { 13147 /* vpexpandd */, X86::VPEXPANDDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17655 { 13147 /* vpexpandd */, X86::VPEXPANDDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17655 { 13147 /* vpexpandd */, X86::VPEXPANDDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17658 { 13147 /* vpexpandd */, X86::VPEXPANDDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17661 { 13157 /* vpexpandq */, X86::VPEXPANDQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
17661 { 13157 /* vpexpandq */, X86::VPEXPANDQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
17664 { 13157 /* vpexpandq */, X86::VPEXPANDQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
17667 { 13157 /* vpexpandq */, X86::VPEXPANDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17667 { 13157 /* vpexpandq */, X86::VPEXPANDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17670 { 13157 /* vpexpandq */, X86::VPEXPANDQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17673 { 13157 /* vpexpandq */, X86::VPEXPANDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17673 { 13157 /* vpexpandq */, X86::VPEXPANDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17676 { 13157 /* vpexpandq */, X86::VPEXPANDQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17679 { 13167 /* vpexpandw */, X86::VPEXPANDWZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
17679 { 13167 /* vpexpandw */, X86::VPEXPANDWZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
17682 { 13167 /* vpexpandw */, X86::VPEXPANDWZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
17685 { 13167 /* vpexpandw */, X86::VPEXPANDWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17685 { 13167 /* vpexpandw */, X86::VPEXPANDWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17688 { 13167 /* vpexpandw */, X86::VPEXPANDWZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17691 { 13167 /* vpexpandw */, X86::VPEXPANDWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17691 { 13167 /* vpexpandw */, X86::VPEXPANDWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17694 { 13167 /* vpexpandw */, X86::VPEXPANDWZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17715 { 13209 /* vpgatherdd */, X86::VPGATHERDDZrm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC5125_0, AMFBS_None, { MCK_Mem512_RC512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17720 { 13220 /* vpgatherdq */, X86::VPGATHERDQZrm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC256X5_0, AMFBS_None, { MCK_Mem512_RC256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17730 { 13242 /* vpgatherqq */, X86::VPGATHERQQZrm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC5125_0, AMFBS_None, { MCK_Mem512_RC512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17805 { 13488 /* vplzcntd */, X86::VPLZCNTDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
17805 { 13488 /* vplzcntd */, X86::VPLZCNTDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
17808 { 13488 /* vplzcntd */, X86::VPLZCNTDZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
17809 { 13488 /* vplzcntd */, X86::VPLZCNTDZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
17814 { 13488 /* vplzcntd */, X86::VPLZCNTDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17814 { 13488 /* vplzcntd */, X86::VPLZCNTDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17817 { 13488 /* vplzcntd */, X86::VPLZCNTDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17820 { 13488 /* vplzcntd */, X86::VPLZCNTDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17820 { 13488 /* vplzcntd */, X86::VPLZCNTDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17823 { 13488 /* vplzcntd */, X86::VPLZCNTDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17826 { 13488 /* vplzcntd */, X86::VPLZCNTDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17827 { 13488 /* vplzcntd */, X86::VPLZCNTDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17832 { 13497 /* vplzcntq */, X86::VPLZCNTQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
17832 { 13497 /* vplzcntq */, X86::VPLZCNTQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
17835 { 13497 /* vplzcntq */, X86::VPLZCNTQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
17838 { 13497 /* vplzcntq */, X86::VPLZCNTQZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
17841 { 13497 /* vplzcntq */, X86::VPLZCNTQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17841 { 13497 /* vplzcntq */, X86::VPLZCNTQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17844 { 13497 /* vplzcntq */, X86::VPLZCNTQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17847 { 13497 /* vplzcntq */, X86::VPLZCNTQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17847 { 13497 /* vplzcntq */, X86::VPLZCNTQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17850 { 13497 /* vplzcntq */, X86::VPLZCNTQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17853 { 13497 /* vplzcntq */, X86::VPLZCNTQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17856 { 13497 /* vplzcntq */, X86::VPLZCNTQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17883 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17883 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17883 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17886 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17886 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17889 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
17889 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
17892 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17892 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17892 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17895 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17895 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17898 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17898 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17898 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17901 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17901 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17904 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17904 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17907 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17907 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17910 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17910 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17910 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17913 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17913 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17916 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
17916 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
17919 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17919 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17919 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17922 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17922 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17925 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17925 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17925 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17928 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17928 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17931 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17931 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17934 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17934 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17939 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17939 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17939 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17944 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17944 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17947 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17947 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17947 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17950 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17950 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17953 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17953 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17953 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17956 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17956 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17961 { 13661 /* vpmaddwd */, X86::VPMADDWDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17961 { 13661 /* vpmaddwd */, X86::VPMADDWDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17961 { 13661 /* vpmaddwd */, X86::VPMADDWDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17966 { 13661 /* vpmaddwd */, X86::VPMADDWDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17966 { 13661 /* vpmaddwd */, X86::VPMADDWDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17969 { 13661 /* vpmaddwd */, X86::VPMADDWDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17969 { 13661 /* vpmaddwd */, X86::VPMADDWDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17969 { 13661 /* vpmaddwd */, X86::VPMADDWDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17972 { 13661 /* vpmaddwd */, X86::VPMADDWDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17972 { 13661 /* vpmaddwd */, X86::VPMADDWDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17975 { 13661 /* vpmaddwd */, X86::VPMADDWDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17975 { 13661 /* vpmaddwd */, X86::VPMADDWDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17975 { 13661 /* vpmaddwd */, X86::VPMADDWDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17978 { 13661 /* vpmaddwd */, X86::VPMADDWDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17978 { 13661 /* vpmaddwd */, X86::VPMADDWDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17991 { 13692 /* vpmaxsb */, X86::VPMAXSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17991 { 13692 /* vpmaxsb */, X86::VPMAXSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17991 { 13692 /* vpmaxsb */, X86::VPMAXSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17996 { 13692 /* vpmaxsb */, X86::VPMAXSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17996 { 13692 /* vpmaxsb */, X86::VPMAXSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17999 { 13692 /* vpmaxsb */, X86::VPMAXSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17999 { 13692 /* vpmaxsb */, X86::VPMAXSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17999 { 13692 /* vpmaxsb */, X86::VPMAXSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18002 { 13692 /* vpmaxsb */, X86::VPMAXSBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18002 { 13692 /* vpmaxsb */, X86::VPMAXSBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18005 { 13692 /* vpmaxsb */, X86::VPMAXSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18005 { 13692 /* vpmaxsb */, X86::VPMAXSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18005 { 13692 /* vpmaxsb */, X86::VPMAXSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18008 { 13692 /* vpmaxsb */, X86::VPMAXSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18008 { 13692 /* vpmaxsb */, X86::VPMAXSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18013 { 13700 /* vpmaxsd */, X86::VPMAXSDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18013 { 13700 /* vpmaxsd */, X86::VPMAXSDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18013 { 13700 /* vpmaxsd */, X86::VPMAXSDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18018 { 13700 /* vpmaxsd */, X86::VPMAXSDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18018 { 13700 /* vpmaxsd */, X86::VPMAXSDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18019 { 13700 /* vpmaxsd */, X86::VPMAXSDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
18019 { 13700 /* vpmaxsd */, X86::VPMAXSDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
18024 { 13700 /* vpmaxsd */, X86::VPMAXSDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18024 { 13700 /* vpmaxsd */, X86::VPMAXSDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18024 { 13700 /* vpmaxsd */, X86::VPMAXSDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18027 { 13700 /* vpmaxsd */, X86::VPMAXSDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18027 { 13700 /* vpmaxsd */, X86::VPMAXSDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18030 { 13700 /* vpmaxsd */, X86::VPMAXSDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18030 { 13700 /* vpmaxsd */, X86::VPMAXSDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18030 { 13700 /* vpmaxsd */, X86::VPMAXSDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18033 { 13700 /* vpmaxsd */, X86::VPMAXSDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18033 { 13700 /* vpmaxsd */, X86::VPMAXSDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18036 { 13700 /* vpmaxsd */, X86::VPMAXSDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18036 { 13700 /* vpmaxsd */, X86::VPMAXSDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18037 { 13700 /* vpmaxsd */, X86::VPMAXSDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18037 { 13700 /* vpmaxsd */, X86::VPMAXSDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18042 { 13708 /* vpmaxsq */, X86::VPMAXSQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18042 { 13708 /* vpmaxsq */, X86::VPMAXSQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18042 { 13708 /* vpmaxsq */, X86::VPMAXSQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18045 { 13708 /* vpmaxsq */, X86::VPMAXSQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18045 { 13708 /* vpmaxsq */, X86::VPMAXSQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18048 { 13708 /* vpmaxsq */, X86::VPMAXSQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18048 { 13708 /* vpmaxsq */, X86::VPMAXSQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18051 { 13708 /* vpmaxsq */, X86::VPMAXSQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18051 { 13708 /* vpmaxsq */, X86::VPMAXSQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18051 { 13708 /* vpmaxsq */, X86::VPMAXSQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18054 { 13708 /* vpmaxsq */, X86::VPMAXSQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18054 { 13708 /* vpmaxsq */, X86::VPMAXSQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18057 { 13708 /* vpmaxsq */, X86::VPMAXSQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18057 { 13708 /* vpmaxsq */, X86::VPMAXSQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18057 { 13708 /* vpmaxsq */, X86::VPMAXSQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18060 { 13708 /* vpmaxsq */, X86::VPMAXSQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18060 { 13708 /* vpmaxsq */, X86::VPMAXSQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18063 { 13708 /* vpmaxsq */, X86::VPMAXSQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18063 { 13708 /* vpmaxsq */, X86::VPMAXSQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18066 { 13708 /* vpmaxsq */, X86::VPMAXSQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18066 { 13708 /* vpmaxsq */, X86::VPMAXSQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18071 { 13716 /* vpmaxsw */, X86::VPMAXSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18071 { 13716 /* vpmaxsw */, X86::VPMAXSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18071 { 13716 /* vpmaxsw */, X86::VPMAXSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18076 { 13716 /* vpmaxsw */, X86::VPMAXSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18076 { 13716 /* vpmaxsw */, X86::VPMAXSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18079 { 13716 /* vpmaxsw */, X86::VPMAXSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18079 { 13716 /* vpmaxsw */, X86::VPMAXSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18079 { 13716 /* vpmaxsw */, X86::VPMAXSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18082 { 13716 /* vpmaxsw */, X86::VPMAXSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18082 { 13716 /* vpmaxsw */, X86::VPMAXSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18085 { 13716 /* vpmaxsw */, X86::VPMAXSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18085 { 13716 /* vpmaxsw */, X86::VPMAXSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18085 { 13716 /* vpmaxsw */, X86::VPMAXSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18088 { 13716 /* vpmaxsw */, X86::VPMAXSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18088 { 13716 /* vpmaxsw */, X86::VPMAXSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18093 { 13724 /* vpmaxub */, X86::VPMAXUBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18093 { 13724 /* vpmaxub */, X86::VPMAXUBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18093 { 13724 /* vpmaxub */, X86::VPMAXUBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18098 { 13724 /* vpmaxub */, X86::VPMAXUBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18098 { 13724 /* vpmaxub */, X86::VPMAXUBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18101 { 13724 /* vpmaxub */, X86::VPMAXUBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18101 { 13724 /* vpmaxub */, X86::VPMAXUBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18101 { 13724 /* vpmaxub */, X86::VPMAXUBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18104 { 13724 /* vpmaxub */, X86::VPMAXUBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18104 { 13724 /* vpmaxub */, X86::VPMAXUBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18107 { 13724 /* vpmaxub */, X86::VPMAXUBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18107 { 13724 /* vpmaxub */, X86::VPMAXUBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18107 { 13724 /* vpmaxub */, X86::VPMAXUBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18110 { 13724 /* vpmaxub */, X86::VPMAXUBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18110 { 13724 /* vpmaxub */, X86::VPMAXUBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18115 { 13732 /* vpmaxud */, X86::VPMAXUDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18115 { 13732 /* vpmaxud */, X86::VPMAXUDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18115 { 13732 /* vpmaxud */, X86::VPMAXUDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18120 { 13732 /* vpmaxud */, X86::VPMAXUDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18120 { 13732 /* vpmaxud */, X86::VPMAXUDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18121 { 13732 /* vpmaxud */, X86::VPMAXUDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
18121 { 13732 /* vpmaxud */, X86::VPMAXUDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
18126 { 13732 /* vpmaxud */, X86::VPMAXUDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18126 { 13732 /* vpmaxud */, X86::VPMAXUDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18126 { 13732 /* vpmaxud */, X86::VPMAXUDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18129 { 13732 /* vpmaxud */, X86::VPMAXUDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18129 { 13732 /* vpmaxud */, X86::VPMAXUDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18132 { 13732 /* vpmaxud */, X86::VPMAXUDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18132 { 13732 /* vpmaxud */, X86::VPMAXUDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18132 { 13732 /* vpmaxud */, X86::VPMAXUDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18135 { 13732 /* vpmaxud */, X86::VPMAXUDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18135 { 13732 /* vpmaxud */, X86::VPMAXUDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18138 { 13732 /* vpmaxud */, X86::VPMAXUDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18138 { 13732 /* vpmaxud */, X86::VPMAXUDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18139 { 13732 /* vpmaxud */, X86::VPMAXUDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18139 { 13732 /* vpmaxud */, X86::VPMAXUDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18144 { 13740 /* vpmaxuq */, X86::VPMAXUQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18144 { 13740 /* vpmaxuq */, X86::VPMAXUQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18144 { 13740 /* vpmaxuq */, X86::VPMAXUQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18147 { 13740 /* vpmaxuq */, X86::VPMAXUQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18147 { 13740 /* vpmaxuq */, X86::VPMAXUQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18150 { 13740 /* vpmaxuq */, X86::VPMAXUQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18150 { 13740 /* vpmaxuq */, X86::VPMAXUQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18153 { 13740 /* vpmaxuq */, X86::VPMAXUQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18153 { 13740 /* vpmaxuq */, X86::VPMAXUQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18153 { 13740 /* vpmaxuq */, X86::VPMAXUQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18156 { 13740 /* vpmaxuq */, X86::VPMAXUQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18156 { 13740 /* vpmaxuq */, X86::VPMAXUQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18159 { 13740 /* vpmaxuq */, X86::VPMAXUQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18159 { 13740 /* vpmaxuq */, X86::VPMAXUQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18159 { 13740 /* vpmaxuq */, X86::VPMAXUQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18162 { 13740 /* vpmaxuq */, X86::VPMAXUQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18162 { 13740 /* vpmaxuq */, X86::VPMAXUQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18165 { 13740 /* vpmaxuq */, X86::VPMAXUQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18165 { 13740 /* vpmaxuq */, X86::VPMAXUQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18168 { 13740 /* vpmaxuq */, X86::VPMAXUQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18168 { 13740 /* vpmaxuq */, X86::VPMAXUQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18173 { 13748 /* vpmaxuw */, X86::VPMAXUWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18173 { 13748 /* vpmaxuw */, X86::VPMAXUWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18173 { 13748 /* vpmaxuw */, X86::VPMAXUWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18178 { 13748 /* vpmaxuw */, X86::VPMAXUWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18178 { 13748 /* vpmaxuw */, X86::VPMAXUWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18181 { 13748 /* vpmaxuw */, X86::VPMAXUWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18181 { 13748 /* vpmaxuw */, X86::VPMAXUWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18181 { 13748 /* vpmaxuw */, X86::VPMAXUWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18184 { 13748 /* vpmaxuw */, X86::VPMAXUWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18184 { 13748 /* vpmaxuw */, X86::VPMAXUWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18187 { 13748 /* vpmaxuw */, X86::VPMAXUWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18187 { 13748 /* vpmaxuw */, X86::VPMAXUWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18187 { 13748 /* vpmaxuw */, X86::VPMAXUWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18190 { 13748 /* vpmaxuw */, X86::VPMAXUWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18190 { 13748 /* vpmaxuw */, X86::VPMAXUWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18195 { 13756 /* vpminsb */, X86::VPMINSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18195 { 13756 /* vpminsb */, X86::VPMINSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18195 { 13756 /* vpminsb */, X86::VPMINSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18200 { 13756 /* vpminsb */, X86::VPMINSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18200 { 13756 /* vpminsb */, X86::VPMINSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18203 { 13756 /* vpminsb */, X86::VPMINSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18203 { 13756 /* vpminsb */, X86::VPMINSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18203 { 13756 /* vpminsb */, X86::VPMINSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18206 { 13756 /* vpminsb */, X86::VPMINSBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18206 { 13756 /* vpminsb */, X86::VPMINSBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18209 { 13756 /* vpminsb */, X86::VPMINSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18209 { 13756 /* vpminsb */, X86::VPMINSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18209 { 13756 /* vpminsb */, X86::VPMINSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18212 { 13756 /* vpminsb */, X86::VPMINSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18212 { 13756 /* vpminsb */, X86::VPMINSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18217 { 13764 /* vpminsd */, X86::VPMINSDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18217 { 13764 /* vpminsd */, X86::VPMINSDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18217 { 13764 /* vpminsd */, X86::VPMINSDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18222 { 13764 /* vpminsd */, X86::VPMINSDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18222 { 13764 /* vpminsd */, X86::VPMINSDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18223 { 13764 /* vpminsd */, X86::VPMINSDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
18223 { 13764 /* vpminsd */, X86::VPMINSDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
18228 { 13764 /* vpminsd */, X86::VPMINSDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18228 { 13764 /* vpminsd */, X86::VPMINSDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18228 { 13764 /* vpminsd */, X86::VPMINSDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18231 { 13764 /* vpminsd */, X86::VPMINSDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18231 { 13764 /* vpminsd */, X86::VPMINSDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18234 { 13764 /* vpminsd */, X86::VPMINSDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18234 { 13764 /* vpminsd */, X86::VPMINSDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18234 { 13764 /* vpminsd */, X86::VPMINSDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18237 { 13764 /* vpminsd */, X86::VPMINSDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18237 { 13764 /* vpminsd */, X86::VPMINSDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18240 { 13764 /* vpminsd */, X86::VPMINSDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18240 { 13764 /* vpminsd */, X86::VPMINSDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18241 { 13764 /* vpminsd */, X86::VPMINSDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18241 { 13764 /* vpminsd */, X86::VPMINSDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18246 { 13772 /* vpminsq */, X86::VPMINSQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18246 { 13772 /* vpminsq */, X86::VPMINSQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18246 { 13772 /* vpminsq */, X86::VPMINSQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18249 { 13772 /* vpminsq */, X86::VPMINSQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18249 { 13772 /* vpminsq */, X86::VPMINSQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18252 { 13772 /* vpminsq */, X86::VPMINSQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18252 { 13772 /* vpminsq */, X86::VPMINSQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18255 { 13772 /* vpminsq */, X86::VPMINSQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18255 { 13772 /* vpminsq */, X86::VPMINSQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18255 { 13772 /* vpminsq */, X86::VPMINSQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18258 { 13772 /* vpminsq */, X86::VPMINSQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18258 { 13772 /* vpminsq */, X86::VPMINSQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18261 { 13772 /* vpminsq */, X86::VPMINSQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18261 { 13772 /* vpminsq */, X86::VPMINSQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18261 { 13772 /* vpminsq */, X86::VPMINSQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18264 { 13772 /* vpminsq */, X86::VPMINSQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18264 { 13772 /* vpminsq */, X86::VPMINSQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18267 { 13772 /* vpminsq */, X86::VPMINSQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18267 { 13772 /* vpminsq */, X86::VPMINSQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18270 { 13772 /* vpminsq */, X86::VPMINSQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18270 { 13772 /* vpminsq */, X86::VPMINSQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18275 { 13780 /* vpminsw */, X86::VPMINSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18275 { 13780 /* vpminsw */, X86::VPMINSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18275 { 13780 /* vpminsw */, X86::VPMINSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18280 { 13780 /* vpminsw */, X86::VPMINSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18280 { 13780 /* vpminsw */, X86::VPMINSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18283 { 13780 /* vpminsw */, X86::VPMINSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18283 { 13780 /* vpminsw */, X86::VPMINSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18283 { 13780 /* vpminsw */, X86::VPMINSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18286 { 13780 /* vpminsw */, X86::VPMINSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18286 { 13780 /* vpminsw */, X86::VPMINSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18289 { 13780 /* vpminsw */, X86::VPMINSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18289 { 13780 /* vpminsw */, X86::VPMINSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18289 { 13780 /* vpminsw */, X86::VPMINSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18292 { 13780 /* vpminsw */, X86::VPMINSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18292 { 13780 /* vpminsw */, X86::VPMINSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18297 { 13788 /* vpminub */, X86::VPMINUBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18297 { 13788 /* vpminub */, X86::VPMINUBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18297 { 13788 /* vpminub */, X86::VPMINUBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18302 { 13788 /* vpminub */, X86::VPMINUBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18302 { 13788 /* vpminub */, X86::VPMINUBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18305 { 13788 /* vpminub */, X86::VPMINUBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18305 { 13788 /* vpminub */, X86::VPMINUBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18305 { 13788 /* vpminub */, X86::VPMINUBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18308 { 13788 /* vpminub */, X86::VPMINUBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18308 { 13788 /* vpminub */, X86::VPMINUBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18311 { 13788 /* vpminub */, X86::VPMINUBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18311 { 13788 /* vpminub */, X86::VPMINUBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18311 { 13788 /* vpminub */, X86::VPMINUBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18314 { 13788 /* vpminub */, X86::VPMINUBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18314 { 13788 /* vpminub */, X86::VPMINUBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18319 { 13796 /* vpminud */, X86::VPMINUDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18319 { 13796 /* vpminud */, X86::VPMINUDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18319 { 13796 /* vpminud */, X86::VPMINUDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18324 { 13796 /* vpminud */, X86::VPMINUDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18324 { 13796 /* vpminud */, X86::VPMINUDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18325 { 13796 /* vpminud */, X86::VPMINUDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
18325 { 13796 /* vpminud */, X86::VPMINUDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
18330 { 13796 /* vpminud */, X86::VPMINUDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18330 { 13796 /* vpminud */, X86::VPMINUDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18330 { 13796 /* vpminud */, X86::VPMINUDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18333 { 13796 /* vpminud */, X86::VPMINUDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18333 { 13796 /* vpminud */, X86::VPMINUDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18336 { 13796 /* vpminud */, X86::VPMINUDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18336 { 13796 /* vpminud */, X86::VPMINUDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18336 { 13796 /* vpminud */, X86::VPMINUDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18339 { 13796 /* vpminud */, X86::VPMINUDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18339 { 13796 /* vpminud */, X86::VPMINUDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18342 { 13796 /* vpminud */, X86::VPMINUDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18342 { 13796 /* vpminud */, X86::VPMINUDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18343 { 13796 /* vpminud */, X86::VPMINUDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18343 { 13796 /* vpminud */, X86::VPMINUDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18348 { 13804 /* vpminuq */, X86::VPMINUQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18348 { 13804 /* vpminuq */, X86::VPMINUQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18348 { 13804 /* vpminuq */, X86::VPMINUQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18351 { 13804 /* vpminuq */, X86::VPMINUQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18351 { 13804 /* vpminuq */, X86::VPMINUQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18354 { 13804 /* vpminuq */, X86::VPMINUQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18354 { 13804 /* vpminuq */, X86::VPMINUQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18357 { 13804 /* vpminuq */, X86::VPMINUQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18357 { 13804 /* vpminuq */, X86::VPMINUQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18357 { 13804 /* vpminuq */, X86::VPMINUQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18360 { 13804 /* vpminuq */, X86::VPMINUQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18360 { 13804 /* vpminuq */, X86::VPMINUQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18363 { 13804 /* vpminuq */, X86::VPMINUQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18363 { 13804 /* vpminuq */, X86::VPMINUQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18363 { 13804 /* vpminuq */, X86::VPMINUQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18366 { 13804 /* vpminuq */, X86::VPMINUQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18366 { 13804 /* vpminuq */, X86::VPMINUQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18369 { 13804 /* vpminuq */, X86::VPMINUQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18369 { 13804 /* vpminuq */, X86::VPMINUQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18372 { 13804 /* vpminuq */, X86::VPMINUQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18372 { 13804 /* vpminuq */, X86::VPMINUQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18377 { 13812 /* vpminuw */, X86::VPMINUWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18377 { 13812 /* vpminuw */, X86::VPMINUWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18377 { 13812 /* vpminuw */, X86::VPMINUWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18382 { 13812 /* vpminuw */, X86::VPMINUWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18382 { 13812 /* vpminuw */, X86::VPMINUWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18385 { 13812 /* vpminuw */, X86::VPMINUWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18385 { 13812 /* vpminuw */, X86::VPMINUWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18385 { 13812 /* vpminuw */, X86::VPMINUWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18388 { 13812 /* vpminuw */, X86::VPMINUWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18388 { 13812 /* vpminuw */, X86::VPMINUWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18391 { 13812 /* vpminuw */, X86::VPMINUWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18391 { 13812 /* vpminuw */, X86::VPMINUWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18391 { 13812 /* vpminuw */, X86::VPMINUWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18394 { 13812 /* vpminuw */, X86::VPMINUWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18394 { 13812 /* vpminuw */, X86::VPMINUWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18397 { 13820 /* vpmovb2m */, X86::VPMOVB2MZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VK1 }, },
18400 { 13829 /* vpmovd2m */, X86::VPMOVD2MZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VK1 }, },
18405 { 13838 /* vpmovdb */, X86::VPMOVDBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
18406 { 13838 /* vpmovdb */, X86::VPMOVDBZmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem128 }, },
18411 { 13838 /* vpmovdb */, X86::VPMOVDBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18412 { 13838 /* vpmovdb */, X86::VPMOVDBZmrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18415 { 13838 /* vpmovdb */, X86::VPMOVDBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18420 { 13846 /* vpmovdw */, X86::VPMOVDWZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
18421 { 13846 /* vpmovdw */, X86::VPMOVDWZmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
18426 { 13846 /* vpmovdw */, X86::VPMOVDWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18427 { 13846 /* vpmovdw */, X86::VPMOVDWZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18430 { 13846 /* vpmovdw */, X86::VPMOVDWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18433 { 13854 /* vpmovm2b */, X86::VPMOVM2BZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VR512 }, },
18436 { 13863 /* vpmovm2d */, X86::VPMOVM2DZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VR512 }, },
18439 { 13872 /* vpmovm2q */, X86::VPMOVM2QZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VR512 }, },
18442 { 13881 /* vpmovm2w */, X86::VPMOVM2WZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_VR512 }, },
18447 { 13900 /* vpmovq2m */, X86::VPMOVQ2MZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VK1 }, },
18452 { 13909 /* vpmovqb */, X86::VPMOVQBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
18453 { 13909 /* vpmovqb */, X86::VPMOVQBZmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem64 }, },
18458 { 13909 /* vpmovqb */, X86::VPMOVQBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18459 { 13909 /* vpmovqb */, X86::VPMOVQBZmrk, Convert__Mem645_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18462 { 13909 /* vpmovqb */, X86::VPMOVQBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18467 { 13917 /* vpmovqd */, X86::VPMOVQDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
18468 { 13917 /* vpmovqd */, X86::VPMOVQDZmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
18473 { 13917 /* vpmovqd */, X86::VPMOVQDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18474 { 13917 /* vpmovqd */, X86::VPMOVQDZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18477 { 13917 /* vpmovqd */, X86::VPMOVQDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18482 { 13925 /* vpmovqw */, X86::VPMOVQWZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
18483 { 13925 /* vpmovqw */, X86::VPMOVQWZmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem128 }, },
18488 { 13925 /* vpmovqw */, X86::VPMOVQWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18489 { 13925 /* vpmovqw */, X86::VPMOVQWZmrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18492 { 13925 /* vpmovqw */, X86::VPMOVQWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18497 { 13933 /* vpmovsdb */, X86::VPMOVSDBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
18498 { 13933 /* vpmovsdb */, X86::VPMOVSDBZmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem128 }, },
18503 { 13933 /* vpmovsdb */, X86::VPMOVSDBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18504 { 13933 /* vpmovsdb */, X86::VPMOVSDBZmrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18507 { 13933 /* vpmovsdb */, X86::VPMOVSDBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18512 { 13942 /* vpmovsdw */, X86::VPMOVSDWZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
18513 { 13942 /* vpmovsdw */, X86::VPMOVSDWZmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
18518 { 13942 /* vpmovsdw */, X86::VPMOVSDWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18519 { 13942 /* vpmovsdw */, X86::VPMOVSDWZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18522 { 13942 /* vpmovsdw */, X86::VPMOVSDWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18527 { 13951 /* vpmovsqb */, X86::VPMOVSQBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
18528 { 13951 /* vpmovsqb */, X86::VPMOVSQBZmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem64 }, },
18533 { 13951 /* vpmovsqb */, X86::VPMOVSQBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18534 { 13951 /* vpmovsqb */, X86::VPMOVSQBZmrk, Convert__Mem645_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18537 { 13951 /* vpmovsqb */, X86::VPMOVSQBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18542 { 13960 /* vpmovsqd */, X86::VPMOVSQDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
18543 { 13960 /* vpmovsqd */, X86::VPMOVSQDZmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
18548 { 13960 /* vpmovsqd */, X86::VPMOVSQDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18549 { 13960 /* vpmovsqd */, X86::VPMOVSQDZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18552 { 13960 /* vpmovsqd */, X86::VPMOVSQDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18557 { 13969 /* vpmovsqw */, X86::VPMOVSQWZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
18558 { 13969 /* vpmovsqw */, X86::VPMOVSQWZmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem128 }, },
18563 { 13969 /* vpmovsqw */, X86::VPMOVSQWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18564 { 13969 /* vpmovsqw */, X86::VPMOVSQWZmrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18567 { 13969 /* vpmovsqw */, X86::VPMOVSQWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18572 { 13978 /* vpmovswb */, X86::VPMOVSWBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
18573 { 13978 /* vpmovswb */, X86::VPMOVSWBZmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
18578 { 13978 /* vpmovswb */, X86::VPMOVSWBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18579 { 13978 /* vpmovswb */, X86::VPMOVSWBZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18582 { 13978 /* vpmovswb */, X86::VPMOVSWBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18587 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
18588 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512 }, },
18595 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18596 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18601 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18602 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZrmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18609 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
18614 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512 }, },
18617 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18620 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18623 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18626 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZrmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18631 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
18634 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
18639 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18641 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18645 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18647 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18653 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
18656 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
18661 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18663 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18667 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18669 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18675 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
18678 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
18683 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18685 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18689 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18691 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18697 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
18698 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512 }, },
18705 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18706 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18711 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18712 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZrmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18719 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
18720 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem128 }, },
18725 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18726 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZmrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18729 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18734 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
18735 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
18740 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18741 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18744 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18749 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
18750 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem64 }, },
18755 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18756 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZmrk, Convert__Mem645_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18759 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18764 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
18765 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
18770 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18771 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18774 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18779 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
18780 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem128 }, },
18785 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18786 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZmrk, Convert__Mem1285_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18789 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18794 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
18795 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
18800 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18801 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18804 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18807 { 14107 /* vpmovw2m */, X86::VPMOVW2MZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VK1 }, },
18812 { 14116 /* vpmovwb */, X86::VPMOVWBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
18813 { 14116 /* vpmovwb */, X86::VPMOVWBZmr, Convert__Mem2565_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
18818 { 14116 /* vpmovwb */, X86::VPMOVWBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18819 { 14116 /* vpmovwb */, X86::VPMOVWBZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18822 { 14116 /* vpmovwb */, X86::VPMOVWBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18827 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
18828 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512 }, },
18835 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18836 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18841 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18842 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZrmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18849 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
18854 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512 }, },
18857 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18860 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18863 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18866 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZrmkz, Convert__Reg1_1__Reg1_3__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18871 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
18874 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
18879 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18881 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18885 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18887 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18893 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
18896 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
18901 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18903 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18907 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18909 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18915 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
18918 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
18923 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18925 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18929 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18931 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18937 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
18938 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512 }, },
18945 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18946 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18951 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18952 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZrmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18959 { 14184 /* vpmuldq */, X86::VPMULDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18959 { 14184 /* vpmuldq */, X86::VPMULDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18959 { 14184 /* vpmuldq */, X86::VPMULDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18964 { 14184 /* vpmuldq */, X86::VPMULDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18964 { 14184 /* vpmuldq */, X86::VPMULDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18967 { 14184 /* vpmuldq */, X86::VPMULDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18967 { 14184 /* vpmuldq */, X86::VPMULDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18970 { 14184 /* vpmuldq */, X86::VPMULDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18970 { 14184 /* vpmuldq */, X86::VPMULDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18970 { 14184 /* vpmuldq */, X86::VPMULDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18973 { 14184 /* vpmuldq */, X86::VPMULDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18973 { 14184 /* vpmuldq */, X86::VPMULDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18976 { 14184 /* vpmuldq */, X86::VPMULDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18976 { 14184 /* vpmuldq */, X86::VPMULDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18976 { 14184 /* vpmuldq */, X86::VPMULDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18979 { 14184 /* vpmuldq */, X86::VPMULDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18979 { 14184 /* vpmuldq */, X86::VPMULDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18982 { 14184 /* vpmuldq */, X86::VPMULDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18982 { 14184 /* vpmuldq */, X86::VPMULDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18985 { 14184 /* vpmuldq */, X86::VPMULDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18985 { 14184 /* vpmuldq */, X86::VPMULDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18990 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18990 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18990 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18995 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18995 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18998 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18998 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18998 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19001 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19001 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19004 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19004 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19004 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19007 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19007 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19012 { 14202 /* vpmulhuw */, X86::VPMULHUWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19012 { 14202 /* vpmulhuw */, X86::VPMULHUWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19012 { 14202 /* vpmulhuw */, X86::VPMULHUWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19017 { 14202 /* vpmulhuw */, X86::VPMULHUWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19017 { 14202 /* vpmulhuw */, X86::VPMULHUWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19020 { 14202 /* vpmulhuw */, X86::VPMULHUWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19020 { 14202 /* vpmulhuw */, X86::VPMULHUWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19020 { 14202 /* vpmulhuw */, X86::VPMULHUWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19023 { 14202 /* vpmulhuw */, X86::VPMULHUWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19023 { 14202 /* vpmulhuw */, X86::VPMULHUWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19026 { 14202 /* vpmulhuw */, X86::VPMULHUWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19026 { 14202 /* vpmulhuw */, X86::VPMULHUWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19026 { 14202 /* vpmulhuw */, X86::VPMULHUWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19029 { 14202 /* vpmulhuw */, X86::VPMULHUWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19029 { 14202 /* vpmulhuw */, X86::VPMULHUWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19034 { 14211 /* vpmulhw */, X86::VPMULHWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19034 { 14211 /* vpmulhw */, X86::VPMULHWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19034 { 14211 /* vpmulhw */, X86::VPMULHWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19039 { 14211 /* vpmulhw */, X86::VPMULHWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19039 { 14211 /* vpmulhw */, X86::VPMULHWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19042 { 14211 /* vpmulhw */, X86::VPMULHWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19042 { 14211 /* vpmulhw */, X86::VPMULHWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19042 { 14211 /* vpmulhw */, X86::VPMULHWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19045 { 14211 /* vpmulhw */, X86::VPMULHWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19045 { 14211 /* vpmulhw */, X86::VPMULHWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19048 { 14211 /* vpmulhw */, X86::VPMULHWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19048 { 14211 /* vpmulhw */, X86::VPMULHWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19048 { 14211 /* vpmulhw */, X86::VPMULHWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19051 { 14211 /* vpmulhw */, X86::VPMULHWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19051 { 14211 /* vpmulhw */, X86::VPMULHWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19056 { 14219 /* vpmulld */, X86::VPMULLDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19056 { 14219 /* vpmulld */, X86::VPMULLDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19056 { 14219 /* vpmulld */, X86::VPMULLDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19061 { 14219 /* vpmulld */, X86::VPMULLDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19061 { 14219 /* vpmulld */, X86::VPMULLDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19062 { 14219 /* vpmulld */, X86::VPMULLDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
19062 { 14219 /* vpmulld */, X86::VPMULLDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
19067 { 14219 /* vpmulld */, X86::VPMULLDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19067 { 14219 /* vpmulld */, X86::VPMULLDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19067 { 14219 /* vpmulld */, X86::VPMULLDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19070 { 14219 /* vpmulld */, X86::VPMULLDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19070 { 14219 /* vpmulld */, X86::VPMULLDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19073 { 14219 /* vpmulld */, X86::VPMULLDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19073 { 14219 /* vpmulld */, X86::VPMULLDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19073 { 14219 /* vpmulld */, X86::VPMULLDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19076 { 14219 /* vpmulld */, X86::VPMULLDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19076 { 14219 /* vpmulld */, X86::VPMULLDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19079 { 14219 /* vpmulld */, X86::VPMULLDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19079 { 14219 /* vpmulld */, X86::VPMULLDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19080 { 14219 /* vpmulld */, X86::VPMULLDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19080 { 14219 /* vpmulld */, X86::VPMULLDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19085 { 14227 /* vpmullq */, X86::VPMULLQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19085 { 14227 /* vpmullq */, X86::VPMULLQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19085 { 14227 /* vpmullq */, X86::VPMULLQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19088 { 14227 /* vpmullq */, X86::VPMULLQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19088 { 14227 /* vpmullq */, X86::VPMULLQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19091 { 14227 /* vpmullq */, X86::VPMULLQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19091 { 14227 /* vpmullq */, X86::VPMULLQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19094 { 14227 /* vpmullq */, X86::VPMULLQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19094 { 14227 /* vpmullq */, X86::VPMULLQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19094 { 14227 /* vpmullq */, X86::VPMULLQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19097 { 14227 /* vpmullq */, X86::VPMULLQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19097 { 14227 /* vpmullq */, X86::VPMULLQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19100 { 14227 /* vpmullq */, X86::VPMULLQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19100 { 14227 /* vpmullq */, X86::VPMULLQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19100 { 14227 /* vpmullq */, X86::VPMULLQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19103 { 14227 /* vpmullq */, X86::VPMULLQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19103 { 14227 /* vpmullq */, X86::VPMULLQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19106 { 14227 /* vpmullq */, X86::VPMULLQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19106 { 14227 /* vpmullq */, X86::VPMULLQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19109 { 14227 /* vpmullq */, X86::VPMULLQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19109 { 14227 /* vpmullq */, X86::VPMULLQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19114 { 14235 /* vpmullw */, X86::VPMULLWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19114 { 14235 /* vpmullw */, X86::VPMULLWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19114 { 14235 /* vpmullw */, X86::VPMULLWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19119 { 14235 /* vpmullw */, X86::VPMULLWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19119 { 14235 /* vpmullw */, X86::VPMULLWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19122 { 14235 /* vpmullw */, X86::VPMULLWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19122 { 14235 /* vpmullw */, X86::VPMULLWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19122 { 14235 /* vpmullw */, X86::VPMULLWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19125 { 14235 /* vpmullw */, X86::VPMULLWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19125 { 14235 /* vpmullw */, X86::VPMULLWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19128 { 14235 /* vpmullw */, X86::VPMULLWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19128 { 14235 /* vpmullw */, X86::VPMULLWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19128 { 14235 /* vpmullw */, X86::VPMULLWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19131 { 14235 /* vpmullw */, X86::VPMULLWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19131 { 14235 /* vpmullw */, X86::VPMULLWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19134 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19134 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19134 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19137 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19137 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19140 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19140 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19143 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19143 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19143 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19146 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19146 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19149 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19149 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19149 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19152 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19152 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19155 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19155 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19158 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19158 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19163 { 14258 /* vpmuludq */, X86::VPMULUDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19163 { 14258 /* vpmuludq */, X86::VPMULUDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19163 { 14258 /* vpmuludq */, X86::VPMULUDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19168 { 14258 /* vpmuludq */, X86::VPMULUDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19168 { 14258 /* vpmuludq */, X86::VPMULUDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19171 { 14258 /* vpmuludq */, X86::VPMULUDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19171 { 14258 /* vpmuludq */, X86::VPMULUDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19174 { 14258 /* vpmuludq */, X86::VPMULUDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19174 { 14258 /* vpmuludq */, X86::VPMULUDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19174 { 14258 /* vpmuludq */, X86::VPMULUDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19177 { 14258 /* vpmuludq */, X86::VPMULUDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19177 { 14258 /* vpmuludq */, X86::VPMULUDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19180 { 14258 /* vpmuludq */, X86::VPMULUDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19180 { 14258 /* vpmuludq */, X86::VPMULUDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19180 { 14258 /* vpmuludq */, X86::VPMULUDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19183 { 14258 /* vpmuludq */, X86::VPMULUDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19183 { 14258 /* vpmuludq */, X86::VPMULUDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19186 { 14258 /* vpmuludq */, X86::VPMULUDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19186 { 14258 /* vpmuludq */, X86::VPMULUDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19189 { 14258 /* vpmuludq */, X86::VPMULUDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19189 { 14258 /* vpmuludq */, X86::VPMULUDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19192 { 14267 /* vpopcntb */, X86::VPOPCNTBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
19192 { 14267 /* vpopcntb */, X86::VPOPCNTBZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
19195 { 14267 /* vpopcntb */, X86::VPOPCNTBZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
19198 { 14267 /* vpopcntb */, X86::VPOPCNTBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19198 { 14267 /* vpopcntb */, X86::VPOPCNTBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19201 { 14267 /* vpopcntb */, X86::VPOPCNTBZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19204 { 14267 /* vpopcntb */, X86::VPOPCNTBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19204 { 14267 /* vpopcntb */, X86::VPOPCNTBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19207 { 14267 /* vpopcntb */, X86::VPOPCNTBZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19210 { 14276 /* vpopcntd */, X86::VPOPCNTDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
19210 { 14276 /* vpopcntd */, X86::VPOPCNTDZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
19213 { 14276 /* vpopcntd */, X86::VPOPCNTDZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
19214 { 14276 /* vpopcntd */, X86::VPOPCNTDZrmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
19219 { 14276 /* vpopcntd */, X86::VPOPCNTDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19219 { 14276 /* vpopcntd */, X86::VPOPCNTDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19222 { 14276 /* vpopcntd */, X86::VPOPCNTDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19225 { 14276 /* vpopcntd */, X86::VPOPCNTDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19225 { 14276 /* vpopcntd */, X86::VPOPCNTDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19228 { 14276 /* vpopcntd */, X86::VPOPCNTDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19231 { 14276 /* vpopcntd */, X86::VPOPCNTDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19232 { 14276 /* vpopcntd */, X86::VPOPCNTDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19237 { 14285 /* vpopcntq */, X86::VPOPCNTQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
19237 { 14285 /* vpopcntq */, X86::VPOPCNTQZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
19240 { 14285 /* vpopcntq */, X86::VPOPCNTQZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
19243 { 14285 /* vpopcntq */, X86::VPOPCNTQZrmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
19246 { 14285 /* vpopcntq */, X86::VPOPCNTQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19246 { 14285 /* vpopcntq */, X86::VPOPCNTQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19249 { 14285 /* vpopcntq */, X86::VPOPCNTQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19252 { 14285 /* vpopcntq */, X86::VPOPCNTQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19252 { 14285 /* vpopcntq */, X86::VPOPCNTQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19255 { 14285 /* vpopcntq */, X86::VPOPCNTQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19258 { 14285 /* vpopcntq */, X86::VPOPCNTQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19261 { 14285 /* vpopcntq */, X86::VPOPCNTQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19264 { 14294 /* vpopcntw */, X86::VPOPCNTWZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
19264 { 14294 /* vpopcntw */, X86::VPOPCNTWZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
19267 { 14294 /* vpopcntw */, X86::VPOPCNTWZrm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
19270 { 14294 /* vpopcntw */, X86::VPOPCNTWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19270 { 14294 /* vpopcntw */, X86::VPOPCNTWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19273 { 14294 /* vpopcntw */, X86::VPOPCNTWZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19276 { 14294 /* vpopcntw */, X86::VPOPCNTWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19276 { 14294 /* vpopcntw */, X86::VPOPCNTWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19279 { 14294 /* vpopcntw */, X86::VPOPCNTWZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19286 { 14308 /* vpord */, X86::VPORDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19286 { 14308 /* vpord */, X86::VPORDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19286 { 14308 /* vpord */, X86::VPORDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19289 { 14308 /* vpord */, X86::VPORDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19289 { 14308 /* vpord */, X86::VPORDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19290 { 14308 /* vpord */, X86::VPORDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
19290 { 14308 /* vpord */, X86::VPORDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
19295 { 14308 /* vpord */, X86::VPORDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19295 { 14308 /* vpord */, X86::VPORDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19295 { 14308 /* vpord */, X86::VPORDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19298 { 14308 /* vpord */, X86::VPORDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19298 { 14308 /* vpord */, X86::VPORDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19301 { 14308 /* vpord */, X86::VPORDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19301 { 14308 /* vpord */, X86::VPORDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19301 { 14308 /* vpord */, X86::VPORDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19304 { 14308 /* vpord */, X86::VPORDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19304 { 14308 /* vpord */, X86::VPORDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19307 { 14308 /* vpord */, X86::VPORDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19307 { 14308 /* vpord */, X86::VPORDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19308 { 14308 /* vpord */, X86::VPORDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19308 { 14308 /* vpord */, X86::VPORDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19313 { 14314 /* vporq */, X86::VPORQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19313 { 14314 /* vporq */, X86::VPORQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19313 { 14314 /* vporq */, X86::VPORQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19316 { 14314 /* vporq */, X86::VPORQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19316 { 14314 /* vporq */, X86::VPORQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19319 { 14314 /* vporq */, X86::VPORQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19319 { 14314 /* vporq */, X86::VPORQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19322 { 14314 /* vporq */, X86::VPORQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19322 { 14314 /* vporq */, X86::VPORQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19322 { 14314 /* vporq */, X86::VPORQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19325 { 14314 /* vporq */, X86::VPORQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19325 { 14314 /* vporq */, X86::VPORQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19328 { 14314 /* vporq */, X86::VPORQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19328 { 14314 /* vporq */, X86::VPORQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19328 { 14314 /* vporq */, X86::VPORQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19331 { 14314 /* vporq */, X86::VPORQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19331 { 14314 /* vporq */, X86::VPORQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19334 { 14314 /* vporq */, X86::VPORQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19334 { 14314 /* vporq */, X86::VPORQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19337 { 14314 /* vporq */, X86::VPORQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19337 { 14314 /* vporq */, X86::VPORQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19343 { 14327 /* vprold */, X86::VPROLDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19343 { 14327 /* vprold */, X86::VPROLDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19346 { 14327 /* vprold */, X86::VPROLDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
19347 { 14327 /* vprold */, X86::VPROLDZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
19352 { 14327 /* vprold */, X86::VPROLDZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19352 { 14327 /* vprold */, X86::VPROLDZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19355 { 14327 /* vprold */, X86::VPROLDZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19358 { 14327 /* vprold */, X86::VPROLDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19358 { 14327 /* vprold */, X86::VPROLDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19361 { 14327 /* vprold */, X86::VPROLDZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19364 { 14327 /* vprold */, X86::VPROLDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19365 { 14327 /* vprold */, X86::VPROLDZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19370 { 14334 /* vprolq */, X86::VPROLQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19370 { 14334 /* vprolq */, X86::VPROLQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19373 { 14334 /* vprolq */, X86::VPROLQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
19376 { 14334 /* vprolq */, X86::VPROLQZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
19379 { 14334 /* vprolq */, X86::VPROLQZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19379 { 14334 /* vprolq */, X86::VPROLQZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19382 { 14334 /* vprolq */, X86::VPROLQZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19385 { 14334 /* vprolq */, X86::VPROLQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19385 { 14334 /* vprolq */, X86::VPROLQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19388 { 14334 /* vprolq */, X86::VPROLQZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19391 { 14334 /* vprolq */, X86::VPROLQZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19394 { 14334 /* vprolq */, X86::VPROLQZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19397 { 14341 /* vprolvd */, X86::VPROLVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19397 { 14341 /* vprolvd */, X86::VPROLVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19397 { 14341 /* vprolvd */, X86::VPROLVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19400 { 14341 /* vprolvd */, X86::VPROLVDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19400 { 14341 /* vprolvd */, X86::VPROLVDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19401 { 14341 /* vprolvd */, X86::VPROLVDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
19401 { 14341 /* vprolvd */, X86::VPROLVDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
19406 { 14341 /* vprolvd */, X86::VPROLVDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19406 { 14341 /* vprolvd */, X86::VPROLVDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19406 { 14341 /* vprolvd */, X86::VPROLVDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19409 { 14341 /* vprolvd */, X86::VPROLVDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19409 { 14341 /* vprolvd */, X86::VPROLVDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19412 { 14341 /* vprolvd */, X86::VPROLVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19412 { 14341 /* vprolvd */, X86::VPROLVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19412 { 14341 /* vprolvd */, X86::VPROLVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19415 { 14341 /* vprolvd */, X86::VPROLVDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19415 { 14341 /* vprolvd */, X86::VPROLVDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19418 { 14341 /* vprolvd */, X86::VPROLVDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19418 { 14341 /* vprolvd */, X86::VPROLVDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19419 { 14341 /* vprolvd */, X86::VPROLVDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19419 { 14341 /* vprolvd */, X86::VPROLVDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19424 { 14349 /* vprolvq */, X86::VPROLVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19424 { 14349 /* vprolvq */, X86::VPROLVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19424 { 14349 /* vprolvq */, X86::VPROLVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19427 { 14349 /* vprolvq */, X86::VPROLVQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19427 { 14349 /* vprolvq */, X86::VPROLVQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19430 { 14349 /* vprolvq */, X86::VPROLVQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19430 { 14349 /* vprolvq */, X86::VPROLVQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19433 { 14349 /* vprolvq */, X86::VPROLVQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19433 { 14349 /* vprolvq */, X86::VPROLVQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19433 { 14349 /* vprolvq */, X86::VPROLVQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19436 { 14349 /* vprolvq */, X86::VPROLVQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19436 { 14349 /* vprolvq */, X86::VPROLVQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19439 { 14349 /* vprolvq */, X86::VPROLVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19439 { 14349 /* vprolvq */, X86::VPROLVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19439 { 14349 /* vprolvq */, X86::VPROLVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19442 { 14349 /* vprolvq */, X86::VPROLVQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19442 { 14349 /* vprolvq */, X86::VPROLVQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19445 { 14349 /* vprolvq */, X86::VPROLVQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19445 { 14349 /* vprolvq */, X86::VPROLVQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19448 { 14349 /* vprolvq */, X86::VPROLVQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19448 { 14349 /* vprolvq */, X86::VPROLVQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19451 { 14357 /* vprord */, X86::VPRORDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19451 { 14357 /* vprord */, X86::VPRORDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19454 { 14357 /* vprord */, X86::VPRORDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
19455 { 14357 /* vprord */, X86::VPRORDZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
19460 { 14357 /* vprord */, X86::VPRORDZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19460 { 14357 /* vprord */, X86::VPRORDZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19463 { 14357 /* vprord */, X86::VPRORDZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19466 { 14357 /* vprord */, X86::VPRORDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19466 { 14357 /* vprord */, X86::VPRORDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19469 { 14357 /* vprord */, X86::VPRORDZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19472 { 14357 /* vprord */, X86::VPRORDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19473 { 14357 /* vprord */, X86::VPRORDZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19478 { 14364 /* vprorq */, X86::VPRORQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19478 { 14364 /* vprorq */, X86::VPRORQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19481 { 14364 /* vprorq */, X86::VPRORQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
19484 { 14364 /* vprorq */, X86::VPRORQZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
19487 { 14364 /* vprorq */, X86::VPRORQZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19487 { 14364 /* vprorq */, X86::VPRORQZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19490 { 14364 /* vprorq */, X86::VPRORQZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19493 { 14364 /* vprorq */, X86::VPRORQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19493 { 14364 /* vprorq */, X86::VPRORQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19496 { 14364 /* vprorq */, X86::VPRORQZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19499 { 14364 /* vprorq */, X86::VPRORQZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19502 { 14364 /* vprorq */, X86::VPRORQZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19505 { 14371 /* vprorvd */, X86::VPRORVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19505 { 14371 /* vprorvd */, X86::VPRORVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19505 { 14371 /* vprorvd */, X86::VPRORVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19508 { 14371 /* vprorvd */, X86::VPRORVDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19508 { 14371 /* vprorvd */, X86::VPRORVDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19509 { 14371 /* vprorvd */, X86::VPRORVDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
19509 { 14371 /* vprorvd */, X86::VPRORVDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
19514 { 14371 /* vprorvd */, X86::VPRORVDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19514 { 14371 /* vprorvd */, X86::VPRORVDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19514 { 14371 /* vprorvd */, X86::VPRORVDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19517 { 14371 /* vprorvd */, X86::VPRORVDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19517 { 14371 /* vprorvd */, X86::VPRORVDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19520 { 14371 /* vprorvd */, X86::VPRORVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19520 { 14371 /* vprorvd */, X86::VPRORVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19520 { 14371 /* vprorvd */, X86::VPRORVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19523 { 14371 /* vprorvd */, X86::VPRORVDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19523 { 14371 /* vprorvd */, X86::VPRORVDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19526 { 14371 /* vprorvd */, X86::VPRORVDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19526 { 14371 /* vprorvd */, X86::VPRORVDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19527 { 14371 /* vprorvd */, X86::VPRORVDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19527 { 14371 /* vprorvd */, X86::VPRORVDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19532 { 14379 /* vprorvq */, X86::VPRORVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19532 { 14379 /* vprorvq */, X86::VPRORVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19532 { 14379 /* vprorvq */, X86::VPRORVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19535 { 14379 /* vprorvq */, X86::VPRORVQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19535 { 14379 /* vprorvq */, X86::VPRORVQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19538 { 14379 /* vprorvq */, X86::VPRORVQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19538 { 14379 /* vprorvq */, X86::VPRORVQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19541 { 14379 /* vprorvq */, X86::VPRORVQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19541 { 14379 /* vprorvq */, X86::VPRORVQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19541 { 14379 /* vprorvq */, X86::VPRORVQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19544 { 14379 /* vprorvq */, X86::VPRORVQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19544 { 14379 /* vprorvq */, X86::VPRORVQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19547 { 14379 /* vprorvq */, X86::VPRORVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19547 { 14379 /* vprorvq */, X86::VPRORVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19547 { 14379 /* vprorvq */, X86::VPRORVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19550 { 14379 /* vprorvq */, X86::VPRORVQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19550 { 14379 /* vprorvq */, X86::VPRORVQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19553 { 14379 /* vprorvq */, X86::VPRORVQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19553 { 14379 /* vprorvq */, X86::VPRORVQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19556 { 14379 /* vprorvq */, X86::VPRORVQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19556 { 14379 /* vprorvq */, X86::VPRORVQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19581 { 14415 /* vpsadbw */, X86::VPSADBWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19581 { 14415 /* vpsadbw */, X86::VPSADBWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19581 { 14415 /* vpsadbw */, X86::VPSADBWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19586 { 14415 /* vpsadbw */, X86::VPSADBWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19586 { 14415 /* vpsadbw */, X86::VPSADBWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19589 { 14423 /* vpscatterdd */, X86::VPSCATTERDDZmr, Convert__Reg1_3__Mem512_RC5125_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19592 { 14435 /* vpscatterdq */, X86::VPSCATTERDQZmr, Convert__Reg1_3__Mem512_RC256X5_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19598 { 14459 /* vpscatterqq */, X86::VPSCATTERQQZmr, Convert__Reg1_3__Mem512_RC5125_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19619 { 14513 /* vpshldd */, X86::VPSHLDDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
19619 { 14513 /* vpshldd */, X86::VPSHLDDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
19619 { 14513 /* vpshldd */, X86::VPSHLDDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
19622 { 14513 /* vpshldd */, X86::VPSHLDDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19622 { 14513 /* vpshldd */, X86::VPSHLDDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19623 { 14513 /* vpshldd */, X86::VPSHLDDZrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
19623 { 14513 /* vpshldd */, X86::VPSHLDDZrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
19628 { 14513 /* vpshldd */, X86::VPSHLDDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19628 { 14513 /* vpshldd */, X86::VPSHLDDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19628 { 14513 /* vpshldd */, X86::VPSHLDDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19631 { 14513 /* vpshldd */, X86::VPSHLDDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19631 { 14513 /* vpshldd */, X86::VPSHLDDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19634 { 14513 /* vpshldd */, X86::VPSHLDDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19634 { 14513 /* vpshldd */, X86::VPSHLDDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19634 { 14513 /* vpshldd */, X86::VPSHLDDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19637 { 14513 /* vpshldd */, X86::VPSHLDDZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19637 { 14513 /* vpshldd */, X86::VPSHLDDZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19640 { 14513 /* vpshldd */, X86::VPSHLDDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19640 { 14513 /* vpshldd */, X86::VPSHLDDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19641 { 14513 /* vpshldd */, X86::VPSHLDDZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19641 { 14513 /* vpshldd */, X86::VPSHLDDZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19646 { 14521 /* vpshldq */, X86::VPSHLDQZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
19646 { 14521 /* vpshldq */, X86::VPSHLDQZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
19646 { 14521 /* vpshldq */, X86::VPSHLDQZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
19649 { 14521 /* vpshldq */, X86::VPSHLDQZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19649 { 14521 /* vpshldq */, X86::VPSHLDQZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19652 { 14521 /* vpshldq */, X86::VPSHLDQZrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19652 { 14521 /* vpshldq */, X86::VPSHLDQZrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19655 { 14521 /* vpshldq */, X86::VPSHLDQZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19655 { 14521 /* vpshldq */, X86::VPSHLDQZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19655 { 14521 /* vpshldq */, X86::VPSHLDQZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19658 { 14521 /* vpshldq */, X86::VPSHLDQZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19658 { 14521 /* vpshldq */, X86::VPSHLDQZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19661 { 14521 /* vpshldq */, X86::VPSHLDQZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19661 { 14521 /* vpshldq */, X86::VPSHLDQZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19661 { 14521 /* vpshldq */, X86::VPSHLDQZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19664 { 14521 /* vpshldq */, X86::VPSHLDQZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19664 { 14521 /* vpshldq */, X86::VPSHLDQZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19667 { 14521 /* vpshldq */, X86::VPSHLDQZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19667 { 14521 /* vpshldq */, X86::VPSHLDQZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19670 { 14521 /* vpshldq */, X86::VPSHLDQZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19670 { 14521 /* vpshldq */, X86::VPSHLDQZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19673 { 14529 /* vpshldvd */, X86::VPSHLDVDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19673 { 14529 /* vpshldvd */, X86::VPSHLDVDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19673 { 14529 /* vpshldvd */, X86::VPSHLDVDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19676 { 14529 /* vpshldvd */, X86::VPSHLDVDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19676 { 14529 /* vpshldvd */, X86::VPSHLDVDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19677 { 14529 /* vpshldvd */, X86::VPSHLDVDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
19677 { 14529 /* vpshldvd */, X86::VPSHLDVDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
19682 { 14529 /* vpshldvd */, X86::VPSHLDVDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19682 { 14529 /* vpshldvd */, X86::VPSHLDVDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19682 { 14529 /* vpshldvd */, X86::VPSHLDVDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19685 { 14529 /* vpshldvd */, X86::VPSHLDVDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19685 { 14529 /* vpshldvd */, X86::VPSHLDVDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19688 { 14529 /* vpshldvd */, X86::VPSHLDVDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19688 { 14529 /* vpshldvd */, X86::VPSHLDVDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19688 { 14529 /* vpshldvd */, X86::VPSHLDVDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19691 { 14529 /* vpshldvd */, X86::VPSHLDVDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19691 { 14529 /* vpshldvd */, X86::VPSHLDVDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19694 { 14529 /* vpshldvd */, X86::VPSHLDVDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19694 { 14529 /* vpshldvd */, X86::VPSHLDVDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19695 { 14529 /* vpshldvd */, X86::VPSHLDVDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19695 { 14529 /* vpshldvd */, X86::VPSHLDVDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19700 { 14538 /* vpshldvq */, X86::VPSHLDVQZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19700 { 14538 /* vpshldvq */, X86::VPSHLDVQZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19700 { 14538 /* vpshldvq */, X86::VPSHLDVQZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19703 { 14538 /* vpshldvq */, X86::VPSHLDVQZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19703 { 14538 /* vpshldvq */, X86::VPSHLDVQZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19706 { 14538 /* vpshldvq */, X86::VPSHLDVQZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19706 { 14538 /* vpshldvq */, X86::VPSHLDVQZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19709 { 14538 /* vpshldvq */, X86::VPSHLDVQZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19709 { 14538 /* vpshldvq */, X86::VPSHLDVQZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19709 { 14538 /* vpshldvq */, X86::VPSHLDVQZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19712 { 14538 /* vpshldvq */, X86::VPSHLDVQZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19712 { 14538 /* vpshldvq */, X86::VPSHLDVQZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19715 { 14538 /* vpshldvq */, X86::VPSHLDVQZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19715 { 14538 /* vpshldvq */, X86::VPSHLDVQZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19715 { 14538 /* vpshldvq */, X86::VPSHLDVQZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19718 { 14538 /* vpshldvq */, X86::VPSHLDVQZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19718 { 14538 /* vpshldvq */, X86::VPSHLDVQZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19721 { 14538 /* vpshldvq */, X86::VPSHLDVQZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19721 { 14538 /* vpshldvq */, X86::VPSHLDVQZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19724 { 14538 /* vpshldvq */, X86::VPSHLDVQZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19724 { 14538 /* vpshldvq */, X86::VPSHLDVQZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19727 { 14547 /* vpshldvw */, X86::VPSHLDVWZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19727 { 14547 /* vpshldvw */, X86::VPSHLDVWZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19727 { 14547 /* vpshldvw */, X86::VPSHLDVWZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19730 { 14547 /* vpshldvw */, X86::VPSHLDVWZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19730 { 14547 /* vpshldvw */, X86::VPSHLDVWZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19733 { 14547 /* vpshldvw */, X86::VPSHLDVWZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19733 { 14547 /* vpshldvw */, X86::VPSHLDVWZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19733 { 14547 /* vpshldvw */, X86::VPSHLDVWZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19736 { 14547 /* vpshldvw */, X86::VPSHLDVWZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19736 { 14547 /* vpshldvw */, X86::VPSHLDVWZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19739 { 14547 /* vpshldvw */, X86::VPSHLDVWZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19739 { 14547 /* vpshldvw */, X86::VPSHLDVWZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19739 { 14547 /* vpshldvw */, X86::VPSHLDVWZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19742 { 14547 /* vpshldvw */, X86::VPSHLDVWZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19742 { 14547 /* vpshldvw */, X86::VPSHLDVWZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19745 { 14556 /* vpshldw */, X86::VPSHLDWZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
19745 { 14556 /* vpshldw */, X86::VPSHLDWZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
19745 { 14556 /* vpshldw */, X86::VPSHLDWZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
19748 { 14556 /* vpshldw */, X86::VPSHLDWZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19748 { 14556 /* vpshldw */, X86::VPSHLDWZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19751 { 14556 /* vpshldw */, X86::VPSHLDWZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19751 { 14556 /* vpshldw */, X86::VPSHLDWZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19751 { 14556 /* vpshldw */, X86::VPSHLDWZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19754 { 14556 /* vpshldw */, X86::VPSHLDWZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19754 { 14556 /* vpshldw */, X86::VPSHLDWZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19757 { 14556 /* vpshldw */, X86::VPSHLDWZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19757 { 14556 /* vpshldw */, X86::VPSHLDWZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19757 { 14556 /* vpshldw */, X86::VPSHLDWZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19760 { 14556 /* vpshldw */, X86::VPSHLDWZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19760 { 14556 /* vpshldw */, X86::VPSHLDWZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19769 { 14578 /* vpshrdd */, X86::VPSHRDDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
19769 { 14578 /* vpshrdd */, X86::VPSHRDDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
19769 { 14578 /* vpshrdd */, X86::VPSHRDDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
19772 { 14578 /* vpshrdd */, X86::VPSHRDDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19772 { 14578 /* vpshrdd */, X86::VPSHRDDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19773 { 14578 /* vpshrdd */, X86::VPSHRDDZrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
19773 { 14578 /* vpshrdd */, X86::VPSHRDDZrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
19778 { 14578 /* vpshrdd */, X86::VPSHRDDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19778 { 14578 /* vpshrdd */, X86::VPSHRDDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19778 { 14578 /* vpshrdd */, X86::VPSHRDDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19781 { 14578 /* vpshrdd */, X86::VPSHRDDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19781 { 14578 /* vpshrdd */, X86::VPSHRDDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19784 { 14578 /* vpshrdd */, X86::VPSHRDDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19784 { 14578 /* vpshrdd */, X86::VPSHRDDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19784 { 14578 /* vpshrdd */, X86::VPSHRDDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19787 { 14578 /* vpshrdd */, X86::VPSHRDDZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19787 { 14578 /* vpshrdd */, X86::VPSHRDDZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19790 { 14578 /* vpshrdd */, X86::VPSHRDDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19790 { 14578 /* vpshrdd */, X86::VPSHRDDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19791 { 14578 /* vpshrdd */, X86::VPSHRDDZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19791 { 14578 /* vpshrdd */, X86::VPSHRDDZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19796 { 14586 /* vpshrdq */, X86::VPSHRDQZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
19796 { 14586 /* vpshrdq */, X86::VPSHRDQZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
19796 { 14586 /* vpshrdq */, X86::VPSHRDQZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
19799 { 14586 /* vpshrdq */, X86::VPSHRDQZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19799 { 14586 /* vpshrdq */, X86::VPSHRDQZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19802 { 14586 /* vpshrdq */, X86::VPSHRDQZrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19802 { 14586 /* vpshrdq */, X86::VPSHRDQZrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19805 { 14586 /* vpshrdq */, X86::VPSHRDQZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19805 { 14586 /* vpshrdq */, X86::VPSHRDQZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19805 { 14586 /* vpshrdq */, X86::VPSHRDQZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19808 { 14586 /* vpshrdq */, X86::VPSHRDQZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19808 { 14586 /* vpshrdq */, X86::VPSHRDQZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19811 { 14586 /* vpshrdq */, X86::VPSHRDQZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19811 { 14586 /* vpshrdq */, X86::VPSHRDQZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19811 { 14586 /* vpshrdq */, X86::VPSHRDQZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19814 { 14586 /* vpshrdq */, X86::VPSHRDQZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19814 { 14586 /* vpshrdq */, X86::VPSHRDQZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19817 { 14586 /* vpshrdq */, X86::VPSHRDQZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19817 { 14586 /* vpshrdq */, X86::VPSHRDQZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19820 { 14586 /* vpshrdq */, X86::VPSHRDQZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19820 { 14586 /* vpshrdq */, X86::VPSHRDQZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19823 { 14594 /* vpshrdvd */, X86::VPSHRDVDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19823 { 14594 /* vpshrdvd */, X86::VPSHRDVDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19823 { 14594 /* vpshrdvd */, X86::VPSHRDVDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19826 { 14594 /* vpshrdvd */, X86::VPSHRDVDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19826 { 14594 /* vpshrdvd */, X86::VPSHRDVDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19827 { 14594 /* vpshrdvd */, X86::VPSHRDVDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
19827 { 14594 /* vpshrdvd */, X86::VPSHRDVDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
19832 { 14594 /* vpshrdvd */, X86::VPSHRDVDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19832 { 14594 /* vpshrdvd */, X86::VPSHRDVDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19832 { 14594 /* vpshrdvd */, X86::VPSHRDVDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19835 { 14594 /* vpshrdvd */, X86::VPSHRDVDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19835 { 14594 /* vpshrdvd */, X86::VPSHRDVDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19838 { 14594 /* vpshrdvd */, X86::VPSHRDVDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19838 { 14594 /* vpshrdvd */, X86::VPSHRDVDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19838 { 14594 /* vpshrdvd */, X86::VPSHRDVDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19841 { 14594 /* vpshrdvd */, X86::VPSHRDVDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19841 { 14594 /* vpshrdvd */, X86::VPSHRDVDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19844 { 14594 /* vpshrdvd */, X86::VPSHRDVDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19844 { 14594 /* vpshrdvd */, X86::VPSHRDVDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19845 { 14594 /* vpshrdvd */, X86::VPSHRDVDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19845 { 14594 /* vpshrdvd */, X86::VPSHRDVDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19850 { 14603 /* vpshrdvq */, X86::VPSHRDVQZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19850 { 14603 /* vpshrdvq */, X86::VPSHRDVQZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19850 { 14603 /* vpshrdvq */, X86::VPSHRDVQZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19853 { 14603 /* vpshrdvq */, X86::VPSHRDVQZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19853 { 14603 /* vpshrdvq */, X86::VPSHRDVQZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19856 { 14603 /* vpshrdvq */, X86::VPSHRDVQZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19856 { 14603 /* vpshrdvq */, X86::VPSHRDVQZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19859 { 14603 /* vpshrdvq */, X86::VPSHRDVQZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19859 { 14603 /* vpshrdvq */, X86::VPSHRDVQZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19859 { 14603 /* vpshrdvq */, X86::VPSHRDVQZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19862 { 14603 /* vpshrdvq */, X86::VPSHRDVQZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19862 { 14603 /* vpshrdvq */, X86::VPSHRDVQZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19865 { 14603 /* vpshrdvq */, X86::VPSHRDVQZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19865 { 14603 /* vpshrdvq */, X86::VPSHRDVQZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19865 { 14603 /* vpshrdvq */, X86::VPSHRDVQZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19868 { 14603 /* vpshrdvq */, X86::VPSHRDVQZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19868 { 14603 /* vpshrdvq */, X86::VPSHRDVQZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19871 { 14603 /* vpshrdvq */, X86::VPSHRDVQZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19871 { 14603 /* vpshrdvq */, X86::VPSHRDVQZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19874 { 14603 /* vpshrdvq */, X86::VPSHRDVQZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19874 { 14603 /* vpshrdvq */, X86::VPSHRDVQZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19877 { 14612 /* vpshrdvw */, X86::VPSHRDVWZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19877 { 14612 /* vpshrdvw */, X86::VPSHRDVWZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19877 { 14612 /* vpshrdvw */, X86::VPSHRDVWZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19880 { 14612 /* vpshrdvw */, X86::VPSHRDVWZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19880 { 14612 /* vpshrdvw */, X86::VPSHRDVWZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19883 { 14612 /* vpshrdvw */, X86::VPSHRDVWZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19883 { 14612 /* vpshrdvw */, X86::VPSHRDVWZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19883 { 14612 /* vpshrdvw */, X86::VPSHRDVWZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19886 { 14612 /* vpshrdvw */, X86::VPSHRDVWZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19886 { 14612 /* vpshrdvw */, X86::VPSHRDVWZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19889 { 14612 /* vpshrdvw */, X86::VPSHRDVWZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19889 { 14612 /* vpshrdvw */, X86::VPSHRDVWZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19889 { 14612 /* vpshrdvw */, X86::VPSHRDVWZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19892 { 14612 /* vpshrdvw */, X86::VPSHRDVWZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19892 { 14612 /* vpshrdvw */, X86::VPSHRDVWZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19895 { 14621 /* vpshrdw */, X86::VPSHRDWZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
19895 { 14621 /* vpshrdw */, X86::VPSHRDWZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
19895 { 14621 /* vpshrdw */, X86::VPSHRDWZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
19898 { 14621 /* vpshrdw */, X86::VPSHRDWZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19898 { 14621 /* vpshrdw */, X86::VPSHRDWZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19901 { 14621 /* vpshrdw */, X86::VPSHRDWZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19901 { 14621 /* vpshrdw */, X86::VPSHRDWZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19901 { 14621 /* vpshrdw */, X86::VPSHRDWZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19904 { 14621 /* vpshrdw */, X86::VPSHRDWZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19904 { 14621 /* vpshrdw */, X86::VPSHRDWZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19907 { 14621 /* vpshrdw */, X86::VPSHRDWZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19907 { 14621 /* vpshrdw */, X86::VPSHRDWZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19907 { 14621 /* vpshrdw */, X86::VPSHRDWZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19910 { 14621 /* vpshrdw */, X86::VPSHRDWZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19910 { 14621 /* vpshrdw */, X86::VPSHRDWZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19915 { 14629 /* vpshufb */, X86::VPSHUFBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19915 { 14629 /* vpshufb */, X86::VPSHUFBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19915 { 14629 /* vpshufb */, X86::VPSHUFBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19920 { 14629 /* vpshufb */, X86::VPSHUFBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19920 { 14629 /* vpshufb */, X86::VPSHUFBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19923 { 14629 /* vpshufb */, X86::VPSHUFBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19923 { 14629 /* vpshufb */, X86::VPSHUFBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19923 { 14629 /* vpshufb */, X86::VPSHUFBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19926 { 14629 /* vpshufb */, X86::VPSHUFBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19926 { 14629 /* vpshufb */, X86::VPSHUFBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19929 { 14629 /* vpshufb */, X86::VPSHUFBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19929 { 14629 /* vpshufb */, X86::VPSHUFBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19929 { 14629 /* vpshufb */, X86::VPSHUFBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19932 { 14629 /* vpshufb */, X86::VPSHUFBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19932 { 14629 /* vpshufb */, X86::VPSHUFBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19935 { 14637 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
19935 { 14637 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
19938 { 14637 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
19941 { 14637 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19941 { 14637 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19944 { 14637 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19949 { 14650 /* vpshufd */, X86::VPSHUFDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19949 { 14650 /* vpshufd */, X86::VPSHUFDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19954 { 14650 /* vpshufd */, X86::VPSHUFDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
19955 { 14650 /* vpshufd */, X86::VPSHUFDZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
19960 { 14650 /* vpshufd */, X86::VPSHUFDZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19960 { 14650 /* vpshufd */, X86::VPSHUFDZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19963 { 14650 /* vpshufd */, X86::VPSHUFDZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19966 { 14650 /* vpshufd */, X86::VPSHUFDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19966 { 14650 /* vpshufd */, X86::VPSHUFDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19969 { 14650 /* vpshufd */, X86::VPSHUFDZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19972 { 14650 /* vpshufd */, X86::VPSHUFDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19973 { 14650 /* vpshufd */, X86::VPSHUFDZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19980 { 14658 /* vpshufhw */, X86::VPSHUFHWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19980 { 14658 /* vpshufhw */, X86::VPSHUFHWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19985 { 14658 /* vpshufhw */, X86::VPSHUFHWZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
19988 { 14658 /* vpshufhw */, X86::VPSHUFHWZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19988 { 14658 /* vpshufhw */, X86::VPSHUFHWZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19991 { 14658 /* vpshufhw */, X86::VPSHUFHWZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19994 { 14658 /* vpshufhw */, X86::VPSHUFHWZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19994 { 14658 /* vpshufhw */, X86::VPSHUFHWZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19997 { 14658 /* vpshufhw */, X86::VPSHUFHWZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20002 { 14667 /* vpshuflw */, X86::VPSHUFLWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20002 { 14667 /* vpshuflw */, X86::VPSHUFLWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20007 { 14667 /* vpshuflw */, X86::VPSHUFLWZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
20010 { 14667 /* vpshuflw */, X86::VPSHUFLWZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20010 { 14667 /* vpshuflw */, X86::VPSHUFLWZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20013 { 14667 /* vpshuflw */, X86::VPSHUFLWZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20016 { 14667 /* vpshuflw */, X86::VPSHUFLWZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20016 { 14667 /* vpshuflw */, X86::VPSHUFLWZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20019 { 14667 /* vpshuflw */, X86::VPSHUFLWZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20036 { 14700 /* vpslld */, X86::VPSLLDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
20036 { 14700 /* vpslld */, X86::VPSLLDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
20041 { 14700 /* vpslld */, X86::VPSLLDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20041 { 14700 /* vpslld */, X86::VPSLLDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20044 { 14700 /* vpslld */, X86::VPSLLDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
20049 { 14700 /* vpslld */, X86::VPSLLDZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
20049 { 14700 /* vpslld */, X86::VPSLLDZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
20050 { 14700 /* vpslld */, X86::VPSLLDZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
20055 { 14700 /* vpslld */, X86::VPSLLDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20055 { 14700 /* vpslld */, X86::VPSLLDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20058 { 14700 /* vpslld */, X86::VPSLLDZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20058 { 14700 /* vpslld */, X86::VPSLLDZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20061 { 14700 /* vpslld */, X86::VPSLLDZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20064 { 14700 /* vpslld */, X86::VPSLLDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20064 { 14700 /* vpslld */, X86::VPSLLDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20067 { 14700 /* vpslld */, X86::VPSLLDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20067 { 14700 /* vpslld */, X86::VPSLLDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20070 { 14700 /* vpslld */, X86::VPSLLDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20070 { 14700 /* vpslld */, X86::VPSLLDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20073 { 14700 /* vpslld */, X86::VPSLLDZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20076 { 14700 /* vpslld */, X86::VPSLLDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20079 { 14700 /* vpslld */, X86::VPSLLDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20079 { 14700 /* vpslld */, X86::VPSLLDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20080 { 14700 /* vpslld */, X86::VPSLLDZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20087 { 14707 /* vpslldq */, X86::VPSLLDQZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20087 { 14707 /* vpslldq */, X86::VPSLLDQZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20090 { 14707 /* vpslldq */, X86::VPSLLDQZrm, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
20095 { 14715 /* vpsllq */, X86::VPSLLQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
20095 { 14715 /* vpsllq */, X86::VPSLLQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
20100 { 14715 /* vpsllq */, X86::VPSLLQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20100 { 14715 /* vpsllq */, X86::VPSLLQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20103 { 14715 /* vpsllq */, X86::VPSLLQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
20108 { 14715 /* vpsllq */, X86::VPSLLQZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
20108 { 14715 /* vpsllq */, X86::VPSLLQZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
20111 { 14715 /* vpsllq */, X86::VPSLLQZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
20114 { 14715 /* vpsllq */, X86::VPSLLQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20114 { 14715 /* vpsllq */, X86::VPSLLQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20117 { 14715 /* vpsllq */, X86::VPSLLQZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20117 { 14715 /* vpsllq */, X86::VPSLLQZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20120 { 14715 /* vpsllq */, X86::VPSLLQZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20123 { 14715 /* vpsllq */, X86::VPSLLQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20123 { 14715 /* vpsllq */, X86::VPSLLQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20126 { 14715 /* vpsllq */, X86::VPSLLQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20126 { 14715 /* vpsllq */, X86::VPSLLQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20129 { 14715 /* vpsllq */, X86::VPSLLQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20129 { 14715 /* vpsllq */, X86::VPSLLQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20132 { 14715 /* vpsllq */, X86::VPSLLQZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20135 { 14715 /* vpsllq */, X86::VPSLLQZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20138 { 14715 /* vpsllq */, X86::VPSLLQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20138 { 14715 /* vpsllq */, X86::VPSLLQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20141 { 14715 /* vpsllq */, X86::VPSLLQZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20146 { 14722 /* vpsllvd */, X86::VPSLLVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20146 { 14722 /* vpsllvd */, X86::VPSLLVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20146 { 14722 /* vpsllvd */, X86::VPSLLVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20151 { 14722 /* vpsllvd */, X86::VPSLLVDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20151 { 14722 /* vpsllvd */, X86::VPSLLVDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20152 { 14722 /* vpsllvd */, X86::VPSLLVDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
20152 { 14722 /* vpsllvd */, X86::VPSLLVDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
20157 { 14722 /* vpsllvd */, X86::VPSLLVDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20157 { 14722 /* vpsllvd */, X86::VPSLLVDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20157 { 14722 /* vpsllvd */, X86::VPSLLVDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20160 { 14722 /* vpsllvd */, X86::VPSLLVDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20160 { 14722 /* vpsllvd */, X86::VPSLLVDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20163 { 14722 /* vpsllvd */, X86::VPSLLVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20163 { 14722 /* vpsllvd */, X86::VPSLLVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20163 { 14722 /* vpsllvd */, X86::VPSLLVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20166 { 14722 /* vpsllvd */, X86::VPSLLVDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20166 { 14722 /* vpsllvd */, X86::VPSLLVDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20169 { 14722 /* vpsllvd */, X86::VPSLLVDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20169 { 14722 /* vpsllvd */, X86::VPSLLVDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20170 { 14722 /* vpsllvd */, X86::VPSLLVDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20170 { 14722 /* vpsllvd */, X86::VPSLLVDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20177 { 14730 /* vpsllvq */, X86::VPSLLVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20177 { 14730 /* vpsllvq */, X86::VPSLLVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20177 { 14730 /* vpsllvq */, X86::VPSLLVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20182 { 14730 /* vpsllvq */, X86::VPSLLVQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20182 { 14730 /* vpsllvq */, X86::VPSLLVQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20185 { 14730 /* vpsllvq */, X86::VPSLLVQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
20185 { 14730 /* vpsllvq */, X86::VPSLLVQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
20188 { 14730 /* vpsllvq */, X86::VPSLLVQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20188 { 14730 /* vpsllvq */, X86::VPSLLVQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20188 { 14730 /* vpsllvq */, X86::VPSLLVQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20191 { 14730 /* vpsllvq */, X86::VPSLLVQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20191 { 14730 /* vpsllvq */, X86::VPSLLVQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20194 { 14730 /* vpsllvq */, X86::VPSLLVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20194 { 14730 /* vpsllvq */, X86::VPSLLVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20194 { 14730 /* vpsllvq */, X86::VPSLLVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20197 { 14730 /* vpsllvq */, X86::VPSLLVQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20197 { 14730 /* vpsllvq */, X86::VPSLLVQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20200 { 14730 /* vpsllvq */, X86::VPSLLVQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20200 { 14730 /* vpsllvq */, X86::VPSLLVQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20203 { 14730 /* vpsllvq */, X86::VPSLLVQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20203 { 14730 /* vpsllvq */, X86::VPSLLVQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20206 { 14738 /* vpsllvw */, X86::VPSLLVWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20206 { 14738 /* vpsllvw */, X86::VPSLLVWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20206 { 14738 /* vpsllvw */, X86::VPSLLVWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20209 { 14738 /* vpsllvw */, X86::VPSLLVWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20209 { 14738 /* vpsllvw */, X86::VPSLLVWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20212 { 14738 /* vpsllvw */, X86::VPSLLVWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20212 { 14738 /* vpsllvw */, X86::VPSLLVWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20212 { 14738 /* vpsllvw */, X86::VPSLLVWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20215 { 14738 /* vpsllvw */, X86::VPSLLVWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20215 { 14738 /* vpsllvw */, X86::VPSLLVWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20218 { 14738 /* vpsllvw */, X86::VPSLLVWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20218 { 14738 /* vpsllvw */, X86::VPSLLVWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20218 { 14738 /* vpsllvw */, X86::VPSLLVWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20221 { 14738 /* vpsllvw */, X86::VPSLLVWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20221 { 14738 /* vpsllvw */, X86::VPSLLVWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20226 { 14746 /* vpsllw */, X86::VPSLLWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
20226 { 14746 /* vpsllw */, X86::VPSLLWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
20231 { 14746 /* vpsllw */, X86::VPSLLWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20231 { 14746 /* vpsllw */, X86::VPSLLWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20234 { 14746 /* vpsllw */, X86::VPSLLWZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
20239 { 14746 /* vpsllw */, X86::VPSLLWZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
20239 { 14746 /* vpsllw */, X86::VPSLLWZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
20242 { 14746 /* vpsllw */, X86::VPSLLWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20242 { 14746 /* vpsllw */, X86::VPSLLWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20245 { 14746 /* vpsllw */, X86::VPSLLWZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20245 { 14746 /* vpsllw */, X86::VPSLLWZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20248 { 14746 /* vpsllw */, X86::VPSLLWZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20251 { 14746 /* vpsllw */, X86::VPSLLWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20251 { 14746 /* vpsllw */, X86::VPSLLWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20254 { 14746 /* vpsllw */, X86::VPSLLWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20254 { 14746 /* vpsllw */, X86::VPSLLWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20257 { 14746 /* vpsllw */, X86::VPSLLWZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20257 { 14746 /* vpsllw */, X86::VPSLLWZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20260 { 14746 /* vpsllw */, X86::VPSLLWZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20263 { 14746 /* vpsllw */, X86::VPSLLWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20263 { 14746 /* vpsllw */, X86::VPSLLWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20268 { 14753 /* vpsrad */, X86::VPSRADZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
20268 { 14753 /* vpsrad */, X86::VPSRADZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
20273 { 14753 /* vpsrad */, X86::VPSRADZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20273 { 14753 /* vpsrad */, X86::VPSRADZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20276 { 14753 /* vpsrad */, X86::VPSRADZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
20281 { 14753 /* vpsrad */, X86::VPSRADZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
20281 { 14753 /* vpsrad */, X86::VPSRADZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
20282 { 14753 /* vpsrad */, X86::VPSRADZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
20287 { 14753 /* vpsrad */, X86::VPSRADZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20287 { 14753 /* vpsrad */, X86::VPSRADZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20290 { 14753 /* vpsrad */, X86::VPSRADZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20290 { 14753 /* vpsrad */, X86::VPSRADZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20293 { 14753 /* vpsrad */, X86::VPSRADZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20296 { 14753 /* vpsrad */, X86::VPSRADZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20296 { 14753 /* vpsrad */, X86::VPSRADZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20299 { 14753 /* vpsrad */, X86::VPSRADZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20299 { 14753 /* vpsrad */, X86::VPSRADZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20302 { 14753 /* vpsrad */, X86::VPSRADZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20302 { 14753 /* vpsrad */, X86::VPSRADZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20305 { 14753 /* vpsrad */, X86::VPSRADZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20308 { 14753 /* vpsrad */, X86::VPSRADZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20311 { 14753 /* vpsrad */, X86::VPSRADZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20311 { 14753 /* vpsrad */, X86::VPSRADZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20312 { 14753 /* vpsrad */, X86::VPSRADZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20317 { 14760 /* vpsraq */, X86::VPSRAQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
20317 { 14760 /* vpsraq */, X86::VPSRAQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
20320 { 14760 /* vpsraq */, X86::VPSRAQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20320 { 14760 /* vpsraq */, X86::VPSRAQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20323 { 14760 /* vpsraq */, X86::VPSRAQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
20326 { 14760 /* vpsraq */, X86::VPSRAQZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
20326 { 14760 /* vpsraq */, X86::VPSRAQZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
20329 { 14760 /* vpsraq */, X86::VPSRAQZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
20332 { 14760 /* vpsraq */, X86::VPSRAQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20332 { 14760 /* vpsraq */, X86::VPSRAQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20335 { 14760 /* vpsraq */, X86::VPSRAQZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20335 { 14760 /* vpsraq */, X86::VPSRAQZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20338 { 14760 /* vpsraq */, X86::VPSRAQZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20341 { 14760 /* vpsraq */, X86::VPSRAQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20341 { 14760 /* vpsraq */, X86::VPSRAQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20344 { 14760 /* vpsraq */, X86::VPSRAQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20344 { 14760 /* vpsraq */, X86::VPSRAQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20347 { 14760 /* vpsraq */, X86::VPSRAQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20347 { 14760 /* vpsraq */, X86::VPSRAQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20350 { 14760 /* vpsraq */, X86::VPSRAQZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20353 { 14760 /* vpsraq */, X86::VPSRAQZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20356 { 14760 /* vpsraq */, X86::VPSRAQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20356 { 14760 /* vpsraq */, X86::VPSRAQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20359 { 14760 /* vpsraq */, X86::VPSRAQZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20364 { 14767 /* vpsravd */, X86::VPSRAVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20364 { 14767 /* vpsravd */, X86::VPSRAVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20364 { 14767 /* vpsravd */, X86::VPSRAVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20369 { 14767 /* vpsravd */, X86::VPSRAVDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20369 { 14767 /* vpsravd */, X86::VPSRAVDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20370 { 14767 /* vpsravd */, X86::VPSRAVDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
20370 { 14767 /* vpsravd */, X86::VPSRAVDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
20375 { 14767 /* vpsravd */, X86::VPSRAVDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20375 { 14767 /* vpsravd */, X86::VPSRAVDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20375 { 14767 /* vpsravd */, X86::VPSRAVDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20378 { 14767 /* vpsravd */, X86::VPSRAVDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20378 { 14767 /* vpsravd */, X86::VPSRAVDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20381 { 14767 /* vpsravd */, X86::VPSRAVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20381 { 14767 /* vpsravd */, X86::VPSRAVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20381 { 14767 /* vpsravd */, X86::VPSRAVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20384 { 14767 /* vpsravd */, X86::VPSRAVDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20384 { 14767 /* vpsravd */, X86::VPSRAVDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20387 { 14767 /* vpsravd */, X86::VPSRAVDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20387 { 14767 /* vpsravd */, X86::VPSRAVDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20388 { 14767 /* vpsravd */, X86::VPSRAVDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20388 { 14767 /* vpsravd */, X86::VPSRAVDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20393 { 14775 /* vpsravq */, X86::VPSRAVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20393 { 14775 /* vpsravq */, X86::VPSRAVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20393 { 14775 /* vpsravq */, X86::VPSRAVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20396 { 14775 /* vpsravq */, X86::VPSRAVQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20396 { 14775 /* vpsravq */, X86::VPSRAVQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20399 { 14775 /* vpsravq */, X86::VPSRAVQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
20399 { 14775 /* vpsravq */, X86::VPSRAVQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
20402 { 14775 /* vpsravq */, X86::VPSRAVQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20402 { 14775 /* vpsravq */, X86::VPSRAVQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20402 { 14775 /* vpsravq */, X86::VPSRAVQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20405 { 14775 /* vpsravq */, X86::VPSRAVQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20405 { 14775 /* vpsravq */, X86::VPSRAVQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20408 { 14775 /* vpsravq */, X86::VPSRAVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20408 { 14775 /* vpsravq */, X86::VPSRAVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20408 { 14775 /* vpsravq */, X86::VPSRAVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20411 { 14775 /* vpsravq */, X86::VPSRAVQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20411 { 14775 /* vpsravq */, X86::VPSRAVQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20414 { 14775 /* vpsravq */, X86::VPSRAVQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20414 { 14775 /* vpsravq */, X86::VPSRAVQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20417 { 14775 /* vpsravq */, X86::VPSRAVQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20417 { 14775 /* vpsravq */, X86::VPSRAVQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20420 { 14783 /* vpsravw */, X86::VPSRAVWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20420 { 14783 /* vpsravw */, X86::VPSRAVWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20420 { 14783 /* vpsravw */, X86::VPSRAVWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20423 { 14783 /* vpsravw */, X86::VPSRAVWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20423 { 14783 /* vpsravw */, X86::VPSRAVWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20426 { 14783 /* vpsravw */, X86::VPSRAVWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20426 { 14783 /* vpsravw */, X86::VPSRAVWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20426 { 14783 /* vpsravw */, X86::VPSRAVWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20429 { 14783 /* vpsravw */, X86::VPSRAVWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20429 { 14783 /* vpsravw */, X86::VPSRAVWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20432 { 14783 /* vpsravw */, X86::VPSRAVWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20432 { 14783 /* vpsravw */, X86::VPSRAVWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20432 { 14783 /* vpsravw */, X86::VPSRAVWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20435 { 14783 /* vpsravw */, X86::VPSRAVWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20435 { 14783 /* vpsravw */, X86::VPSRAVWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20440 { 14791 /* vpsraw */, X86::VPSRAWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
20440 { 14791 /* vpsraw */, X86::VPSRAWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
20445 { 14791 /* vpsraw */, X86::VPSRAWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20445 { 14791 /* vpsraw */, X86::VPSRAWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20448 { 14791 /* vpsraw */, X86::VPSRAWZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
20453 { 14791 /* vpsraw */, X86::VPSRAWZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
20453 { 14791 /* vpsraw */, X86::VPSRAWZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
20456 { 14791 /* vpsraw */, X86::VPSRAWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20456 { 14791 /* vpsraw */, X86::VPSRAWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20459 { 14791 /* vpsraw */, X86::VPSRAWZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20459 { 14791 /* vpsraw */, X86::VPSRAWZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20462 { 14791 /* vpsraw */, X86::VPSRAWZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20465 { 14791 /* vpsraw */, X86::VPSRAWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20465 { 14791 /* vpsraw */, X86::VPSRAWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20468 { 14791 /* vpsraw */, X86::VPSRAWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20468 { 14791 /* vpsraw */, X86::VPSRAWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20471 { 14791 /* vpsraw */, X86::VPSRAWZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20471 { 14791 /* vpsraw */, X86::VPSRAWZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20474 { 14791 /* vpsraw */, X86::VPSRAWZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20477 { 14791 /* vpsraw */, X86::VPSRAWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20477 { 14791 /* vpsraw */, X86::VPSRAWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20482 { 14798 /* vpsrld */, X86::VPSRLDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
20482 { 14798 /* vpsrld */, X86::VPSRLDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
20487 { 14798 /* vpsrld */, X86::VPSRLDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20487 { 14798 /* vpsrld */, X86::VPSRLDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20490 { 14798 /* vpsrld */, X86::VPSRLDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
20495 { 14798 /* vpsrld */, X86::VPSRLDZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
20495 { 14798 /* vpsrld */, X86::VPSRLDZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
20496 { 14798 /* vpsrld */, X86::VPSRLDZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
20501 { 14798 /* vpsrld */, X86::VPSRLDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20501 { 14798 /* vpsrld */, X86::VPSRLDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20504 { 14798 /* vpsrld */, X86::VPSRLDZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20504 { 14798 /* vpsrld */, X86::VPSRLDZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20507 { 14798 /* vpsrld */, X86::VPSRLDZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20510 { 14798 /* vpsrld */, X86::VPSRLDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20510 { 14798 /* vpsrld */, X86::VPSRLDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20513 { 14798 /* vpsrld */, X86::VPSRLDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20513 { 14798 /* vpsrld */, X86::VPSRLDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20516 { 14798 /* vpsrld */, X86::VPSRLDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20516 { 14798 /* vpsrld */, X86::VPSRLDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20519 { 14798 /* vpsrld */, X86::VPSRLDZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20522 { 14798 /* vpsrld */, X86::VPSRLDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20525 { 14798 /* vpsrld */, X86::VPSRLDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20525 { 14798 /* vpsrld */, X86::VPSRLDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20526 { 14798 /* vpsrld */, X86::VPSRLDZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20533 { 14805 /* vpsrldq */, X86::VPSRLDQZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20533 { 14805 /* vpsrldq */, X86::VPSRLDQZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20536 { 14805 /* vpsrldq */, X86::VPSRLDQZrm, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
20541 { 14813 /* vpsrlq */, X86::VPSRLQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
20541 { 14813 /* vpsrlq */, X86::VPSRLQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
20546 { 14813 /* vpsrlq */, X86::VPSRLQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20546 { 14813 /* vpsrlq */, X86::VPSRLQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20549 { 14813 /* vpsrlq */, X86::VPSRLQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
20554 { 14813 /* vpsrlq */, X86::VPSRLQZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
20554 { 14813 /* vpsrlq */, X86::VPSRLQZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
20557 { 14813 /* vpsrlq */, X86::VPSRLQZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
20560 { 14813 /* vpsrlq */, X86::VPSRLQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20560 { 14813 /* vpsrlq */, X86::VPSRLQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20563 { 14813 /* vpsrlq */, X86::VPSRLQZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20563 { 14813 /* vpsrlq */, X86::VPSRLQZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20566 { 14813 /* vpsrlq */, X86::VPSRLQZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20569 { 14813 /* vpsrlq */, X86::VPSRLQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20569 { 14813 /* vpsrlq */, X86::VPSRLQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20572 { 14813 /* vpsrlq */, X86::VPSRLQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20572 { 14813 /* vpsrlq */, X86::VPSRLQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20575 { 14813 /* vpsrlq */, X86::VPSRLQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20575 { 14813 /* vpsrlq */, X86::VPSRLQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20578 { 14813 /* vpsrlq */, X86::VPSRLQZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20581 { 14813 /* vpsrlq */, X86::VPSRLQZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20584 { 14813 /* vpsrlq */, X86::VPSRLQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20584 { 14813 /* vpsrlq */, X86::VPSRLQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20587 { 14813 /* vpsrlq */, X86::VPSRLQZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20592 { 14820 /* vpsrlvd */, X86::VPSRLVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20592 { 14820 /* vpsrlvd */, X86::VPSRLVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20592 { 14820 /* vpsrlvd */, X86::VPSRLVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20597 { 14820 /* vpsrlvd */, X86::VPSRLVDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20597 { 14820 /* vpsrlvd */, X86::VPSRLVDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20598 { 14820 /* vpsrlvd */, X86::VPSRLVDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
20598 { 14820 /* vpsrlvd */, X86::VPSRLVDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
20603 { 14820 /* vpsrlvd */, X86::VPSRLVDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20603 { 14820 /* vpsrlvd */, X86::VPSRLVDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20603 { 14820 /* vpsrlvd */, X86::VPSRLVDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20606 { 14820 /* vpsrlvd */, X86::VPSRLVDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20606 { 14820 /* vpsrlvd */, X86::VPSRLVDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20609 { 14820 /* vpsrlvd */, X86::VPSRLVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20609 { 14820 /* vpsrlvd */, X86::VPSRLVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20609 { 14820 /* vpsrlvd */, X86::VPSRLVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20612 { 14820 /* vpsrlvd */, X86::VPSRLVDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20612 { 14820 /* vpsrlvd */, X86::VPSRLVDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20615 { 14820 /* vpsrlvd */, X86::VPSRLVDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20615 { 14820 /* vpsrlvd */, X86::VPSRLVDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20616 { 14820 /* vpsrlvd */, X86::VPSRLVDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20616 { 14820 /* vpsrlvd */, X86::VPSRLVDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20623 { 14828 /* vpsrlvq */, X86::VPSRLVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20623 { 14828 /* vpsrlvq */, X86::VPSRLVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20623 { 14828 /* vpsrlvq */, X86::VPSRLVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20628 { 14828 /* vpsrlvq */, X86::VPSRLVQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20628 { 14828 /* vpsrlvq */, X86::VPSRLVQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20631 { 14828 /* vpsrlvq */, X86::VPSRLVQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
20631 { 14828 /* vpsrlvq */, X86::VPSRLVQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
20634 { 14828 /* vpsrlvq */, X86::VPSRLVQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20634 { 14828 /* vpsrlvq */, X86::VPSRLVQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20634 { 14828 /* vpsrlvq */, X86::VPSRLVQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20637 { 14828 /* vpsrlvq */, X86::VPSRLVQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20637 { 14828 /* vpsrlvq */, X86::VPSRLVQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20640 { 14828 /* vpsrlvq */, X86::VPSRLVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20640 { 14828 /* vpsrlvq */, X86::VPSRLVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20640 { 14828 /* vpsrlvq */, X86::VPSRLVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20643 { 14828 /* vpsrlvq */, X86::VPSRLVQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20643 { 14828 /* vpsrlvq */, X86::VPSRLVQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20646 { 14828 /* vpsrlvq */, X86::VPSRLVQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20646 { 14828 /* vpsrlvq */, X86::VPSRLVQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20649 { 14828 /* vpsrlvq */, X86::VPSRLVQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20649 { 14828 /* vpsrlvq */, X86::VPSRLVQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20652 { 14836 /* vpsrlvw */, X86::VPSRLVWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20652 { 14836 /* vpsrlvw */, X86::VPSRLVWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20652 { 14836 /* vpsrlvw */, X86::VPSRLVWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20655 { 14836 /* vpsrlvw */, X86::VPSRLVWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20655 { 14836 /* vpsrlvw */, X86::VPSRLVWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20658 { 14836 /* vpsrlvw */, X86::VPSRLVWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20658 { 14836 /* vpsrlvw */, X86::VPSRLVWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20658 { 14836 /* vpsrlvw */, X86::VPSRLVWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20661 { 14836 /* vpsrlvw */, X86::VPSRLVWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20661 { 14836 /* vpsrlvw */, X86::VPSRLVWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20664 { 14836 /* vpsrlvw */, X86::VPSRLVWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20664 { 14836 /* vpsrlvw */, X86::VPSRLVWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20664 { 14836 /* vpsrlvw */, X86::VPSRLVWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20667 { 14836 /* vpsrlvw */, X86::VPSRLVWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20667 { 14836 /* vpsrlvw */, X86::VPSRLVWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20672 { 14844 /* vpsrlw */, X86::VPSRLWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
20672 { 14844 /* vpsrlw */, X86::VPSRLWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
20677 { 14844 /* vpsrlw */, X86::VPSRLWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20677 { 14844 /* vpsrlw */, X86::VPSRLWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20680 { 14844 /* vpsrlw */, X86::VPSRLWZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
20685 { 14844 /* vpsrlw */, X86::VPSRLWZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
20685 { 14844 /* vpsrlw */, X86::VPSRLWZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
20688 { 14844 /* vpsrlw */, X86::VPSRLWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20688 { 14844 /* vpsrlw */, X86::VPSRLWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20691 { 14844 /* vpsrlw */, X86::VPSRLWZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20691 { 14844 /* vpsrlw */, X86::VPSRLWZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20694 { 14844 /* vpsrlw */, X86::VPSRLWZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20697 { 14844 /* vpsrlw */, X86::VPSRLWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20697 { 14844 /* vpsrlw */, X86::VPSRLWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20700 { 14844 /* vpsrlw */, X86::VPSRLWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20700 { 14844 /* vpsrlw */, X86::VPSRLWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20703 { 14844 /* vpsrlw */, X86::VPSRLWZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20703 { 14844 /* vpsrlw */, X86::VPSRLWZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20706 { 14844 /* vpsrlw */, X86::VPSRLWZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20709 { 14844 /* vpsrlw */, X86::VPSRLWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20709 { 14844 /* vpsrlw */, X86::VPSRLWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20714 { 14851 /* vpsubb */, X86::VPSUBBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20714 { 14851 /* vpsubb */, X86::VPSUBBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20714 { 14851 /* vpsubb */, X86::VPSUBBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20719 { 14851 /* vpsubb */, X86::VPSUBBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20719 { 14851 /* vpsubb */, X86::VPSUBBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20722 { 14851 /* vpsubb */, X86::VPSUBBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20722 { 14851 /* vpsubb */, X86::VPSUBBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20722 { 14851 /* vpsubb */, X86::VPSUBBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20725 { 14851 /* vpsubb */, X86::VPSUBBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20725 { 14851 /* vpsubb */, X86::VPSUBBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20728 { 14851 /* vpsubb */, X86::VPSUBBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20728 { 14851 /* vpsubb */, X86::VPSUBBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20728 { 14851 /* vpsubb */, X86::VPSUBBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20731 { 14851 /* vpsubb */, X86::VPSUBBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20731 { 14851 /* vpsubb */, X86::VPSUBBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20736 { 14858 /* vpsubd */, X86::VPSUBDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20736 { 14858 /* vpsubd */, X86::VPSUBDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20736 { 14858 /* vpsubd */, X86::VPSUBDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20741 { 14858 /* vpsubd */, X86::VPSUBDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20741 { 14858 /* vpsubd */, X86::VPSUBDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20742 { 14858 /* vpsubd */, X86::VPSUBDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
20742 { 14858 /* vpsubd */, X86::VPSUBDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
20747 { 14858 /* vpsubd */, X86::VPSUBDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20747 { 14858 /* vpsubd */, X86::VPSUBDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20747 { 14858 /* vpsubd */, X86::VPSUBDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20750 { 14858 /* vpsubd */, X86::VPSUBDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20750 { 14858 /* vpsubd */, X86::VPSUBDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20753 { 14858 /* vpsubd */, X86::VPSUBDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20753 { 14858 /* vpsubd */, X86::VPSUBDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20753 { 14858 /* vpsubd */, X86::VPSUBDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20756 { 14858 /* vpsubd */, X86::VPSUBDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20756 { 14858 /* vpsubd */, X86::VPSUBDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20759 { 14858 /* vpsubd */, X86::VPSUBDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20759 { 14858 /* vpsubd */, X86::VPSUBDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20760 { 14858 /* vpsubd */, X86::VPSUBDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20760 { 14858 /* vpsubd */, X86::VPSUBDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20767 { 14865 /* vpsubq */, X86::VPSUBQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20767 { 14865 /* vpsubq */, X86::VPSUBQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20767 { 14865 /* vpsubq */, X86::VPSUBQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20772 { 14865 /* vpsubq */, X86::VPSUBQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20772 { 14865 /* vpsubq */, X86::VPSUBQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20775 { 14865 /* vpsubq */, X86::VPSUBQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
20775 { 14865 /* vpsubq */, X86::VPSUBQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
20778 { 14865 /* vpsubq */, X86::VPSUBQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20778 { 14865 /* vpsubq */, X86::VPSUBQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20778 { 14865 /* vpsubq */, X86::VPSUBQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20781 { 14865 /* vpsubq */, X86::VPSUBQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20781 { 14865 /* vpsubq */, X86::VPSUBQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20784 { 14865 /* vpsubq */, X86::VPSUBQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20784 { 14865 /* vpsubq */, X86::VPSUBQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20784 { 14865 /* vpsubq */, X86::VPSUBQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20787 { 14865 /* vpsubq */, X86::VPSUBQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20787 { 14865 /* vpsubq */, X86::VPSUBQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20790 { 14865 /* vpsubq */, X86::VPSUBQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20790 { 14865 /* vpsubq */, X86::VPSUBQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20793 { 14865 /* vpsubq */, X86::VPSUBQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20793 { 14865 /* vpsubq */, X86::VPSUBQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20798 { 14872 /* vpsubsb */, X86::VPSUBSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20798 { 14872 /* vpsubsb */, X86::VPSUBSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20798 { 14872 /* vpsubsb */, X86::VPSUBSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20803 { 14872 /* vpsubsb */, X86::VPSUBSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20803 { 14872 /* vpsubsb */, X86::VPSUBSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20806 { 14872 /* vpsubsb */, X86::VPSUBSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20806 { 14872 /* vpsubsb */, X86::VPSUBSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20806 { 14872 /* vpsubsb */, X86::VPSUBSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20809 { 14872 /* vpsubsb */, X86::VPSUBSBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20809 { 14872 /* vpsubsb */, X86::VPSUBSBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20812 { 14872 /* vpsubsb */, X86::VPSUBSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20812 { 14872 /* vpsubsb */, X86::VPSUBSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20812 { 14872 /* vpsubsb */, X86::VPSUBSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20815 { 14872 /* vpsubsb */, X86::VPSUBSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20815 { 14872 /* vpsubsb */, X86::VPSUBSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20820 { 14880 /* vpsubsw */, X86::VPSUBSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20820 { 14880 /* vpsubsw */, X86::VPSUBSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20820 { 14880 /* vpsubsw */, X86::VPSUBSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20825 { 14880 /* vpsubsw */, X86::VPSUBSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20825 { 14880 /* vpsubsw */, X86::VPSUBSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20828 { 14880 /* vpsubsw */, X86::VPSUBSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20828 { 14880 /* vpsubsw */, X86::VPSUBSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20828 { 14880 /* vpsubsw */, X86::VPSUBSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20831 { 14880 /* vpsubsw */, X86::VPSUBSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20831 { 14880 /* vpsubsw */, X86::VPSUBSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20834 { 14880 /* vpsubsw */, X86::VPSUBSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20834 { 14880 /* vpsubsw */, X86::VPSUBSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20834 { 14880 /* vpsubsw */, X86::VPSUBSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20837 { 14880 /* vpsubsw */, X86::VPSUBSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20837 { 14880 /* vpsubsw */, X86::VPSUBSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20842 { 14888 /* vpsubusb */, X86::VPSUBUSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20842 { 14888 /* vpsubusb */, X86::VPSUBUSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20842 { 14888 /* vpsubusb */, X86::VPSUBUSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20847 { 14888 /* vpsubusb */, X86::VPSUBUSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20847 { 14888 /* vpsubusb */, X86::VPSUBUSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20850 { 14888 /* vpsubusb */, X86::VPSUBUSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20850 { 14888 /* vpsubusb */, X86::VPSUBUSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20850 { 14888 /* vpsubusb */, X86::VPSUBUSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20853 { 14888 /* vpsubusb */, X86::VPSUBUSBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20853 { 14888 /* vpsubusb */, X86::VPSUBUSBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20856 { 14888 /* vpsubusb */, X86::VPSUBUSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20856 { 14888 /* vpsubusb */, X86::VPSUBUSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20856 { 14888 /* vpsubusb */, X86::VPSUBUSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20859 { 14888 /* vpsubusb */, X86::VPSUBUSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20859 { 14888 /* vpsubusb */, X86::VPSUBUSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20864 { 14897 /* vpsubusw */, X86::VPSUBUSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20864 { 14897 /* vpsubusw */, X86::VPSUBUSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20864 { 14897 /* vpsubusw */, X86::VPSUBUSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20869 { 14897 /* vpsubusw */, X86::VPSUBUSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20869 { 14897 /* vpsubusw */, X86::VPSUBUSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20872 { 14897 /* vpsubusw */, X86::VPSUBUSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20872 { 14897 /* vpsubusw */, X86::VPSUBUSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20872 { 14897 /* vpsubusw */, X86::VPSUBUSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20875 { 14897 /* vpsubusw */, X86::VPSUBUSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20875 { 14897 /* vpsubusw */, X86::VPSUBUSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20878 { 14897 /* vpsubusw */, X86::VPSUBUSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20878 { 14897 /* vpsubusw */, X86::VPSUBUSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20878 { 14897 /* vpsubusw */, X86::VPSUBUSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20881 { 14897 /* vpsubusw */, X86::VPSUBUSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20881 { 14897 /* vpsubusw */, X86::VPSUBUSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20886 { 14906 /* vpsubw */, X86::VPSUBWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20886 { 14906 /* vpsubw */, X86::VPSUBWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20886 { 14906 /* vpsubw */, X86::VPSUBWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20891 { 14906 /* vpsubw */, X86::VPSUBWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20891 { 14906 /* vpsubw */, X86::VPSUBWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20894 { 14906 /* vpsubw */, X86::VPSUBWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20894 { 14906 /* vpsubw */, X86::VPSUBWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20894 { 14906 /* vpsubw */, X86::VPSUBWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20897 { 14906 /* vpsubw */, X86::VPSUBWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20897 { 14906 /* vpsubw */, X86::VPSUBWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20900 { 14906 /* vpsubw */, X86::VPSUBWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20900 { 14906 /* vpsubw */, X86::VPSUBWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20900 { 14906 /* vpsubw */, X86::VPSUBWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20903 { 14906 /* vpsubw */, X86::VPSUBWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20903 { 14906 /* vpsubw */, X86::VPSUBWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20906 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
20906 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
20906 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
20909 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20909 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20910 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
20910 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
20915 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20915 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20915 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20918 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20918 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20921 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20921 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20921 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20924 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20924 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20927 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20927 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20928 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20928 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20933 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
20933 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
20933 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
20936 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20936 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20939 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
20939 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
20942 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20942 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20942 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20945 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20945 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20948 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20948 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20948 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20951 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20951 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20954 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20954 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20957 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20957 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20964 { 14942 /* vptestmb */, X86::VPTESTMBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
20964 { 14942 /* vptestmb */, X86::VPTESTMBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
20967 { 14942 /* vptestmb */, X86::VPTESTMBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
20970 { 14942 /* vptestmb */, X86::VPTESTMBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20970 { 14942 /* vptestmb */, X86::VPTESTMBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20973 { 14942 /* vptestmb */, X86::VPTESTMBZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20976 { 14951 /* vptestmd */, X86::VPTESTMDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
20976 { 14951 /* vptestmd */, X86::VPTESTMDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
20979 { 14951 /* vptestmd */, X86::VPTESTMDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
20980 { 14951 /* vptestmd */, X86::VPTESTMDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
20985 { 14951 /* vptestmd */, X86::VPTESTMDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20985 { 14951 /* vptestmd */, X86::VPTESTMDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20988 { 14951 /* vptestmd */, X86::VPTESTMDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20989 { 14951 /* vptestmd */, X86::VPTESTMDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20994 { 14960 /* vptestmq */, X86::VPTESTMQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
20994 { 14960 /* vptestmq */, X86::VPTESTMQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
20997 { 14960 /* vptestmq */, X86::VPTESTMQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
21000 { 14960 /* vptestmq */, X86::VPTESTMQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
21003 { 14960 /* vptestmq */, X86::VPTESTMQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21003 { 14960 /* vptestmq */, X86::VPTESTMQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21006 { 14960 /* vptestmq */, X86::VPTESTMQZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21009 { 14960 /* vptestmq */, X86::VPTESTMQZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21012 { 14969 /* vptestmw */, X86::VPTESTMWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
21012 { 14969 /* vptestmw */, X86::VPTESTMWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
21015 { 14969 /* vptestmw */, X86::VPTESTMWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
21018 { 14969 /* vptestmw */, X86::VPTESTMWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21018 { 14969 /* vptestmw */, X86::VPTESTMWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21021 { 14969 /* vptestmw */, X86::VPTESTMWZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21024 { 14978 /* vptestnmb */, X86::VPTESTNMBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
21024 { 14978 /* vptestnmb */, X86::VPTESTNMBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
21027 { 14978 /* vptestnmb */, X86::VPTESTNMBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
21030 { 14978 /* vptestnmb */, X86::VPTESTNMBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21030 { 14978 /* vptestnmb */, X86::VPTESTNMBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21033 { 14978 /* vptestnmb */, X86::VPTESTNMBZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21036 { 14988 /* vptestnmd */, X86::VPTESTNMDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
21036 { 14988 /* vptestnmd */, X86::VPTESTNMDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
21039 { 14988 /* vptestnmd */, X86::VPTESTNMDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
21040 { 14988 /* vptestnmd */, X86::VPTESTNMDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
21045 { 14988 /* vptestnmd */, X86::VPTESTNMDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21045 { 14988 /* vptestnmd */, X86::VPTESTNMDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21048 { 14988 /* vptestnmd */, X86::VPTESTNMDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21049 { 14988 /* vptestnmd */, X86::VPTESTNMDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21054 { 14998 /* vptestnmq */, X86::VPTESTNMQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
21054 { 14998 /* vptestnmq */, X86::VPTESTNMQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
21057 { 14998 /* vptestnmq */, X86::VPTESTNMQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
21060 { 14998 /* vptestnmq */, X86::VPTESTNMQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
21063 { 14998 /* vptestnmq */, X86::VPTESTNMQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21063 { 14998 /* vptestnmq */, X86::VPTESTNMQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21066 { 14998 /* vptestnmq */, X86::VPTESTNMQZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21069 { 14998 /* vptestnmq */, X86::VPTESTNMQZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21072 { 15008 /* vptestnmw */, X86::VPTESTNMWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
21072 { 15008 /* vptestnmw */, X86::VPTESTNMWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
21075 { 15008 /* vptestnmw */, X86::VPTESTNMWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
21078 { 15008 /* vptestnmw */, X86::VPTESTNMWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21078 { 15008 /* vptestnmw */, X86::VPTESTNMWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21081 { 15008 /* vptestnmw */, X86::VPTESTNMWZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21086 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21086 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21086 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21091 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21091 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21094 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21094 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21094 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21097 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21097 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21100 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21100 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21100 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21103 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21103 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21108 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21108 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21108 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21113 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21113 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21114 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
21114 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
21119 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21119 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21119 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21122 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21122 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21125 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21125 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21125 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21128 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21128 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21131 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21131 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21132 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21132 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21139 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21139 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21139 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21144 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21144 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21147 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
21147 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
21150 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21150 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21150 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21153 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21153 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21156 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21156 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21156 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21159 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21159 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21162 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21162 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21165 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21165 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21170 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21170 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21170 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21175 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21175 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21178 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21178 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21178 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21181 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21181 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21184 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21184 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21184 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21187 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21187 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21192 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21192 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21192 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21197 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21197 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21200 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21200 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21200 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21203 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21203 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21206 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21206 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21206 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21209 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21209 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21214 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21214 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21214 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21219 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21219 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21220 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
21220 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
21225 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21225 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21225 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21228 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21228 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21231 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21231 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21231 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21234 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21234 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21237 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21237 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21238 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21238 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21245 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21245 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21245 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21250 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21250 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21253 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
21253 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
21256 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21256 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21256 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21259 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21259 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21262 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21262 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21262 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21265 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21265 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21268 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21268 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21271 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21271 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21276 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21276 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21276 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21281 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21281 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21284 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21284 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21284 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21287 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21287 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21290 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21290 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21290 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21293 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21293 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21300 { 15114 /* vpxord */, X86::VPXORDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21300 { 15114 /* vpxord */, X86::VPXORDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21300 { 15114 /* vpxord */, X86::VPXORDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21303 { 15114 /* vpxord */, X86::VPXORDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21303 { 15114 /* vpxord */, X86::VPXORDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21304 { 15114 /* vpxord */, X86::VPXORDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
21304 { 15114 /* vpxord */, X86::VPXORDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
21309 { 15114 /* vpxord */, X86::VPXORDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21309 { 15114 /* vpxord */, X86::VPXORDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21309 { 15114 /* vpxord */, X86::VPXORDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21312 { 15114 /* vpxord */, X86::VPXORDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21312 { 15114 /* vpxord */, X86::VPXORDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21315 { 15114 /* vpxord */, X86::VPXORDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21315 { 15114 /* vpxord */, X86::VPXORDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21315 { 15114 /* vpxord */, X86::VPXORDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21318 { 15114 /* vpxord */, X86::VPXORDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21318 { 15114 /* vpxord */, X86::VPXORDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21321 { 15114 /* vpxord */, X86::VPXORDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21321 { 15114 /* vpxord */, X86::VPXORDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21322 { 15114 /* vpxord */, X86::VPXORDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21322 { 15114 /* vpxord */, X86::VPXORDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21327 { 15121 /* vpxorq */, X86::VPXORQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21327 { 15121 /* vpxorq */, X86::VPXORQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21327 { 15121 /* vpxorq */, X86::VPXORQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21330 { 15121 /* vpxorq */, X86::VPXORQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21330 { 15121 /* vpxorq */, X86::VPXORQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21333 { 15121 /* vpxorq */, X86::VPXORQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
21333 { 15121 /* vpxorq */, X86::VPXORQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
21336 { 15121 /* vpxorq */, X86::VPXORQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21336 { 15121 /* vpxorq */, X86::VPXORQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21336 { 15121 /* vpxorq */, X86::VPXORQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21339 { 15121 /* vpxorq */, X86::VPXORQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21339 { 15121 /* vpxorq */, X86::VPXORQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21342 { 15121 /* vpxorq */, X86::VPXORQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21342 { 15121 /* vpxorq */, X86::VPXORQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21342 { 15121 /* vpxorq */, X86::VPXORQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21345 { 15121 /* vpxorq */, X86::VPXORQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21345 { 15121 /* vpxorq */, X86::VPXORQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21348 { 15121 /* vpxorq */, X86::VPXORQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21348 { 15121 /* vpxorq */, X86::VPXORQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21351 { 15121 /* vpxorq */, X86::VPXORQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21351 { 15121 /* vpxorq */, X86::VPXORQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21354 { 15128 /* vrangepd */, X86::VRANGEPDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21354 { 15128 /* vrangepd */, X86::VRANGEPDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21354 { 15128 /* vrangepd */, X86::VRANGEPDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21357 { 15128 /* vrangepd */, X86::VRANGEPDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21357 { 15128 /* vrangepd */, X86::VRANGEPDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21358 { 15128 /* vrangepd */, X86::VRANGEPDZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21358 { 15128 /* vrangepd */, X86::VRANGEPDZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21358 { 15128 /* vrangepd */, X86::VRANGEPDZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21361 { 15128 /* vrangepd */, X86::VRANGEPDZrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
21361 { 15128 /* vrangepd */, X86::VRANGEPDZrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
21364 { 15128 /* vrangepd */, X86::VRANGEPDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21364 { 15128 /* vrangepd */, X86::VRANGEPDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21364 { 15128 /* vrangepd */, X86::VRANGEPDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21367 { 15128 /* vrangepd */, X86::VRANGEPDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21367 { 15128 /* vrangepd */, X86::VRANGEPDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21368 { 15128 /* vrangepd */, X86::VRANGEPDZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21368 { 15128 /* vrangepd */, X86::VRANGEPDZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21368 { 15128 /* vrangepd */, X86::VRANGEPDZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21371 { 15128 /* vrangepd */, X86::VRANGEPDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21371 { 15128 /* vrangepd */, X86::VRANGEPDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21371 { 15128 /* vrangepd */, X86::VRANGEPDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21374 { 15128 /* vrangepd */, X86::VRANGEPDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21374 { 15128 /* vrangepd */, X86::VRANGEPDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21377 { 15128 /* vrangepd */, X86::VRANGEPDZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21377 { 15128 /* vrangepd */, X86::VRANGEPDZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21378 { 15128 /* vrangepd */, X86::VRANGEPDZrribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21378 { 15128 /* vrangepd */, X86::VRANGEPDZrribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21378 { 15128 /* vrangepd */, X86::VRANGEPDZrribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21381 { 15128 /* vrangepd */, X86::VRANGEPDZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21381 { 15128 /* vrangepd */, X86::VRANGEPDZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21384 { 15137 /* vrangeps */, X86::VRANGEPSZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21384 { 15137 /* vrangeps */, X86::VRANGEPSZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21384 { 15137 /* vrangeps */, X86::VRANGEPSZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21387 { 15137 /* vrangeps */, X86::VRANGEPSZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21387 { 15137 /* vrangeps */, X86::VRANGEPSZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21388 { 15137 /* vrangeps */, X86::VRANGEPSZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21388 { 15137 /* vrangeps */, X86::VRANGEPSZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21388 { 15137 /* vrangeps */, X86::VRANGEPSZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21389 { 15137 /* vrangeps */, X86::VRANGEPSZrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
21389 { 15137 /* vrangeps */, X86::VRANGEPSZrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
21394 { 15137 /* vrangeps */, X86::VRANGEPSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21394 { 15137 /* vrangeps */, X86::VRANGEPSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21394 { 15137 /* vrangeps */, X86::VRANGEPSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21397 { 15137 /* vrangeps */, X86::VRANGEPSZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21397 { 15137 /* vrangeps */, X86::VRANGEPSZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21398 { 15137 /* vrangeps */, X86::VRANGEPSZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21398 { 15137 /* vrangeps */, X86::VRANGEPSZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21398 { 15137 /* vrangeps */, X86::VRANGEPSZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21401 { 15137 /* vrangeps */, X86::VRANGEPSZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21401 { 15137 /* vrangeps */, X86::VRANGEPSZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21401 { 15137 /* vrangeps */, X86::VRANGEPSZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21404 { 15137 /* vrangeps */, X86::VRANGEPSZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21404 { 15137 /* vrangeps */, X86::VRANGEPSZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21407 { 15137 /* vrangeps */, X86::VRANGEPSZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21407 { 15137 /* vrangeps */, X86::VRANGEPSZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21408 { 15137 /* vrangeps */, X86::VRANGEPSZrribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21408 { 15137 /* vrangeps */, X86::VRANGEPSZrribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21408 { 15137 /* vrangeps */, X86::VRANGEPSZrribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21409 { 15137 /* vrangeps */, X86::VRANGEPSZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21409 { 15137 /* vrangeps */, X86::VRANGEPSZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21432 { 15164 /* vrcp14pd */, X86::VRCP14PDZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
21432 { 15164 /* vrcp14pd */, X86::VRCP14PDZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
21435 { 15164 /* vrcp14pd */, X86::VRCP14PDZm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
21438 { 15164 /* vrcp14pd */, X86::VRCP14PDZmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
21441 { 15164 /* vrcp14pd */, X86::VRCP14PDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21441 { 15164 /* vrcp14pd */, X86::VRCP14PDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21444 { 15164 /* vrcp14pd */, X86::VRCP14PDZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21447 { 15164 /* vrcp14pd */, X86::VRCP14PDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21447 { 15164 /* vrcp14pd */, X86::VRCP14PDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21450 { 15164 /* vrcp14pd */, X86::VRCP14PDZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21453 { 15164 /* vrcp14pd */, X86::VRCP14PDZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21456 { 15164 /* vrcp14pd */, X86::VRCP14PDZmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21459 { 15173 /* vrcp14ps */, X86::VRCP14PSZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
21459 { 15173 /* vrcp14ps */, X86::VRCP14PSZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
21462 { 15173 /* vrcp14ps */, X86::VRCP14PSZm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
21463 { 15173 /* vrcp14ps */, X86::VRCP14PSZmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
21468 { 15173 /* vrcp14ps */, X86::VRCP14PSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21468 { 15173 /* vrcp14ps */, X86::VRCP14PSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21471 { 15173 /* vrcp14ps */, X86::VRCP14PSZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21474 { 15173 /* vrcp14ps */, X86::VRCP14PSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21474 { 15173 /* vrcp14ps */, X86::VRCP14PSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21477 { 15173 /* vrcp14ps */, X86::VRCP14PSZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21480 { 15173 /* vrcp14ps */, X86::VRCP14PSZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21481 { 15173 /* vrcp14ps */, X86::VRCP14PSZmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21496 { 15200 /* vrcp28pd */, X86::VRCP28PDZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
21496 { 15200 /* vrcp28pd */, X86::VRCP28PDZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
21497 { 15200 /* vrcp28pd */, X86::VRCP28PDZm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
21498 { 15200 /* vrcp28pd */, X86::VRCP28PDZrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
21498 { 15200 /* vrcp28pd */, X86::VRCP28PDZrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
21499 { 15200 /* vrcp28pd */, X86::VRCP28PDZmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
21500 { 15200 /* vrcp28pd */, X86::VRCP28PDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21500 { 15200 /* vrcp28pd */, X86::VRCP28PDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21501 { 15200 /* vrcp28pd */, X86::VRCP28PDZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21502 { 15200 /* vrcp28pd */, X86::VRCP28PDZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21502 { 15200 /* vrcp28pd */, X86::VRCP28PDZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21503 { 15200 /* vrcp28pd */, X86::VRCP28PDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21503 { 15200 /* vrcp28pd */, X86::VRCP28PDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21504 { 15200 /* vrcp28pd */, X86::VRCP28PDZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21505 { 15200 /* vrcp28pd */, X86::VRCP28PDZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21506 { 15200 /* vrcp28pd */, X86::VRCP28PDZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21506 { 15200 /* vrcp28pd */, X86::VRCP28PDZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21507 { 15200 /* vrcp28pd */, X86::VRCP28PDZmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21508 { 15209 /* vrcp28ps */, X86::VRCP28PSZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
21508 { 15209 /* vrcp28ps */, X86::VRCP28PSZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
21509 { 15209 /* vrcp28ps */, X86::VRCP28PSZm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
21510 { 15209 /* vrcp28ps */, X86::VRCP28PSZrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
21510 { 15209 /* vrcp28ps */, X86::VRCP28PSZrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
21511 { 15209 /* vrcp28ps */, X86::VRCP28PSZmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
21512 { 15209 /* vrcp28ps */, X86::VRCP28PSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21512 { 15209 /* vrcp28ps */, X86::VRCP28PSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21513 { 15209 /* vrcp28ps */, X86::VRCP28PSZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21514 { 15209 /* vrcp28ps */, X86::VRCP28PSZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21514 { 15209 /* vrcp28ps */, X86::VRCP28PSZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21515 { 15209 /* vrcp28ps */, X86::VRCP28PSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21515 { 15209 /* vrcp28ps */, X86::VRCP28PSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21516 { 15209 /* vrcp28ps */, X86::VRCP28PSZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21517 { 15209 /* vrcp28ps */, X86::VRCP28PSZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21518 { 15209 /* vrcp28ps */, X86::VRCP28PSZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21518 { 15209 /* vrcp28ps */, X86::VRCP28PSZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21519 { 15209 /* vrcp28ps */, X86::VRCP28PSZmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21546 { 15250 /* vreducepd */, X86::VREDUCEPDZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
21546 { 15250 /* vreducepd */, X86::VREDUCEPDZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
21549 { 15250 /* vreducepd */, X86::VREDUCEPDZrmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
21550 { 15250 /* vreducepd */, X86::VREDUCEPDZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
21550 { 15250 /* vreducepd */, X86::VREDUCEPDZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
21553 { 15250 /* vreducepd */, X86::VREDUCEPDZrmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
21556 { 15250 /* vreducepd */, X86::VREDUCEPDZrrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21556 { 15250 /* vreducepd */, X86::VREDUCEPDZrrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21559 { 15250 /* vreducepd */, X86::VREDUCEPDZrmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21560 { 15250 /* vreducepd */, X86::VREDUCEPDZrribk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21560 { 15250 /* vreducepd */, X86::VREDUCEPDZrribk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21563 { 15250 /* vreducepd */, X86::VREDUCEPDZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21563 { 15250 /* vreducepd */, X86::VREDUCEPDZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21566 { 15250 /* vreducepd */, X86::VREDUCEPDZrmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21569 { 15250 /* vreducepd */, X86::VREDUCEPDZrmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21570 { 15250 /* vreducepd */, X86::VREDUCEPDZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21570 { 15250 /* vreducepd */, X86::VREDUCEPDZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21573 { 15250 /* vreducepd */, X86::VREDUCEPDZrmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21576 { 15260 /* vreduceps */, X86::VREDUCEPSZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
21576 { 15260 /* vreduceps */, X86::VREDUCEPSZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
21579 { 15260 /* vreduceps */, X86::VREDUCEPSZrmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
21580 { 15260 /* vreduceps */, X86::VREDUCEPSZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
21580 { 15260 /* vreduceps */, X86::VREDUCEPSZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
21581 { 15260 /* vreduceps */, X86::VREDUCEPSZrmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
21586 { 15260 /* vreduceps */, X86::VREDUCEPSZrrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21586 { 15260 /* vreduceps */, X86::VREDUCEPSZrrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21589 { 15260 /* vreduceps */, X86::VREDUCEPSZrmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21590 { 15260 /* vreduceps */, X86::VREDUCEPSZrribk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21590 { 15260 /* vreduceps */, X86::VREDUCEPSZrribk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21593 { 15260 /* vreduceps */, X86::VREDUCEPSZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21593 { 15260 /* vreduceps */, X86::VREDUCEPSZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21596 { 15260 /* vreduceps */, X86::VREDUCEPSZrmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21599 { 15260 /* vreduceps */, X86::VREDUCEPSZrmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21600 { 15260 /* vreduceps */, X86::VREDUCEPSZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21600 { 15260 /* vreduceps */, X86::VREDUCEPSZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21601 { 15260 /* vreduceps */, X86::VREDUCEPSZrmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21624 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
21624 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
21627 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
21628 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
21628 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
21631 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
21634 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21634 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21637 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21638 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrribk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21638 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrribk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21641 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21641 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21644 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21647 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21648 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21648 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21651 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21654 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
21654 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
21657 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
21658 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
21658 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
21659 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
21664 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21664 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21667 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21668 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrribk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21668 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrribk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21671 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21671 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21674 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21677 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21678 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21678 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21679 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21714 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
21714 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
21717 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
21720 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
21723 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21723 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21726 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21729 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21729 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21732 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21735 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21738 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21741 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
21741 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
21744 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
21745 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
21750 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21750 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21753 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21756 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21756 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21759 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21762 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21763 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21778 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
21778 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
21779 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
21780 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
21780 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
21781 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
21782 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21782 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21783 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21784 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21784 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21785 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21785 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21786 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21787 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21788 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21788 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21789 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21790 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
21790 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
21791 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
21792 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
21792 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
21793 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
21794 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21794 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21795 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21796 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21796 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21797 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21797 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21798 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21799 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21800 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21800 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21801 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21828 { 15480 /* vscalefpd */, X86::VSCALEFPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21828 { 15480 /* vscalefpd */, X86::VSCALEFPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21828 { 15480 /* vscalefpd */, X86::VSCALEFPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21831 { 15480 /* vscalefpd */, X86::VSCALEFPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21831 { 15480 /* vscalefpd */, X86::VSCALEFPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21832 { 15480 /* vscalefpd */, X86::VSCALEFPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21832 { 15480 /* vscalefpd */, X86::VSCALEFPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21832 { 15480 /* vscalefpd */, X86::VSCALEFPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21835 { 15480 /* vscalefpd */, X86::VSCALEFPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
21835 { 15480 /* vscalefpd */, X86::VSCALEFPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
21838 { 15480 /* vscalefpd */, X86::VSCALEFPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21838 { 15480 /* vscalefpd */, X86::VSCALEFPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21838 { 15480 /* vscalefpd */, X86::VSCALEFPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21841 { 15480 /* vscalefpd */, X86::VSCALEFPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21841 { 15480 /* vscalefpd */, X86::VSCALEFPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21844 { 15480 /* vscalefpd */, X86::VSCALEFPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21844 { 15480 /* vscalefpd */, X86::VSCALEFPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21844 { 15480 /* vscalefpd */, X86::VSCALEFPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21845 { 15480 /* vscalefpd */, X86::VSCALEFPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21845 { 15480 /* vscalefpd */, X86::VSCALEFPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21845 { 15480 /* vscalefpd */, X86::VSCALEFPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21848 { 15480 /* vscalefpd */, X86::VSCALEFPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21848 { 15480 /* vscalefpd */, X86::VSCALEFPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21851 { 15480 /* vscalefpd */, X86::VSCALEFPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21851 { 15480 /* vscalefpd */, X86::VSCALEFPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21852 { 15480 /* vscalefpd */, X86::VSCALEFPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21852 { 15480 /* vscalefpd */, X86::VSCALEFPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21852 { 15480 /* vscalefpd */, X86::VSCALEFPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21855 { 15480 /* vscalefpd */, X86::VSCALEFPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21855 { 15480 /* vscalefpd */, X86::VSCALEFPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21858 { 15490 /* vscalefps */, X86::VSCALEFPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21858 { 15490 /* vscalefps */, X86::VSCALEFPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21858 { 15490 /* vscalefps */, X86::VSCALEFPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21861 { 15490 /* vscalefps */, X86::VSCALEFPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21861 { 15490 /* vscalefps */, X86::VSCALEFPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21862 { 15490 /* vscalefps */, X86::VSCALEFPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21862 { 15490 /* vscalefps */, X86::VSCALEFPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21862 { 15490 /* vscalefps */, X86::VSCALEFPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21863 { 15490 /* vscalefps */, X86::VSCALEFPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
21863 { 15490 /* vscalefps */, X86::VSCALEFPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
21868 { 15490 /* vscalefps */, X86::VSCALEFPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21868 { 15490 /* vscalefps */, X86::VSCALEFPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21868 { 15490 /* vscalefps */, X86::VSCALEFPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21871 { 15490 /* vscalefps */, X86::VSCALEFPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21871 { 15490 /* vscalefps */, X86::VSCALEFPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21874 { 15490 /* vscalefps */, X86::VSCALEFPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21874 { 15490 /* vscalefps */, X86::VSCALEFPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21874 { 15490 /* vscalefps */, X86::VSCALEFPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21875 { 15490 /* vscalefps */, X86::VSCALEFPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21875 { 15490 /* vscalefps */, X86::VSCALEFPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21875 { 15490 /* vscalefps */, X86::VSCALEFPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21878 { 15490 /* vscalefps */, X86::VSCALEFPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21878 { 15490 /* vscalefps */, X86::VSCALEFPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21881 { 15490 /* vscalefps */, X86::VSCALEFPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21881 { 15490 /* vscalefps */, X86::VSCALEFPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21882 { 15490 /* vscalefps */, X86::VSCALEFPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21882 { 15490 /* vscalefps */, X86::VSCALEFPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21882 { 15490 /* vscalefps */, X86::VSCALEFPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21883 { 15490 /* vscalefps */, X86::VSCALEFPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21883 { 15490 /* vscalefps */, X86::VSCALEFPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21906 { 15520 /* vscatterdpd */, X86::VSCATTERDPDZmr, Convert__Reg1_3__Mem512_RC256X5_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21909 { 15532 /* vscatterdps */, X86::VSCATTERDPSZmr, Convert__Reg1_3__Mem512_RC5125_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21920 { 15664 /* vscatterqpd */, X86::VSCATTERQPDZmr, Convert__Reg1_3__Mem512_RC5125_1__Tie0_4_4__Reg1_0, AMFBS_None, { MCK_VR512, MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21925 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21925 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21925 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21927 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21927 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21928 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
21928 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
21931 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21931 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21931 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21933 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21933 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21935 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21935 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21935 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21937 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21937 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21939 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21939 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21940 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21940 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21943 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21943 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21943 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21945 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21945 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21947 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
21947 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
21949 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21949 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21949 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21951 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21951 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21953 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21953 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21953 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21955 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21955 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21957 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21957 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21959 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21959 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21961 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21961 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21961 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21963 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21963 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21964 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
21964 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
21967 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21967 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21967 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21969 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21969 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21971 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21971 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21971 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21973 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21973 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21975 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21975 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21976 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21976 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21979 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21979 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21979 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21981 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21981 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21983 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
21983 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
21985 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21985 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21985 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21987 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21987 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21989 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21989 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21989 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21991 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21991 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21993 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21993 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21995 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21995 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22000 { 15732 /* vshufpd */, X86::VSHUFPDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
22000 { 15732 /* vshufpd */, X86::VSHUFPDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
22000 { 15732 /* vshufpd */, X86::VSHUFPDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
22005 { 15732 /* vshufpd */, X86::VSHUFPDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
22005 { 15732 /* vshufpd */, X86::VSHUFPDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
22008 { 15732 /* vshufpd */, X86::VSHUFPDZrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
22008 { 15732 /* vshufpd */, X86::VSHUFPDZrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
22011 { 15732 /* vshufpd */, X86::VSHUFPDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22011 { 15732 /* vshufpd */, X86::VSHUFPDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22011 { 15732 /* vshufpd */, X86::VSHUFPDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22014 { 15732 /* vshufpd */, X86::VSHUFPDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22014 { 15732 /* vshufpd */, X86::VSHUFPDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22017 { 15732 /* vshufpd */, X86::VSHUFPDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22017 { 15732 /* vshufpd */, X86::VSHUFPDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22017 { 15732 /* vshufpd */, X86::VSHUFPDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22020 { 15732 /* vshufpd */, X86::VSHUFPDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22020 { 15732 /* vshufpd */, X86::VSHUFPDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22023 { 15732 /* vshufpd */, X86::VSHUFPDZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22023 { 15732 /* vshufpd */, X86::VSHUFPDZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22026 { 15732 /* vshufpd */, X86::VSHUFPDZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22026 { 15732 /* vshufpd */, X86::VSHUFPDZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22031 { 15740 /* vshufps */, X86::VSHUFPSZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
22031 { 15740 /* vshufps */, X86::VSHUFPSZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
22031 { 15740 /* vshufps */, X86::VSHUFPSZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
22036 { 15740 /* vshufps */, X86::VSHUFPSZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
22036 { 15740 /* vshufps */, X86::VSHUFPSZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
22037 { 15740 /* vshufps */, X86::VSHUFPSZrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
22037 { 15740 /* vshufps */, X86::VSHUFPSZrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
22042 { 15740 /* vshufps */, X86::VSHUFPSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22042 { 15740 /* vshufps */, X86::VSHUFPSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22042 { 15740 /* vshufps */, X86::VSHUFPSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22045 { 15740 /* vshufps */, X86::VSHUFPSZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22045 { 15740 /* vshufps */, X86::VSHUFPSZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22048 { 15740 /* vshufps */, X86::VSHUFPSZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22048 { 15740 /* vshufps */, X86::VSHUFPSZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22048 { 15740 /* vshufps */, X86::VSHUFPSZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22051 { 15740 /* vshufps */, X86::VSHUFPSZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22051 { 15740 /* vshufps */, X86::VSHUFPSZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22054 { 15740 /* vshufps */, X86::VSHUFPSZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22054 { 15740 /* vshufps */, X86::VSHUFPSZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22055 { 15740 /* vshufps */, X86::VSHUFPSZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22055 { 15740 /* vshufps */, X86::VSHUFPSZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22062 { 15748 /* vsqrtpd */, X86::VSQRTPDZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
22062 { 15748 /* vsqrtpd */, X86::VSQRTPDZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
22067 { 15748 /* vsqrtpd */, X86::VSQRTPDZm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
22068 { 15748 /* vsqrtpd */, X86::VSQRTPDZrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
22068 { 15748 /* vsqrtpd */, X86::VSQRTPDZrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
22071 { 15748 /* vsqrtpd */, X86::VSQRTPDZmb, Convert__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
22074 { 15748 /* vsqrtpd */, X86::VSQRTPDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22074 { 15748 /* vsqrtpd */, X86::VSQRTPDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22077 { 15748 /* vsqrtpd */, X86::VSQRTPDZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22080 { 15748 /* vsqrtpd */, X86::VSQRTPDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22080 { 15748 /* vsqrtpd */, X86::VSQRTPDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22081 { 15748 /* vsqrtpd */, X86::VSQRTPDZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22081 { 15748 /* vsqrtpd */, X86::VSQRTPDZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22084 { 15748 /* vsqrtpd */, X86::VSQRTPDZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22087 { 15748 /* vsqrtpd */, X86::VSQRTPDZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22088 { 15748 /* vsqrtpd */, X86::VSQRTPDZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22088 { 15748 /* vsqrtpd */, X86::VSQRTPDZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22091 { 15748 /* vsqrtpd */, X86::VSQRTPDZmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22096 { 15756 /* vsqrtps */, X86::VSQRTPSZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
22096 { 15756 /* vsqrtps */, X86::VSQRTPSZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
22101 { 15756 /* vsqrtps */, X86::VSQRTPSZm, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
22102 { 15756 /* vsqrtps */, X86::VSQRTPSZrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
22102 { 15756 /* vsqrtps */, X86::VSQRTPSZrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
22103 { 15756 /* vsqrtps */, X86::VSQRTPSZmb, Convert__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
22108 { 15756 /* vsqrtps */, X86::VSQRTPSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22108 { 15756 /* vsqrtps */, X86::VSQRTPSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22111 { 15756 /* vsqrtps */, X86::VSQRTPSZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22114 { 15756 /* vsqrtps */, X86::VSQRTPSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22114 { 15756 /* vsqrtps */, X86::VSQRTPSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22115 { 15756 /* vsqrtps */, X86::VSQRTPSZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22115 { 15756 /* vsqrtps */, X86::VSQRTPSZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22118 { 15756 /* vsqrtps */, X86::VSQRTPSZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22121 { 15756 /* vsqrtps */, X86::VSQRTPSZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22122 { 15756 /* vsqrtps */, X86::VSQRTPSZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22122 { 15756 /* vsqrtps */, X86::VSQRTPSZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22123 { 15756 /* vsqrtps */, X86::VSQRTPSZmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22153 { 15789 /* vsubpd */, X86::VSUBPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
22153 { 15789 /* vsubpd */, X86::VSUBPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
22153 { 15789 /* vsubpd */, X86::VSUBPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
22158 { 15789 /* vsubpd */, X86::VSUBPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
22158 { 15789 /* vsubpd */, X86::VSUBPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
22159 { 15789 /* vsubpd */, X86::VSUBPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
22159 { 15789 /* vsubpd */, X86::VSUBPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
22159 { 15789 /* vsubpd */, X86::VSUBPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
22162 { 15789 /* vsubpd */, X86::VSUBPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
22162 { 15789 /* vsubpd */, X86::VSUBPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
22165 { 15789 /* vsubpd */, X86::VSUBPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22165 { 15789 /* vsubpd */, X86::VSUBPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22165 { 15789 /* vsubpd */, X86::VSUBPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22168 { 15789 /* vsubpd */, X86::VSUBPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22168 { 15789 /* vsubpd */, X86::VSUBPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22171 { 15789 /* vsubpd */, X86::VSUBPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22171 { 15789 /* vsubpd */, X86::VSUBPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22171 { 15789 /* vsubpd */, X86::VSUBPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22172 { 15789 /* vsubpd */, X86::VSUBPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22172 { 15789 /* vsubpd */, X86::VSUBPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22172 { 15789 /* vsubpd */, X86::VSUBPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22175 { 15789 /* vsubpd */, X86::VSUBPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22175 { 15789 /* vsubpd */, X86::VSUBPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22178 { 15789 /* vsubpd */, X86::VSUBPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22178 { 15789 /* vsubpd */, X86::VSUBPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22179 { 15789 /* vsubpd */, X86::VSUBPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22179 { 15789 /* vsubpd */, X86::VSUBPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22179 { 15789 /* vsubpd */, X86::VSUBPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22182 { 15789 /* vsubpd */, X86::VSUBPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22182 { 15789 /* vsubpd */, X86::VSUBPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22187 { 15796 /* vsubps */, X86::VSUBPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
22187 { 15796 /* vsubps */, X86::VSUBPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
22187 { 15796 /* vsubps */, X86::VSUBPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
22192 { 15796 /* vsubps */, X86::VSUBPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
22192 { 15796 /* vsubps */, X86::VSUBPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
22193 { 15796 /* vsubps */, X86::VSUBPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
22193 { 15796 /* vsubps */, X86::VSUBPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
22193 { 15796 /* vsubps */, X86::VSUBPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
22194 { 15796 /* vsubps */, X86::VSUBPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
22194 { 15796 /* vsubps */, X86::VSUBPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
22199 { 15796 /* vsubps */, X86::VSUBPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22199 { 15796 /* vsubps */, X86::VSUBPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22199 { 15796 /* vsubps */, X86::VSUBPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22202 { 15796 /* vsubps */, X86::VSUBPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22202 { 15796 /* vsubps */, X86::VSUBPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22205 { 15796 /* vsubps */, X86::VSUBPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22205 { 15796 /* vsubps */, X86::VSUBPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22205 { 15796 /* vsubps */, X86::VSUBPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22206 { 15796 /* vsubps */, X86::VSUBPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22206 { 15796 /* vsubps */, X86::VSUBPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22206 { 15796 /* vsubps */, X86::VSUBPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22209 { 15796 /* vsubps */, X86::VSUBPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22209 { 15796 /* vsubps */, X86::VSUBPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22212 { 15796 /* vsubps */, X86::VSUBPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22212 { 15796 /* vsubps */, X86::VSUBPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22213 { 15796 /* vsubps */, X86::VSUBPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22213 { 15796 /* vsubps */, X86::VSUBPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22213 { 15796 /* vsubps */, X86::VSUBPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22214 { 15796 /* vsubps */, X86::VSUBPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22214 { 15796 /* vsubps */, X86::VSUBPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22261 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
22261 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
22261 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
22266 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
22266 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
22269 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
22269 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
22272 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22272 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22272 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22275 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22275 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22278 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22278 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22278 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22281 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22281 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22284 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22284 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22287 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22287 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22292 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
22292 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
22292 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
22297 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
22297 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
22298 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
22298 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
22303 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22303 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22303 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22306 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22306 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22309 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22309 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22309 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22312 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22312 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22315 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22315 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22316 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22316 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22323 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
22323 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
22323 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
22328 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
22328 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
22331 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
22331 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
22334 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22334 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22334 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22337 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22337 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22340 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22340 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22340 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22343 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22343 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22346 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22346 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22349 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22349 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22354 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
22354 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
22354 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
22359 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
22359 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
22360 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
22360 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
22365 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22365 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22365 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22368 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22368 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22371 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22371 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22371 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22374 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22374 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22377 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22377 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22378 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22378 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22385 { 15891 /* vxorpd */, X86::VXORPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
22385 { 15891 /* vxorpd */, X86::VXORPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
22385 { 15891 /* vxorpd */, X86::VXORPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
22390 { 15891 /* vxorpd */, X86::VXORPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
22390 { 15891 /* vxorpd */, X86::VXORPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
22393 { 15891 /* vxorpd */, X86::VXORPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
22393 { 15891 /* vxorpd */, X86::VXORPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
22396 { 15891 /* vxorpd */, X86::VXORPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22396 { 15891 /* vxorpd */, X86::VXORPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22396 { 15891 /* vxorpd */, X86::VXORPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22399 { 15891 /* vxorpd */, X86::VXORPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22399 { 15891 /* vxorpd */, X86::VXORPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22402 { 15891 /* vxorpd */, X86::VXORPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22402 { 15891 /* vxorpd */, X86::VXORPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22402 { 15891 /* vxorpd */, X86::VXORPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22405 { 15891 /* vxorpd */, X86::VXORPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22405 { 15891 /* vxorpd */, X86::VXORPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22408 { 15891 /* vxorpd */, X86::VXORPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22408 { 15891 /* vxorpd */, X86::VXORPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22411 { 15891 /* vxorpd */, X86::VXORPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22411 { 15891 /* vxorpd */, X86::VXORPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, AMFBS_None, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22416 { 15898 /* vxorps */, X86::VXORPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
22416 { 15898 /* vxorps */, X86::VXORPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
22416 { 15898 /* vxorps */, X86::VXORPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
22421 { 15898 /* vxorps */, X86::VXORPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
22421 { 15898 /* vxorps */, X86::VXORPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
22422 { 15898 /* vxorps */, X86::VXORPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
22422 { 15898 /* vxorps */, X86::VXORPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
22427 { 15898 /* vxorps */, X86::VXORPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22427 { 15898 /* vxorps */, X86::VXORPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22427 { 15898 /* vxorps */, X86::VXORPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22430 { 15898 /* vxorps */, X86::VXORPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22430 { 15898 /* vxorps */, X86::VXORPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22433 { 15898 /* vxorps */, X86::VXORPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22433 { 15898 /* vxorps */, X86::VXORPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22433 { 15898 /* vxorps */, X86::VXORPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22436 { 15898 /* vxorps */, X86::VXORPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22436 { 15898 /* vxorps */, X86::VXORPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22439 { 15898 /* vxorps */, X86::VXORPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22439 { 15898 /* vxorps */, X86::VXORPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22440 { 15898 /* vxorps */, X86::VXORPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22440 { 15898 /* vxorps */, X86::VXORPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
25090 { 7988 /* v4fmaddps */, X86::V4FMADDPSrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
25090 { 7988 /* v4fmaddps */, X86::V4FMADDPSrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
25091 { 7988 /* v4fmaddps */, X86::V4FMADDPSrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
25091 { 7988 /* v4fmaddps */, X86::V4FMADDPSrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
25092 { 7988 /* v4fmaddps */, X86::V4FMADDPSrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
25092 { 7988 /* v4fmaddps */, X86::V4FMADDPSrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
25096 { 8008 /* v4fnmaddps */, X86::V4FNMADDPSrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
25096 { 8008 /* v4fnmaddps */, X86::V4FNMADDPSrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
25097 { 8008 /* v4fnmaddps */, X86::V4FNMADDPSrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
25097 { 8008 /* v4fnmaddps */, X86::V4FNMADDPSrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
25098 { 8008 /* v4fnmaddps */, X86::V4FNMADDPSrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
25098 { 8008 /* v4fnmaddps */, X86::V4FNMADDPSrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
25110 { 8030 /* vaddpd */, X86::VADDPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25110 { 8030 /* vaddpd */, X86::VADDPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25110 { 8030 /* vaddpd */, X86::VADDPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25111 { 8030 /* vaddpd */, X86::VADDPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25111 { 8030 /* vaddpd */, X86::VADDPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25114 { 8030 /* vaddpd */, X86::VADDPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25114 { 8030 /* vaddpd */, X86::VADDPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25114 { 8030 /* vaddpd */, X86::VADDPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25115 { 8030 /* vaddpd */, X86::VADDPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25115 { 8030 /* vaddpd */, X86::VADDPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25120 { 8030 /* vaddpd */, X86::VADDPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
25120 { 8030 /* vaddpd */, X86::VADDPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
25120 { 8030 /* vaddpd */, X86::VADDPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
25121 { 8030 /* vaddpd */, X86::VADDPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
25121 { 8030 /* vaddpd */, X86::VADDPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
25128 { 8030 /* vaddpd */, X86::VADDPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
25128 { 8030 /* vaddpd */, X86::VADDPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
25128 { 8030 /* vaddpd */, X86::VADDPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
25129 { 8030 /* vaddpd */, X86::VADDPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
25129 { 8030 /* vaddpd */, X86::VADDPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
25130 { 8030 /* vaddpd */, X86::VADDPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25130 { 8030 /* vaddpd */, X86::VADDPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25130 { 8030 /* vaddpd */, X86::VADDPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25131 { 8030 /* vaddpd */, X86::VADDPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25131 { 8030 /* vaddpd */, X86::VADDPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25134 { 8030 /* vaddpd */, X86::VADDPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25134 { 8030 /* vaddpd */, X86::VADDPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25134 { 8030 /* vaddpd */, X86::VADDPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25135 { 8030 /* vaddpd */, X86::VADDPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25135 { 8030 /* vaddpd */, X86::VADDPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25144 { 8037 /* vaddps */, X86::VADDPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25144 { 8037 /* vaddps */, X86::VADDPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25144 { 8037 /* vaddps */, X86::VADDPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25145 { 8037 /* vaddps */, X86::VADDPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25145 { 8037 /* vaddps */, X86::VADDPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25148 { 8037 /* vaddps */, X86::VADDPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25148 { 8037 /* vaddps */, X86::VADDPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25148 { 8037 /* vaddps */, X86::VADDPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25149 { 8037 /* vaddps */, X86::VADDPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25149 { 8037 /* vaddps */, X86::VADDPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25154 { 8037 /* vaddps */, X86::VADDPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
25154 { 8037 /* vaddps */, X86::VADDPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
25154 { 8037 /* vaddps */, X86::VADDPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
25155 { 8037 /* vaddps */, X86::VADDPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
25155 { 8037 /* vaddps */, X86::VADDPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
25162 { 8037 /* vaddps */, X86::VADDPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
25162 { 8037 /* vaddps */, X86::VADDPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
25162 { 8037 /* vaddps */, X86::VADDPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
25163 { 8037 /* vaddps */, X86::VADDPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
25163 { 8037 /* vaddps */, X86::VADDPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
25164 { 8037 /* vaddps */, X86::VADDPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25164 { 8037 /* vaddps */, X86::VADDPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25164 { 8037 /* vaddps */, X86::VADDPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25165 { 8037 /* vaddps */, X86::VADDPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25165 { 8037 /* vaddps */, X86::VADDPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25168 { 8037 /* vaddps */, X86::VADDPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25168 { 8037 /* vaddps */, X86::VADDPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25168 { 8037 /* vaddps */, X86::VADDPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25169 { 8037 /* vaddps */, X86::VADDPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25169 { 8037 /* vaddps */, X86::VADDPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25208 { 8078 /* vaesdec */, X86::VAESDECZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25208 { 8078 /* vaesdec */, X86::VAESDECZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25208 { 8078 /* vaesdec */, X86::VAESDECZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25209 { 8078 /* vaesdec */, X86::VAESDECZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25209 { 8078 /* vaesdec */, X86::VAESDECZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25218 { 8086 /* vaesdeclast */, X86::VAESDECLASTZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25218 { 8086 /* vaesdeclast */, X86::VAESDECLASTZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25218 { 8086 /* vaesdeclast */, X86::VAESDECLASTZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25219 { 8086 /* vaesdeclast */, X86::VAESDECLASTZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25219 { 8086 /* vaesdeclast */, X86::VAESDECLASTZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25228 { 8098 /* vaesenc */, X86::VAESENCZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25228 { 8098 /* vaesenc */, X86::VAESENCZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25228 { 8098 /* vaesenc */, X86::VAESENCZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25229 { 8098 /* vaesenc */, X86::VAESENCZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25229 { 8098 /* vaesenc */, X86::VAESENCZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25238 { 8106 /* vaesenclast */, X86::VAESENCLASTZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25238 { 8106 /* vaesenclast */, X86::VAESENCLASTZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25238 { 8106 /* vaesenclast */, X86::VAESENCLASTZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25239 { 8106 /* vaesenclast */, X86::VAESENCLASTZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25239 { 8106 /* vaesenclast */, X86::VAESENCLASTZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25248 { 8143 /* valignd */, X86::VALIGNDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25248 { 8143 /* valignd */, X86::VALIGNDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25248 { 8143 /* valignd */, X86::VALIGNDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25249 { 8143 /* valignd */, X86::VALIGNDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
25249 { 8143 /* valignd */, X86::VALIGNDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
25252 { 8143 /* valignd */, X86::VALIGNDZrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
25252 { 8143 /* valignd */, X86::VALIGNDZrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
25257 { 8143 /* valignd */, X86::VALIGNDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25257 { 8143 /* valignd */, X86::VALIGNDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25257 { 8143 /* valignd */, X86::VALIGNDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25258 { 8143 /* valignd */, X86::VALIGNDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
25258 { 8143 /* valignd */, X86::VALIGNDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
25265 { 8143 /* valignd */, X86::VALIGNDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25265 { 8143 /* valignd */, X86::VALIGNDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25265 { 8143 /* valignd */, X86::VALIGNDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25266 { 8143 /* valignd */, X86::VALIGNDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
25266 { 8143 /* valignd */, X86::VALIGNDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
25267 { 8143 /* valignd */, X86::VALIGNDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
25267 { 8143 /* valignd */, X86::VALIGNDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
25270 { 8143 /* valignd */, X86::VALIGNDZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
25270 { 8143 /* valignd */, X86::VALIGNDZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
25275 { 8151 /* valignq */, X86::VALIGNQZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25275 { 8151 /* valignq */, X86::VALIGNQZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25275 { 8151 /* valignq */, X86::VALIGNQZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25276 { 8151 /* valignq */, X86::VALIGNQZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
25276 { 8151 /* valignq */, X86::VALIGNQZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
25279 { 8151 /* valignq */, X86::VALIGNQZrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
25279 { 8151 /* valignq */, X86::VALIGNQZrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
25284 { 8151 /* valignq */, X86::VALIGNQZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25284 { 8151 /* valignq */, X86::VALIGNQZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25284 { 8151 /* valignq */, X86::VALIGNQZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25285 { 8151 /* valignq */, X86::VALIGNQZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
25285 { 8151 /* valignq */, X86::VALIGNQZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
25292 { 8151 /* valignq */, X86::VALIGNQZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25292 { 8151 /* valignq */, X86::VALIGNQZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25292 { 8151 /* valignq */, X86::VALIGNQZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25293 { 8151 /* valignq */, X86::VALIGNQZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
25293 { 8151 /* valignq */, X86::VALIGNQZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
25294 { 8151 /* valignq */, X86::VALIGNQZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
25294 { 8151 /* valignq */, X86::VALIGNQZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
25297 { 8151 /* valignq */, X86::VALIGNQZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
25297 { 8151 /* valignq */, X86::VALIGNQZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
25306 { 8159 /* vandnpd */, X86::VANDNPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25306 { 8159 /* vandnpd */, X86::VANDNPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25306 { 8159 /* vandnpd */, X86::VANDNPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25307 { 8159 /* vandnpd */, X86::VANDNPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25307 { 8159 /* vandnpd */, X86::VANDNPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25310 { 8159 /* vandnpd */, X86::VANDNPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25310 { 8159 /* vandnpd */, X86::VANDNPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25315 { 8159 /* vandnpd */, X86::VANDNPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
25315 { 8159 /* vandnpd */, X86::VANDNPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
25315 { 8159 /* vandnpd */, X86::VANDNPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
25316 { 8159 /* vandnpd */, X86::VANDNPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
25316 { 8159 /* vandnpd */, X86::VANDNPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
25323 { 8159 /* vandnpd */, X86::VANDNPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
25323 { 8159 /* vandnpd */, X86::VANDNPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
25323 { 8159 /* vandnpd */, X86::VANDNPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
25324 { 8159 /* vandnpd */, X86::VANDNPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
25324 { 8159 /* vandnpd */, X86::VANDNPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
25325 { 8159 /* vandnpd */, X86::VANDNPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25325 { 8159 /* vandnpd */, X86::VANDNPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25328 { 8159 /* vandnpd */, X86::VANDNPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25328 { 8159 /* vandnpd */, X86::VANDNPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25337 { 8167 /* vandnps */, X86::VANDNPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25337 { 8167 /* vandnps */, X86::VANDNPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25337 { 8167 /* vandnps */, X86::VANDNPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25338 { 8167 /* vandnps */, X86::VANDNPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25338 { 8167 /* vandnps */, X86::VANDNPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25341 { 8167 /* vandnps */, X86::VANDNPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25341 { 8167 /* vandnps */, X86::VANDNPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25346 { 8167 /* vandnps */, X86::VANDNPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
25346 { 8167 /* vandnps */, X86::VANDNPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
25346 { 8167 /* vandnps */, X86::VANDNPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
25347 { 8167 /* vandnps */, X86::VANDNPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
25347 { 8167 /* vandnps */, X86::VANDNPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
25354 { 8167 /* vandnps */, X86::VANDNPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
25354 { 8167 /* vandnps */, X86::VANDNPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
25354 { 8167 /* vandnps */, X86::VANDNPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
25355 { 8167 /* vandnps */, X86::VANDNPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
25355 { 8167 /* vandnps */, X86::VANDNPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
25356 { 8167 /* vandnps */, X86::VANDNPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25356 { 8167 /* vandnps */, X86::VANDNPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25359 { 8167 /* vandnps */, X86::VANDNPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25359 { 8167 /* vandnps */, X86::VANDNPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25368 { 8175 /* vandpd */, X86::VANDPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25368 { 8175 /* vandpd */, X86::VANDPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25368 { 8175 /* vandpd */, X86::VANDPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25369 { 8175 /* vandpd */, X86::VANDPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25369 { 8175 /* vandpd */, X86::VANDPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25372 { 8175 /* vandpd */, X86::VANDPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25372 { 8175 /* vandpd */, X86::VANDPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25377 { 8175 /* vandpd */, X86::VANDPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
25377 { 8175 /* vandpd */, X86::VANDPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
25377 { 8175 /* vandpd */, X86::VANDPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
25378 { 8175 /* vandpd */, X86::VANDPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
25378 { 8175 /* vandpd */, X86::VANDPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
25385 { 8175 /* vandpd */, X86::VANDPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
25385 { 8175 /* vandpd */, X86::VANDPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
25385 { 8175 /* vandpd */, X86::VANDPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
25386 { 8175 /* vandpd */, X86::VANDPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
25386 { 8175 /* vandpd */, X86::VANDPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
25387 { 8175 /* vandpd */, X86::VANDPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25387 { 8175 /* vandpd */, X86::VANDPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25390 { 8175 /* vandpd */, X86::VANDPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25390 { 8175 /* vandpd */, X86::VANDPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25399 { 8182 /* vandps */, X86::VANDPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25399 { 8182 /* vandps */, X86::VANDPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25399 { 8182 /* vandps */, X86::VANDPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25400 { 8182 /* vandps */, X86::VANDPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25400 { 8182 /* vandps */, X86::VANDPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25403 { 8182 /* vandps */, X86::VANDPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25403 { 8182 /* vandps */, X86::VANDPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25408 { 8182 /* vandps */, X86::VANDPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
25408 { 8182 /* vandps */, X86::VANDPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
25408 { 8182 /* vandps */, X86::VANDPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
25409 { 8182 /* vandps */, X86::VANDPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
25409 { 8182 /* vandps */, X86::VANDPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
25416 { 8182 /* vandps */, X86::VANDPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
25416 { 8182 /* vandps */, X86::VANDPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
25416 { 8182 /* vandps */, X86::VANDPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
25417 { 8182 /* vandps */, X86::VANDPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
25417 { 8182 /* vandps */, X86::VANDPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
25418 { 8182 /* vandps */, X86::VANDPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25418 { 8182 /* vandps */, X86::VANDPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25421 { 8182 /* vandps */, X86::VANDPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25421 { 8182 /* vandps */, X86::VANDPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25426 { 8189 /* vblendmpd */, X86::VBLENDMPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25426 { 8189 /* vblendmpd */, X86::VBLENDMPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25426 { 8189 /* vblendmpd */, X86::VBLENDMPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25427 { 8189 /* vblendmpd */, X86::VBLENDMPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25427 { 8189 /* vblendmpd */, X86::VBLENDMPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25430 { 8189 /* vblendmpd */, X86::VBLENDMPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25430 { 8189 /* vblendmpd */, X86::VBLENDMPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25435 { 8189 /* vblendmpd */, X86::VBLENDMPDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
25435 { 8189 /* vblendmpd */, X86::VBLENDMPDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
25435 { 8189 /* vblendmpd */, X86::VBLENDMPDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
25436 { 8189 /* vblendmpd */, X86::VBLENDMPDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
25436 { 8189 /* vblendmpd */, X86::VBLENDMPDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
25443 { 8189 /* vblendmpd */, X86::VBLENDMPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
25443 { 8189 /* vblendmpd */, X86::VBLENDMPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
25443 { 8189 /* vblendmpd */, X86::VBLENDMPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
25444 { 8189 /* vblendmpd */, X86::VBLENDMPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
25444 { 8189 /* vblendmpd */, X86::VBLENDMPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
25445 { 8189 /* vblendmpd */, X86::VBLENDMPDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25445 { 8189 /* vblendmpd */, X86::VBLENDMPDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25448 { 8189 /* vblendmpd */, X86::VBLENDMPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25448 { 8189 /* vblendmpd */, X86::VBLENDMPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25453 { 8199 /* vblendmps */, X86::VBLENDMPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25453 { 8199 /* vblendmps */, X86::VBLENDMPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25453 { 8199 /* vblendmps */, X86::VBLENDMPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25454 { 8199 /* vblendmps */, X86::VBLENDMPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25454 { 8199 /* vblendmps */, X86::VBLENDMPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25457 { 8199 /* vblendmps */, X86::VBLENDMPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25457 { 8199 /* vblendmps */, X86::VBLENDMPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25462 { 8199 /* vblendmps */, X86::VBLENDMPSZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
25462 { 8199 /* vblendmps */, X86::VBLENDMPSZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
25462 { 8199 /* vblendmps */, X86::VBLENDMPSZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
25463 { 8199 /* vblendmps */, X86::VBLENDMPSZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
25463 { 8199 /* vblendmps */, X86::VBLENDMPSZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
25470 { 8199 /* vblendmps */, X86::VBLENDMPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
25470 { 8199 /* vblendmps */, X86::VBLENDMPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
25470 { 8199 /* vblendmps */, X86::VBLENDMPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
25471 { 8199 /* vblendmps */, X86::VBLENDMPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
25471 { 8199 /* vblendmps */, X86::VBLENDMPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
25472 { 8199 /* vblendmps */, X86::VBLENDMPSZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25472 { 8199 /* vblendmps */, X86::VBLENDMPSZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25475 { 8199 /* vblendmps */, X86::VBLENDMPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25475 { 8199 /* vblendmps */, X86::VBLENDMPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25495 { 8262 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
25496 { 8262 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64 }, },
25499 { 8262 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25500 { 8262 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
25503 { 8262 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25504 { 8262 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
25506 { 8278 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR512, MCK_Mem128 }, },
25508 { 8278 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25510 { 8278 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25511 { 8294 /* vbroadcastf32x8 */, X86::VBROADCASTF32X8rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
25512 { 8294 /* vbroadcastf32x8 */, X86::VBROADCASTF32X8rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25513 { 8294 /* vbroadcastf32x8 */, X86::VBROADCASTF32X8rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25515 { 8310 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR512, MCK_Mem128 }, },
25517 { 8310 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25519 { 8310 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25520 { 8326 /* vbroadcastf64x4 */, X86::VBROADCASTF64X4rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
25521 { 8326 /* vbroadcastf64x4 */, X86::VBROADCASTF64X4rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25522 { 8326 /* vbroadcastf64x4 */, X86::VBROADCASTF64X4rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25528 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
25529 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64 }, },
25534 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25535 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
25540 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25541 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
25543 { 8373 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR512, MCK_Mem128 }, },
25545 { 8373 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25547 { 8373 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25548 { 8389 /* vbroadcasti32x8 */, X86::VBROADCASTI32X8rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
25549 { 8389 /* vbroadcasti32x8 */, X86::VBROADCASTI32X8rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25550 { 8389 /* vbroadcasti32x8 */, X86::VBROADCASTI32X8rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25552 { 8405 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2rm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR512, MCK_Mem128 }, },
25554 { 8405 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25556 { 8405 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25557 { 8421 /* vbroadcasti64x4 */, X86::VBROADCASTI64X4rm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
25558 { 8421 /* vbroadcasti64x4 */, X86::VBROADCASTI64X4rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25559 { 8421 /* vbroadcasti64x4 */, X86::VBROADCASTI64X4rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25564 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
25565 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDZm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64 }, },
25568 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25569 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
25572 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25573 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDZmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
25582 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
25583 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32 }, },
25588 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25589 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
25594 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25595 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZmkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
25600 { 8463 /* vcmppd */, X86::VCMPPDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25600 { 8463 /* vcmppd */, X86::VCMPPDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25601 { 8463 /* vcmppd */, X86::VCMPPDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
25608 { 8463 /* vcmppd */, X86::VCMPPDZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
25608 { 8463 /* vcmppd */, X86::VCMPPDZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
25609 { 8463 /* vcmppd */, X86::VCMPPDZrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
25614 { 8463 /* vcmppd */, X86::VCMPPDZrrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25614 { 8463 /* vcmppd */, X86::VCMPPDZrrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25615 { 8463 /* vcmppd */, X86::VCMPPDZrmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
25618 { 8463 /* vcmppd */, X86::VCMPPDZrribk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
25618 { 8463 /* vcmppd */, X86::VCMPPDZrribk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
25619 { 8463 /* vcmppd */, X86::VCMPPDZrmbik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
25624 { 8470 /* vcmpps */, X86::VCMPPSZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25624 { 8470 /* vcmpps */, X86::VCMPPSZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25625 { 8470 /* vcmpps */, X86::VCMPPSZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
25632 { 8470 /* vcmpps */, X86::VCMPPSZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
25632 { 8470 /* vcmpps */, X86::VCMPPSZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
25633 { 8470 /* vcmpps */, X86::VCMPPSZrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
25638 { 8470 /* vcmpps */, X86::VCMPPSZrrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25638 { 8470 /* vcmpps */, X86::VCMPPSZrrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25639 { 8470 /* vcmpps */, X86::VCMPPSZrmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
25642 { 8470 /* vcmpps */, X86::VCMPPSZrribk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
25642 { 8470 /* vcmpps */, X86::VCMPPSZrribk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
25643 { 8470 /* vcmpps */, X86::VCMPPSZrmbik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
25672 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
25672 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
25675 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
25678 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25678 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25681 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25684 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25684 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25687 { 8519 /* vcompressps */, X86::VCOMPRESSPSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
25687 { 8519 /* vcompressps */, X86::VCOMPRESSPSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
25690 { 8519 /* vcompressps */, X86::VCOMPRESSPSZmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
25693 { 8519 /* vcompressps */, X86::VCOMPRESSPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25693 { 8519 /* vcompressps */, X86::VCOMPRESSPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25696 { 8519 /* vcompressps */, X86::VCOMPRESSPSZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25699 { 8519 /* vcompressps */, X86::VCOMPRESSPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25699 { 8519 /* vcompressps */, X86::VCOMPRESSPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25708 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
25709 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
25712 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to8_125_ }, },
25717 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25718 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25725 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25726 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25727 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25730 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25739 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
25739 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
25740 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
25743 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25743 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25744 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25749 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25749 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25750 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25757 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25757 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25758 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25759 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
25759 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
25760 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
25763 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
25763 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
25764 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
25769 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25769 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25769 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25770 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25770 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25773 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25773 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25778 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
25778 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
25778 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
25779 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
25779 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
25786 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
25786 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
25786 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
25787 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
25787 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
25788 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25788 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25791 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25791 { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25796 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
25805 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25813 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25831 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
25835 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK_AVX512RC }, },
25841 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25849 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25851 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
25855 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
25865 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
25869 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK_AVX512RC }, },
25875 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25883 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25885 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
25889 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
25895 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
25895 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
25896 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
25899 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25899 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25900 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25905 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25905 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25906 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25913 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25913 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25914 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25915 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
25915 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
25916 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25919 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
25919 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
25920 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25925 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
25929 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK_AVX512RC }, },
25935 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25943 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25945 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
25949 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
25955 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
25955 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
25956 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
25959 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25959 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25960 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25965 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25965 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25966 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25973 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25973 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25974 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25975 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
25975 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
25976 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25979 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
25979 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
25980 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25989 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
25990 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
25991 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_sae_125_ }, },
25996 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25997 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
26002 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
26003 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
26004 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK__123_sae_125_ }, },
26005 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK__123_sae_125_ }, },
26014 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26014 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26015 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
26018 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26018 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26019 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26024 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26024 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26025 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
26032 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26032 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26033 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
26034 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
26034 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
26035 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
26038 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
26038 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
26039 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
26048 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
26049 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
26052 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_sae_125_ }, },
26053 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to8_125_ }, },
26058 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26059 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
26066 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
26067 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
26068 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK__123_sae_125_ }, },
26069 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
26072 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK__123_sae_125_ }, },
26073 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
26078 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK_ImmUnsignedi8 }, },
26081 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZmr, Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK_ImmUnsignedi8 }, },
26084 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZrrb, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
26087 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26089 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26093 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26094 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
26095 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
26100 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
26101 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
26104 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK_AVX512RC }, },
26105 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to8_125_ }, },
26110 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26111 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
26118 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
26119 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
26120 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_AVX512RC }, },
26121 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
26124 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_AVX512RC }, },
26125 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
26130 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26130 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26131 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
26134 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26134 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26135 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26140 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26140 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26141 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
26148 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26148 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26149 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
26150 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
26150 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
26151 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
26154 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
26154 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
26155 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
26160 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
26161 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
26164 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK_AVX512RC }, },
26165 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to8_125_ }, },
26170 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26171 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
26178 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
26179 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
26180 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_AVX512RC }, },
26181 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
26184 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_AVX512RC }, },
26185 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
26190 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26190 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26191 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
26194 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26194 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26195 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26200 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26200 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26201 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
26208 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26208 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26209 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
26210 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
26210 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
26211 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
26214 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
26214 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
26215 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
26220 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
26224 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK_AVX512RC }, },
26230 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26238 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26240 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
26244 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
26327 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
26331 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_sae_125_ }, },
26337 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26345 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26347 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
26351 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
26357 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26357 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26358 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
26361 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
26361 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
26362 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26367 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26367 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26368 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
26375 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26375 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26376 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
26377 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
26377 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
26378 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
26381 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
26381 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
26382 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
26387 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
26391 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_sae_125_ }, },
26397 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26405 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26407 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
26411 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
26417 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26417 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26418 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
26421 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
26421 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
26422 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26427 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26427 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26428 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
26435 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26435 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26436 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
26437 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
26437 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
26438 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
26441 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
26441 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
26442 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
26451 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26451 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26452 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
26455 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
26455 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
26456 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26461 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26461 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26462 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
26469 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26469 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26470 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
26471 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
26471 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
26472 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
26475 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
26475 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
26476 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
26481 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
26482 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
26485 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_sae_125_ }, },
26486 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to8_125_ }, },
26491 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26492 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
26499 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
26500 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
26501 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK__123_sae_125_ }, },
26502 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
26505 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK__123_sae_125_ }, },
26506 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
26511 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26511 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26512 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
26515 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
26515 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
26516 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26521 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26521 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26522 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
26529 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26529 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26530 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
26531 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
26531 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
26532 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
26535 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
26535 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
26536 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
26541 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
26542 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
26545 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_sae_125_ }, },
26546 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to8_125_ }, },
26551 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26552 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
26559 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
26560 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
26561 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK__123_sae_125_ }, },
26562 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
26565 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK__123_sae_125_ }, },
26566 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
26603 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
26604 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
26607 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to8_125_ }, },
26612 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26613 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
26620 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
26621 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
26622 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
26625 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
26630 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26630 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26631 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
26634 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26634 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26635 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26640 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26640 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26641 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
26648 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26648 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26649 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
26650 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
26650 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
26651 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
26654 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
26654 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
26655 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
26660 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26660 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26661 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
26664 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26664 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26665 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26670 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26670 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26671 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
26678 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26678 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26679 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
26680 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
26680 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
26681 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
26684 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
26684 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
26685 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
26690 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
26694 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK_AVX512RC }, },
26700 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26708 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26710 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
26714 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
26731 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
26731 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
26731 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
26732 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
26732 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
26737 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
26737 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
26737 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
26738 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
26738 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
26743 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
26743 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
26743 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
26744 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
26744 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
26753 { 9498 /* vdivpd */, X86::VDIVPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26753 { 9498 /* vdivpd */, X86::VDIVPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26753 { 9498 /* vdivpd */, X86::VDIVPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26754 { 9498 /* vdivpd */, X86::VDIVPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26754 { 9498 /* vdivpd */, X86::VDIVPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26757 { 9498 /* vdivpd */, X86::VDIVPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26757 { 9498 /* vdivpd */, X86::VDIVPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26757 { 9498 /* vdivpd */, X86::VDIVPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26758 { 9498 /* vdivpd */, X86::VDIVPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26758 { 9498 /* vdivpd */, X86::VDIVPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26763 { 9498 /* vdivpd */, X86::VDIVPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26763 { 9498 /* vdivpd */, X86::VDIVPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26763 { 9498 /* vdivpd */, X86::VDIVPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26764 { 9498 /* vdivpd */, X86::VDIVPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26764 { 9498 /* vdivpd */, X86::VDIVPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26771 { 9498 /* vdivpd */, X86::VDIVPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26771 { 9498 /* vdivpd */, X86::VDIVPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26771 { 9498 /* vdivpd */, X86::VDIVPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26772 { 9498 /* vdivpd */, X86::VDIVPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26772 { 9498 /* vdivpd */, X86::VDIVPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26773 { 9498 /* vdivpd */, X86::VDIVPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26773 { 9498 /* vdivpd */, X86::VDIVPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26773 { 9498 /* vdivpd */, X86::VDIVPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26774 { 9498 /* vdivpd */, X86::VDIVPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26774 { 9498 /* vdivpd */, X86::VDIVPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26777 { 9498 /* vdivpd */, X86::VDIVPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26777 { 9498 /* vdivpd */, X86::VDIVPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26777 { 9498 /* vdivpd */, X86::VDIVPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26778 { 9498 /* vdivpd */, X86::VDIVPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26778 { 9498 /* vdivpd */, X86::VDIVPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26787 { 9505 /* vdivps */, X86::VDIVPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26787 { 9505 /* vdivps */, X86::VDIVPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26787 { 9505 /* vdivps */, X86::VDIVPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26788 { 9505 /* vdivps */, X86::VDIVPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26788 { 9505 /* vdivps */, X86::VDIVPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26791 { 9505 /* vdivps */, X86::VDIVPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26791 { 9505 /* vdivps */, X86::VDIVPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26791 { 9505 /* vdivps */, X86::VDIVPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26792 { 9505 /* vdivps */, X86::VDIVPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26792 { 9505 /* vdivps */, X86::VDIVPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26797 { 9505 /* vdivps */, X86::VDIVPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26797 { 9505 /* vdivps */, X86::VDIVPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26797 { 9505 /* vdivps */, X86::VDIVPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26798 { 9505 /* vdivps */, X86::VDIVPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26798 { 9505 /* vdivps */, X86::VDIVPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26805 { 9505 /* vdivps */, X86::VDIVPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26805 { 9505 /* vdivps */, X86::VDIVPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26805 { 9505 /* vdivps */, X86::VDIVPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26806 { 9505 /* vdivps */, X86::VDIVPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26806 { 9505 /* vdivps */, X86::VDIVPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26807 { 9505 /* vdivps */, X86::VDIVPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26807 { 9505 /* vdivps */, X86::VDIVPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26807 { 9505 /* vdivps */, X86::VDIVPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26808 { 9505 /* vdivps */, X86::VDIVPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26808 { 9505 /* vdivps */, X86::VDIVPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26811 { 9505 /* vdivps */, X86::VDIVPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26811 { 9505 /* vdivps */, X86::VDIVPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26811 { 9505 /* vdivps */, X86::VDIVPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26812 { 9505 /* vdivps */, X86::VDIVPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26812 { 9505 /* vdivps */, X86::VDIVPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26839 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26839 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26839 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26840 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26840 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26843 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26843 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26848 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26848 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26848 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26849 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26849 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26856 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26856 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26856 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26857 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26857 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26858 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26858 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26861 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26861 { 9526 /* vdpbf16ps */, X86::VDPBF16PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26872 { 9558 /* vexp2pd */, X86::VEXP2PDZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26872 { 9558 /* vexp2pd */, X86::VEXP2PDZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26873 { 9558 /* vexp2pd */, X86::VEXP2PDZm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
26874 { 9558 /* vexp2pd */, X86::VEXP2PDZrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
26874 { 9558 /* vexp2pd */, X86::VEXP2PDZrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
26875 { 9558 /* vexp2pd */, X86::VEXP2PDZmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26876 { 9558 /* vexp2pd */, X86::VEXP2PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26876 { 9558 /* vexp2pd */, X86::VEXP2PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26877 { 9558 /* vexp2pd */, X86::VEXP2PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
26878 { 9558 /* vexp2pd */, X86::VEXP2PDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26878 { 9558 /* vexp2pd */, X86::VEXP2PDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26879 { 9558 /* vexp2pd */, X86::VEXP2PDZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
26880 { 9558 /* vexp2pd */, X86::VEXP2PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
26880 { 9558 /* vexp2pd */, X86::VEXP2PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
26881 { 9558 /* vexp2pd */, X86::VEXP2PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
26882 { 9558 /* vexp2pd */, X86::VEXP2PDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
26882 { 9558 /* vexp2pd */, X86::VEXP2PDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
26883 { 9558 /* vexp2pd */, X86::VEXP2PDZmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
26884 { 9566 /* vexp2ps */, X86::VEXP2PSZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26884 { 9566 /* vexp2ps */, X86::VEXP2PSZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26885 { 9566 /* vexp2ps */, X86::VEXP2PSZm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
26886 { 9566 /* vexp2ps */, X86::VEXP2PSZrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
26886 { 9566 /* vexp2ps */, X86::VEXP2PSZrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
26887 { 9566 /* vexp2ps */, X86::VEXP2PSZmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26888 { 9566 /* vexp2ps */, X86::VEXP2PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26888 { 9566 /* vexp2ps */, X86::VEXP2PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26889 { 9566 /* vexp2ps */, X86::VEXP2PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
26890 { 9566 /* vexp2ps */, X86::VEXP2PSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26890 { 9566 /* vexp2ps */, X86::VEXP2PSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26891 { 9566 /* vexp2ps */, X86::VEXP2PSZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
26892 { 9566 /* vexp2ps */, X86::VEXP2PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
26892 { 9566 /* vexp2ps */, X86::VEXP2PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
26893 { 9566 /* vexp2ps */, X86::VEXP2PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
26894 { 9566 /* vexp2ps */, X86::VEXP2PSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
26894 { 9566 /* vexp2ps */, X86::VEXP2PSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
26895 { 9566 /* vexp2ps */, X86::VEXP2PSZmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
26900 { 9574 /* vexpandpd */, X86::VEXPANDPDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26900 { 9574 /* vexpandpd */, X86::VEXPANDPDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26901 { 9574 /* vexpandpd */, X86::VEXPANDPDZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
26906 { 9574 /* vexpandpd */, X86::VEXPANDPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26906 { 9574 /* vexpandpd */, X86::VEXPANDPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26907 { 9574 /* vexpandpd */, X86::VEXPANDPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
26912 { 9574 /* vexpandpd */, X86::VEXPANDPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26912 { 9574 /* vexpandpd */, X86::VEXPANDPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26913 { 9574 /* vexpandpd */, X86::VEXPANDPDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
26918 { 9584 /* vexpandps */, X86::VEXPANDPSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26918 { 9584 /* vexpandps */, X86::VEXPANDPSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
26919 { 9584 /* vexpandps */, X86::VEXPANDPSZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
26924 { 9584 /* vexpandps */, X86::VEXPANDPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26924 { 9584 /* vexpandps */, X86::VEXPANDPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26925 { 9584 /* vexpandps */, X86::VEXPANDPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
26930 { 9584 /* vexpandps */, X86::VEXPANDPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26930 { 9584 /* vexpandps */, X86::VEXPANDPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26931 { 9584 /* vexpandps */, X86::VEXPANDPSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
26935 { 9607 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_ImmUnsignedi8 }, },
26937 { 9607 /* vextractf32x4 */, X86::VEXTRACTF32x4Zmr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_ImmUnsignedi8 }, },
26939 { 9607 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26941 { 9607 /* vextractf32x4 */, X86::VEXTRACTF32x4Zmrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26943 { 9607 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26944 { 9621 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK_ImmUnsignedi8 }, },
26945 { 9621 /* vextractf32x8 */, X86::VEXTRACTF32x8Zmr, Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK_ImmUnsignedi8 }, },
26946 { 9621 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26947 { 9621 /* vextractf32x8 */, X86::VEXTRACTF32x8Zmrk, Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26948 { 9621 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26950 { 9635 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_ImmUnsignedi8 }, },
26952 { 9635 /* vextractf64x2 */, X86::VEXTRACTF64x2Zmr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_ImmUnsignedi8 }, },
26954 { 9635 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26956 { 9635 /* vextractf64x2 */, X86::VEXTRACTF64x2Zmrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26958 { 9635 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26959 { 9649 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK_ImmUnsignedi8 }, },
26960 { 9649 /* vextractf64x4 */, X86::VEXTRACTF64x4Zmr, Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK_ImmUnsignedi8 }, },
26961 { 9649 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26962 { 9649 /* vextractf64x4 */, X86::VEXTRACTF64x4Zmrk, Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26963 { 9649 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26967 { 9676 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_ImmUnsignedi8 }, },
26969 { 9676 /* vextracti32x4 */, X86::VEXTRACTI32x4Zmr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_ImmUnsignedi8 }, },
26971 { 9676 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26973 { 9676 /* vextracti32x4 */, X86::VEXTRACTI32x4Zmrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26975 { 9676 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26976 { 9690 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK_ImmUnsignedi8 }, },
26977 { 9690 /* vextracti32x8 */, X86::VEXTRACTI32x8Zmr, Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK_ImmUnsignedi8 }, },
26978 { 9690 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26979 { 9690 /* vextracti32x8 */, X86::VEXTRACTI32x8Zmrk, Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26980 { 9690 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26982 { 9704 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_ImmUnsignedi8 }, },
26984 { 9704 /* vextracti64x2 */, X86::VEXTRACTI64x2Zmr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem128, MCK_VR512, MCK_ImmUnsignedi8 }, },
26986 { 9704 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26988 { 9704 /* vextracti64x2 */, X86::VEXTRACTI64x2Zmrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26990 { 9704 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26991 { 9718 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK_ImmUnsignedi8 }, },
26992 { 9718 /* vextracti64x4 */, X86::VEXTRACTI64x4Zmr, Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem256, MCK_VR512, MCK_ImmUnsignedi8 }, },
26993 { 9718 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26994 { 9718 /* vextracti64x4 */, X86::VEXTRACTI64x4Zmrk, Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26995 { 9718 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
27004 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
27004 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
27004 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
27005 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27005 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27008 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrib, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27008 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrib, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27008 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrib, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27009 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27009 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27014 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
27014 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
27014 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
27015 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27015 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27022 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
27022 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
27022 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
27023 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27023 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27024 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27024 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27024 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27025 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27025 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27028 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrribkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27028 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrribkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27028 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrribkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27029 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27029 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27034 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
27034 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
27034 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
27035 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27035 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27038 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrrib, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27038 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrrib, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27038 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrrib, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27039 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
27039 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
27044 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
27044 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
27044 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
27045 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27045 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27052 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
27052 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
27052 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
27053 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27053 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27054 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27054 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27054 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27055 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
27055 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
27058 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrribkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27058 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrribkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27058 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrribkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
27059 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
27059 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
27086 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27086 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27086 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27087 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27087 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27090 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27090 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27090 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27091 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27091 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27096 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27096 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27096 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27097 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27097 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27104 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27104 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27104 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27105 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27105 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27106 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27106 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27106 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27107 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27107 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27110 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27110 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27110 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27111 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27111 { 9791 /* vfmadd132pd */, X86::VFMADD132PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27120 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27120 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27120 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27121 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27121 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27124 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27124 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27124 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27125 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27125 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27130 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27130 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27130 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27131 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27131 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27138 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27138 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27138 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27139 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27139 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27140 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27140 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27140 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27141 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27141 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27144 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27144 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27144 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27145 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27145 { 9803 /* vfmadd132ps */, X86::VFMADD132PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27176 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27176 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27176 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27177 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27177 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27180 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27180 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27180 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27181 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27181 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27186 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27186 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27186 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27187 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27187 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27194 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27194 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27194 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27195 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27195 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27196 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27196 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27196 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27197 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27197 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27200 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27200 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27200 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27201 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27201 { 9839 /* vfmadd213pd */, X86::VFMADD213PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27210 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27210 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27210 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27211 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27211 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27214 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27214 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27214 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27215 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27215 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27220 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27220 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27220 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27221 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27221 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27228 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27228 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27228 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27229 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27229 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27230 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27230 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27230 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27231 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27231 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27234 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27234 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27234 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27235 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27235 { 9851 /* vfmadd213ps */, X86::VFMADD213PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27266 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27266 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27266 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27267 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27267 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27270 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27270 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27270 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27271 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27271 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27276 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27276 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27276 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27277 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27277 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27284 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27284 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27284 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27285 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27285 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27286 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27286 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27286 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27287 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27287 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27290 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27290 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27290 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27291 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27291 { 9887 /* vfmadd231pd */, X86::VFMADD231PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27300 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27300 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27300 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27301 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27301 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27304 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27304 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27304 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27305 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27305 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27310 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27310 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27310 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27311 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27311 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27318 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27318 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27318 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27319 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27319 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27320 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27320 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27320 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27321 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27321 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27324 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27324 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27324 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27325 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27325 { 9899 /* vfmadd231ps */, X86::VFMADD231PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27374 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27374 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27374 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27375 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27375 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27378 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27378 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27378 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27379 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27379 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27384 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27384 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27384 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27385 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27385 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27392 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27392 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27392 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27393 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27393 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27394 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27394 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27394 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27395 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27395 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27398 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27398 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27398 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27399 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27399 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27408 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27408 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27408 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27409 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27409 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27412 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27412 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27412 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27413 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27413 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27418 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27418 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27418 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27419 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27419 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27426 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27426 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27426 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27427 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27427 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27428 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27428 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27428 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27429 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27429 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27432 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27432 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27432 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27433 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27433 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27442 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27442 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27442 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27443 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27443 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27446 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27446 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27446 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27447 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27447 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27452 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27452 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27452 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27453 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27453 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27460 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27460 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27460 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27461 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27461 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27462 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27462 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27462 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27463 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27463 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27466 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27466 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27466 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27467 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27467 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27476 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27476 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27476 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27477 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27477 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27480 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27480 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27480 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27481 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27481 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27486 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27486 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27486 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27487 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27487 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27494 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27494 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27494 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27495 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27495 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27496 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27496 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27496 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27497 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27497 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27500 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27500 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27500 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27501 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27501 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27510 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27510 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27510 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27511 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27511 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27514 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27514 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27514 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27515 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27515 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27520 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27520 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27520 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27521 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27521 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27528 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27528 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27528 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27529 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27529 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27530 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27530 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27530 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27531 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27531 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27534 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27534 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27534 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27535 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27535 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27544 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27544 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27544 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27545 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27545 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27548 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27548 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27548 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27549 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27549 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27554 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27554 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27554 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27555 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27555 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27562 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27562 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27562 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27563 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27563 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27564 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27564 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27564 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27565 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27565 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27568 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27568 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27568 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27569 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27569 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27590 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27590 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27590 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27591 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27591 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27594 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27594 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27594 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27595 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27595 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27600 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27600 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27600 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27601 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27601 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27608 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27608 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27608 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27609 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27609 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27610 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27610 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27610 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27611 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27611 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27614 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27614 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27614 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27615 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27615 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27624 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27624 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27624 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27625 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27625 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27628 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27628 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27628 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27629 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27629 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27634 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27634 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27634 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27635 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27635 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27642 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27642 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27642 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27643 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27643 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27644 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27644 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27644 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27645 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27645 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27648 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27648 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27648 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27649 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27649 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27680 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27680 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27680 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27681 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27681 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27684 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27684 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27684 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27685 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27685 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27690 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27690 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27690 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27691 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27691 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27698 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27698 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27698 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27699 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27699 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27700 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27700 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27700 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27701 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27701 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27704 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27704 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27704 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27705 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27705 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27714 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27714 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27714 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27715 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27715 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27718 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27718 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27718 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27719 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27719 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27724 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27724 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27724 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27725 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27725 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27732 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27732 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27732 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27733 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27733 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27734 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27734 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27734 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27735 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27735 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27738 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27738 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27738 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27739 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27739 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27770 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27770 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27770 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27771 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27771 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27774 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27774 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27774 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27775 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27775 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27780 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27780 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27780 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27781 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27781 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27788 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27788 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27788 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27789 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27789 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27790 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27790 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27790 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27791 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27791 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27794 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27794 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27794 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27795 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27795 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27804 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27804 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27804 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27805 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27805 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27808 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27808 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27808 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27809 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27809 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27814 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27814 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27814 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27815 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27815 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27822 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27822 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27822 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27823 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27823 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27824 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27824 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27824 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27825 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27825 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27828 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27828 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27828 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27829 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27829 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27860 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27860 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27860 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27861 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27861 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27864 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27864 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27864 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27865 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27865 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27870 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27870 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27870 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27871 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27871 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27878 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27878 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27878 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27879 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27879 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27880 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27880 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27880 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27881 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27881 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27884 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27884 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27884 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27885 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27885 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27894 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27894 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27894 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27895 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27895 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27898 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27898 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27898 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27899 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27899 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27904 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27904 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27904 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27905 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27905 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27912 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27912 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27912 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27913 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27913 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27914 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27914 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27914 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27915 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27915 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27918 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27918 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27918 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27919 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27919 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27928 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27928 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27928 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27929 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27929 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27932 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27932 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27932 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27933 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27933 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27938 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27938 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27938 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27939 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27939 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27946 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27946 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27946 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27947 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27947 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27948 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27948 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27948 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27949 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27949 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27952 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27952 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27952 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27953 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27953 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27962 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27962 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27962 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27963 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27963 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27966 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27966 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27966 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27967 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27967 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27972 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27972 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27972 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27973 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27973 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27980 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27980 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27980 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27981 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27981 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27982 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27982 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27982 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27983 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27983 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27986 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27986 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27986 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27987 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27987 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27996 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27996 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27996 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27997 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27997 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28000 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28000 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28000 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28001 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28001 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28006 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28006 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28006 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28007 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28007 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28014 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28014 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28014 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28015 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28015 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28016 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28016 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28016 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28017 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28017 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28020 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28020 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28020 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28021 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28021 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28030 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28030 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28030 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28031 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28031 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28034 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28034 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28034 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28035 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28035 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28040 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28040 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28040 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28041 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28041 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28048 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28048 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28048 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28049 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28049 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28050 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28050 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28050 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28051 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28051 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28054 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28054 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28054 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28055 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28055 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28094 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28094 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28094 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28095 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28095 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28098 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28098 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28098 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28099 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28099 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28104 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28104 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28104 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28105 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28105 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28112 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28112 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28112 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28113 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28113 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28114 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28114 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28114 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28115 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28115 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28118 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28118 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28118 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28119 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28119 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28128 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28128 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28128 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28129 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28129 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28132 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28132 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28132 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28133 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28133 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28138 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28138 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28138 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28139 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28139 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28146 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28146 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28146 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28147 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28147 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28148 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28148 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28148 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28149 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28149 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28152 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28152 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28152 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28153 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28153 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28184 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28184 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28184 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28185 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28185 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28188 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28188 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28188 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28189 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28189 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28194 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28194 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28194 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28195 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28195 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28202 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28202 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28202 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28203 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28203 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28204 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28204 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28204 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28205 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28205 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28208 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28208 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28208 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28209 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28209 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28218 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28218 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28218 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28219 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28219 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28222 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28222 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28222 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28223 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28223 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28228 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28228 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28228 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28229 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28229 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28236 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28236 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28236 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28237 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28237 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28238 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28238 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28238 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28239 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28239 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28242 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28242 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28242 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28243 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28243 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28274 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28274 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28274 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28275 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28275 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28278 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28278 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28278 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28279 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28279 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28284 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28284 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28284 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28285 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28285 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28292 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28292 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28292 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28293 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28293 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28294 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28294 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28294 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28295 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28295 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28298 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28298 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28298 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28299 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28299 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28308 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28308 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28308 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28309 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28309 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28312 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28312 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28312 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28313 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28313 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28318 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28318 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28318 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28319 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28319 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28326 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28326 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28326 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28327 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28327 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28328 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28328 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28328 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28329 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28329 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28332 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28332 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28332 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28333 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28333 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28382 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28382 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28382 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28383 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28383 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28386 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28386 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28386 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28387 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28387 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28392 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28392 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28392 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28393 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28393 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28400 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28400 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28400 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28401 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28401 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28402 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28402 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28402 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28403 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28403 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28406 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28406 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28406 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28407 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28407 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28416 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28416 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28416 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28417 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28417 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28420 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28420 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28420 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28421 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28421 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28426 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28426 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28426 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28427 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28427 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28434 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28434 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28434 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28435 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28435 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28436 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28436 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28436 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28437 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28437 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28440 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28440 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28440 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28441 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28441 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28472 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28472 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28472 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28473 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28473 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28476 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28476 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28476 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28477 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28477 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28482 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28482 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28482 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28483 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28483 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28490 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28490 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28490 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28491 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28491 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28492 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28492 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28492 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28493 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28493 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28496 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28496 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28496 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28497 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28497 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28506 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28506 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28506 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28507 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28507 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28510 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28510 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28510 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28511 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28511 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28516 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28516 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28516 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28517 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28517 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28524 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28524 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28524 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28525 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28525 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28526 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28526 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28526 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28527 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28527 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28530 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28530 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28530 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28531 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28531 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28562 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28562 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28562 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28563 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28563 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28566 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28566 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28566 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28567 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28567 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28572 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28572 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28572 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28573 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28573 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28580 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28580 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28580 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28581 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28581 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28582 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28582 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28582 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28583 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28583 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28586 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28586 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28586 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28587 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28587 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28596 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28596 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28596 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28597 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28597 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28600 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28600 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28600 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28601 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28601 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28606 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28606 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28606 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28607 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28607 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28614 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28614 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28614 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28615 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28615 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28616 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28616 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28616 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28617 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28617 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28620 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28620 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28620 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
28621 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28621 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28664 { 10771 /* vfpclasspd */, X86::VFPCLASSPDZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_ImmUnsignedi8 }, },
28673 { 10771 /* vfpclasspd */, X86::VFPCLASSPDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
28682 { 10818 /* vfpclassps */, X86::VFPCLASSPSZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_ImmUnsignedi8 }, },
28691 { 10818 /* vfpclassps */, X86::VFPCLASSPSZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
28722 { 10919 /* vgatherdpd */, X86::VGATHERDPDZrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC256X5_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC256X }, },
28727 { 10930 /* vgatherdps */, X86::VGATHERDPSZrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
28740 { 11053 /* vgatherqpd */, X86::VGATHERQPDZrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
28750 { 11075 /* vgetexppd */, X86::VGETEXPPDZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
28750 { 11075 /* vgetexppd */, X86::VGETEXPPDZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
28751 { 11075 /* vgetexppd */, X86::VGETEXPPDZm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
28754 { 11075 /* vgetexppd */, X86::VGETEXPPDZrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
28754 { 11075 /* vgetexppd */, X86::VGETEXPPDZrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
28755 { 11075 /* vgetexppd */, X86::VGETEXPPDZmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28760 { 11075 /* vgetexppd */, X86::VGETEXPPDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28760 { 11075 /* vgetexppd */, X86::VGETEXPPDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28761 { 11075 /* vgetexppd */, X86::VGETEXPPDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28768 { 11075 /* vgetexppd */, X86::VGETEXPPDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28768 { 11075 /* vgetexppd */, X86::VGETEXPPDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28769 { 11075 /* vgetexppd */, X86::VGETEXPPDZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28770 { 11075 /* vgetexppd */, X86::VGETEXPPDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
28770 { 11075 /* vgetexppd */, X86::VGETEXPPDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
28771 { 11075 /* vgetexppd */, X86::VGETEXPPDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
28774 { 11075 /* vgetexppd */, X86::VGETEXPPDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
28774 { 11075 /* vgetexppd */, X86::VGETEXPPDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
28775 { 11075 /* vgetexppd */, X86::VGETEXPPDZmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
28780 { 11085 /* vgetexpps */, X86::VGETEXPPSZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
28780 { 11085 /* vgetexpps */, X86::VGETEXPPSZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
28781 { 11085 /* vgetexpps */, X86::VGETEXPPSZm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
28784 { 11085 /* vgetexpps */, X86::VGETEXPPSZrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
28784 { 11085 /* vgetexpps */, X86::VGETEXPPSZrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
28785 { 11085 /* vgetexpps */, X86::VGETEXPPSZmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28790 { 11085 /* vgetexpps */, X86::VGETEXPPSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28790 { 11085 /* vgetexpps */, X86::VGETEXPPSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28791 { 11085 /* vgetexpps */, X86::VGETEXPPSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28798 { 11085 /* vgetexpps */, X86::VGETEXPPSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28798 { 11085 /* vgetexpps */, X86::VGETEXPPSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28799 { 11085 /* vgetexpps */, X86::VGETEXPPSZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28800 { 11085 /* vgetexpps */, X86::VGETEXPPSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
28800 { 11085 /* vgetexpps */, X86::VGETEXPPSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
28801 { 11085 /* vgetexpps */, X86::VGETEXPPSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
28804 { 11085 /* vgetexpps */, X86::VGETEXPPSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
28804 { 11085 /* vgetexpps */, X86::VGETEXPPSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
28805 { 11085 /* vgetexpps */, X86::VGETEXPPSZmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
28828 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
28828 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
28829 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
28832 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
28832 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
28833 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
28838 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
28838 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
28839 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
28846 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
28846 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
28847 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
28848 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
28848 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
28849 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
28852 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
28852 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
28853 { 11115 /* vgetmantpd */, X86::VGETMANTPDZrmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
28858 { 11126 /* vgetmantps */, X86::VGETMANTPSZrri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
28858 { 11126 /* vgetmantps */, X86::VGETMANTPSZrri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
28859 { 11126 /* vgetmantps */, X86::VGETMANTPSZrmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
28862 { 11126 /* vgetmantps */, X86::VGETMANTPSZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
28862 { 11126 /* vgetmantps */, X86::VGETMANTPSZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
28863 { 11126 /* vgetmantps */, X86::VGETMANTPSZrmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
28868 { 11126 /* vgetmantps */, X86::VGETMANTPSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
28868 { 11126 /* vgetmantps */, X86::VGETMANTPSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
28869 { 11126 /* vgetmantps */, X86::VGETMANTPSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
28876 { 11126 /* vgetmantps */, X86::VGETMANTPSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
28876 { 11126 /* vgetmantps */, X86::VGETMANTPSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
28877 { 11126 /* vgetmantps */, X86::VGETMANTPSZrmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
28878 { 11126 /* vgetmantps */, X86::VGETMANTPSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
28878 { 11126 /* vgetmantps */, X86::VGETMANTPSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
28879 { 11126 /* vgetmantps */, X86::VGETMANTPSZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
28882 { 11126 /* vgetmantps */, X86::VGETMANTPSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
28882 { 11126 /* vgetmantps */, X86::VGETMANTPSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
28883 { 11126 /* vgetmantps */, X86::VGETMANTPSZrmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
28910 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
28910 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
28910 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
28911 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
28911 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
28914 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmbi, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem8, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
28914 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmbi, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem8, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
28919 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
28919 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
28919 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
28920 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
28920 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
28927 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
28927 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
28927 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
28928 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
28928 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
28929 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem8, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
28929 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem8, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
28932 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem8, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
28932 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem8, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
28941 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
28941 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
28941 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
28942 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
28942 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
28945 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmbi, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem8, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
28945 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmbi, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem8, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
28950 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
28950 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
28950 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
28951 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
28951 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
28958 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
28958 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
28958 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
28959 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
28959 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
28960 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem8, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
28960 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem8, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
28963 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem8, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
28963 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem8, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
28972 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28972 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28972 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28973 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28973 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28978 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28978 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28978 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28979 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28979 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28984 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28984 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28984 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28985 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28985 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29006 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29006 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29007 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Zrm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29007 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Zrm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29010 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29010 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29011 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29011 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29014 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29014 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29015 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29015 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29016 { 11260 /* vinsertf32x8 */, X86::VINSERTF32x8Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29016 { 11260 /* vinsertf32x8 */, X86::VINSERTF32x8Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29017 { 11260 /* vinsertf32x8 */, X86::VINSERTF32x8Zrm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29017 { 11260 /* vinsertf32x8 */, X86::VINSERTF32x8Zrm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29018 { 11260 /* vinsertf32x8 */, X86::VINSERTF32x8Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29018 { 11260 /* vinsertf32x8 */, X86::VINSERTF32x8Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29019 { 11260 /* vinsertf32x8 */, X86::VINSERTF32x8Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29019 { 11260 /* vinsertf32x8 */, X86::VINSERTF32x8Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29020 { 11260 /* vinsertf32x8 */, X86::VINSERTF32x8Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29020 { 11260 /* vinsertf32x8 */, X86::VINSERTF32x8Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29021 { 11260 /* vinsertf32x8 */, X86::VINSERTF32x8Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29021 { 11260 /* vinsertf32x8 */, X86::VINSERTF32x8Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29024 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29024 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29025 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Zrm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29025 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Zrm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29028 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29028 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29029 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29029 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29032 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29032 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29033 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29033 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29034 { 11286 /* vinsertf64x4 */, X86::VINSERTF64x4Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29034 { 11286 /* vinsertf64x4 */, X86::VINSERTF64x4Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29035 { 11286 /* vinsertf64x4 */, X86::VINSERTF64x4Zrm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29035 { 11286 /* vinsertf64x4 */, X86::VINSERTF64x4Zrm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29036 { 11286 /* vinsertf64x4 */, X86::VINSERTF64x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29036 { 11286 /* vinsertf64x4 */, X86::VINSERTF64x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29037 { 11286 /* vinsertf64x4 */, X86::VINSERTF64x4Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29037 { 11286 /* vinsertf64x4 */, X86::VINSERTF64x4Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29038 { 11286 /* vinsertf64x4 */, X86::VINSERTF64x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29038 { 11286 /* vinsertf64x4 */, X86::VINSERTF64x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29039 { 11286 /* vinsertf64x4 */, X86::VINSERTF64x4Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29039 { 11286 /* vinsertf64x4 */, X86::VINSERTF64x4Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29044 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29044 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29045 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Zrm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29045 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Zrm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29048 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29048 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29049 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29049 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29052 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29052 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29053 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29053 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29054 { 11324 /* vinserti32x8 */, X86::VINSERTI32x8Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29054 { 11324 /* vinserti32x8 */, X86::VINSERTI32x8Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29055 { 11324 /* vinserti32x8 */, X86::VINSERTI32x8Zrm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29055 { 11324 /* vinserti32x8 */, X86::VINSERTI32x8Zrm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29056 { 11324 /* vinserti32x8 */, X86::VINSERTI32x8Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29056 { 11324 /* vinserti32x8 */, X86::VINSERTI32x8Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29057 { 11324 /* vinserti32x8 */, X86::VINSERTI32x8Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29057 { 11324 /* vinserti32x8 */, X86::VINSERTI32x8Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29058 { 11324 /* vinserti32x8 */, X86::VINSERTI32x8Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29058 { 11324 /* vinserti32x8 */, X86::VINSERTI32x8Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29059 { 11324 /* vinserti32x8 */, X86::VINSERTI32x8Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29059 { 11324 /* vinserti32x8 */, X86::VINSERTI32x8Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29062 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29062 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29063 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Zrm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29063 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Zrm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29066 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29066 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29067 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29067 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29070 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29070 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29071 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29071 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29072 { 11350 /* vinserti64x4 */, X86::VINSERTI64x4Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29072 { 11350 /* vinserti64x4 */, X86::VINSERTI64x4Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29073 { 11350 /* vinserti64x4 */, X86::VINSERTI64x4Zrm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29073 { 11350 /* vinserti64x4 */, X86::VINSERTI64x4Zrm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29074 { 11350 /* vinserti64x4 */, X86::VINSERTI64x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29074 { 11350 /* vinserti64x4 */, X86::VINSERTI64x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29075 { 11350 /* vinserti64x4 */, X86::VINSERTI64x4Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29075 { 11350 /* vinserti64x4 */, X86::VINSERTI64x4Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29076 { 11350 /* vinserti64x4 */, X86::VINSERTI64x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29076 { 11350 /* vinserti64x4 */, X86::VINSERTI64x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29077 { 11350 /* vinserti64x4 */, X86::VINSERTI64x4Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29077 { 11350 /* vinserti64x4 */, X86::VINSERTI64x4Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29103 { 11423 /* vmaxpd */, X86::VMAXPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29103 { 11423 /* vmaxpd */, X86::VMAXPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29103 { 11423 /* vmaxpd */, X86::VMAXPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29104 { 11423 /* vmaxpd */, X86::VMAXPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29104 { 11423 /* vmaxpd */, X86::VMAXPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29107 { 11423 /* vmaxpd */, X86::VMAXPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29107 { 11423 /* vmaxpd */, X86::VMAXPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29107 { 11423 /* vmaxpd */, X86::VMAXPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29108 { 11423 /* vmaxpd */, X86::VMAXPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29108 { 11423 /* vmaxpd */, X86::VMAXPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29113 { 11423 /* vmaxpd */, X86::VMAXPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29113 { 11423 /* vmaxpd */, X86::VMAXPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29113 { 11423 /* vmaxpd */, X86::VMAXPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29114 { 11423 /* vmaxpd */, X86::VMAXPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29114 { 11423 /* vmaxpd */, X86::VMAXPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29121 { 11423 /* vmaxpd */, X86::VMAXPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29121 { 11423 /* vmaxpd */, X86::VMAXPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29121 { 11423 /* vmaxpd */, X86::VMAXPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29122 { 11423 /* vmaxpd */, X86::VMAXPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29122 { 11423 /* vmaxpd */, X86::VMAXPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29123 { 11423 /* vmaxpd */, X86::VMAXPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29123 { 11423 /* vmaxpd */, X86::VMAXPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29123 { 11423 /* vmaxpd */, X86::VMAXPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29124 { 11423 /* vmaxpd */, X86::VMAXPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29124 { 11423 /* vmaxpd */, X86::VMAXPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29127 { 11423 /* vmaxpd */, X86::VMAXPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29127 { 11423 /* vmaxpd */, X86::VMAXPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29127 { 11423 /* vmaxpd */, X86::VMAXPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29128 { 11423 /* vmaxpd */, X86::VMAXPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29128 { 11423 /* vmaxpd */, X86::VMAXPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29137 { 11430 /* vmaxps */, X86::VMAXPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29137 { 11430 /* vmaxps */, X86::VMAXPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29137 { 11430 /* vmaxps */, X86::VMAXPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29138 { 11430 /* vmaxps */, X86::VMAXPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29138 { 11430 /* vmaxps */, X86::VMAXPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29141 { 11430 /* vmaxps */, X86::VMAXPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29141 { 11430 /* vmaxps */, X86::VMAXPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29141 { 11430 /* vmaxps */, X86::VMAXPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29142 { 11430 /* vmaxps */, X86::VMAXPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29142 { 11430 /* vmaxps */, X86::VMAXPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29147 { 11430 /* vmaxps */, X86::VMAXPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29147 { 11430 /* vmaxps */, X86::VMAXPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29147 { 11430 /* vmaxps */, X86::VMAXPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29148 { 11430 /* vmaxps */, X86::VMAXPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29148 { 11430 /* vmaxps */, X86::VMAXPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29155 { 11430 /* vmaxps */, X86::VMAXPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29155 { 11430 /* vmaxps */, X86::VMAXPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29155 { 11430 /* vmaxps */, X86::VMAXPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29156 { 11430 /* vmaxps */, X86::VMAXPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29156 { 11430 /* vmaxps */, X86::VMAXPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29157 { 11430 /* vmaxps */, X86::VMAXPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29157 { 11430 /* vmaxps */, X86::VMAXPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29157 { 11430 /* vmaxps */, X86::VMAXPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29158 { 11430 /* vmaxps */, X86::VMAXPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29158 { 11430 /* vmaxps */, X86::VMAXPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29161 { 11430 /* vmaxps */, X86::VMAXPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29161 { 11430 /* vmaxps */, X86::VMAXPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29161 { 11430 /* vmaxps */, X86::VMAXPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29162 { 11430 /* vmaxps */, X86::VMAXPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29162 { 11430 /* vmaxps */, X86::VMAXPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29196 { 11473 /* vminpd */, X86::VMINPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29196 { 11473 /* vminpd */, X86::VMINPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29196 { 11473 /* vminpd */, X86::VMINPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29197 { 11473 /* vminpd */, X86::VMINPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29197 { 11473 /* vminpd */, X86::VMINPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29200 { 11473 /* vminpd */, X86::VMINPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29200 { 11473 /* vminpd */, X86::VMINPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29200 { 11473 /* vminpd */, X86::VMINPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29201 { 11473 /* vminpd */, X86::VMINPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29201 { 11473 /* vminpd */, X86::VMINPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29206 { 11473 /* vminpd */, X86::VMINPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29206 { 11473 /* vminpd */, X86::VMINPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29206 { 11473 /* vminpd */, X86::VMINPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29207 { 11473 /* vminpd */, X86::VMINPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29207 { 11473 /* vminpd */, X86::VMINPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29214 { 11473 /* vminpd */, X86::VMINPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29214 { 11473 /* vminpd */, X86::VMINPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29214 { 11473 /* vminpd */, X86::VMINPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29215 { 11473 /* vminpd */, X86::VMINPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29215 { 11473 /* vminpd */, X86::VMINPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29216 { 11473 /* vminpd */, X86::VMINPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29216 { 11473 /* vminpd */, X86::VMINPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29216 { 11473 /* vminpd */, X86::VMINPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29217 { 11473 /* vminpd */, X86::VMINPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29217 { 11473 /* vminpd */, X86::VMINPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29220 { 11473 /* vminpd */, X86::VMINPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29220 { 11473 /* vminpd */, X86::VMINPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29220 { 11473 /* vminpd */, X86::VMINPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29221 { 11473 /* vminpd */, X86::VMINPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29221 { 11473 /* vminpd */, X86::VMINPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29230 { 11480 /* vminps */, X86::VMINPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29230 { 11480 /* vminps */, X86::VMINPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29230 { 11480 /* vminps */, X86::VMINPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29231 { 11480 /* vminps */, X86::VMINPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29231 { 11480 /* vminps */, X86::VMINPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29234 { 11480 /* vminps */, X86::VMINPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29234 { 11480 /* vminps */, X86::VMINPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29234 { 11480 /* vminps */, X86::VMINPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29235 { 11480 /* vminps */, X86::VMINPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29235 { 11480 /* vminps */, X86::VMINPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29240 { 11480 /* vminps */, X86::VMINPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29240 { 11480 /* vminps */, X86::VMINPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29240 { 11480 /* vminps */, X86::VMINPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29241 { 11480 /* vminps */, X86::VMINPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29241 { 11480 /* vminps */, X86::VMINPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29248 { 11480 /* vminps */, X86::VMINPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29248 { 11480 /* vminps */, X86::VMINPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29248 { 11480 /* vminps */, X86::VMINPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29249 { 11480 /* vminps */, X86::VMINPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29249 { 11480 /* vminps */, X86::VMINPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29250 { 11480 /* vminps */, X86::VMINPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29250 { 11480 /* vminps */, X86::VMINPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29250 { 11480 /* vminps */, X86::VMINPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29251 { 11480 /* vminps */, X86::VMINPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29251 { 11480 /* vminps */, X86::VMINPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29254 { 11480 /* vminps */, X86::VMINPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29254 { 11480 /* vminps */, X86::VMINPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29254 { 11480 /* vminps */, X86::VMINPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
29255 { 11480 /* vminps */, X86::VMINPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29255 { 11480 /* vminps */, X86::VMINPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29290 { 11525 /* vmovapd */, X86::VMOVAPDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29290 { 11525 /* vmovapd */, X86::VMOVAPDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29291 { 11525 /* vmovapd */, X86::VMOVAPDZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
29296 { 11525 /* vmovapd */, X86::VMOVAPDZmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
29301 { 11525 /* vmovapd */, X86::VMOVAPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29301 { 11525 /* vmovapd */, X86::VMOVAPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29302 { 11525 /* vmovapd */, X86::VMOVAPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
29305 { 11525 /* vmovapd */, X86::VMOVAPDZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29310 { 11525 /* vmovapd */, X86::VMOVAPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29310 { 11525 /* vmovapd */, X86::VMOVAPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29311 { 11525 /* vmovapd */, X86::VMOVAPDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
29316 { 11533 /* vmovapd.s */, X86::VMOVAPDZrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29316 { 11533 /* vmovapd.s */, X86::VMOVAPDZrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29319 { 11533 /* vmovapd.s */, X86::VMOVAPDZrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29319 { 11533 /* vmovapd.s */, X86::VMOVAPDZrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29322 { 11533 /* vmovapd.s */, X86::VMOVAPDZrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29322 { 11533 /* vmovapd.s */, X86::VMOVAPDZrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29331 { 11543 /* vmovaps */, X86::VMOVAPSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29331 { 11543 /* vmovaps */, X86::VMOVAPSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29332 { 11543 /* vmovaps */, X86::VMOVAPSZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
29337 { 11543 /* vmovaps */, X86::VMOVAPSZmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
29342 { 11543 /* vmovaps */, X86::VMOVAPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29342 { 11543 /* vmovaps */, X86::VMOVAPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29343 { 11543 /* vmovaps */, X86::VMOVAPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
29346 { 11543 /* vmovaps */, X86::VMOVAPSZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29351 { 11543 /* vmovaps */, X86::VMOVAPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29351 { 11543 /* vmovaps */, X86::VMOVAPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29352 { 11543 /* vmovaps */, X86::VMOVAPSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
29357 { 11551 /* vmovaps.s */, X86::VMOVAPSZrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29357 { 11551 /* vmovaps.s */, X86::VMOVAPSZrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29360 { 11551 /* vmovaps.s */, X86::VMOVAPSZrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29360 { 11551 /* vmovaps.s */, X86::VMOVAPSZrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29363 { 11551 /* vmovaps.s */, X86::VMOVAPSZrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29363 { 11551 /* vmovaps.s */, X86::VMOVAPSZrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29384 { 11567 /* vmovddup */, X86::VMOVDDUPZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29384 { 11567 /* vmovddup */, X86::VMOVDDUPZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29385 { 11567 /* vmovddup */, X86::VMOVDDUPZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
29390 { 11567 /* vmovddup */, X86::VMOVDDUPZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29390 { 11567 /* vmovddup */, X86::VMOVDDUPZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29391 { 11567 /* vmovddup */, X86::VMOVDDUPZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
29396 { 11567 /* vmovddup */, X86::VMOVDDUPZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29396 { 11567 /* vmovddup */, X86::VMOVDDUPZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29397 { 11567 /* vmovddup */, X86::VMOVDDUPZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
29410 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Zrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29410 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Zrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29411 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Zrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
29414 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Zmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
29419 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29419 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29420 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
29423 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Zmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29428 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29428 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29429 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
29432 { 11604 /* vmovdqa32.s */, X86::VMOVDQA32Zrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29432 { 11604 /* vmovdqa32.s */, X86::VMOVDQA32Zrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29435 { 11604 /* vmovdqa32.s */, X86::VMOVDQA32Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29435 { 11604 /* vmovdqa32.s */, X86::VMOVDQA32Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29438 { 11604 /* vmovdqa32.s */, X86::VMOVDQA32Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29438 { 11604 /* vmovdqa32.s */, X86::VMOVDQA32Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29443 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Zrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29443 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Zrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29444 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Zrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
29447 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Zmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
29452 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29452 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29453 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
29456 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Zmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29461 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29461 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29462 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
29465 { 11626 /* vmovdqa64.s */, X86::VMOVDQA64Zrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29465 { 11626 /* vmovdqa64.s */, X86::VMOVDQA64Zrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29468 { 11626 /* vmovdqa64.s */, X86::VMOVDQA64Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29468 { 11626 /* vmovdqa64.s */, X86::VMOVDQA64Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29471 { 11626 /* vmovdqa64.s */, X86::VMOVDQA64Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29471 { 11626 /* vmovdqa64.s */, X86::VMOVDQA64Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29484 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Zrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29484 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Zrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29485 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Zrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
29488 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Zmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
29493 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29493 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29494 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
29497 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Zmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29502 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29502 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29503 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
29506 { 11666 /* vmovdqu16.s */, X86::VMOVDQU16Zrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29506 { 11666 /* vmovdqu16.s */, X86::VMOVDQU16Zrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29509 { 11666 /* vmovdqu16.s */, X86::VMOVDQU16Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29509 { 11666 /* vmovdqu16.s */, X86::VMOVDQU16Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29512 { 11666 /* vmovdqu16.s */, X86::VMOVDQU16Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29512 { 11666 /* vmovdqu16.s */, X86::VMOVDQU16Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29517 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Zrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29517 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Zrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29518 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Zrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
29521 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Zmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
29526 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29526 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29527 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
29530 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Zmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29535 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29535 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29536 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
29539 { 11688 /* vmovdqu32.s */, X86::VMOVDQU32Zrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29539 { 11688 /* vmovdqu32.s */, X86::VMOVDQU32Zrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29542 { 11688 /* vmovdqu32.s */, X86::VMOVDQU32Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29542 { 11688 /* vmovdqu32.s */, X86::VMOVDQU32Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29545 { 11688 /* vmovdqu32.s */, X86::VMOVDQU32Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29545 { 11688 /* vmovdqu32.s */, X86::VMOVDQU32Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29550 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Zrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29550 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Zrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29551 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Zrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
29554 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Zmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
29559 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29559 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29560 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
29563 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Zmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29568 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29568 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29569 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
29572 { 11710 /* vmovdqu64.s */, X86::VMOVDQU64Zrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29572 { 11710 /* vmovdqu64.s */, X86::VMOVDQU64Zrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29575 { 11710 /* vmovdqu64.s */, X86::VMOVDQU64Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29575 { 11710 /* vmovdqu64.s */, X86::VMOVDQU64Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29578 { 11710 /* vmovdqu64.s */, X86::VMOVDQU64Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29578 { 11710 /* vmovdqu64.s */, X86::VMOVDQU64Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29583 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Zrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29583 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Zrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29584 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Zrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
29587 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Zmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
29592 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29592 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29593 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
29596 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Zmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29601 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29601 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29602 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
29605 { 11731 /* vmovdqu8.s */, X86::VMOVDQU8Zrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29605 { 11731 /* vmovdqu8.s */, X86::VMOVDQU8Zrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29608 { 11731 /* vmovdqu8.s */, X86::VMOVDQU8Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29608 { 11731 /* vmovdqu8.s */, X86::VMOVDQU8Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29611 { 11731 /* vmovdqu8.s */, X86::VMOVDQU8Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29611 { 11731 /* vmovdqu8.s */, X86::VMOVDQU8Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29640 { 11812 /* vmovntdq */, X86::VMOVNTDQZmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
29645 { 11821 /* vmovntdqa */, X86::VMOVNTDQAZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
29650 { 11831 /* vmovntpd */, X86::VMOVNTPDZmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
29655 { 11840 /* vmovntps */, X86::VMOVNTPSZmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
29691 { 11879 /* vmovshdup */, X86::VMOVSHDUPZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29691 { 11879 /* vmovshdup */, X86::VMOVSHDUPZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29692 { 11879 /* vmovshdup */, X86::VMOVSHDUPZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
29697 { 11879 /* vmovshdup */, X86::VMOVSHDUPZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29697 { 11879 /* vmovshdup */, X86::VMOVSHDUPZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29698 { 11879 /* vmovshdup */, X86::VMOVSHDUPZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
29703 { 11879 /* vmovshdup */, X86::VMOVSHDUPZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29703 { 11879 /* vmovshdup */, X86::VMOVSHDUPZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29704 { 11879 /* vmovshdup */, X86::VMOVSHDUPZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
29713 { 11889 /* vmovsldup */, X86::VMOVSLDUPZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29713 { 11889 /* vmovsldup */, X86::VMOVSLDUPZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29714 { 11889 /* vmovsldup */, X86::VMOVSLDUPZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
29719 { 11889 /* vmovsldup */, X86::VMOVSLDUPZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29719 { 11889 /* vmovsldup */, X86::VMOVSLDUPZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29720 { 11889 /* vmovsldup */, X86::VMOVSLDUPZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
29725 { 11889 /* vmovsldup */, X86::VMOVSLDUPZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29725 { 11889 /* vmovsldup */, X86::VMOVSLDUPZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29726 { 11889 /* vmovsldup */, X86::VMOVSLDUPZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
29750 { 11915 /* vmovupd */, X86::VMOVUPDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29750 { 11915 /* vmovupd */, X86::VMOVUPDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29751 { 11915 /* vmovupd */, X86::VMOVUPDZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
29756 { 11915 /* vmovupd */, X86::VMOVUPDZmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
29761 { 11915 /* vmovupd */, X86::VMOVUPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29761 { 11915 /* vmovupd */, X86::VMOVUPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29762 { 11915 /* vmovupd */, X86::VMOVUPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
29765 { 11915 /* vmovupd */, X86::VMOVUPDZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29770 { 11915 /* vmovupd */, X86::VMOVUPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29770 { 11915 /* vmovupd */, X86::VMOVUPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29771 { 11915 /* vmovupd */, X86::VMOVUPDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
29776 { 11923 /* vmovupd.s */, X86::VMOVUPDZrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29776 { 11923 /* vmovupd.s */, X86::VMOVUPDZrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29779 { 11923 /* vmovupd.s */, X86::VMOVUPDZrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29779 { 11923 /* vmovupd.s */, X86::VMOVUPDZrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29782 { 11923 /* vmovupd.s */, X86::VMOVUPDZrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29782 { 11923 /* vmovupd.s */, X86::VMOVUPDZrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29791 { 11933 /* vmovups */, X86::VMOVUPSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29791 { 11933 /* vmovups */, X86::VMOVUPSZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29792 { 11933 /* vmovups */, X86::VMOVUPSZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
29797 { 11933 /* vmovups */, X86::VMOVUPSZmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
29802 { 11933 /* vmovups */, X86::VMOVUPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29802 { 11933 /* vmovups */, X86::VMOVUPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29803 { 11933 /* vmovups */, X86::VMOVUPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
29806 { 11933 /* vmovups */, X86::VMOVUPSZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29811 { 11933 /* vmovups */, X86::VMOVUPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29811 { 11933 /* vmovups */, X86::VMOVUPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29812 { 11933 /* vmovups */, X86::VMOVUPSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
29817 { 11941 /* vmovups.s */, X86::VMOVUPSZrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29817 { 11941 /* vmovups.s */, X86::VMOVUPSZrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
29820 { 11941 /* vmovups.s */, X86::VMOVUPSZrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29820 { 11941 /* vmovups.s */, X86::VMOVUPSZrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29823 { 11941 /* vmovups.s */, X86::VMOVUPSZrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29823 { 11941 /* vmovups.s */, X86::VMOVUPSZrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29847 { 12021 /* vmulpd */, X86::VMULPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29847 { 12021 /* vmulpd */, X86::VMULPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29847 { 12021 /* vmulpd */, X86::VMULPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29848 { 12021 /* vmulpd */, X86::VMULPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29848 { 12021 /* vmulpd */, X86::VMULPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29851 { 12021 /* vmulpd */, X86::VMULPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
29851 { 12021 /* vmulpd */, X86::VMULPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
29851 { 12021 /* vmulpd */, X86::VMULPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
29852 { 12021 /* vmulpd */, X86::VMULPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29852 { 12021 /* vmulpd */, X86::VMULPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29857 { 12021 /* vmulpd */, X86::VMULPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29857 { 12021 /* vmulpd */, X86::VMULPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29857 { 12021 /* vmulpd */, X86::VMULPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29858 { 12021 /* vmulpd */, X86::VMULPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29858 { 12021 /* vmulpd */, X86::VMULPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29865 { 12021 /* vmulpd */, X86::VMULPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29865 { 12021 /* vmulpd */, X86::VMULPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29865 { 12021 /* vmulpd */, X86::VMULPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29866 { 12021 /* vmulpd */, X86::VMULPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29866 { 12021 /* vmulpd */, X86::VMULPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29867 { 12021 /* vmulpd */, X86::VMULPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
29867 { 12021 /* vmulpd */, X86::VMULPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
29867 { 12021 /* vmulpd */, X86::VMULPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
29868 { 12021 /* vmulpd */, X86::VMULPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29868 { 12021 /* vmulpd */, X86::VMULPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29871 { 12021 /* vmulpd */, X86::VMULPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
29871 { 12021 /* vmulpd */, X86::VMULPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
29871 { 12021 /* vmulpd */, X86::VMULPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
29872 { 12021 /* vmulpd */, X86::VMULPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29872 { 12021 /* vmulpd */, X86::VMULPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29881 { 12028 /* vmulps */, X86::VMULPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29881 { 12028 /* vmulps */, X86::VMULPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29881 { 12028 /* vmulps */, X86::VMULPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29882 { 12028 /* vmulps */, X86::VMULPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29882 { 12028 /* vmulps */, X86::VMULPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29885 { 12028 /* vmulps */, X86::VMULPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
29885 { 12028 /* vmulps */, X86::VMULPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
29885 { 12028 /* vmulps */, X86::VMULPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
29886 { 12028 /* vmulps */, X86::VMULPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29886 { 12028 /* vmulps */, X86::VMULPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29891 { 12028 /* vmulps */, X86::VMULPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29891 { 12028 /* vmulps */, X86::VMULPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29891 { 12028 /* vmulps */, X86::VMULPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29892 { 12028 /* vmulps */, X86::VMULPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29892 { 12028 /* vmulps */, X86::VMULPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29899 { 12028 /* vmulps */, X86::VMULPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29899 { 12028 /* vmulps */, X86::VMULPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29899 { 12028 /* vmulps */, X86::VMULPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29900 { 12028 /* vmulps */, X86::VMULPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29900 { 12028 /* vmulps */, X86::VMULPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29901 { 12028 /* vmulps */, X86::VMULPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
29901 { 12028 /* vmulps */, X86::VMULPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
29901 { 12028 /* vmulps */, X86::VMULPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
29902 { 12028 /* vmulps */, X86::VMULPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29902 { 12028 /* vmulps */, X86::VMULPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29905 { 12028 /* vmulps */, X86::VMULPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
29905 { 12028 /* vmulps */, X86::VMULPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
29905 { 12028 /* vmulps */, X86::VMULPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
29906 { 12028 /* vmulps */, X86::VMULPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29906 { 12028 /* vmulps */, X86::VMULPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29943 { 12088 /* vorpd */, X86::VORPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29943 { 12088 /* vorpd */, X86::VORPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29943 { 12088 /* vorpd */, X86::VORPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29944 { 12088 /* vorpd */, X86::VORPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29944 { 12088 /* vorpd */, X86::VORPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29947 { 12088 /* vorpd */, X86::VORPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29947 { 12088 /* vorpd */, X86::VORPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29952 { 12088 /* vorpd */, X86::VORPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29952 { 12088 /* vorpd */, X86::VORPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29952 { 12088 /* vorpd */, X86::VORPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29953 { 12088 /* vorpd */, X86::VORPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29953 { 12088 /* vorpd */, X86::VORPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29960 { 12088 /* vorpd */, X86::VORPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29960 { 12088 /* vorpd */, X86::VORPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29960 { 12088 /* vorpd */, X86::VORPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29961 { 12088 /* vorpd */, X86::VORPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29961 { 12088 /* vorpd */, X86::VORPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29962 { 12088 /* vorpd */, X86::VORPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29962 { 12088 /* vorpd */, X86::VORPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29965 { 12088 /* vorpd */, X86::VORPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29965 { 12088 /* vorpd */, X86::VORPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29974 { 12094 /* vorps */, X86::VORPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29974 { 12094 /* vorps */, X86::VORPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29974 { 12094 /* vorps */, X86::VORPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29975 { 12094 /* vorps */, X86::VORPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29975 { 12094 /* vorps */, X86::VORPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29978 { 12094 /* vorps */, X86::VORPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29978 { 12094 /* vorps */, X86::VORPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29983 { 12094 /* vorps */, X86::VORPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29983 { 12094 /* vorps */, X86::VORPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29983 { 12094 /* vorps */, X86::VORPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29984 { 12094 /* vorps */, X86::VORPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29984 { 12094 /* vorps */, X86::VORPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29991 { 12094 /* vorps */, X86::VORPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29991 { 12094 /* vorps */, X86::VORPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29991 { 12094 /* vorps */, X86::VORPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29992 { 12094 /* vorps */, X86::VORPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29992 { 12094 /* vorps */, X86::VORPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29993 { 12094 /* vorps */, X86::VORPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29993 { 12094 /* vorps */, X86::VORPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29996 { 12094 /* vorps */, X86::VORPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29996 { 12094 /* vorps */, X86::VORPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29997 { 12100 /* vp2intersectd */, X86::VP2INTERSECTDZrr, Convert__VK16Pair1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK16Pair, MCK_VR512, MCK_VR512 }, },
29997 { 12100 /* vp2intersectd */, X86::VP2INTERSECTDZrr, Convert__VK16Pair1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK16Pair, MCK_VR512, MCK_VR512 }, },
29998 { 12100 /* vp2intersectd */, X86::VP2INTERSECTDZrm, Convert__VK16Pair1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK16Pair, MCK_VR512, MCK_Mem512 }, },
30003 { 12100 /* vp2intersectd */, X86::VP2INTERSECTDZrmb, Convert__VK16Pair1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VK16Pair, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30010 { 12114 /* vp2intersectq */, X86::VP2INTERSECTQZrr, Convert__VK8Pair1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK8Pair, MCK_VR512, MCK_VR512 }, },
30010 { 12114 /* vp2intersectq */, X86::VP2INTERSECTQZrr, Convert__VK8Pair1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK8Pair, MCK_VR512, MCK_VR512 }, },
30011 { 12114 /* vp2intersectq */, X86::VP2INTERSECTQZrm, Convert__VK8Pair1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK8Pair, MCK_VR512, MCK_Mem512 }, },
30014 { 12114 /* vp2intersectq */, X86::VP2INTERSECTQZrmb, Convert__VK8Pair1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VK8Pair, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30015 { 12128 /* vp4dpwssd */, X86::VP4DPWSSDrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
30015 { 12128 /* vp4dpwssd */, X86::VP4DPWSSDrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
30016 { 12128 /* vp4dpwssd */, X86::VP4DPWSSDrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
30016 { 12128 /* vp4dpwssd */, X86::VP4DPWSSDrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
30017 { 12128 /* vp4dpwssd */, X86::VP4DPWSSDrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
30017 { 12128 /* vp4dpwssd */, X86::VP4DPWSSDrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
30018 { 12138 /* vp4dpwssds */, X86::VP4DPWSSDSrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
30018 { 12138 /* vp4dpwssds */, X86::VP4DPWSSDSrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
30019 { 12138 /* vp4dpwssds */, X86::VP4DPWSSDSrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
30019 { 12138 /* vp4dpwssds */, X86::VP4DPWSSDSrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
30020 { 12138 /* vp4dpwssds */, X86::VP4DPWSSDSrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
30020 { 12138 /* vp4dpwssds */, X86::VP4DPWSSDSrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
30029 { 12149 /* vpabsb */, X86::VPABSBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
30029 { 12149 /* vpabsb */, X86::VPABSBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
30030 { 12149 /* vpabsb */, X86::VPABSBZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
30035 { 12149 /* vpabsb */, X86::VPABSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30035 { 12149 /* vpabsb */, X86::VPABSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30036 { 12149 /* vpabsb */, X86::VPABSBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
30041 { 12149 /* vpabsb */, X86::VPABSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
30041 { 12149 /* vpabsb */, X86::VPABSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
30042 { 12149 /* vpabsb */, X86::VPABSBZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
30051 { 12156 /* vpabsd */, X86::VPABSDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
30051 { 12156 /* vpabsd */, X86::VPABSDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
30052 { 12156 /* vpabsd */, X86::VPABSDZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
30055 { 12156 /* vpabsd */, X86::VPABSDZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30060 { 12156 /* vpabsd */, X86::VPABSDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30060 { 12156 /* vpabsd */, X86::VPABSDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30061 { 12156 /* vpabsd */, X86::VPABSDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
30068 { 12156 /* vpabsd */, X86::VPABSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
30068 { 12156 /* vpabsd */, X86::VPABSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
30069 { 12156 /* vpabsd */, X86::VPABSDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
30070 { 12156 /* vpabsd */, X86::VPABSDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
30073 { 12156 /* vpabsd */, X86::VPABSDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
30078 { 12163 /* vpabsq */, X86::VPABSQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
30078 { 12163 /* vpabsq */, X86::VPABSQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
30079 { 12163 /* vpabsq */, X86::VPABSQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
30082 { 12163 /* vpabsq */, X86::VPABSQZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30087 { 12163 /* vpabsq */, X86::VPABSQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30087 { 12163 /* vpabsq */, X86::VPABSQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30088 { 12163 /* vpabsq */, X86::VPABSQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
30095 { 12163 /* vpabsq */, X86::VPABSQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
30095 { 12163 /* vpabsq */, X86::VPABSQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
30096 { 12163 /* vpabsq */, X86::VPABSQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
30097 { 12163 /* vpabsq */, X86::VPABSQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
30100 { 12163 /* vpabsq */, X86::VPABSQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
30109 { 12170 /* vpabsw */, X86::VPABSWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
30109 { 12170 /* vpabsw */, X86::VPABSWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
30110 { 12170 /* vpabsw */, X86::VPABSWZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
30115 { 12170 /* vpabsw */, X86::VPABSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30115 { 12170 /* vpabsw */, X86::VPABSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30116 { 12170 /* vpabsw */, X86::VPABSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
30121 { 12170 /* vpabsw */, X86::VPABSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
30121 { 12170 /* vpabsw */, X86::VPABSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
30122 { 12170 /* vpabsw */, X86::VPABSWZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
30131 { 12177 /* vpackssdw */, X86::VPACKSSDWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30131 { 12177 /* vpackssdw */, X86::VPACKSSDWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30131 { 12177 /* vpackssdw */, X86::VPACKSSDWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30132 { 12177 /* vpackssdw */, X86::VPACKSSDWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30132 { 12177 /* vpackssdw */, X86::VPACKSSDWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30135 { 12177 /* vpackssdw */, X86::VPACKSSDWZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30135 { 12177 /* vpackssdw */, X86::VPACKSSDWZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30140 { 12177 /* vpackssdw */, X86::VPACKSSDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30140 { 12177 /* vpackssdw */, X86::VPACKSSDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30140 { 12177 /* vpackssdw */, X86::VPACKSSDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30141 { 12177 /* vpackssdw */, X86::VPACKSSDWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30141 { 12177 /* vpackssdw */, X86::VPACKSSDWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30148 { 12177 /* vpackssdw */, X86::VPACKSSDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30148 { 12177 /* vpackssdw */, X86::VPACKSSDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30148 { 12177 /* vpackssdw */, X86::VPACKSSDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30149 { 12177 /* vpackssdw */, X86::VPACKSSDWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30149 { 12177 /* vpackssdw */, X86::VPACKSSDWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30150 { 12177 /* vpackssdw */, X86::VPACKSSDWZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30150 { 12177 /* vpackssdw */, X86::VPACKSSDWZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30153 { 12177 /* vpackssdw */, X86::VPACKSSDWZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30153 { 12177 /* vpackssdw */, X86::VPACKSSDWZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30162 { 12187 /* vpacksswb */, X86::VPACKSSWBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30162 { 12187 /* vpacksswb */, X86::VPACKSSWBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30162 { 12187 /* vpacksswb */, X86::VPACKSSWBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30163 { 12187 /* vpacksswb */, X86::VPACKSSWBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30163 { 12187 /* vpacksswb */, X86::VPACKSSWBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30168 { 12187 /* vpacksswb */, X86::VPACKSSWBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30168 { 12187 /* vpacksswb */, X86::VPACKSSWBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30168 { 12187 /* vpacksswb */, X86::VPACKSSWBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30169 { 12187 /* vpacksswb */, X86::VPACKSSWBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30169 { 12187 /* vpacksswb */, X86::VPACKSSWBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30174 { 12187 /* vpacksswb */, X86::VPACKSSWBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30174 { 12187 /* vpacksswb */, X86::VPACKSSWBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30174 { 12187 /* vpacksswb */, X86::VPACKSSWBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30175 { 12187 /* vpacksswb */, X86::VPACKSSWBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30175 { 12187 /* vpacksswb */, X86::VPACKSSWBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30184 { 12197 /* vpackusdw */, X86::VPACKUSDWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30184 { 12197 /* vpackusdw */, X86::VPACKUSDWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30184 { 12197 /* vpackusdw */, X86::VPACKUSDWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30185 { 12197 /* vpackusdw */, X86::VPACKUSDWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30185 { 12197 /* vpackusdw */, X86::VPACKUSDWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30188 { 12197 /* vpackusdw */, X86::VPACKUSDWZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30188 { 12197 /* vpackusdw */, X86::VPACKUSDWZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30193 { 12197 /* vpackusdw */, X86::VPACKUSDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30193 { 12197 /* vpackusdw */, X86::VPACKUSDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30193 { 12197 /* vpackusdw */, X86::VPACKUSDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30194 { 12197 /* vpackusdw */, X86::VPACKUSDWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30194 { 12197 /* vpackusdw */, X86::VPACKUSDWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30201 { 12197 /* vpackusdw */, X86::VPACKUSDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30201 { 12197 /* vpackusdw */, X86::VPACKUSDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30201 { 12197 /* vpackusdw */, X86::VPACKUSDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30202 { 12197 /* vpackusdw */, X86::VPACKUSDWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30202 { 12197 /* vpackusdw */, X86::VPACKUSDWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30203 { 12197 /* vpackusdw */, X86::VPACKUSDWZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30203 { 12197 /* vpackusdw */, X86::VPACKUSDWZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30206 { 12197 /* vpackusdw */, X86::VPACKUSDWZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30206 { 12197 /* vpackusdw */, X86::VPACKUSDWZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30215 { 12207 /* vpackuswb */, X86::VPACKUSWBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30215 { 12207 /* vpackuswb */, X86::VPACKUSWBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30215 { 12207 /* vpackuswb */, X86::VPACKUSWBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30216 { 12207 /* vpackuswb */, X86::VPACKUSWBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30216 { 12207 /* vpackuswb */, X86::VPACKUSWBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30221 { 12207 /* vpackuswb */, X86::VPACKUSWBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30221 { 12207 /* vpackuswb */, X86::VPACKUSWBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30221 { 12207 /* vpackuswb */, X86::VPACKUSWBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30222 { 12207 /* vpackuswb */, X86::VPACKUSWBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30222 { 12207 /* vpackuswb */, X86::VPACKUSWBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30227 { 12207 /* vpackuswb */, X86::VPACKUSWBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30227 { 12207 /* vpackuswb */, X86::VPACKUSWBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30227 { 12207 /* vpackuswb */, X86::VPACKUSWBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30228 { 12207 /* vpackuswb */, X86::VPACKUSWBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30228 { 12207 /* vpackuswb */, X86::VPACKUSWBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30237 { 12217 /* vpaddb */, X86::VPADDBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30237 { 12217 /* vpaddb */, X86::VPADDBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30237 { 12217 /* vpaddb */, X86::VPADDBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30238 { 12217 /* vpaddb */, X86::VPADDBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30238 { 12217 /* vpaddb */, X86::VPADDBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30243 { 12217 /* vpaddb */, X86::VPADDBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30243 { 12217 /* vpaddb */, X86::VPADDBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30243 { 12217 /* vpaddb */, X86::VPADDBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30244 { 12217 /* vpaddb */, X86::VPADDBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30244 { 12217 /* vpaddb */, X86::VPADDBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30249 { 12217 /* vpaddb */, X86::VPADDBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30249 { 12217 /* vpaddb */, X86::VPADDBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30249 { 12217 /* vpaddb */, X86::VPADDBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30250 { 12217 /* vpaddb */, X86::VPADDBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30250 { 12217 /* vpaddb */, X86::VPADDBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30259 { 12224 /* vpaddd */, X86::VPADDDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30259 { 12224 /* vpaddd */, X86::VPADDDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30259 { 12224 /* vpaddd */, X86::VPADDDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30260 { 12224 /* vpaddd */, X86::VPADDDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30260 { 12224 /* vpaddd */, X86::VPADDDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30263 { 12224 /* vpaddd */, X86::VPADDDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30263 { 12224 /* vpaddd */, X86::VPADDDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30268 { 12224 /* vpaddd */, X86::VPADDDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30268 { 12224 /* vpaddd */, X86::VPADDDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30268 { 12224 /* vpaddd */, X86::VPADDDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30269 { 12224 /* vpaddd */, X86::VPADDDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30269 { 12224 /* vpaddd */, X86::VPADDDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30276 { 12224 /* vpaddd */, X86::VPADDDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30276 { 12224 /* vpaddd */, X86::VPADDDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30276 { 12224 /* vpaddd */, X86::VPADDDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30277 { 12224 /* vpaddd */, X86::VPADDDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30277 { 12224 /* vpaddd */, X86::VPADDDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30278 { 12224 /* vpaddd */, X86::VPADDDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30278 { 12224 /* vpaddd */, X86::VPADDDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30281 { 12224 /* vpaddd */, X86::VPADDDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30281 { 12224 /* vpaddd */, X86::VPADDDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30290 { 12231 /* vpaddq */, X86::VPADDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30290 { 12231 /* vpaddq */, X86::VPADDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30290 { 12231 /* vpaddq */, X86::VPADDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30291 { 12231 /* vpaddq */, X86::VPADDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30291 { 12231 /* vpaddq */, X86::VPADDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30294 { 12231 /* vpaddq */, X86::VPADDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30294 { 12231 /* vpaddq */, X86::VPADDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30299 { 12231 /* vpaddq */, X86::VPADDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30299 { 12231 /* vpaddq */, X86::VPADDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30299 { 12231 /* vpaddq */, X86::VPADDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30300 { 12231 /* vpaddq */, X86::VPADDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30300 { 12231 /* vpaddq */, X86::VPADDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30307 { 12231 /* vpaddq */, X86::VPADDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30307 { 12231 /* vpaddq */, X86::VPADDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30307 { 12231 /* vpaddq */, X86::VPADDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30308 { 12231 /* vpaddq */, X86::VPADDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30308 { 12231 /* vpaddq */, X86::VPADDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30309 { 12231 /* vpaddq */, X86::VPADDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30309 { 12231 /* vpaddq */, X86::VPADDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30312 { 12231 /* vpaddq */, X86::VPADDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30312 { 12231 /* vpaddq */, X86::VPADDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30321 { 12238 /* vpaddsb */, X86::VPADDSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30321 { 12238 /* vpaddsb */, X86::VPADDSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30321 { 12238 /* vpaddsb */, X86::VPADDSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30322 { 12238 /* vpaddsb */, X86::VPADDSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30322 { 12238 /* vpaddsb */, X86::VPADDSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30327 { 12238 /* vpaddsb */, X86::VPADDSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30327 { 12238 /* vpaddsb */, X86::VPADDSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30327 { 12238 /* vpaddsb */, X86::VPADDSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30328 { 12238 /* vpaddsb */, X86::VPADDSBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30328 { 12238 /* vpaddsb */, X86::VPADDSBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30333 { 12238 /* vpaddsb */, X86::VPADDSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30333 { 12238 /* vpaddsb */, X86::VPADDSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30333 { 12238 /* vpaddsb */, X86::VPADDSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30334 { 12238 /* vpaddsb */, X86::VPADDSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30334 { 12238 /* vpaddsb */, X86::VPADDSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30343 { 12246 /* vpaddsw */, X86::VPADDSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30343 { 12246 /* vpaddsw */, X86::VPADDSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30343 { 12246 /* vpaddsw */, X86::VPADDSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30344 { 12246 /* vpaddsw */, X86::VPADDSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30344 { 12246 /* vpaddsw */, X86::VPADDSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30349 { 12246 /* vpaddsw */, X86::VPADDSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30349 { 12246 /* vpaddsw */, X86::VPADDSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30349 { 12246 /* vpaddsw */, X86::VPADDSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30350 { 12246 /* vpaddsw */, X86::VPADDSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30350 { 12246 /* vpaddsw */, X86::VPADDSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30355 { 12246 /* vpaddsw */, X86::VPADDSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30355 { 12246 /* vpaddsw */, X86::VPADDSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30355 { 12246 /* vpaddsw */, X86::VPADDSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30356 { 12246 /* vpaddsw */, X86::VPADDSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30356 { 12246 /* vpaddsw */, X86::VPADDSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30365 { 12254 /* vpaddusb */, X86::VPADDUSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30365 { 12254 /* vpaddusb */, X86::VPADDUSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30365 { 12254 /* vpaddusb */, X86::VPADDUSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30366 { 12254 /* vpaddusb */, X86::VPADDUSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30366 { 12254 /* vpaddusb */, X86::VPADDUSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30371 { 12254 /* vpaddusb */, X86::VPADDUSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30371 { 12254 /* vpaddusb */, X86::VPADDUSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30371 { 12254 /* vpaddusb */, X86::VPADDUSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30372 { 12254 /* vpaddusb */, X86::VPADDUSBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30372 { 12254 /* vpaddusb */, X86::VPADDUSBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30377 { 12254 /* vpaddusb */, X86::VPADDUSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30377 { 12254 /* vpaddusb */, X86::VPADDUSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30377 { 12254 /* vpaddusb */, X86::VPADDUSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30378 { 12254 /* vpaddusb */, X86::VPADDUSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30378 { 12254 /* vpaddusb */, X86::VPADDUSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30387 { 12263 /* vpaddusw */, X86::VPADDUSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30387 { 12263 /* vpaddusw */, X86::VPADDUSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30387 { 12263 /* vpaddusw */, X86::VPADDUSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30388 { 12263 /* vpaddusw */, X86::VPADDUSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30388 { 12263 /* vpaddusw */, X86::VPADDUSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30393 { 12263 /* vpaddusw */, X86::VPADDUSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30393 { 12263 /* vpaddusw */, X86::VPADDUSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30393 { 12263 /* vpaddusw */, X86::VPADDUSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30394 { 12263 /* vpaddusw */, X86::VPADDUSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30394 { 12263 /* vpaddusw */, X86::VPADDUSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30399 { 12263 /* vpaddusw */, X86::VPADDUSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30399 { 12263 /* vpaddusw */, X86::VPADDUSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30399 { 12263 /* vpaddusw */, X86::VPADDUSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30400 { 12263 /* vpaddusw */, X86::VPADDUSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30400 { 12263 /* vpaddusw */, X86::VPADDUSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30409 { 12272 /* vpaddw */, X86::VPADDWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30409 { 12272 /* vpaddw */, X86::VPADDWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30409 { 12272 /* vpaddw */, X86::VPADDWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30410 { 12272 /* vpaddw */, X86::VPADDWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30410 { 12272 /* vpaddw */, X86::VPADDWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30415 { 12272 /* vpaddw */, X86::VPADDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30415 { 12272 /* vpaddw */, X86::VPADDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30415 { 12272 /* vpaddw */, X86::VPADDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30416 { 12272 /* vpaddw */, X86::VPADDWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30416 { 12272 /* vpaddw */, X86::VPADDWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30421 { 12272 /* vpaddw */, X86::VPADDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30421 { 12272 /* vpaddw */, X86::VPADDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30421 { 12272 /* vpaddw */, X86::VPADDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30422 { 12272 /* vpaddw */, X86::VPADDWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30422 { 12272 /* vpaddw */, X86::VPADDWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30431 { 12279 /* vpalignr */, X86::VPALIGNRZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30431 { 12279 /* vpalignr */, X86::VPALIGNRZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30431 { 12279 /* vpalignr */, X86::VPALIGNRZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30432 { 12279 /* vpalignr */, X86::VPALIGNRZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30432 { 12279 /* vpalignr */, X86::VPALIGNRZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30437 { 12279 /* vpalignr */, X86::VPALIGNRZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30437 { 12279 /* vpalignr */, X86::VPALIGNRZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30437 { 12279 /* vpalignr */, X86::VPALIGNRZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30438 { 12279 /* vpalignr */, X86::VPALIGNRZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30438 { 12279 /* vpalignr */, X86::VPALIGNRZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30443 { 12279 /* vpalignr */, X86::VPALIGNRZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30443 { 12279 /* vpalignr */, X86::VPALIGNRZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30443 { 12279 /* vpalignr */, X86::VPALIGNRZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30444 { 12279 /* vpalignr */, X86::VPALIGNRZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30444 { 12279 /* vpalignr */, X86::VPALIGNRZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30453 { 12294 /* vpandd */, X86::VPANDDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30453 { 12294 /* vpandd */, X86::VPANDDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30453 { 12294 /* vpandd */, X86::VPANDDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30454 { 12294 /* vpandd */, X86::VPANDDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30454 { 12294 /* vpandd */, X86::VPANDDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30457 { 12294 /* vpandd */, X86::VPANDDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30457 { 12294 /* vpandd */, X86::VPANDDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30462 { 12294 /* vpandd */, X86::VPANDDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30462 { 12294 /* vpandd */, X86::VPANDDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30462 { 12294 /* vpandd */, X86::VPANDDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30463 { 12294 /* vpandd */, X86::VPANDDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30463 { 12294 /* vpandd */, X86::VPANDDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30470 { 12294 /* vpandd */, X86::VPANDDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30470 { 12294 /* vpandd */, X86::VPANDDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30470 { 12294 /* vpandd */, X86::VPANDDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30471 { 12294 /* vpandd */, X86::VPANDDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30471 { 12294 /* vpandd */, X86::VPANDDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30472 { 12294 /* vpandd */, X86::VPANDDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30472 { 12294 /* vpandd */, X86::VPANDDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30475 { 12294 /* vpandd */, X86::VPANDDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30475 { 12294 /* vpandd */, X86::VPANDDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30484 { 12308 /* vpandnd */, X86::VPANDNDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30484 { 12308 /* vpandnd */, X86::VPANDNDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30484 { 12308 /* vpandnd */, X86::VPANDNDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30485 { 12308 /* vpandnd */, X86::VPANDNDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30485 { 12308 /* vpandnd */, X86::VPANDNDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30488 { 12308 /* vpandnd */, X86::VPANDNDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30488 { 12308 /* vpandnd */, X86::VPANDNDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30493 { 12308 /* vpandnd */, X86::VPANDNDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30493 { 12308 /* vpandnd */, X86::VPANDNDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30493 { 12308 /* vpandnd */, X86::VPANDNDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30494 { 12308 /* vpandnd */, X86::VPANDNDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30494 { 12308 /* vpandnd */, X86::VPANDNDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30501 { 12308 /* vpandnd */, X86::VPANDNDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30501 { 12308 /* vpandnd */, X86::VPANDNDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30501 { 12308 /* vpandnd */, X86::VPANDNDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30502 { 12308 /* vpandnd */, X86::VPANDNDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30502 { 12308 /* vpandnd */, X86::VPANDNDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30503 { 12308 /* vpandnd */, X86::VPANDNDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30503 { 12308 /* vpandnd */, X86::VPANDNDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30506 { 12308 /* vpandnd */, X86::VPANDNDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30506 { 12308 /* vpandnd */, X86::VPANDNDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30511 { 12316 /* vpandnq */, X86::VPANDNQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30511 { 12316 /* vpandnq */, X86::VPANDNQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30511 { 12316 /* vpandnq */, X86::VPANDNQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30512 { 12316 /* vpandnq */, X86::VPANDNQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30512 { 12316 /* vpandnq */, X86::VPANDNQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30515 { 12316 /* vpandnq */, X86::VPANDNQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30515 { 12316 /* vpandnq */, X86::VPANDNQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30520 { 12316 /* vpandnq */, X86::VPANDNQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30520 { 12316 /* vpandnq */, X86::VPANDNQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30520 { 12316 /* vpandnq */, X86::VPANDNQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30521 { 12316 /* vpandnq */, X86::VPANDNQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30521 { 12316 /* vpandnq */, X86::VPANDNQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30528 { 12316 /* vpandnq */, X86::VPANDNQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30528 { 12316 /* vpandnq */, X86::VPANDNQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30528 { 12316 /* vpandnq */, X86::VPANDNQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30529 { 12316 /* vpandnq */, X86::VPANDNQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30529 { 12316 /* vpandnq */, X86::VPANDNQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30530 { 12316 /* vpandnq */, X86::VPANDNQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30530 { 12316 /* vpandnq */, X86::VPANDNQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30533 { 12316 /* vpandnq */, X86::VPANDNQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30533 { 12316 /* vpandnq */, X86::VPANDNQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30538 { 12324 /* vpandq */, X86::VPANDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30538 { 12324 /* vpandq */, X86::VPANDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30538 { 12324 /* vpandq */, X86::VPANDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30539 { 12324 /* vpandq */, X86::VPANDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30539 { 12324 /* vpandq */, X86::VPANDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30542 { 12324 /* vpandq */, X86::VPANDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30542 { 12324 /* vpandq */, X86::VPANDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30547 { 12324 /* vpandq */, X86::VPANDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30547 { 12324 /* vpandq */, X86::VPANDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30547 { 12324 /* vpandq */, X86::VPANDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30548 { 12324 /* vpandq */, X86::VPANDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30548 { 12324 /* vpandq */, X86::VPANDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30555 { 12324 /* vpandq */, X86::VPANDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30555 { 12324 /* vpandq */, X86::VPANDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30555 { 12324 /* vpandq */, X86::VPANDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30556 { 12324 /* vpandq */, X86::VPANDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30556 { 12324 /* vpandq */, X86::VPANDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30557 { 12324 /* vpandq */, X86::VPANDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30557 { 12324 /* vpandq */, X86::VPANDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30560 { 12324 /* vpandq */, X86::VPANDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30560 { 12324 /* vpandq */, X86::VPANDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30569 { 12331 /* vpavgb */, X86::VPAVGBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30569 { 12331 /* vpavgb */, X86::VPAVGBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30569 { 12331 /* vpavgb */, X86::VPAVGBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30570 { 12331 /* vpavgb */, X86::VPAVGBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30570 { 12331 /* vpavgb */, X86::VPAVGBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30575 { 12331 /* vpavgb */, X86::VPAVGBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30575 { 12331 /* vpavgb */, X86::VPAVGBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30575 { 12331 /* vpavgb */, X86::VPAVGBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30576 { 12331 /* vpavgb */, X86::VPAVGBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30576 { 12331 /* vpavgb */, X86::VPAVGBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30581 { 12331 /* vpavgb */, X86::VPAVGBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30581 { 12331 /* vpavgb */, X86::VPAVGBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30581 { 12331 /* vpavgb */, X86::VPAVGBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30582 { 12331 /* vpavgb */, X86::VPAVGBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30582 { 12331 /* vpavgb */, X86::VPAVGBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30591 { 12338 /* vpavgw */, X86::VPAVGWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30591 { 12338 /* vpavgw */, X86::VPAVGWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30591 { 12338 /* vpavgw */, X86::VPAVGWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30592 { 12338 /* vpavgw */, X86::VPAVGWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30592 { 12338 /* vpavgw */, X86::VPAVGWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30597 { 12338 /* vpavgw */, X86::VPAVGWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30597 { 12338 /* vpavgw */, X86::VPAVGWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30597 { 12338 /* vpavgw */, X86::VPAVGWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30598 { 12338 /* vpavgw */, X86::VPAVGWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30598 { 12338 /* vpavgw */, X86::VPAVGWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30603 { 12338 /* vpavgw */, X86::VPAVGWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30603 { 12338 /* vpavgw */, X86::VPAVGWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30603 { 12338 /* vpavgw */, X86::VPAVGWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30604 { 12338 /* vpavgw */, X86::VPAVGWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30604 { 12338 /* vpavgw */, X86::VPAVGWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30613 { 12354 /* vpblendmb */, X86::VPBLENDMBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30613 { 12354 /* vpblendmb */, X86::VPBLENDMBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30613 { 12354 /* vpblendmb */, X86::VPBLENDMBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30614 { 12354 /* vpblendmb */, X86::VPBLENDMBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30614 { 12354 /* vpblendmb */, X86::VPBLENDMBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30619 { 12354 /* vpblendmb */, X86::VPBLENDMBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30619 { 12354 /* vpblendmb */, X86::VPBLENDMBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30619 { 12354 /* vpblendmb */, X86::VPBLENDMBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30620 { 12354 /* vpblendmb */, X86::VPBLENDMBZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30620 { 12354 /* vpblendmb */, X86::VPBLENDMBZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30625 { 12354 /* vpblendmb */, X86::VPBLENDMBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30625 { 12354 /* vpblendmb */, X86::VPBLENDMBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30625 { 12354 /* vpblendmb */, X86::VPBLENDMBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30626 { 12354 /* vpblendmb */, X86::VPBLENDMBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30626 { 12354 /* vpblendmb */, X86::VPBLENDMBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30631 { 12364 /* vpblendmd */, X86::VPBLENDMDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30631 { 12364 /* vpblendmd */, X86::VPBLENDMDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30631 { 12364 /* vpblendmd */, X86::VPBLENDMDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30632 { 12364 /* vpblendmd */, X86::VPBLENDMDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30632 { 12364 /* vpblendmd */, X86::VPBLENDMDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30635 { 12364 /* vpblendmd */, X86::VPBLENDMDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30635 { 12364 /* vpblendmd */, X86::VPBLENDMDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30640 { 12364 /* vpblendmd */, X86::VPBLENDMDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30640 { 12364 /* vpblendmd */, X86::VPBLENDMDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30640 { 12364 /* vpblendmd */, X86::VPBLENDMDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30641 { 12364 /* vpblendmd */, X86::VPBLENDMDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30641 { 12364 /* vpblendmd */, X86::VPBLENDMDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30648 { 12364 /* vpblendmd */, X86::VPBLENDMDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30648 { 12364 /* vpblendmd */, X86::VPBLENDMDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30648 { 12364 /* vpblendmd */, X86::VPBLENDMDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30649 { 12364 /* vpblendmd */, X86::VPBLENDMDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30649 { 12364 /* vpblendmd */, X86::VPBLENDMDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30650 { 12364 /* vpblendmd */, X86::VPBLENDMDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30650 { 12364 /* vpblendmd */, X86::VPBLENDMDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30653 { 12364 /* vpblendmd */, X86::VPBLENDMDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30653 { 12364 /* vpblendmd */, X86::VPBLENDMDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30658 { 12374 /* vpblendmq */, X86::VPBLENDMQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30658 { 12374 /* vpblendmq */, X86::VPBLENDMQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30658 { 12374 /* vpblendmq */, X86::VPBLENDMQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30659 { 12374 /* vpblendmq */, X86::VPBLENDMQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30659 { 12374 /* vpblendmq */, X86::VPBLENDMQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30662 { 12374 /* vpblendmq */, X86::VPBLENDMQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30662 { 12374 /* vpblendmq */, X86::VPBLENDMQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30667 { 12374 /* vpblendmq */, X86::VPBLENDMQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30667 { 12374 /* vpblendmq */, X86::VPBLENDMQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30667 { 12374 /* vpblendmq */, X86::VPBLENDMQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30668 { 12374 /* vpblendmq */, X86::VPBLENDMQZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30668 { 12374 /* vpblendmq */, X86::VPBLENDMQZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30675 { 12374 /* vpblendmq */, X86::VPBLENDMQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30675 { 12374 /* vpblendmq */, X86::VPBLENDMQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30675 { 12374 /* vpblendmq */, X86::VPBLENDMQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30676 { 12374 /* vpblendmq */, X86::VPBLENDMQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30676 { 12374 /* vpblendmq */, X86::VPBLENDMQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30677 { 12374 /* vpblendmq */, X86::VPBLENDMQZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30677 { 12374 /* vpblendmq */, X86::VPBLENDMQZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30680 { 12374 /* vpblendmq */, X86::VPBLENDMQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30680 { 12374 /* vpblendmq */, X86::VPBLENDMQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30685 { 12384 /* vpblendmw */, X86::VPBLENDMWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30685 { 12384 /* vpblendmw */, X86::VPBLENDMWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30685 { 12384 /* vpblendmw */, X86::VPBLENDMWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30686 { 12384 /* vpblendmw */, X86::VPBLENDMWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30686 { 12384 /* vpblendmw */, X86::VPBLENDMWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30691 { 12384 /* vpblendmw */, X86::VPBLENDMWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30691 { 12384 /* vpblendmw */, X86::VPBLENDMWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30691 { 12384 /* vpblendmw */, X86::VPBLENDMWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30692 { 12384 /* vpblendmw */, X86::VPBLENDMWZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30692 { 12384 /* vpblendmw */, X86::VPBLENDMWZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30697 { 12384 /* vpblendmw */, X86::VPBLENDMWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30697 { 12384 /* vpblendmw */, X86::VPBLENDMWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30697 { 12384 /* vpblendmw */, X86::VPBLENDMWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30698 { 12384 /* vpblendmw */, X86::VPBLENDMWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30698 { 12384 /* vpblendmw */, X86::VPBLENDMWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30717 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_GR32 }, },
30718 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
30719 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZm, Convert__Reg1_0__Mem85_1, AMFBS_None, { MCK_VR512, MCK_Mem8 }, },
30726 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
30727 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30728 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem85_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem8 }, },
30735 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
30736 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
30737 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZmkz, Convert__Reg1_0__Reg1_2__Mem85_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem8 }, },
30748 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_GR32 }, },
30749 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
30750 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32 }, },
30757 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
30758 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30759 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
30766 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
30767 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
30768 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZmkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
30771 { 12439 /* vpbroadcastmb2q */, X86::VPBROADCASTMB2QZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VK1 }, },
30774 { 12455 /* vpbroadcastmw2d */, X86::VPBROADCASTMW2DZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VK1 }, },
30785 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_GR64 }, },
30786 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
30787 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64 }, },
30794 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR64 }, },
30795 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30796 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
30803 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR64 }, },
30804 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
30805 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
30816 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_GR32 }, },
30817 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
30818 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_VR512, MCK_Mem16 }, },
30825 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
30826 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30827 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem165_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem16 }, },
30834 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
30835 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
30836 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZmkz, Convert__Reg1_0__Reg1_2__Mem165_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem16 }, },
30845 { 12497 /* vpclmulhqhqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30845 { 12497 /* vpclmulhqhqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30845 { 12497 /* vpclmulhqhqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30846 { 12497 /* vpclmulhqhqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_17, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30846 { 12497 /* vpclmulhqhqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_17, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30855 { 12511 /* vpclmulhqlqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30855 { 12511 /* vpclmulhqlqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30855 { 12511 /* vpclmulhqlqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30856 { 12511 /* vpclmulhqlqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30856 { 12511 /* vpclmulhqlqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30865 { 12525 /* vpclmullqhqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30865 { 12525 /* vpclmullqhqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30865 { 12525 /* vpclmullqhqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30866 { 12525 /* vpclmullqhqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_16, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30866 { 12525 /* vpclmullqhqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_16, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30875 { 12539 /* vpclmullqlqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30875 { 12539 /* vpclmullqlqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30875 { 12539 /* vpclmullqlqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30876 { 12539 /* vpclmullqlqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30876 { 12539 /* vpclmullqlqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30885 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30885 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30885 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30886 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30886 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30897 { 12571 /* vpcmpb */, X86::VPCMPBZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30897 { 12571 /* vpcmpb */, X86::VPCMPBZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30898 { 12571 /* vpcmpb */, X86::VPCMPBZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30903 { 12571 /* vpcmpb */, X86::VPCMPBZrrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30903 { 12571 /* vpcmpb */, X86::VPCMPBZrrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30904 { 12571 /* vpcmpb */, X86::VPCMPBZrmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30909 { 12578 /* vpcmpd */, X86::VPCMPDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30909 { 12578 /* vpcmpd */, X86::VPCMPDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30910 { 12578 /* vpcmpd */, X86::VPCMPDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30913 { 12578 /* vpcmpd */, X86::VPCMPDZrmib, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
30918 { 12578 /* vpcmpd */, X86::VPCMPDZrrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30918 { 12578 /* vpcmpd */, X86::VPCMPDZrrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30919 { 12578 /* vpcmpd */, X86::VPCMPDZrmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30922 { 12578 /* vpcmpd */, X86::VPCMPDZrmibk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
30927 { 12585 /* vpcmpeqb */, X86::VPCMPEQBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
30927 { 12585 /* vpcmpeqb */, X86::VPCMPEQBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
30928 { 12585 /* vpcmpeqb */, X86::VPCMPEQBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
30937 { 12585 /* vpcmpeqb */, X86::VPCMPEQBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30937 { 12585 /* vpcmpeqb */, X86::VPCMPEQBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30938 { 12585 /* vpcmpeqb */, X86::VPCMPEQBZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30943 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
30943 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
30944 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
30951 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30956 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30956 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30957 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30960 { 12594 /* vpcmpeqd */, X86::VPCMPEQDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30965 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
30965 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
30966 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
30973 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30978 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30978 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30979 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30982 { 12603 /* vpcmpeqq */, X86::VPCMPEQQZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30987 { 12612 /* vpcmpeqw */, X86::VPCMPEQWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
30987 { 12612 /* vpcmpeqw */, X86::VPCMPEQWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
30988 { 12612 /* vpcmpeqw */, X86::VPCMPEQWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
30997 { 12612 /* vpcmpeqw */, X86::VPCMPEQWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30997 { 12612 /* vpcmpeqw */, X86::VPCMPEQWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30998 { 12612 /* vpcmpeqw */, X86::VPCMPEQWZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31007 { 12643 /* vpcmpgtb */, X86::VPCMPGTBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
31007 { 12643 /* vpcmpgtb */, X86::VPCMPGTBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
31008 { 12643 /* vpcmpgtb */, X86::VPCMPGTBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
31017 { 12643 /* vpcmpgtb */, X86::VPCMPGTBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31017 { 12643 /* vpcmpgtb */, X86::VPCMPGTBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31018 { 12643 /* vpcmpgtb */, X86::VPCMPGTBZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31023 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
31023 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
31024 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
31031 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31036 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31036 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31037 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31040 { 12652 /* vpcmpgtd */, X86::VPCMPGTDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31045 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
31045 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
31046 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
31053 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31058 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31058 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31059 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31062 { 12661 /* vpcmpgtq */, X86::VPCMPGTQZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31067 { 12670 /* vpcmpgtw */, X86::VPCMPGTWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
31067 { 12670 /* vpcmpgtw */, X86::VPCMPGTWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
31068 { 12670 /* vpcmpgtw */, X86::VPCMPGTWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
31077 { 12670 /* vpcmpgtw */, X86::VPCMPGTWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31077 { 12670 /* vpcmpgtw */, X86::VPCMPGTWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31078 { 12670 /* vpcmpgtw */, X86::VPCMPGTWZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31087 { 12701 /* vpcmpq */, X86::VPCMPQZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31087 { 12701 /* vpcmpq */, X86::VPCMPQZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31088 { 12701 /* vpcmpq */, X86::VPCMPQZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31091 { 12701 /* vpcmpq */, X86::VPCMPQZrmib, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
31096 { 12701 /* vpcmpq */, X86::VPCMPQZrrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31096 { 12701 /* vpcmpq */, X86::VPCMPQZrrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31097 { 12701 /* vpcmpq */, X86::VPCMPQZrmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31100 { 12701 /* vpcmpq */, X86::VPCMPQZrmibk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
31105 { 12708 /* vpcmpub */, X86::VPCMPUBZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31105 { 12708 /* vpcmpub */, X86::VPCMPUBZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31106 { 12708 /* vpcmpub */, X86::VPCMPUBZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31111 { 12708 /* vpcmpub */, X86::VPCMPUBZrrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31111 { 12708 /* vpcmpub */, X86::VPCMPUBZrrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31112 { 12708 /* vpcmpub */, X86::VPCMPUBZrmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31117 { 12716 /* vpcmpud */, X86::VPCMPUDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31117 { 12716 /* vpcmpud */, X86::VPCMPUDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31118 { 12716 /* vpcmpud */, X86::VPCMPUDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31121 { 12716 /* vpcmpud */, X86::VPCMPUDZrmib, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
31126 { 12716 /* vpcmpud */, X86::VPCMPUDZrrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31126 { 12716 /* vpcmpud */, X86::VPCMPUDZrrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31127 { 12716 /* vpcmpud */, X86::VPCMPUDZrmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31130 { 12716 /* vpcmpud */, X86::VPCMPUDZrmibk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
31135 { 12724 /* vpcmpuq */, X86::VPCMPUQZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31135 { 12724 /* vpcmpuq */, X86::VPCMPUQZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31136 { 12724 /* vpcmpuq */, X86::VPCMPUQZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31139 { 12724 /* vpcmpuq */, X86::VPCMPUQZrmib, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
31144 { 12724 /* vpcmpuq */, X86::VPCMPUQZrrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31144 { 12724 /* vpcmpuq */, X86::VPCMPUQZrrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31145 { 12724 /* vpcmpuq */, X86::VPCMPUQZrmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31148 { 12724 /* vpcmpuq */, X86::VPCMPUQZrmibk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
31153 { 12732 /* vpcmpuw */, X86::VPCMPUWZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31153 { 12732 /* vpcmpuw */, X86::VPCMPUWZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31154 { 12732 /* vpcmpuw */, X86::VPCMPUWZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31159 { 12732 /* vpcmpuw */, X86::VPCMPUWZrrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31159 { 12732 /* vpcmpuw */, X86::VPCMPUWZrrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31160 { 12732 /* vpcmpuw */, X86::VPCMPUWZrmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31165 { 12740 /* vpcmpw */, X86::VPCMPWZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31165 { 12740 /* vpcmpw */, X86::VPCMPWZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31166 { 12740 /* vpcmpw */, X86::VPCMPWZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31171 { 12740 /* vpcmpw */, X86::VPCMPWZrrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31171 { 12740 /* vpcmpw */, X86::VPCMPWZrrik, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31172 { 12740 /* vpcmpw */, X86::VPCMPWZrmik, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31179 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
31179 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
31182 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
31185 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31185 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31188 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31191 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31191 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31194 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
31194 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
31197 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
31200 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31200 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31203 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31206 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31206 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31209 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
31209 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
31212 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
31215 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31215 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31218 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31221 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31221 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31224 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
31224 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
31227 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZmr, Convert__Mem5125_0__Reg1_1, AMFBS_None, { MCK_Mem512, MCK_VR512 }, },
31230 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31230 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31233 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31236 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31236 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31253 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
31253 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
31254 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
31257 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31262 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31262 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31263 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
31270 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31270 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31271 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
31272 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
31275 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
31280 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
31280 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
31281 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
31284 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31289 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31289 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31290 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
31297 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31297 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31298 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
31299 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
31302 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
31307 { 12879 /* vpdpbusd */, X86::VPDPBUSDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31307 { 12879 /* vpdpbusd */, X86::VPDPBUSDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31307 { 12879 /* vpdpbusd */, X86::VPDPBUSDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31308 { 12879 /* vpdpbusd */, X86::VPDPBUSDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31308 { 12879 /* vpdpbusd */, X86::VPDPBUSDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31311 { 12879 /* vpdpbusd */, X86::VPDPBUSDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31311 { 12879 /* vpdpbusd */, X86::VPDPBUSDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31316 { 12879 /* vpdpbusd */, X86::VPDPBUSDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31316 { 12879 /* vpdpbusd */, X86::VPDPBUSDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31316 { 12879 /* vpdpbusd */, X86::VPDPBUSDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31317 { 12879 /* vpdpbusd */, X86::VPDPBUSDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31317 { 12879 /* vpdpbusd */, X86::VPDPBUSDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31324 { 12879 /* vpdpbusd */, X86::VPDPBUSDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31324 { 12879 /* vpdpbusd */, X86::VPDPBUSDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31324 { 12879 /* vpdpbusd */, X86::VPDPBUSDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31325 { 12879 /* vpdpbusd */, X86::VPDPBUSDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31325 { 12879 /* vpdpbusd */, X86::VPDPBUSDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31326 { 12879 /* vpdpbusd */, X86::VPDPBUSDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31326 { 12879 /* vpdpbusd */, X86::VPDPBUSDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31329 { 12879 /* vpdpbusd */, X86::VPDPBUSDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31329 { 12879 /* vpdpbusd */, X86::VPDPBUSDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31334 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31334 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31334 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31335 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31335 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31338 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31338 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31343 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31343 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31343 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31344 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31344 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31351 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31351 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31351 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31352 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31352 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31353 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31353 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31356 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31356 { 12888 /* vpdpbusds */, X86::VPDPBUSDSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31361 { 12898 /* vpdpwssd */, X86::VPDPWSSDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31361 { 12898 /* vpdpwssd */, X86::VPDPWSSDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31361 { 12898 /* vpdpwssd */, X86::VPDPWSSDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31362 { 12898 /* vpdpwssd */, X86::VPDPWSSDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31362 { 12898 /* vpdpwssd */, X86::VPDPWSSDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31365 { 12898 /* vpdpwssd */, X86::VPDPWSSDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31365 { 12898 /* vpdpwssd */, X86::VPDPWSSDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31370 { 12898 /* vpdpwssd */, X86::VPDPWSSDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31370 { 12898 /* vpdpwssd */, X86::VPDPWSSDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31370 { 12898 /* vpdpwssd */, X86::VPDPWSSDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31371 { 12898 /* vpdpwssd */, X86::VPDPWSSDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31371 { 12898 /* vpdpwssd */, X86::VPDPWSSDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31378 { 12898 /* vpdpwssd */, X86::VPDPWSSDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31378 { 12898 /* vpdpwssd */, X86::VPDPWSSDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31378 { 12898 /* vpdpwssd */, X86::VPDPWSSDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31379 { 12898 /* vpdpwssd */, X86::VPDPWSSDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31379 { 12898 /* vpdpwssd */, X86::VPDPWSSDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31380 { 12898 /* vpdpwssd */, X86::VPDPWSSDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31380 { 12898 /* vpdpwssd */, X86::VPDPWSSDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31383 { 12898 /* vpdpwssd */, X86::VPDPWSSDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31383 { 12898 /* vpdpwssd */, X86::VPDPWSSDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31388 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31388 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31388 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31389 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31389 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31392 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31392 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31397 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31397 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31397 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31398 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31398 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31405 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31405 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31405 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31406 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31406 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31407 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31407 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31410 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31410 { 12907 /* vpdpwssds */, X86::VPDPWSSDSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31419 { 12939 /* vpermb */, X86::VPERMBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31419 { 12939 /* vpermb */, X86::VPERMBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31419 { 12939 /* vpermb */, X86::VPERMBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31420 { 12939 /* vpermb */, X86::VPERMBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31420 { 12939 /* vpermb */, X86::VPERMBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31425 { 12939 /* vpermb */, X86::VPERMBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31425 { 12939 /* vpermb */, X86::VPERMBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31425 { 12939 /* vpermb */, X86::VPERMBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31426 { 12939 /* vpermb */, X86::VPERMBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31426 { 12939 /* vpermb */, X86::VPERMBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31431 { 12939 /* vpermb */, X86::VPERMBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31431 { 12939 /* vpermb */, X86::VPERMBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31431 { 12939 /* vpermb */, X86::VPERMBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31432 { 12939 /* vpermb */, X86::VPERMBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31432 { 12939 /* vpermb */, X86::VPERMBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31437 { 12946 /* vpermd */, X86::VPERMDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31437 { 12946 /* vpermd */, X86::VPERMDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31437 { 12946 /* vpermd */, X86::VPERMDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31438 { 12946 /* vpermd */, X86::VPERMDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31438 { 12946 /* vpermd */, X86::VPERMDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31440 { 12946 /* vpermd */, X86::VPERMDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31440 { 12946 /* vpermd */, X86::VPERMDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31443 { 12946 /* vpermd */, X86::VPERMDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31443 { 12946 /* vpermd */, X86::VPERMDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31443 { 12946 /* vpermd */, X86::VPERMDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31444 { 12946 /* vpermd */, X86::VPERMDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31444 { 12946 /* vpermd */, X86::VPERMDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31448 { 12946 /* vpermd */, X86::VPERMDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31448 { 12946 /* vpermd */, X86::VPERMDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31448 { 12946 /* vpermd */, X86::VPERMDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31449 { 12946 /* vpermd */, X86::VPERMDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31449 { 12946 /* vpermd */, X86::VPERMDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31450 { 12946 /* vpermd */, X86::VPERMDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31450 { 12946 /* vpermd */, X86::VPERMDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31452 { 12946 /* vpermd */, X86::VPERMDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31452 { 12946 /* vpermd */, X86::VPERMDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31457 { 12953 /* vpermi2b */, X86::VPERMI2Brr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31457 { 12953 /* vpermi2b */, X86::VPERMI2Brr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31457 { 12953 /* vpermi2b */, X86::VPERMI2Brr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31458 { 12953 /* vpermi2b */, X86::VPERMI2Brm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31458 { 12953 /* vpermi2b */, X86::VPERMI2Brm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31463 { 12953 /* vpermi2b */, X86::VPERMI2Brrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31463 { 12953 /* vpermi2b */, X86::VPERMI2Brrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31463 { 12953 /* vpermi2b */, X86::VPERMI2Brrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31464 { 12953 /* vpermi2b */, X86::VPERMI2Brmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31464 { 12953 /* vpermi2b */, X86::VPERMI2Brmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31469 { 12953 /* vpermi2b */, X86::VPERMI2Brrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31469 { 12953 /* vpermi2b */, X86::VPERMI2Brrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31469 { 12953 /* vpermi2b */, X86::VPERMI2Brrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31470 { 12953 /* vpermi2b */, X86::VPERMI2Brmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31470 { 12953 /* vpermi2b */, X86::VPERMI2Brmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31475 { 12962 /* vpermi2d */, X86::VPERMI2Drr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31475 { 12962 /* vpermi2d */, X86::VPERMI2Drr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31475 { 12962 /* vpermi2d */, X86::VPERMI2Drr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31476 { 12962 /* vpermi2d */, X86::VPERMI2Drm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31476 { 12962 /* vpermi2d */, X86::VPERMI2Drm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31479 { 12962 /* vpermi2d */, X86::VPERMI2Drmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31479 { 12962 /* vpermi2d */, X86::VPERMI2Drmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31484 { 12962 /* vpermi2d */, X86::VPERMI2Drrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31484 { 12962 /* vpermi2d */, X86::VPERMI2Drrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31484 { 12962 /* vpermi2d */, X86::VPERMI2Drrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31485 { 12962 /* vpermi2d */, X86::VPERMI2Drmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31485 { 12962 /* vpermi2d */, X86::VPERMI2Drmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31492 { 12962 /* vpermi2d */, X86::VPERMI2Drrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31492 { 12962 /* vpermi2d */, X86::VPERMI2Drrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31492 { 12962 /* vpermi2d */, X86::VPERMI2Drrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31493 { 12962 /* vpermi2d */, X86::VPERMI2Drmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31493 { 12962 /* vpermi2d */, X86::VPERMI2Drmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31494 { 12962 /* vpermi2d */, X86::VPERMI2Drmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31494 { 12962 /* vpermi2d */, X86::VPERMI2Drmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31497 { 12962 /* vpermi2d */, X86::VPERMI2Drmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31497 { 12962 /* vpermi2d */, X86::VPERMI2Drmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31502 { 12971 /* vpermi2pd */, X86::VPERMI2PDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31502 { 12971 /* vpermi2pd */, X86::VPERMI2PDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31502 { 12971 /* vpermi2pd */, X86::VPERMI2PDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31503 { 12971 /* vpermi2pd */, X86::VPERMI2PDrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31503 { 12971 /* vpermi2pd */, X86::VPERMI2PDrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31506 { 12971 /* vpermi2pd */, X86::VPERMI2PDrmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31506 { 12971 /* vpermi2pd */, X86::VPERMI2PDrmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31511 { 12971 /* vpermi2pd */, X86::VPERMI2PDrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31511 { 12971 /* vpermi2pd */, X86::VPERMI2PDrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31511 { 12971 /* vpermi2pd */, X86::VPERMI2PDrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31512 { 12971 /* vpermi2pd */, X86::VPERMI2PDrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31512 { 12971 /* vpermi2pd */, X86::VPERMI2PDrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31519 { 12971 /* vpermi2pd */, X86::VPERMI2PDrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31519 { 12971 /* vpermi2pd */, X86::VPERMI2PDrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31519 { 12971 /* vpermi2pd */, X86::VPERMI2PDrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31520 { 12971 /* vpermi2pd */, X86::VPERMI2PDrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31520 { 12971 /* vpermi2pd */, X86::VPERMI2PDrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31521 { 12971 /* vpermi2pd */, X86::VPERMI2PDrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31521 { 12971 /* vpermi2pd */, X86::VPERMI2PDrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31524 { 12971 /* vpermi2pd */, X86::VPERMI2PDrmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31524 { 12971 /* vpermi2pd */, X86::VPERMI2PDrmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31529 { 12981 /* vpermi2ps */, X86::VPERMI2PSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31529 { 12981 /* vpermi2ps */, X86::VPERMI2PSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31529 { 12981 /* vpermi2ps */, X86::VPERMI2PSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31530 { 12981 /* vpermi2ps */, X86::VPERMI2PSrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31530 { 12981 /* vpermi2ps */, X86::VPERMI2PSrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31533 { 12981 /* vpermi2ps */, X86::VPERMI2PSrmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31533 { 12981 /* vpermi2ps */, X86::VPERMI2PSrmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31538 { 12981 /* vpermi2ps */, X86::VPERMI2PSrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31538 { 12981 /* vpermi2ps */, X86::VPERMI2PSrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31538 { 12981 /* vpermi2ps */, X86::VPERMI2PSrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31539 { 12981 /* vpermi2ps */, X86::VPERMI2PSrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31539 { 12981 /* vpermi2ps */, X86::VPERMI2PSrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31546 { 12981 /* vpermi2ps */, X86::VPERMI2PSrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31546 { 12981 /* vpermi2ps */, X86::VPERMI2PSrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31546 { 12981 /* vpermi2ps */, X86::VPERMI2PSrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31547 { 12981 /* vpermi2ps */, X86::VPERMI2PSrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31547 { 12981 /* vpermi2ps */, X86::VPERMI2PSrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31548 { 12981 /* vpermi2ps */, X86::VPERMI2PSrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31548 { 12981 /* vpermi2ps */, X86::VPERMI2PSrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31551 { 12981 /* vpermi2ps */, X86::VPERMI2PSrmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31551 { 12981 /* vpermi2ps */, X86::VPERMI2PSrmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31556 { 12991 /* vpermi2q */, X86::VPERMI2Qrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31556 { 12991 /* vpermi2q */, X86::VPERMI2Qrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31556 { 12991 /* vpermi2q */, X86::VPERMI2Qrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31557 { 12991 /* vpermi2q */, X86::VPERMI2Qrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31557 { 12991 /* vpermi2q */, X86::VPERMI2Qrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31560 { 12991 /* vpermi2q */, X86::VPERMI2Qrmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31560 { 12991 /* vpermi2q */, X86::VPERMI2Qrmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31565 { 12991 /* vpermi2q */, X86::VPERMI2Qrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31565 { 12991 /* vpermi2q */, X86::VPERMI2Qrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31565 { 12991 /* vpermi2q */, X86::VPERMI2Qrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31566 { 12991 /* vpermi2q */, X86::VPERMI2Qrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31566 { 12991 /* vpermi2q */, X86::VPERMI2Qrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31573 { 12991 /* vpermi2q */, X86::VPERMI2Qrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31573 { 12991 /* vpermi2q */, X86::VPERMI2Qrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31573 { 12991 /* vpermi2q */, X86::VPERMI2Qrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31574 { 12991 /* vpermi2q */, X86::VPERMI2Qrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31574 { 12991 /* vpermi2q */, X86::VPERMI2Qrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31575 { 12991 /* vpermi2q */, X86::VPERMI2Qrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31575 { 12991 /* vpermi2q */, X86::VPERMI2Qrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31578 { 12991 /* vpermi2q */, X86::VPERMI2Qrmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31578 { 12991 /* vpermi2q */, X86::VPERMI2Qrmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31583 { 13000 /* vpermi2w */, X86::VPERMI2Wrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31583 { 13000 /* vpermi2w */, X86::VPERMI2Wrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31583 { 13000 /* vpermi2w */, X86::VPERMI2Wrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31584 { 13000 /* vpermi2w */, X86::VPERMI2Wrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31584 { 13000 /* vpermi2w */, X86::VPERMI2Wrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31589 { 13000 /* vpermi2w */, X86::VPERMI2Wrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31589 { 13000 /* vpermi2w */, X86::VPERMI2Wrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31589 { 13000 /* vpermi2w */, X86::VPERMI2Wrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31590 { 13000 /* vpermi2w */, X86::VPERMI2Wrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31590 { 13000 /* vpermi2w */, X86::VPERMI2Wrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31595 { 13000 /* vpermi2w */, X86::VPERMI2Wrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31595 { 13000 /* vpermi2w */, X86::VPERMI2Wrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31595 { 13000 /* vpermi2w */, X86::VPERMI2Wrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31596 { 13000 /* vpermi2w */, X86::VPERMI2Wrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31596 { 13000 /* vpermi2w */, X86::VPERMI2Wrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31625 { 13031 /* vpermilpd */, X86::VPERMILPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31625 { 13031 /* vpermilpd */, X86::VPERMILPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31625 { 13031 /* vpermilpd */, X86::VPERMILPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31626 { 13031 /* vpermilpd */, X86::VPERMILPDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31626 { 13031 /* vpermilpd */, X86::VPERMILPDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31627 { 13031 /* vpermilpd */, X86::VPERMILPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31627 { 13031 /* vpermilpd */, X86::VPERMILPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31628 { 13031 /* vpermilpd */, X86::VPERMILPDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31633 { 13031 /* vpermilpd */, X86::VPERMILPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31633 { 13031 /* vpermilpd */, X86::VPERMILPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31634 { 13031 /* vpermilpd */, X86::VPERMILPDZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
31643 { 13031 /* vpermilpd */, X86::VPERMILPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31643 { 13031 /* vpermilpd */, X86::VPERMILPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31643 { 13031 /* vpermilpd */, X86::VPERMILPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31644 { 13031 /* vpermilpd */, X86::VPERMILPDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
31644 { 13031 /* vpermilpd */, X86::VPERMILPDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
31645 { 13031 /* vpermilpd */, X86::VPERMILPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31645 { 13031 /* vpermilpd */, X86::VPERMILPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31646 { 13031 /* vpermilpd */, X86::VPERMILPDZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31659 { 13031 /* vpermilpd */, X86::VPERMILPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31659 { 13031 /* vpermilpd */, X86::VPERMILPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31659 { 13031 /* vpermilpd */, X86::VPERMILPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31660 { 13031 /* vpermilpd */, X86::VPERMILPDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
31660 { 13031 /* vpermilpd */, X86::VPERMILPDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
31661 { 13031 /* vpermilpd */, X86::VPERMILPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31661 { 13031 /* vpermilpd */, X86::VPERMILPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31662 { 13031 /* vpermilpd */, X86::VPERMILPDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31663 { 13031 /* vpermilpd */, X86::VPERMILPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31663 { 13031 /* vpermilpd */, X86::VPERMILPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31664 { 13031 /* vpermilpd */, X86::VPERMILPDZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
31669 { 13031 /* vpermilpd */, X86::VPERMILPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31669 { 13031 /* vpermilpd */, X86::VPERMILPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31670 { 13031 /* vpermilpd */, X86::VPERMILPDZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
31687 { 13041 /* vpermilps */, X86::VPERMILPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31687 { 13041 /* vpermilps */, X86::VPERMILPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31687 { 13041 /* vpermilps */, X86::VPERMILPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31688 { 13041 /* vpermilps */, X86::VPERMILPSZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31688 { 13041 /* vpermilps */, X86::VPERMILPSZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31689 { 13041 /* vpermilps */, X86::VPERMILPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31689 { 13041 /* vpermilps */, X86::VPERMILPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31690 { 13041 /* vpermilps */, X86::VPERMILPSZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31695 { 13041 /* vpermilps */, X86::VPERMILPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31695 { 13041 /* vpermilps */, X86::VPERMILPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31696 { 13041 /* vpermilps */, X86::VPERMILPSZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
31705 { 13041 /* vpermilps */, X86::VPERMILPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31705 { 13041 /* vpermilps */, X86::VPERMILPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31705 { 13041 /* vpermilps */, X86::VPERMILPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31706 { 13041 /* vpermilps */, X86::VPERMILPSZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
31706 { 13041 /* vpermilps */, X86::VPERMILPSZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
31707 { 13041 /* vpermilps */, X86::VPERMILPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31707 { 13041 /* vpermilps */, X86::VPERMILPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31708 { 13041 /* vpermilps */, X86::VPERMILPSZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31721 { 13041 /* vpermilps */, X86::VPERMILPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31721 { 13041 /* vpermilps */, X86::VPERMILPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31721 { 13041 /* vpermilps */, X86::VPERMILPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31722 { 13041 /* vpermilps */, X86::VPERMILPSZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
31722 { 13041 /* vpermilps */, X86::VPERMILPSZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
31723 { 13041 /* vpermilps */, X86::VPERMILPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31723 { 13041 /* vpermilps */, X86::VPERMILPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31724 { 13041 /* vpermilps */, X86::VPERMILPSZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31725 { 13041 /* vpermilps */, X86::VPERMILPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31725 { 13041 /* vpermilps */, X86::VPERMILPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31726 { 13041 /* vpermilps */, X86::VPERMILPSZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
31731 { 13041 /* vpermilps */, X86::VPERMILPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31731 { 13041 /* vpermilps */, X86::VPERMILPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31732 { 13041 /* vpermilps */, X86::VPERMILPSZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
31739 { 13051 /* vpermpd */, X86::VPERMPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31739 { 13051 /* vpermpd */, X86::VPERMPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31739 { 13051 /* vpermpd */, X86::VPERMPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31740 { 13051 /* vpermpd */, X86::VPERMPDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31740 { 13051 /* vpermpd */, X86::VPERMPDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31741 { 13051 /* vpermpd */, X86::VPERMPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31741 { 13051 /* vpermpd */, X86::VPERMPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31742 { 13051 /* vpermpd */, X86::VPERMPDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31745 { 13051 /* vpermpd */, X86::VPERMPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31745 { 13051 /* vpermpd */, X86::VPERMPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31746 { 13051 /* vpermpd */, X86::VPERMPDZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
31751 { 13051 /* vpermpd */, X86::VPERMPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31751 { 13051 /* vpermpd */, X86::VPERMPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31751 { 13051 /* vpermpd */, X86::VPERMPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31752 { 13051 /* vpermpd */, X86::VPERMPDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
31752 { 13051 /* vpermpd */, X86::VPERMPDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
31753 { 13051 /* vpermpd */, X86::VPERMPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31753 { 13051 /* vpermpd */, X86::VPERMPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31754 { 13051 /* vpermpd */, X86::VPERMPDZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31761 { 13051 /* vpermpd */, X86::VPERMPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31761 { 13051 /* vpermpd */, X86::VPERMPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31761 { 13051 /* vpermpd */, X86::VPERMPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31762 { 13051 /* vpermpd */, X86::VPERMPDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
31762 { 13051 /* vpermpd */, X86::VPERMPDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
31763 { 13051 /* vpermpd */, X86::VPERMPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31763 { 13051 /* vpermpd */, X86::VPERMPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31764 { 13051 /* vpermpd */, X86::VPERMPDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31765 { 13051 /* vpermpd */, X86::VPERMPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31765 { 13051 /* vpermpd */, X86::VPERMPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31766 { 13051 /* vpermpd */, X86::VPERMPDZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
31769 { 13051 /* vpermpd */, X86::VPERMPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31769 { 13051 /* vpermpd */, X86::VPERMPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31770 { 13051 /* vpermpd */, X86::VPERMPDZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
31775 { 13059 /* vpermps */, X86::VPERMPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31775 { 13059 /* vpermps */, X86::VPERMPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31775 { 13059 /* vpermps */, X86::VPERMPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31776 { 13059 /* vpermps */, X86::VPERMPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31776 { 13059 /* vpermps */, X86::VPERMPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31778 { 13059 /* vpermps */, X86::VPERMPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31778 { 13059 /* vpermps */, X86::VPERMPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31781 { 13059 /* vpermps */, X86::VPERMPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31781 { 13059 /* vpermps */, X86::VPERMPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31781 { 13059 /* vpermps */, X86::VPERMPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31782 { 13059 /* vpermps */, X86::VPERMPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31782 { 13059 /* vpermps */, X86::VPERMPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31786 { 13059 /* vpermps */, X86::VPERMPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31786 { 13059 /* vpermps */, X86::VPERMPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31786 { 13059 /* vpermps */, X86::VPERMPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31787 { 13059 /* vpermps */, X86::VPERMPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31787 { 13059 /* vpermps */, X86::VPERMPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31788 { 13059 /* vpermps */, X86::VPERMPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31788 { 13059 /* vpermps */, X86::VPERMPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31790 { 13059 /* vpermps */, X86::VPERMPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31790 { 13059 /* vpermps */, X86::VPERMPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31797 { 13067 /* vpermq */, X86::VPERMQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31797 { 13067 /* vpermq */, X86::VPERMQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31797 { 13067 /* vpermq */, X86::VPERMQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31798 { 13067 /* vpermq */, X86::VPERMQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31798 { 13067 /* vpermq */, X86::VPERMQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31799 { 13067 /* vpermq */, X86::VPERMQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31799 { 13067 /* vpermq */, X86::VPERMQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31800 { 13067 /* vpermq */, X86::VPERMQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31803 { 13067 /* vpermq */, X86::VPERMQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31803 { 13067 /* vpermq */, X86::VPERMQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31804 { 13067 /* vpermq */, X86::VPERMQZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
31809 { 13067 /* vpermq */, X86::VPERMQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31809 { 13067 /* vpermq */, X86::VPERMQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31809 { 13067 /* vpermq */, X86::VPERMQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31810 { 13067 /* vpermq */, X86::VPERMQZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
31810 { 13067 /* vpermq */, X86::VPERMQZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
31811 { 13067 /* vpermq */, X86::VPERMQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31811 { 13067 /* vpermq */, X86::VPERMQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31812 { 13067 /* vpermq */, X86::VPERMQZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31819 { 13067 /* vpermq */, X86::VPERMQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31819 { 13067 /* vpermq */, X86::VPERMQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31819 { 13067 /* vpermq */, X86::VPERMQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31820 { 13067 /* vpermq */, X86::VPERMQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
31820 { 13067 /* vpermq */, X86::VPERMQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
31821 { 13067 /* vpermq */, X86::VPERMQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31821 { 13067 /* vpermq */, X86::VPERMQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31822 { 13067 /* vpermq */, X86::VPERMQZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31823 { 13067 /* vpermq */, X86::VPERMQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31823 { 13067 /* vpermq */, X86::VPERMQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31824 { 13067 /* vpermq */, X86::VPERMQZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
31827 { 13067 /* vpermq */, X86::VPERMQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31827 { 13067 /* vpermq */, X86::VPERMQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31828 { 13067 /* vpermq */, X86::VPERMQZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
31833 { 13074 /* vpermt2b */, X86::VPERMT2Brr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31833 { 13074 /* vpermt2b */, X86::VPERMT2Brr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31833 { 13074 /* vpermt2b */, X86::VPERMT2Brr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31834 { 13074 /* vpermt2b */, X86::VPERMT2Brm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31834 { 13074 /* vpermt2b */, X86::VPERMT2Brm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31839 { 13074 /* vpermt2b */, X86::VPERMT2Brrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31839 { 13074 /* vpermt2b */, X86::VPERMT2Brrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31839 { 13074 /* vpermt2b */, X86::VPERMT2Brrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31840 { 13074 /* vpermt2b */, X86::VPERMT2Brmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31840 { 13074 /* vpermt2b */, X86::VPERMT2Brmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31845 { 13074 /* vpermt2b */, X86::VPERMT2Brrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31845 { 13074 /* vpermt2b */, X86::VPERMT2Brrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31845 { 13074 /* vpermt2b */, X86::VPERMT2Brrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31846 { 13074 /* vpermt2b */, X86::VPERMT2Brmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31846 { 13074 /* vpermt2b */, X86::VPERMT2Brmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31851 { 13083 /* vpermt2d */, X86::VPERMT2Drr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31851 { 13083 /* vpermt2d */, X86::VPERMT2Drr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31851 { 13083 /* vpermt2d */, X86::VPERMT2Drr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31852 { 13083 /* vpermt2d */, X86::VPERMT2Drm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31852 { 13083 /* vpermt2d */, X86::VPERMT2Drm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31855 { 13083 /* vpermt2d */, X86::VPERMT2Drmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31855 { 13083 /* vpermt2d */, X86::VPERMT2Drmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31860 { 13083 /* vpermt2d */, X86::VPERMT2Drrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31860 { 13083 /* vpermt2d */, X86::VPERMT2Drrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31860 { 13083 /* vpermt2d */, X86::VPERMT2Drrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31861 { 13083 /* vpermt2d */, X86::VPERMT2Drmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31861 { 13083 /* vpermt2d */, X86::VPERMT2Drmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31868 { 13083 /* vpermt2d */, X86::VPERMT2Drrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31868 { 13083 /* vpermt2d */, X86::VPERMT2Drrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31868 { 13083 /* vpermt2d */, X86::VPERMT2Drrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31869 { 13083 /* vpermt2d */, X86::VPERMT2Drmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31869 { 13083 /* vpermt2d */, X86::VPERMT2Drmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31870 { 13083 /* vpermt2d */, X86::VPERMT2Drmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31870 { 13083 /* vpermt2d */, X86::VPERMT2Drmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31873 { 13083 /* vpermt2d */, X86::VPERMT2Drmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31873 { 13083 /* vpermt2d */, X86::VPERMT2Drmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31878 { 13092 /* vpermt2pd */, X86::VPERMT2PDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31878 { 13092 /* vpermt2pd */, X86::VPERMT2PDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31878 { 13092 /* vpermt2pd */, X86::VPERMT2PDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31879 { 13092 /* vpermt2pd */, X86::VPERMT2PDrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31879 { 13092 /* vpermt2pd */, X86::VPERMT2PDrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31882 { 13092 /* vpermt2pd */, X86::VPERMT2PDrmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31882 { 13092 /* vpermt2pd */, X86::VPERMT2PDrmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31887 { 13092 /* vpermt2pd */, X86::VPERMT2PDrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31887 { 13092 /* vpermt2pd */, X86::VPERMT2PDrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31887 { 13092 /* vpermt2pd */, X86::VPERMT2PDrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31888 { 13092 /* vpermt2pd */, X86::VPERMT2PDrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31888 { 13092 /* vpermt2pd */, X86::VPERMT2PDrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31895 { 13092 /* vpermt2pd */, X86::VPERMT2PDrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31895 { 13092 /* vpermt2pd */, X86::VPERMT2PDrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31895 { 13092 /* vpermt2pd */, X86::VPERMT2PDrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31896 { 13092 /* vpermt2pd */, X86::VPERMT2PDrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31896 { 13092 /* vpermt2pd */, X86::VPERMT2PDrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31897 { 13092 /* vpermt2pd */, X86::VPERMT2PDrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31897 { 13092 /* vpermt2pd */, X86::VPERMT2PDrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31900 { 13092 /* vpermt2pd */, X86::VPERMT2PDrmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31900 { 13092 /* vpermt2pd */, X86::VPERMT2PDrmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31905 { 13102 /* vpermt2ps */, X86::VPERMT2PSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31905 { 13102 /* vpermt2ps */, X86::VPERMT2PSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31905 { 13102 /* vpermt2ps */, X86::VPERMT2PSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31906 { 13102 /* vpermt2ps */, X86::VPERMT2PSrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31906 { 13102 /* vpermt2ps */, X86::VPERMT2PSrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31909 { 13102 /* vpermt2ps */, X86::VPERMT2PSrmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31909 { 13102 /* vpermt2ps */, X86::VPERMT2PSrmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31914 { 13102 /* vpermt2ps */, X86::VPERMT2PSrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31914 { 13102 /* vpermt2ps */, X86::VPERMT2PSrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31914 { 13102 /* vpermt2ps */, X86::VPERMT2PSrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31915 { 13102 /* vpermt2ps */, X86::VPERMT2PSrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31915 { 13102 /* vpermt2ps */, X86::VPERMT2PSrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31922 { 13102 /* vpermt2ps */, X86::VPERMT2PSrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31922 { 13102 /* vpermt2ps */, X86::VPERMT2PSrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31922 { 13102 /* vpermt2ps */, X86::VPERMT2PSrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31923 { 13102 /* vpermt2ps */, X86::VPERMT2PSrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31923 { 13102 /* vpermt2ps */, X86::VPERMT2PSrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31924 { 13102 /* vpermt2ps */, X86::VPERMT2PSrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31924 { 13102 /* vpermt2ps */, X86::VPERMT2PSrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31927 { 13102 /* vpermt2ps */, X86::VPERMT2PSrmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31927 { 13102 /* vpermt2ps */, X86::VPERMT2PSrmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31932 { 13112 /* vpermt2q */, X86::VPERMT2Qrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31932 { 13112 /* vpermt2q */, X86::VPERMT2Qrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31932 { 13112 /* vpermt2q */, X86::VPERMT2Qrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31933 { 13112 /* vpermt2q */, X86::VPERMT2Qrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31933 { 13112 /* vpermt2q */, X86::VPERMT2Qrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31936 { 13112 /* vpermt2q */, X86::VPERMT2Qrmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31936 { 13112 /* vpermt2q */, X86::VPERMT2Qrmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31941 { 13112 /* vpermt2q */, X86::VPERMT2Qrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31941 { 13112 /* vpermt2q */, X86::VPERMT2Qrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31941 { 13112 /* vpermt2q */, X86::VPERMT2Qrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31942 { 13112 /* vpermt2q */, X86::VPERMT2Qrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31942 { 13112 /* vpermt2q */, X86::VPERMT2Qrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31949 { 13112 /* vpermt2q */, X86::VPERMT2Qrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31949 { 13112 /* vpermt2q */, X86::VPERMT2Qrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31949 { 13112 /* vpermt2q */, X86::VPERMT2Qrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31950 { 13112 /* vpermt2q */, X86::VPERMT2Qrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31950 { 13112 /* vpermt2q */, X86::VPERMT2Qrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31951 { 13112 /* vpermt2q */, X86::VPERMT2Qrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31951 { 13112 /* vpermt2q */, X86::VPERMT2Qrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31954 { 13112 /* vpermt2q */, X86::VPERMT2Qrmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31954 { 13112 /* vpermt2q */, X86::VPERMT2Qrmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31959 { 13121 /* vpermt2w */, X86::VPERMT2Wrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31959 { 13121 /* vpermt2w */, X86::VPERMT2Wrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31959 { 13121 /* vpermt2w */, X86::VPERMT2Wrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31960 { 13121 /* vpermt2w */, X86::VPERMT2Wrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31960 { 13121 /* vpermt2w */, X86::VPERMT2Wrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31965 { 13121 /* vpermt2w */, X86::VPERMT2Wrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31965 { 13121 /* vpermt2w */, X86::VPERMT2Wrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31965 { 13121 /* vpermt2w */, X86::VPERMT2Wrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31966 { 13121 /* vpermt2w */, X86::VPERMT2Wrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31966 { 13121 /* vpermt2w */, X86::VPERMT2Wrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31971 { 13121 /* vpermt2w */, X86::VPERMT2Wrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31971 { 13121 /* vpermt2w */, X86::VPERMT2Wrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31971 { 13121 /* vpermt2w */, X86::VPERMT2Wrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31972 { 13121 /* vpermt2w */, X86::VPERMT2Wrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31972 { 13121 /* vpermt2w */, X86::VPERMT2Wrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31977 { 13130 /* vpermw */, X86::VPERMWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31977 { 13130 /* vpermw */, X86::VPERMWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31977 { 13130 /* vpermw */, X86::VPERMWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31978 { 13130 /* vpermw */, X86::VPERMWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31978 { 13130 /* vpermw */, X86::VPERMWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31983 { 13130 /* vpermw */, X86::VPERMWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31983 { 13130 /* vpermw */, X86::VPERMWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31983 { 13130 /* vpermw */, X86::VPERMWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31984 { 13130 /* vpermw */, X86::VPERMWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31984 { 13130 /* vpermw */, X86::VPERMWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31989 { 13130 /* vpermw */, X86::VPERMWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31989 { 13130 /* vpermw */, X86::VPERMWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31989 { 13130 /* vpermw */, X86::VPERMWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31990 { 13130 /* vpermw */, X86::VPERMWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31990 { 13130 /* vpermw */, X86::VPERMWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31995 { 13137 /* vpexpandb */, X86::VPEXPANDBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
31995 { 13137 /* vpexpandb */, X86::VPEXPANDBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
31996 { 13137 /* vpexpandb */, X86::VPEXPANDBZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
32001 { 13137 /* vpexpandb */, X86::VPEXPANDBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32001 { 13137 /* vpexpandb */, X86::VPEXPANDBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32002 { 13137 /* vpexpandb */, X86::VPEXPANDBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
32007 { 13137 /* vpexpandb */, X86::VPEXPANDBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32007 { 13137 /* vpexpandb */, X86::VPEXPANDBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32008 { 13137 /* vpexpandb */, X86::VPEXPANDBZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
32013 { 13147 /* vpexpandd */, X86::VPEXPANDDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
32013 { 13147 /* vpexpandd */, X86::VPEXPANDDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
32014 { 13147 /* vpexpandd */, X86::VPEXPANDDZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
32019 { 13147 /* vpexpandd */, X86::VPEXPANDDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32019 { 13147 /* vpexpandd */, X86::VPEXPANDDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32020 { 13147 /* vpexpandd */, X86::VPEXPANDDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
32025 { 13147 /* vpexpandd */, X86::VPEXPANDDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32025 { 13147 /* vpexpandd */, X86::VPEXPANDDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32026 { 13147 /* vpexpandd */, X86::VPEXPANDDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
32031 { 13157 /* vpexpandq */, X86::VPEXPANDQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
32031 { 13157 /* vpexpandq */, X86::VPEXPANDQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
32032 { 13157 /* vpexpandq */, X86::VPEXPANDQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
32037 { 13157 /* vpexpandq */, X86::VPEXPANDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32037 { 13157 /* vpexpandq */, X86::VPEXPANDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32038 { 13157 /* vpexpandq */, X86::VPEXPANDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
32043 { 13157 /* vpexpandq */, X86::VPEXPANDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32043 { 13157 /* vpexpandq */, X86::VPEXPANDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32044 { 13157 /* vpexpandq */, X86::VPEXPANDQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
32049 { 13167 /* vpexpandw */, X86::VPEXPANDWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
32049 { 13167 /* vpexpandw */, X86::VPEXPANDWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
32050 { 13167 /* vpexpandw */, X86::VPEXPANDWZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
32055 { 13167 /* vpexpandw */, X86::VPEXPANDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32055 { 13167 /* vpexpandw */, X86::VPEXPANDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32056 { 13167 /* vpexpandw */, X86::VPEXPANDWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
32061 { 13167 /* vpexpandw */, X86::VPEXPANDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32061 { 13167 /* vpexpandw */, X86::VPEXPANDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32062 { 13167 /* vpexpandw */, X86::VPEXPANDWZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
32083 { 13209 /* vpgatherdd */, X86::VPGATHERDDZrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
32088 { 13220 /* vpgatherdq */, X86::VPGATHERDQZrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC256X5_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC256X }, },
32098 { 13242 /* vpgatherqq */, X86::VPGATHERQQZrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
32175 { 13488 /* vplzcntd */, X86::VPLZCNTDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
32175 { 13488 /* vplzcntd */, X86::VPLZCNTDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
32176 { 13488 /* vplzcntd */, X86::VPLZCNTDZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
32179 { 13488 /* vplzcntd */, X86::VPLZCNTDZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32184 { 13488 /* vplzcntd */, X86::VPLZCNTDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32184 { 13488 /* vplzcntd */, X86::VPLZCNTDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32185 { 13488 /* vplzcntd */, X86::VPLZCNTDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
32192 { 13488 /* vplzcntd */, X86::VPLZCNTDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32192 { 13488 /* vplzcntd */, X86::VPLZCNTDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32193 { 13488 /* vplzcntd */, X86::VPLZCNTDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
32194 { 13488 /* vplzcntd */, X86::VPLZCNTDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
32197 { 13488 /* vplzcntd */, X86::VPLZCNTDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
32202 { 13497 /* vplzcntq */, X86::VPLZCNTQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
32202 { 13497 /* vplzcntq */, X86::VPLZCNTQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
32203 { 13497 /* vplzcntq */, X86::VPLZCNTQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
32206 { 13497 /* vplzcntq */, X86::VPLZCNTQZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32211 { 13497 /* vplzcntq */, X86::VPLZCNTQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32211 { 13497 /* vplzcntq */, X86::VPLZCNTQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32212 { 13497 /* vplzcntq */, X86::VPLZCNTQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
32219 { 13497 /* vplzcntq */, X86::VPLZCNTQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32219 { 13497 /* vplzcntq */, X86::VPLZCNTQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32220 { 13497 /* vplzcntq */, X86::VPLZCNTQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
32221 { 13497 /* vplzcntq */, X86::VPLZCNTQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
32224 { 13497 /* vplzcntq */, X86::VPLZCNTQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
32253 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32253 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32253 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32254 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32254 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32257 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32257 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32262 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32262 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32262 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32263 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32263 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32270 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32270 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32270 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32271 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32271 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32272 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32272 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32275 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32275 { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32280 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32280 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32280 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32281 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32281 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32284 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32284 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32289 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32289 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32289 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32290 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32290 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32297 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32297 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32297 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32298 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32298 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32299 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32299 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32302 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32302 { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32311 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32311 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32311 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32312 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32312 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32317 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32317 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32317 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32318 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32318 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32323 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32323 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32323 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32324 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32324 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32333 { 13661 /* vpmaddwd */, X86::VPMADDWDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32333 { 13661 /* vpmaddwd */, X86::VPMADDWDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32333 { 13661 /* vpmaddwd */, X86::VPMADDWDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32334 { 13661 /* vpmaddwd */, X86::VPMADDWDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32334 { 13661 /* vpmaddwd */, X86::VPMADDWDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32339 { 13661 /* vpmaddwd */, X86::VPMADDWDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32339 { 13661 /* vpmaddwd */, X86::VPMADDWDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32339 { 13661 /* vpmaddwd */, X86::VPMADDWDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32340 { 13661 /* vpmaddwd */, X86::VPMADDWDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32340 { 13661 /* vpmaddwd */, X86::VPMADDWDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32345 { 13661 /* vpmaddwd */, X86::VPMADDWDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32345 { 13661 /* vpmaddwd */, X86::VPMADDWDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32345 { 13661 /* vpmaddwd */, X86::VPMADDWDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32346 { 13661 /* vpmaddwd */, X86::VPMADDWDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32346 { 13661 /* vpmaddwd */, X86::VPMADDWDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32363 { 13692 /* vpmaxsb */, X86::VPMAXSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32363 { 13692 /* vpmaxsb */, X86::VPMAXSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32363 { 13692 /* vpmaxsb */, X86::VPMAXSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32364 { 13692 /* vpmaxsb */, X86::VPMAXSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32364 { 13692 /* vpmaxsb */, X86::VPMAXSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32369 { 13692 /* vpmaxsb */, X86::VPMAXSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32369 { 13692 /* vpmaxsb */, X86::VPMAXSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32369 { 13692 /* vpmaxsb */, X86::VPMAXSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32370 { 13692 /* vpmaxsb */, X86::VPMAXSBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32370 { 13692 /* vpmaxsb */, X86::VPMAXSBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32375 { 13692 /* vpmaxsb */, X86::VPMAXSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32375 { 13692 /* vpmaxsb */, X86::VPMAXSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32375 { 13692 /* vpmaxsb */, X86::VPMAXSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32376 { 13692 /* vpmaxsb */, X86::VPMAXSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32376 { 13692 /* vpmaxsb */, X86::VPMAXSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32385 { 13700 /* vpmaxsd */, X86::VPMAXSDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32385 { 13700 /* vpmaxsd */, X86::VPMAXSDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32385 { 13700 /* vpmaxsd */, X86::VPMAXSDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32386 { 13700 /* vpmaxsd */, X86::VPMAXSDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32386 { 13700 /* vpmaxsd */, X86::VPMAXSDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32389 { 13700 /* vpmaxsd */, X86::VPMAXSDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32389 { 13700 /* vpmaxsd */, X86::VPMAXSDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32394 { 13700 /* vpmaxsd */, X86::VPMAXSDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32394 { 13700 /* vpmaxsd */, X86::VPMAXSDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32394 { 13700 /* vpmaxsd */, X86::VPMAXSDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32395 { 13700 /* vpmaxsd */, X86::VPMAXSDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32395 { 13700 /* vpmaxsd */, X86::VPMAXSDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32402 { 13700 /* vpmaxsd */, X86::VPMAXSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32402 { 13700 /* vpmaxsd */, X86::VPMAXSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32402 { 13700 /* vpmaxsd */, X86::VPMAXSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32403 { 13700 /* vpmaxsd */, X86::VPMAXSDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32403 { 13700 /* vpmaxsd */, X86::VPMAXSDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32404 { 13700 /* vpmaxsd */, X86::VPMAXSDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32404 { 13700 /* vpmaxsd */, X86::VPMAXSDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32407 { 13700 /* vpmaxsd */, X86::VPMAXSDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32407 { 13700 /* vpmaxsd */, X86::VPMAXSDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32412 { 13708 /* vpmaxsq */, X86::VPMAXSQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32412 { 13708 /* vpmaxsq */, X86::VPMAXSQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32412 { 13708 /* vpmaxsq */, X86::VPMAXSQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32413 { 13708 /* vpmaxsq */, X86::VPMAXSQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32413 { 13708 /* vpmaxsq */, X86::VPMAXSQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32416 { 13708 /* vpmaxsq */, X86::VPMAXSQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32416 { 13708 /* vpmaxsq */, X86::VPMAXSQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32421 { 13708 /* vpmaxsq */, X86::VPMAXSQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32421 { 13708 /* vpmaxsq */, X86::VPMAXSQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32421 { 13708 /* vpmaxsq */, X86::VPMAXSQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32422 { 13708 /* vpmaxsq */, X86::VPMAXSQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32422 { 13708 /* vpmaxsq */, X86::VPMAXSQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32429 { 13708 /* vpmaxsq */, X86::VPMAXSQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32429 { 13708 /* vpmaxsq */, X86::VPMAXSQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32429 { 13708 /* vpmaxsq */, X86::VPMAXSQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32430 { 13708 /* vpmaxsq */, X86::VPMAXSQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32430 { 13708 /* vpmaxsq */, X86::VPMAXSQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32431 { 13708 /* vpmaxsq */, X86::VPMAXSQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32431 { 13708 /* vpmaxsq */, X86::VPMAXSQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32434 { 13708 /* vpmaxsq */, X86::VPMAXSQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32434 { 13708 /* vpmaxsq */, X86::VPMAXSQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32443 { 13716 /* vpmaxsw */, X86::VPMAXSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32443 { 13716 /* vpmaxsw */, X86::VPMAXSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32443 { 13716 /* vpmaxsw */, X86::VPMAXSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32444 { 13716 /* vpmaxsw */, X86::VPMAXSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32444 { 13716 /* vpmaxsw */, X86::VPMAXSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32449 { 13716 /* vpmaxsw */, X86::VPMAXSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32449 { 13716 /* vpmaxsw */, X86::VPMAXSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32449 { 13716 /* vpmaxsw */, X86::VPMAXSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32450 { 13716 /* vpmaxsw */, X86::VPMAXSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32450 { 13716 /* vpmaxsw */, X86::VPMAXSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32455 { 13716 /* vpmaxsw */, X86::VPMAXSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32455 { 13716 /* vpmaxsw */, X86::VPMAXSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32455 { 13716 /* vpmaxsw */, X86::VPMAXSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32456 { 13716 /* vpmaxsw */, X86::VPMAXSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32456 { 13716 /* vpmaxsw */, X86::VPMAXSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32465 { 13724 /* vpmaxub */, X86::VPMAXUBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32465 { 13724 /* vpmaxub */, X86::VPMAXUBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32465 { 13724 /* vpmaxub */, X86::VPMAXUBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32466 { 13724 /* vpmaxub */, X86::VPMAXUBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32466 { 13724 /* vpmaxub */, X86::VPMAXUBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32471 { 13724 /* vpmaxub */, X86::VPMAXUBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32471 { 13724 /* vpmaxub */, X86::VPMAXUBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32471 { 13724 /* vpmaxub */, X86::VPMAXUBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32472 { 13724 /* vpmaxub */, X86::VPMAXUBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32472 { 13724 /* vpmaxub */, X86::VPMAXUBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32477 { 13724 /* vpmaxub */, X86::VPMAXUBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32477 { 13724 /* vpmaxub */, X86::VPMAXUBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32477 { 13724 /* vpmaxub */, X86::VPMAXUBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32478 { 13724 /* vpmaxub */, X86::VPMAXUBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32478 { 13724 /* vpmaxub */, X86::VPMAXUBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32487 { 13732 /* vpmaxud */, X86::VPMAXUDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32487 { 13732 /* vpmaxud */, X86::VPMAXUDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32487 { 13732 /* vpmaxud */, X86::VPMAXUDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32488 { 13732 /* vpmaxud */, X86::VPMAXUDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32488 { 13732 /* vpmaxud */, X86::VPMAXUDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32491 { 13732 /* vpmaxud */, X86::VPMAXUDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32491 { 13732 /* vpmaxud */, X86::VPMAXUDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32496 { 13732 /* vpmaxud */, X86::VPMAXUDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32496 { 13732 /* vpmaxud */, X86::VPMAXUDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32496 { 13732 /* vpmaxud */, X86::VPMAXUDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32497 { 13732 /* vpmaxud */, X86::VPMAXUDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32497 { 13732 /* vpmaxud */, X86::VPMAXUDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32504 { 13732 /* vpmaxud */, X86::VPMAXUDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32504 { 13732 /* vpmaxud */, X86::VPMAXUDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32504 { 13732 /* vpmaxud */, X86::VPMAXUDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32505 { 13732 /* vpmaxud */, X86::VPMAXUDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32505 { 13732 /* vpmaxud */, X86::VPMAXUDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32506 { 13732 /* vpmaxud */, X86::VPMAXUDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32506 { 13732 /* vpmaxud */, X86::VPMAXUDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32509 { 13732 /* vpmaxud */, X86::VPMAXUDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32509 { 13732 /* vpmaxud */, X86::VPMAXUDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32514 { 13740 /* vpmaxuq */, X86::VPMAXUQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32514 { 13740 /* vpmaxuq */, X86::VPMAXUQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32514 { 13740 /* vpmaxuq */, X86::VPMAXUQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32515 { 13740 /* vpmaxuq */, X86::VPMAXUQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32515 { 13740 /* vpmaxuq */, X86::VPMAXUQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32518 { 13740 /* vpmaxuq */, X86::VPMAXUQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32518 { 13740 /* vpmaxuq */, X86::VPMAXUQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32523 { 13740 /* vpmaxuq */, X86::VPMAXUQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32523 { 13740 /* vpmaxuq */, X86::VPMAXUQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32523 { 13740 /* vpmaxuq */, X86::VPMAXUQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32524 { 13740 /* vpmaxuq */, X86::VPMAXUQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32524 { 13740 /* vpmaxuq */, X86::VPMAXUQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32531 { 13740 /* vpmaxuq */, X86::VPMAXUQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32531 { 13740 /* vpmaxuq */, X86::VPMAXUQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32531 { 13740 /* vpmaxuq */, X86::VPMAXUQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32532 { 13740 /* vpmaxuq */, X86::VPMAXUQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32532 { 13740 /* vpmaxuq */, X86::VPMAXUQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32533 { 13740 /* vpmaxuq */, X86::VPMAXUQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32533 { 13740 /* vpmaxuq */, X86::VPMAXUQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32536 { 13740 /* vpmaxuq */, X86::VPMAXUQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32536 { 13740 /* vpmaxuq */, X86::VPMAXUQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32545 { 13748 /* vpmaxuw */, X86::VPMAXUWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32545 { 13748 /* vpmaxuw */, X86::VPMAXUWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32545 { 13748 /* vpmaxuw */, X86::VPMAXUWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32546 { 13748 /* vpmaxuw */, X86::VPMAXUWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32546 { 13748 /* vpmaxuw */, X86::VPMAXUWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32551 { 13748 /* vpmaxuw */, X86::VPMAXUWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32551 { 13748 /* vpmaxuw */, X86::VPMAXUWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32551 { 13748 /* vpmaxuw */, X86::VPMAXUWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32552 { 13748 /* vpmaxuw */, X86::VPMAXUWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32552 { 13748 /* vpmaxuw */, X86::VPMAXUWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32557 { 13748 /* vpmaxuw */, X86::VPMAXUWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32557 { 13748 /* vpmaxuw */, X86::VPMAXUWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32557 { 13748 /* vpmaxuw */, X86::VPMAXUWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32558 { 13748 /* vpmaxuw */, X86::VPMAXUWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32558 { 13748 /* vpmaxuw */, X86::VPMAXUWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32567 { 13756 /* vpminsb */, X86::VPMINSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32567 { 13756 /* vpminsb */, X86::VPMINSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32567 { 13756 /* vpminsb */, X86::VPMINSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32568 { 13756 /* vpminsb */, X86::VPMINSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32568 { 13756 /* vpminsb */, X86::VPMINSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32573 { 13756 /* vpminsb */, X86::VPMINSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32573 { 13756 /* vpminsb */, X86::VPMINSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32573 { 13756 /* vpminsb */, X86::VPMINSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32574 { 13756 /* vpminsb */, X86::VPMINSBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32574 { 13756 /* vpminsb */, X86::VPMINSBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32579 { 13756 /* vpminsb */, X86::VPMINSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32579 { 13756 /* vpminsb */, X86::VPMINSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32579 { 13756 /* vpminsb */, X86::VPMINSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32580 { 13756 /* vpminsb */, X86::VPMINSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32580 { 13756 /* vpminsb */, X86::VPMINSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32589 { 13764 /* vpminsd */, X86::VPMINSDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32589 { 13764 /* vpminsd */, X86::VPMINSDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32589 { 13764 /* vpminsd */, X86::VPMINSDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32590 { 13764 /* vpminsd */, X86::VPMINSDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32590 { 13764 /* vpminsd */, X86::VPMINSDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32593 { 13764 /* vpminsd */, X86::VPMINSDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32593 { 13764 /* vpminsd */, X86::VPMINSDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32598 { 13764 /* vpminsd */, X86::VPMINSDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32598 { 13764 /* vpminsd */, X86::VPMINSDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32598 { 13764 /* vpminsd */, X86::VPMINSDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32599 { 13764 /* vpminsd */, X86::VPMINSDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32599 { 13764 /* vpminsd */, X86::VPMINSDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32606 { 13764 /* vpminsd */, X86::VPMINSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32606 { 13764 /* vpminsd */, X86::VPMINSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32606 { 13764 /* vpminsd */, X86::VPMINSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32607 { 13764 /* vpminsd */, X86::VPMINSDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32607 { 13764 /* vpminsd */, X86::VPMINSDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32608 { 13764 /* vpminsd */, X86::VPMINSDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32608 { 13764 /* vpminsd */, X86::VPMINSDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32611 { 13764 /* vpminsd */, X86::VPMINSDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32611 { 13764 /* vpminsd */, X86::VPMINSDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32616 { 13772 /* vpminsq */, X86::VPMINSQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32616 { 13772 /* vpminsq */, X86::VPMINSQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32616 { 13772 /* vpminsq */, X86::VPMINSQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32617 { 13772 /* vpminsq */, X86::VPMINSQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32617 { 13772 /* vpminsq */, X86::VPMINSQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32620 { 13772 /* vpminsq */, X86::VPMINSQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32620 { 13772 /* vpminsq */, X86::VPMINSQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32625 { 13772 /* vpminsq */, X86::VPMINSQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32625 { 13772 /* vpminsq */, X86::VPMINSQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32625 { 13772 /* vpminsq */, X86::VPMINSQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32626 { 13772 /* vpminsq */, X86::VPMINSQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32626 { 13772 /* vpminsq */, X86::VPMINSQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32633 { 13772 /* vpminsq */, X86::VPMINSQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32633 { 13772 /* vpminsq */, X86::VPMINSQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32633 { 13772 /* vpminsq */, X86::VPMINSQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32634 { 13772 /* vpminsq */, X86::VPMINSQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32634 { 13772 /* vpminsq */, X86::VPMINSQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32635 { 13772 /* vpminsq */, X86::VPMINSQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32635 { 13772 /* vpminsq */, X86::VPMINSQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32638 { 13772 /* vpminsq */, X86::VPMINSQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32638 { 13772 /* vpminsq */, X86::VPMINSQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32647 { 13780 /* vpminsw */, X86::VPMINSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32647 { 13780 /* vpminsw */, X86::VPMINSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32647 { 13780 /* vpminsw */, X86::VPMINSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32648 { 13780 /* vpminsw */, X86::VPMINSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32648 { 13780 /* vpminsw */, X86::VPMINSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32653 { 13780 /* vpminsw */, X86::VPMINSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32653 { 13780 /* vpminsw */, X86::VPMINSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32653 { 13780 /* vpminsw */, X86::VPMINSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32654 { 13780 /* vpminsw */, X86::VPMINSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32654 { 13780 /* vpminsw */, X86::VPMINSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32659 { 13780 /* vpminsw */, X86::VPMINSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32659 { 13780 /* vpminsw */, X86::VPMINSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32659 { 13780 /* vpminsw */, X86::VPMINSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32660 { 13780 /* vpminsw */, X86::VPMINSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32660 { 13780 /* vpminsw */, X86::VPMINSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32669 { 13788 /* vpminub */, X86::VPMINUBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32669 { 13788 /* vpminub */, X86::VPMINUBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32669 { 13788 /* vpminub */, X86::VPMINUBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32670 { 13788 /* vpminub */, X86::VPMINUBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32670 { 13788 /* vpminub */, X86::VPMINUBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32675 { 13788 /* vpminub */, X86::VPMINUBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32675 { 13788 /* vpminub */, X86::VPMINUBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32675 { 13788 /* vpminub */, X86::VPMINUBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32676 { 13788 /* vpminub */, X86::VPMINUBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32676 { 13788 /* vpminub */, X86::VPMINUBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32681 { 13788 /* vpminub */, X86::VPMINUBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32681 { 13788 /* vpminub */, X86::VPMINUBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32681 { 13788 /* vpminub */, X86::VPMINUBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32682 { 13788 /* vpminub */, X86::VPMINUBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32682 { 13788 /* vpminub */, X86::VPMINUBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32691 { 13796 /* vpminud */, X86::VPMINUDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32691 { 13796 /* vpminud */, X86::VPMINUDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32691 { 13796 /* vpminud */, X86::VPMINUDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32692 { 13796 /* vpminud */, X86::VPMINUDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32692 { 13796 /* vpminud */, X86::VPMINUDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32695 { 13796 /* vpminud */, X86::VPMINUDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32695 { 13796 /* vpminud */, X86::VPMINUDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32700 { 13796 /* vpminud */, X86::VPMINUDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32700 { 13796 /* vpminud */, X86::VPMINUDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32700 { 13796 /* vpminud */, X86::VPMINUDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32701 { 13796 /* vpminud */, X86::VPMINUDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32701 { 13796 /* vpminud */, X86::VPMINUDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32708 { 13796 /* vpminud */, X86::VPMINUDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32708 { 13796 /* vpminud */, X86::VPMINUDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32708 { 13796 /* vpminud */, X86::VPMINUDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32709 { 13796 /* vpminud */, X86::VPMINUDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32709 { 13796 /* vpminud */, X86::VPMINUDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32710 { 13796 /* vpminud */, X86::VPMINUDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32710 { 13796 /* vpminud */, X86::VPMINUDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32713 { 13796 /* vpminud */, X86::VPMINUDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32713 { 13796 /* vpminud */, X86::VPMINUDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32718 { 13804 /* vpminuq */, X86::VPMINUQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32718 { 13804 /* vpminuq */, X86::VPMINUQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32718 { 13804 /* vpminuq */, X86::VPMINUQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32719 { 13804 /* vpminuq */, X86::VPMINUQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32719 { 13804 /* vpminuq */, X86::VPMINUQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32722 { 13804 /* vpminuq */, X86::VPMINUQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32722 { 13804 /* vpminuq */, X86::VPMINUQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32727 { 13804 /* vpminuq */, X86::VPMINUQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32727 { 13804 /* vpminuq */, X86::VPMINUQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32727 { 13804 /* vpminuq */, X86::VPMINUQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32728 { 13804 /* vpminuq */, X86::VPMINUQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32728 { 13804 /* vpminuq */, X86::VPMINUQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32735 { 13804 /* vpminuq */, X86::VPMINUQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32735 { 13804 /* vpminuq */, X86::VPMINUQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32735 { 13804 /* vpminuq */, X86::VPMINUQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32736 { 13804 /* vpminuq */, X86::VPMINUQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32736 { 13804 /* vpminuq */, X86::VPMINUQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32737 { 13804 /* vpminuq */, X86::VPMINUQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32737 { 13804 /* vpminuq */, X86::VPMINUQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32740 { 13804 /* vpminuq */, X86::VPMINUQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32740 { 13804 /* vpminuq */, X86::VPMINUQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32749 { 13812 /* vpminuw */, X86::VPMINUWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32749 { 13812 /* vpminuw */, X86::VPMINUWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32749 { 13812 /* vpminuw */, X86::VPMINUWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32750 { 13812 /* vpminuw */, X86::VPMINUWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32750 { 13812 /* vpminuw */, X86::VPMINUWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32755 { 13812 /* vpminuw */, X86::VPMINUWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32755 { 13812 /* vpminuw */, X86::VPMINUWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32755 { 13812 /* vpminuw */, X86::VPMINUWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32756 { 13812 /* vpminuw */, X86::VPMINUWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32756 { 13812 /* vpminuw */, X86::VPMINUWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32761 { 13812 /* vpminuw */, X86::VPMINUWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32761 { 13812 /* vpminuw */, X86::VPMINUWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32761 { 13812 /* vpminuw */, X86::VPMINUWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32762 { 13812 /* vpminuw */, X86::VPMINUWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32762 { 13812 /* vpminuw */, X86::VPMINUWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32765 { 13820 /* vpmovb2m */, X86::VPMOVB2MZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VR512 }, },
32768 { 13829 /* vpmovd2m */, X86::VPMOVD2MZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VR512 }, },
32771 { 13838 /* vpmovdb */, X86::VPMOVDBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
32772 { 13838 /* vpmovdb */, X86::VPMOVDBZmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_VR512 }, },
32777 { 13838 /* vpmovdb */, X86::VPMOVDBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32778 { 13838 /* vpmovdb */, X86::VPMOVDBZmrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32783 { 13838 /* vpmovdb */, X86::VPMOVDBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32786 { 13846 /* vpmovdw */, X86::VPMOVDWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
32788 { 13846 /* vpmovdw */, X86::VPMOVDWZmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
32792 { 13846 /* vpmovdw */, X86::VPMOVDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32794 { 13846 /* vpmovdw */, X86::VPMOVDWZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32798 { 13846 /* vpmovdw */, X86::VPMOVDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32801 { 13854 /* vpmovm2b */, X86::VPMOVM2BZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VK1 }, },
32804 { 13863 /* vpmovm2d */, X86::VPMOVM2DZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VK1 }, },
32807 { 13872 /* vpmovm2q */, X86::VPMOVM2QZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VK1 }, },
32810 { 13881 /* vpmovm2w */, X86::VPMOVM2WZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VK1 }, },
32815 { 13900 /* vpmovq2m */, X86::VPMOVQ2MZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VR512 }, },
32818 { 13909 /* vpmovqb */, X86::VPMOVQBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
32821 { 13909 /* vpmovqb */, X86::VPMOVQBZmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_VR512 }, },
32824 { 13909 /* vpmovqb */, X86::VPMOVQBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32827 { 13909 /* vpmovqb */, X86::VPMOVQBZmrk, Convert__Mem645_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32830 { 13909 /* vpmovqb */, X86::VPMOVQBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32833 { 13917 /* vpmovqd */, X86::VPMOVQDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
32835 { 13917 /* vpmovqd */, X86::VPMOVQDZmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
32839 { 13917 /* vpmovqd */, X86::VPMOVQDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32841 { 13917 /* vpmovqd */, X86::VPMOVQDZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32845 { 13917 /* vpmovqd */, X86::VPMOVQDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32848 { 13925 /* vpmovqw */, X86::VPMOVQWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
32849 { 13925 /* vpmovqw */, X86::VPMOVQWZmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_VR512 }, },
32854 { 13925 /* vpmovqw */, X86::VPMOVQWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32855 { 13925 /* vpmovqw */, X86::VPMOVQWZmrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32860 { 13925 /* vpmovqw */, X86::VPMOVQWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32863 { 13933 /* vpmovsdb */, X86::VPMOVSDBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
32864 { 13933 /* vpmovsdb */, X86::VPMOVSDBZmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_VR512 }, },
32869 { 13933 /* vpmovsdb */, X86::VPMOVSDBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32870 { 13933 /* vpmovsdb */, X86::VPMOVSDBZmrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32875 { 13933 /* vpmovsdb */, X86::VPMOVSDBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32878 { 13942 /* vpmovsdw */, X86::VPMOVSDWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
32880 { 13942 /* vpmovsdw */, X86::VPMOVSDWZmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
32884 { 13942 /* vpmovsdw */, X86::VPMOVSDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32886 { 13942 /* vpmovsdw */, X86::VPMOVSDWZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32890 { 13942 /* vpmovsdw */, X86::VPMOVSDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32893 { 13951 /* vpmovsqb */, X86::VPMOVSQBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
32896 { 13951 /* vpmovsqb */, X86::VPMOVSQBZmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_VR512 }, },
32899 { 13951 /* vpmovsqb */, X86::VPMOVSQBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32902 { 13951 /* vpmovsqb */, X86::VPMOVSQBZmrk, Convert__Mem645_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32905 { 13951 /* vpmovsqb */, X86::VPMOVSQBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32908 { 13960 /* vpmovsqd */, X86::VPMOVSQDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
32910 { 13960 /* vpmovsqd */, X86::VPMOVSQDZmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
32914 { 13960 /* vpmovsqd */, X86::VPMOVSQDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32916 { 13960 /* vpmovsqd */, X86::VPMOVSQDZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32920 { 13960 /* vpmovsqd */, X86::VPMOVSQDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32923 { 13969 /* vpmovsqw */, X86::VPMOVSQWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
32924 { 13969 /* vpmovsqw */, X86::VPMOVSQWZmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_VR512 }, },
32929 { 13969 /* vpmovsqw */, X86::VPMOVSQWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32930 { 13969 /* vpmovsqw */, X86::VPMOVSQWZmrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32935 { 13969 /* vpmovsqw */, X86::VPMOVSQWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32938 { 13978 /* vpmovswb */, X86::VPMOVSWBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
32940 { 13978 /* vpmovswb */, X86::VPMOVSWBZmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
32944 { 13978 /* vpmovswb */, X86::VPMOVSWBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32946 { 13978 /* vpmovswb */, X86::VPMOVSWBZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32950 { 13978 /* vpmovswb */, X86::VPMOVSWBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32959 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
32960 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR512, MCK_Mem128 }, },
32965 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32966 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32971 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32972 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZrmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32981 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
32982 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64 }, },
32987 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32988 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
32993 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32994 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZrmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
33003 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
33004 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
33009 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33010 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
33015 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
33016 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
33025 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
33026 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
33031 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33032 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
33037 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
33038 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
33047 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
33048 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
33053 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33054 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
33059 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
33060 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
33069 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
33070 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR512, MCK_Mem128 }, },
33075 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33076 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
33081 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33082 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZrmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
33085 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
33086 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_VR512 }, },
33091 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33092 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZmrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33097 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
33100 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
33102 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
33106 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33108 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33112 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
33115 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
33118 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_VR512 }, },
33121 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33124 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZmrk, Convert__Mem645_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33127 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
33130 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
33132 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
33136 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33138 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33142 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
33145 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_VR512 }, },
33146 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_VR512 }, },
33151 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33152 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZmrk, Convert__Mem1285_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33157 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
33160 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
33162 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
33166 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33168 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33172 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
33175 { 14107 /* vpmovw2m */, X86::VPMOVW2MZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_VR512 }, },
33178 { 14116 /* vpmovwb */, X86::VPMOVWBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_VR512 }, },
33180 { 14116 /* vpmovwb */, X86::VPMOVWBZmr, Convert__Mem2565_0__Reg1_1, AMFBS_None, { MCK_Mem256, MCK_VR512 }, },
33184 { 14116 /* vpmovwb */, X86::VPMOVWBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33186 { 14116 /* vpmovwb */, X86::VPMOVWBZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, AMFBS_None, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33190 { 14116 /* vpmovwb */, X86::VPMOVWBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
33199 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
33200 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR512, MCK_Mem128 }, },
33205 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33206 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
33211 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33212 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZrmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
33221 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
33222 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64 }, },
33227 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33228 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
33233 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33234 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZrmkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
33243 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
33244 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
33249 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33250 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
33255 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
33256 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
33265 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
33266 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
33271 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33272 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
33277 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
33278 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
33287 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR256X }, },
33288 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_VR512, MCK_Mem256 }, },
33293 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33294 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
33299 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
33300 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
33309 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_FR32X }, },
33310 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_VR512, MCK_Mem128 }, },
33315 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33316 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
33321 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
33322 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZrmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
33331 { 14184 /* vpmuldq */, X86::VPMULDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33331 { 14184 /* vpmuldq */, X86::VPMULDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33331 { 14184 /* vpmuldq */, X86::VPMULDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33332 { 14184 /* vpmuldq */, X86::VPMULDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33332 { 14184 /* vpmuldq */, X86::VPMULDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33335 { 14184 /* vpmuldq */, X86::VPMULDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33335 { 14184 /* vpmuldq */, X86::VPMULDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33340 { 14184 /* vpmuldq */, X86::VPMULDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33340 { 14184 /* vpmuldq */, X86::VPMULDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33340 { 14184 /* vpmuldq */, X86::VPMULDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33341 { 14184 /* vpmuldq */, X86::VPMULDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33341 { 14184 /* vpmuldq */, X86::VPMULDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33348 { 14184 /* vpmuldq */, X86::VPMULDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33348 { 14184 /* vpmuldq */, X86::VPMULDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33348 { 14184 /* vpmuldq */, X86::VPMULDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33349 { 14184 /* vpmuldq */, X86::VPMULDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33349 { 14184 /* vpmuldq */, X86::VPMULDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33350 { 14184 /* vpmuldq */, X86::VPMULDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33350 { 14184 /* vpmuldq */, X86::VPMULDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33353 { 14184 /* vpmuldq */, X86::VPMULDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33353 { 14184 /* vpmuldq */, X86::VPMULDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33362 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33362 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33362 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33363 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33363 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33368 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33368 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33368 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33369 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33369 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33374 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33374 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33374 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33375 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33375 { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33384 { 14202 /* vpmulhuw */, X86::VPMULHUWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33384 { 14202 /* vpmulhuw */, X86::VPMULHUWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33384 { 14202 /* vpmulhuw */, X86::VPMULHUWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33385 { 14202 /* vpmulhuw */, X86::VPMULHUWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33385 { 14202 /* vpmulhuw */, X86::VPMULHUWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33390 { 14202 /* vpmulhuw */, X86::VPMULHUWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33390 { 14202 /* vpmulhuw */, X86::VPMULHUWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33390 { 14202 /* vpmulhuw */, X86::VPMULHUWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33391 { 14202 /* vpmulhuw */, X86::VPMULHUWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33391 { 14202 /* vpmulhuw */, X86::VPMULHUWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33396 { 14202 /* vpmulhuw */, X86::VPMULHUWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33396 { 14202 /* vpmulhuw */, X86::VPMULHUWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33396 { 14202 /* vpmulhuw */, X86::VPMULHUWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33397 { 14202 /* vpmulhuw */, X86::VPMULHUWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33397 { 14202 /* vpmulhuw */, X86::VPMULHUWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33406 { 14211 /* vpmulhw */, X86::VPMULHWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33406 { 14211 /* vpmulhw */, X86::VPMULHWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33406 { 14211 /* vpmulhw */, X86::VPMULHWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33407 { 14211 /* vpmulhw */, X86::VPMULHWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33407 { 14211 /* vpmulhw */, X86::VPMULHWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33412 { 14211 /* vpmulhw */, X86::VPMULHWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33412 { 14211 /* vpmulhw */, X86::VPMULHWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33412 { 14211 /* vpmulhw */, X86::VPMULHWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33413 { 14211 /* vpmulhw */, X86::VPMULHWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33413 { 14211 /* vpmulhw */, X86::VPMULHWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33418 { 14211 /* vpmulhw */, X86::VPMULHWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33418 { 14211 /* vpmulhw */, X86::VPMULHWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33418 { 14211 /* vpmulhw */, X86::VPMULHWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33419 { 14211 /* vpmulhw */, X86::VPMULHWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33419 { 14211 /* vpmulhw */, X86::VPMULHWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33428 { 14219 /* vpmulld */, X86::VPMULLDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33428 { 14219 /* vpmulld */, X86::VPMULLDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33428 { 14219 /* vpmulld */, X86::VPMULLDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33429 { 14219 /* vpmulld */, X86::VPMULLDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33429 { 14219 /* vpmulld */, X86::VPMULLDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33432 { 14219 /* vpmulld */, X86::VPMULLDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33432 { 14219 /* vpmulld */, X86::VPMULLDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33437 { 14219 /* vpmulld */, X86::VPMULLDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33437 { 14219 /* vpmulld */, X86::VPMULLDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33437 { 14219 /* vpmulld */, X86::VPMULLDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33438 { 14219 /* vpmulld */, X86::VPMULLDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33438 { 14219 /* vpmulld */, X86::VPMULLDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33445 { 14219 /* vpmulld */, X86::VPMULLDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33445 { 14219 /* vpmulld */, X86::VPMULLDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33445 { 14219 /* vpmulld */, X86::VPMULLDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33446 { 14219 /* vpmulld */, X86::VPMULLDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33446 { 14219 /* vpmulld */, X86::VPMULLDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33447 { 14219 /* vpmulld */, X86::VPMULLDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33447 { 14219 /* vpmulld */, X86::VPMULLDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33450 { 14219 /* vpmulld */, X86::VPMULLDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33450 { 14219 /* vpmulld */, X86::VPMULLDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33455 { 14227 /* vpmullq */, X86::VPMULLQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33455 { 14227 /* vpmullq */, X86::VPMULLQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33455 { 14227 /* vpmullq */, X86::VPMULLQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33456 { 14227 /* vpmullq */, X86::VPMULLQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33456 { 14227 /* vpmullq */, X86::VPMULLQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33459 { 14227 /* vpmullq */, X86::VPMULLQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33459 { 14227 /* vpmullq */, X86::VPMULLQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33464 { 14227 /* vpmullq */, X86::VPMULLQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33464 { 14227 /* vpmullq */, X86::VPMULLQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33464 { 14227 /* vpmullq */, X86::VPMULLQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33465 { 14227 /* vpmullq */, X86::VPMULLQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33465 { 14227 /* vpmullq */, X86::VPMULLQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33472 { 14227 /* vpmullq */, X86::VPMULLQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33472 { 14227 /* vpmullq */, X86::VPMULLQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33472 { 14227 /* vpmullq */, X86::VPMULLQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33473 { 14227 /* vpmullq */, X86::VPMULLQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33473 { 14227 /* vpmullq */, X86::VPMULLQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33474 { 14227 /* vpmullq */, X86::VPMULLQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33474 { 14227 /* vpmullq */, X86::VPMULLQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33477 { 14227 /* vpmullq */, X86::VPMULLQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33477 { 14227 /* vpmullq */, X86::VPMULLQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33486 { 14235 /* vpmullw */, X86::VPMULLWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33486 { 14235 /* vpmullw */, X86::VPMULLWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33486 { 14235 /* vpmullw */, X86::VPMULLWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33487 { 14235 /* vpmullw */, X86::VPMULLWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33487 { 14235 /* vpmullw */, X86::VPMULLWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33492 { 14235 /* vpmullw */, X86::VPMULLWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33492 { 14235 /* vpmullw */, X86::VPMULLWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33492 { 14235 /* vpmullw */, X86::VPMULLWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33493 { 14235 /* vpmullw */, X86::VPMULLWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33493 { 14235 /* vpmullw */, X86::VPMULLWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33498 { 14235 /* vpmullw */, X86::VPMULLWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33498 { 14235 /* vpmullw */, X86::VPMULLWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33498 { 14235 /* vpmullw */, X86::VPMULLWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33499 { 14235 /* vpmullw */, X86::VPMULLWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33499 { 14235 /* vpmullw */, X86::VPMULLWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33504 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33504 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33504 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33505 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33505 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33508 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33508 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33513 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33513 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33513 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33514 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33514 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33521 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33521 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33521 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33522 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33522 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33523 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33523 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33526 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33526 { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33535 { 14258 /* vpmuludq */, X86::VPMULUDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33535 { 14258 /* vpmuludq */, X86::VPMULUDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33535 { 14258 /* vpmuludq */, X86::VPMULUDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33536 { 14258 /* vpmuludq */, X86::VPMULUDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33536 { 14258 /* vpmuludq */, X86::VPMULUDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33539 { 14258 /* vpmuludq */, X86::VPMULUDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33539 { 14258 /* vpmuludq */, X86::VPMULUDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33544 { 14258 /* vpmuludq */, X86::VPMULUDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33544 { 14258 /* vpmuludq */, X86::VPMULUDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33544 { 14258 /* vpmuludq */, X86::VPMULUDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33545 { 14258 /* vpmuludq */, X86::VPMULUDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33545 { 14258 /* vpmuludq */, X86::VPMULUDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33552 { 14258 /* vpmuludq */, X86::VPMULUDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33552 { 14258 /* vpmuludq */, X86::VPMULUDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33552 { 14258 /* vpmuludq */, X86::VPMULUDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33553 { 14258 /* vpmuludq */, X86::VPMULUDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33553 { 14258 /* vpmuludq */, X86::VPMULUDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33554 { 14258 /* vpmuludq */, X86::VPMULUDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33554 { 14258 /* vpmuludq */, X86::VPMULUDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33557 { 14258 /* vpmuludq */, X86::VPMULUDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33557 { 14258 /* vpmuludq */, X86::VPMULUDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33562 { 14267 /* vpopcntb */, X86::VPOPCNTBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
33562 { 14267 /* vpopcntb */, X86::VPOPCNTBZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
33563 { 14267 /* vpopcntb */, X86::VPOPCNTBZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
33568 { 14267 /* vpopcntb */, X86::VPOPCNTBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33568 { 14267 /* vpopcntb */, X86::VPOPCNTBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33569 { 14267 /* vpopcntb */, X86::VPOPCNTBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
33574 { 14267 /* vpopcntb */, X86::VPOPCNTBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
33574 { 14267 /* vpopcntb */, X86::VPOPCNTBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
33575 { 14267 /* vpopcntb */, X86::VPOPCNTBZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
33580 { 14276 /* vpopcntd */, X86::VPOPCNTDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
33580 { 14276 /* vpopcntd */, X86::VPOPCNTDZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
33581 { 14276 /* vpopcntd */, X86::VPOPCNTDZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
33584 { 14276 /* vpopcntd */, X86::VPOPCNTDZrmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33589 { 14276 /* vpopcntd */, X86::VPOPCNTDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33589 { 14276 /* vpopcntd */, X86::VPOPCNTDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33590 { 14276 /* vpopcntd */, X86::VPOPCNTDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
33597 { 14276 /* vpopcntd */, X86::VPOPCNTDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
33597 { 14276 /* vpopcntd */, X86::VPOPCNTDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
33598 { 14276 /* vpopcntd */, X86::VPOPCNTDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
33599 { 14276 /* vpopcntd */, X86::VPOPCNTDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
33602 { 14276 /* vpopcntd */, X86::VPOPCNTDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
33607 { 14285 /* vpopcntq */, X86::VPOPCNTQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
33607 { 14285 /* vpopcntq */, X86::VPOPCNTQZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
33608 { 14285 /* vpopcntq */, X86::VPOPCNTQZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
33611 { 14285 /* vpopcntq */, X86::VPOPCNTQZrmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33616 { 14285 /* vpopcntq */, X86::VPOPCNTQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33616 { 14285 /* vpopcntq */, X86::VPOPCNTQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33617 { 14285 /* vpopcntq */, X86::VPOPCNTQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
33624 { 14285 /* vpopcntq */, X86::VPOPCNTQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
33624 { 14285 /* vpopcntq */, X86::VPOPCNTQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
33625 { 14285 /* vpopcntq */, X86::VPOPCNTQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
33626 { 14285 /* vpopcntq */, X86::VPOPCNTQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
33629 { 14285 /* vpopcntq */, X86::VPOPCNTQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
33634 { 14294 /* vpopcntw */, X86::VPOPCNTWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
33634 { 14294 /* vpopcntw */, X86::VPOPCNTWZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
33635 { 14294 /* vpopcntw */, X86::VPOPCNTWZrm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
33640 { 14294 /* vpopcntw */, X86::VPOPCNTWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33640 { 14294 /* vpopcntw */, X86::VPOPCNTWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33641 { 14294 /* vpopcntw */, X86::VPOPCNTWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
33646 { 14294 /* vpopcntw */, X86::VPOPCNTWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
33646 { 14294 /* vpopcntw */, X86::VPOPCNTWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
33647 { 14294 /* vpopcntw */, X86::VPOPCNTWZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
33656 { 14308 /* vpord */, X86::VPORDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33656 { 14308 /* vpord */, X86::VPORDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33656 { 14308 /* vpord */, X86::VPORDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33657 { 14308 /* vpord */, X86::VPORDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33657 { 14308 /* vpord */, X86::VPORDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33660 { 14308 /* vpord */, X86::VPORDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33660 { 14308 /* vpord */, X86::VPORDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33665 { 14308 /* vpord */, X86::VPORDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33665 { 14308 /* vpord */, X86::VPORDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33665 { 14308 /* vpord */, X86::VPORDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33666 { 14308 /* vpord */, X86::VPORDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33666 { 14308 /* vpord */, X86::VPORDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33673 { 14308 /* vpord */, X86::VPORDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33673 { 14308 /* vpord */, X86::VPORDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33673 { 14308 /* vpord */, X86::VPORDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33674 { 14308 /* vpord */, X86::VPORDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33674 { 14308 /* vpord */, X86::VPORDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33675 { 14308 /* vpord */, X86::VPORDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33675 { 14308 /* vpord */, X86::VPORDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33678 { 14308 /* vpord */, X86::VPORDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33678 { 14308 /* vpord */, X86::VPORDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33683 { 14314 /* vporq */, X86::VPORQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33683 { 14314 /* vporq */, X86::VPORQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33683 { 14314 /* vporq */, X86::VPORQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33684 { 14314 /* vporq */, X86::VPORQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33684 { 14314 /* vporq */, X86::VPORQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33687 { 14314 /* vporq */, X86::VPORQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33687 { 14314 /* vporq */, X86::VPORQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33692 { 14314 /* vporq */, X86::VPORQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33692 { 14314 /* vporq */, X86::VPORQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33692 { 14314 /* vporq */, X86::VPORQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33693 { 14314 /* vporq */, X86::VPORQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33693 { 14314 /* vporq */, X86::VPORQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33700 { 14314 /* vporq */, X86::VPORQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33700 { 14314 /* vporq */, X86::VPORQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33700 { 14314 /* vporq */, X86::VPORQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33701 { 14314 /* vporq */, X86::VPORQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33701 { 14314 /* vporq */, X86::VPORQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33702 { 14314 /* vporq */, X86::VPORQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33702 { 14314 /* vporq */, X86::VPORQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33705 { 14314 /* vporq */, X86::VPORQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33705 { 14314 /* vporq */, X86::VPORQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33713 { 14327 /* vprold */, X86::VPROLDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33713 { 14327 /* vprold */, X86::VPROLDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33714 { 14327 /* vprold */, X86::VPROLDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33717 { 14327 /* vprold */, X86::VPROLDZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33722 { 14327 /* vprold */, X86::VPROLDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33722 { 14327 /* vprold */, X86::VPROLDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33723 { 14327 /* vprold */, X86::VPROLDZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33730 { 14327 /* vprold */, X86::VPROLDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33730 { 14327 /* vprold */, X86::VPROLDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33731 { 14327 /* vprold */, X86::VPROLDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33732 { 14327 /* vprold */, X86::VPROLDZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33735 { 14327 /* vprold */, X86::VPROLDZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33740 { 14334 /* vprolq */, X86::VPROLQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33740 { 14334 /* vprolq */, X86::VPROLQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33741 { 14334 /* vprolq */, X86::VPROLQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33744 { 14334 /* vprolq */, X86::VPROLQZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33749 { 14334 /* vprolq */, X86::VPROLQZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33749 { 14334 /* vprolq */, X86::VPROLQZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33750 { 14334 /* vprolq */, X86::VPROLQZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33757 { 14334 /* vprolq */, X86::VPROLQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33757 { 14334 /* vprolq */, X86::VPROLQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33758 { 14334 /* vprolq */, X86::VPROLQZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33759 { 14334 /* vprolq */, X86::VPROLQZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33762 { 14334 /* vprolq */, X86::VPROLQZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33767 { 14341 /* vprolvd */, X86::VPROLVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33767 { 14341 /* vprolvd */, X86::VPROLVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33767 { 14341 /* vprolvd */, X86::VPROLVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33768 { 14341 /* vprolvd */, X86::VPROLVDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33768 { 14341 /* vprolvd */, X86::VPROLVDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33771 { 14341 /* vprolvd */, X86::VPROLVDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33771 { 14341 /* vprolvd */, X86::VPROLVDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33776 { 14341 /* vprolvd */, X86::VPROLVDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33776 { 14341 /* vprolvd */, X86::VPROLVDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33776 { 14341 /* vprolvd */, X86::VPROLVDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33777 { 14341 /* vprolvd */, X86::VPROLVDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33777 { 14341 /* vprolvd */, X86::VPROLVDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33784 { 14341 /* vprolvd */, X86::VPROLVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33784 { 14341 /* vprolvd */, X86::VPROLVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33784 { 14341 /* vprolvd */, X86::VPROLVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33785 { 14341 /* vprolvd */, X86::VPROLVDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33785 { 14341 /* vprolvd */, X86::VPROLVDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33786 { 14341 /* vprolvd */, X86::VPROLVDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33786 { 14341 /* vprolvd */, X86::VPROLVDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33789 { 14341 /* vprolvd */, X86::VPROLVDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33789 { 14341 /* vprolvd */, X86::VPROLVDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33794 { 14349 /* vprolvq */, X86::VPROLVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33794 { 14349 /* vprolvq */, X86::VPROLVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33794 { 14349 /* vprolvq */, X86::VPROLVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33795 { 14349 /* vprolvq */, X86::VPROLVQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33795 { 14349 /* vprolvq */, X86::VPROLVQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33798 { 14349 /* vprolvq */, X86::VPROLVQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33798 { 14349 /* vprolvq */, X86::VPROLVQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33803 { 14349 /* vprolvq */, X86::VPROLVQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33803 { 14349 /* vprolvq */, X86::VPROLVQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33803 { 14349 /* vprolvq */, X86::VPROLVQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33804 { 14349 /* vprolvq */, X86::VPROLVQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33804 { 14349 /* vprolvq */, X86::VPROLVQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33811 { 14349 /* vprolvq */, X86::VPROLVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33811 { 14349 /* vprolvq */, X86::VPROLVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33811 { 14349 /* vprolvq */, X86::VPROLVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33812 { 14349 /* vprolvq */, X86::VPROLVQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33812 { 14349 /* vprolvq */, X86::VPROLVQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33813 { 14349 /* vprolvq */, X86::VPROLVQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33813 { 14349 /* vprolvq */, X86::VPROLVQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33816 { 14349 /* vprolvq */, X86::VPROLVQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33816 { 14349 /* vprolvq */, X86::VPROLVQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33821 { 14357 /* vprord */, X86::VPRORDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33821 { 14357 /* vprord */, X86::VPRORDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33822 { 14357 /* vprord */, X86::VPRORDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33825 { 14357 /* vprord */, X86::VPRORDZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33830 { 14357 /* vprord */, X86::VPRORDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33830 { 14357 /* vprord */, X86::VPRORDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33831 { 14357 /* vprord */, X86::VPRORDZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33838 { 14357 /* vprord */, X86::VPRORDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33838 { 14357 /* vprord */, X86::VPRORDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33839 { 14357 /* vprord */, X86::VPRORDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33840 { 14357 /* vprord */, X86::VPRORDZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33843 { 14357 /* vprord */, X86::VPRORDZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33848 { 14364 /* vprorq */, X86::VPRORQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33848 { 14364 /* vprorq */, X86::VPRORQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33849 { 14364 /* vprorq */, X86::VPRORQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33852 { 14364 /* vprorq */, X86::VPRORQZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33857 { 14364 /* vprorq */, X86::VPRORQZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33857 { 14364 /* vprorq */, X86::VPRORQZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33858 { 14364 /* vprorq */, X86::VPRORQZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33865 { 14364 /* vprorq */, X86::VPRORQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33865 { 14364 /* vprorq */, X86::VPRORQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33866 { 14364 /* vprorq */, X86::VPRORQZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33867 { 14364 /* vprorq */, X86::VPRORQZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33870 { 14364 /* vprorq */, X86::VPRORQZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33875 { 14371 /* vprorvd */, X86::VPRORVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33875 { 14371 /* vprorvd */, X86::VPRORVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33875 { 14371 /* vprorvd */, X86::VPRORVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33876 { 14371 /* vprorvd */, X86::VPRORVDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33876 { 14371 /* vprorvd */, X86::VPRORVDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33879 { 14371 /* vprorvd */, X86::VPRORVDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33879 { 14371 /* vprorvd */, X86::VPRORVDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33884 { 14371 /* vprorvd */, X86::VPRORVDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33884 { 14371 /* vprorvd */, X86::VPRORVDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33884 { 14371 /* vprorvd */, X86::VPRORVDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33885 { 14371 /* vprorvd */, X86::VPRORVDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33885 { 14371 /* vprorvd */, X86::VPRORVDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33892 { 14371 /* vprorvd */, X86::VPRORVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33892 { 14371 /* vprorvd */, X86::VPRORVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33892 { 14371 /* vprorvd */, X86::VPRORVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33893 { 14371 /* vprorvd */, X86::VPRORVDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33893 { 14371 /* vprorvd */, X86::VPRORVDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33894 { 14371 /* vprorvd */, X86::VPRORVDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33894 { 14371 /* vprorvd */, X86::VPRORVDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33897 { 14371 /* vprorvd */, X86::VPRORVDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33897 { 14371 /* vprorvd */, X86::VPRORVDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33902 { 14379 /* vprorvq */, X86::VPRORVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33902 { 14379 /* vprorvq */, X86::VPRORVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33902 { 14379 /* vprorvq */, X86::VPRORVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33903 { 14379 /* vprorvq */, X86::VPRORVQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33903 { 14379 /* vprorvq */, X86::VPRORVQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33906 { 14379 /* vprorvq */, X86::VPRORVQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33906 { 14379 /* vprorvq */, X86::VPRORVQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33911 { 14379 /* vprorvq */, X86::VPRORVQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33911 { 14379 /* vprorvq */, X86::VPRORVQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33911 { 14379 /* vprorvq */, X86::VPRORVQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33912 { 14379 /* vprorvq */, X86::VPRORVQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33912 { 14379 /* vprorvq */, X86::VPRORVQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33919 { 14379 /* vprorvq */, X86::VPRORVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33919 { 14379 /* vprorvq */, X86::VPRORVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33919 { 14379 /* vprorvq */, X86::VPRORVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33920 { 14379 /* vprorvq */, X86::VPRORVQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33920 { 14379 /* vprorvq */, X86::VPRORVQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33921 { 14379 /* vprorvq */, X86::VPRORVQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33921 { 14379 /* vprorvq */, X86::VPRORVQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33924 { 14379 /* vprorvq */, X86::VPRORVQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33924 { 14379 /* vprorvq */, X86::VPRORVQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33953 { 14415 /* vpsadbw */, X86::VPSADBWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33953 { 14415 /* vpsadbw */, X86::VPSADBWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33953 { 14415 /* vpsadbw */, X86::VPSADBWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33954 { 14415 /* vpsadbw */, X86::VPSADBWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33954 { 14415 /* vpsadbw */, X86::VPSADBWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33957 { 14423 /* vpscatterdd */, X86::VPSCATTERDDZmr, Convert__Reg1_2__Mem512_RC5125_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33960 { 14435 /* vpscatterdq */, X86::VPSCATTERDQZmr, Convert__Reg1_2__Mem512_RC256X5_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33966 { 14459 /* vpscatterqq */, X86::VPSCATTERQQZmr, Convert__Reg1_2__Mem512_RC5125_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33989 { 14513 /* vpshldd */, X86::VPSHLDDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33989 { 14513 /* vpshldd */, X86::VPSHLDDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33989 { 14513 /* vpshldd */, X86::VPSHLDDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33990 { 14513 /* vpshldd */, X86::VPSHLDDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33990 { 14513 /* vpshldd */, X86::VPSHLDDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33993 { 14513 /* vpshldd */, X86::VPSHLDDZrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33993 { 14513 /* vpshldd */, X86::VPSHLDDZrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33998 { 14513 /* vpshldd */, X86::VPSHLDDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33998 { 14513 /* vpshldd */, X86::VPSHLDDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33998 { 14513 /* vpshldd */, X86::VPSHLDDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33999 { 14513 /* vpshldd */, X86::VPSHLDDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33999 { 14513 /* vpshldd */, X86::VPSHLDDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34006 { 14513 /* vpshldd */, X86::VPSHLDDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34006 { 14513 /* vpshldd */, X86::VPSHLDDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34006 { 14513 /* vpshldd */, X86::VPSHLDDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34007 { 14513 /* vpshldd */, X86::VPSHLDDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34007 { 14513 /* vpshldd */, X86::VPSHLDDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34008 { 14513 /* vpshldd */, X86::VPSHLDDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34008 { 14513 /* vpshldd */, X86::VPSHLDDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34011 { 14513 /* vpshldd */, X86::VPSHLDDZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34011 { 14513 /* vpshldd */, X86::VPSHLDDZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34016 { 14521 /* vpshldq */, X86::VPSHLDQZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34016 { 14521 /* vpshldq */, X86::VPSHLDQZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34016 { 14521 /* vpshldq */, X86::VPSHLDQZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34017 { 14521 /* vpshldq */, X86::VPSHLDQZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34017 { 14521 /* vpshldq */, X86::VPSHLDQZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34020 { 14521 /* vpshldq */, X86::VPSHLDQZrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34020 { 14521 /* vpshldq */, X86::VPSHLDQZrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34025 { 14521 /* vpshldq */, X86::VPSHLDQZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34025 { 14521 /* vpshldq */, X86::VPSHLDQZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34025 { 14521 /* vpshldq */, X86::VPSHLDQZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34026 { 14521 /* vpshldq */, X86::VPSHLDQZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34026 { 14521 /* vpshldq */, X86::VPSHLDQZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34033 { 14521 /* vpshldq */, X86::VPSHLDQZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34033 { 14521 /* vpshldq */, X86::VPSHLDQZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34033 { 14521 /* vpshldq */, X86::VPSHLDQZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34034 { 14521 /* vpshldq */, X86::VPSHLDQZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34034 { 14521 /* vpshldq */, X86::VPSHLDQZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34035 { 14521 /* vpshldq */, X86::VPSHLDQZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34035 { 14521 /* vpshldq */, X86::VPSHLDQZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34038 { 14521 /* vpshldq */, X86::VPSHLDQZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34038 { 14521 /* vpshldq */, X86::VPSHLDQZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34043 { 14529 /* vpshldvd */, X86::VPSHLDVDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34043 { 14529 /* vpshldvd */, X86::VPSHLDVDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34043 { 14529 /* vpshldvd */, X86::VPSHLDVDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34044 { 14529 /* vpshldvd */, X86::VPSHLDVDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34044 { 14529 /* vpshldvd */, X86::VPSHLDVDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34047 { 14529 /* vpshldvd */, X86::VPSHLDVDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34047 { 14529 /* vpshldvd */, X86::VPSHLDVDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34052 { 14529 /* vpshldvd */, X86::VPSHLDVDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34052 { 14529 /* vpshldvd */, X86::VPSHLDVDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34052 { 14529 /* vpshldvd */, X86::VPSHLDVDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34053 { 14529 /* vpshldvd */, X86::VPSHLDVDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34053 { 14529 /* vpshldvd */, X86::VPSHLDVDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34060 { 14529 /* vpshldvd */, X86::VPSHLDVDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34060 { 14529 /* vpshldvd */, X86::VPSHLDVDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34060 { 14529 /* vpshldvd */, X86::VPSHLDVDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34061 { 14529 /* vpshldvd */, X86::VPSHLDVDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34061 { 14529 /* vpshldvd */, X86::VPSHLDVDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34062 { 14529 /* vpshldvd */, X86::VPSHLDVDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34062 { 14529 /* vpshldvd */, X86::VPSHLDVDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34065 { 14529 /* vpshldvd */, X86::VPSHLDVDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34065 { 14529 /* vpshldvd */, X86::VPSHLDVDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34070 { 14538 /* vpshldvq */, X86::VPSHLDVQZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34070 { 14538 /* vpshldvq */, X86::VPSHLDVQZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34070 { 14538 /* vpshldvq */, X86::VPSHLDVQZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34071 { 14538 /* vpshldvq */, X86::VPSHLDVQZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34071 { 14538 /* vpshldvq */, X86::VPSHLDVQZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34074 { 14538 /* vpshldvq */, X86::VPSHLDVQZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34074 { 14538 /* vpshldvq */, X86::VPSHLDVQZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34079 { 14538 /* vpshldvq */, X86::VPSHLDVQZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34079 { 14538 /* vpshldvq */, X86::VPSHLDVQZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34079 { 14538 /* vpshldvq */, X86::VPSHLDVQZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34080 { 14538 /* vpshldvq */, X86::VPSHLDVQZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34080 { 14538 /* vpshldvq */, X86::VPSHLDVQZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34087 { 14538 /* vpshldvq */, X86::VPSHLDVQZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34087 { 14538 /* vpshldvq */, X86::VPSHLDVQZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34087 { 14538 /* vpshldvq */, X86::VPSHLDVQZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34088 { 14538 /* vpshldvq */, X86::VPSHLDVQZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34088 { 14538 /* vpshldvq */, X86::VPSHLDVQZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34089 { 14538 /* vpshldvq */, X86::VPSHLDVQZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34089 { 14538 /* vpshldvq */, X86::VPSHLDVQZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34092 { 14538 /* vpshldvq */, X86::VPSHLDVQZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34092 { 14538 /* vpshldvq */, X86::VPSHLDVQZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34097 { 14547 /* vpshldvw */, X86::VPSHLDVWZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34097 { 14547 /* vpshldvw */, X86::VPSHLDVWZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34097 { 14547 /* vpshldvw */, X86::VPSHLDVWZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34098 { 14547 /* vpshldvw */, X86::VPSHLDVWZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34098 { 14547 /* vpshldvw */, X86::VPSHLDVWZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34103 { 14547 /* vpshldvw */, X86::VPSHLDVWZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34103 { 14547 /* vpshldvw */, X86::VPSHLDVWZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34103 { 14547 /* vpshldvw */, X86::VPSHLDVWZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34104 { 14547 /* vpshldvw */, X86::VPSHLDVWZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34104 { 14547 /* vpshldvw */, X86::VPSHLDVWZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34109 { 14547 /* vpshldvw */, X86::VPSHLDVWZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34109 { 14547 /* vpshldvw */, X86::VPSHLDVWZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34109 { 14547 /* vpshldvw */, X86::VPSHLDVWZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34110 { 14547 /* vpshldvw */, X86::VPSHLDVWZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34110 { 14547 /* vpshldvw */, X86::VPSHLDVWZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34115 { 14556 /* vpshldw */, X86::VPSHLDWZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34115 { 14556 /* vpshldw */, X86::VPSHLDWZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34115 { 14556 /* vpshldw */, X86::VPSHLDWZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34116 { 14556 /* vpshldw */, X86::VPSHLDWZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34116 { 14556 /* vpshldw */, X86::VPSHLDWZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34121 { 14556 /* vpshldw */, X86::VPSHLDWZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34121 { 14556 /* vpshldw */, X86::VPSHLDWZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34121 { 14556 /* vpshldw */, X86::VPSHLDWZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34122 { 14556 /* vpshldw */, X86::VPSHLDWZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34122 { 14556 /* vpshldw */, X86::VPSHLDWZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34127 { 14556 /* vpshldw */, X86::VPSHLDWZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34127 { 14556 /* vpshldw */, X86::VPSHLDWZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34127 { 14556 /* vpshldw */, X86::VPSHLDWZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34128 { 14556 /* vpshldw */, X86::VPSHLDWZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34128 { 14556 /* vpshldw */, X86::VPSHLDWZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34139 { 14578 /* vpshrdd */, X86::VPSHRDDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34139 { 14578 /* vpshrdd */, X86::VPSHRDDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34139 { 14578 /* vpshrdd */, X86::VPSHRDDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34140 { 14578 /* vpshrdd */, X86::VPSHRDDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34140 { 14578 /* vpshrdd */, X86::VPSHRDDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34143 { 14578 /* vpshrdd */, X86::VPSHRDDZrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34143 { 14578 /* vpshrdd */, X86::VPSHRDDZrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34148 { 14578 /* vpshrdd */, X86::VPSHRDDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34148 { 14578 /* vpshrdd */, X86::VPSHRDDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34148 { 14578 /* vpshrdd */, X86::VPSHRDDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34149 { 14578 /* vpshrdd */, X86::VPSHRDDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34149 { 14578 /* vpshrdd */, X86::VPSHRDDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34156 { 14578 /* vpshrdd */, X86::VPSHRDDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34156 { 14578 /* vpshrdd */, X86::VPSHRDDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34156 { 14578 /* vpshrdd */, X86::VPSHRDDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34157 { 14578 /* vpshrdd */, X86::VPSHRDDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34157 { 14578 /* vpshrdd */, X86::VPSHRDDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34158 { 14578 /* vpshrdd */, X86::VPSHRDDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34158 { 14578 /* vpshrdd */, X86::VPSHRDDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34161 { 14578 /* vpshrdd */, X86::VPSHRDDZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34161 { 14578 /* vpshrdd */, X86::VPSHRDDZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34166 { 14586 /* vpshrdq */, X86::VPSHRDQZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34166 { 14586 /* vpshrdq */, X86::VPSHRDQZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34166 { 14586 /* vpshrdq */, X86::VPSHRDQZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34167 { 14586 /* vpshrdq */, X86::VPSHRDQZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34167 { 14586 /* vpshrdq */, X86::VPSHRDQZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34170 { 14586 /* vpshrdq */, X86::VPSHRDQZrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34170 { 14586 /* vpshrdq */, X86::VPSHRDQZrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34175 { 14586 /* vpshrdq */, X86::VPSHRDQZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34175 { 14586 /* vpshrdq */, X86::VPSHRDQZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34175 { 14586 /* vpshrdq */, X86::VPSHRDQZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34176 { 14586 /* vpshrdq */, X86::VPSHRDQZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34176 { 14586 /* vpshrdq */, X86::VPSHRDQZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34183 { 14586 /* vpshrdq */, X86::VPSHRDQZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34183 { 14586 /* vpshrdq */, X86::VPSHRDQZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34183 { 14586 /* vpshrdq */, X86::VPSHRDQZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34184 { 14586 /* vpshrdq */, X86::VPSHRDQZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34184 { 14586 /* vpshrdq */, X86::VPSHRDQZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34185 { 14586 /* vpshrdq */, X86::VPSHRDQZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34185 { 14586 /* vpshrdq */, X86::VPSHRDQZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34188 { 14586 /* vpshrdq */, X86::VPSHRDQZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34188 { 14586 /* vpshrdq */, X86::VPSHRDQZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34193 { 14594 /* vpshrdvd */, X86::VPSHRDVDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34193 { 14594 /* vpshrdvd */, X86::VPSHRDVDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34193 { 14594 /* vpshrdvd */, X86::VPSHRDVDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34194 { 14594 /* vpshrdvd */, X86::VPSHRDVDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34194 { 14594 /* vpshrdvd */, X86::VPSHRDVDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34197 { 14594 /* vpshrdvd */, X86::VPSHRDVDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34197 { 14594 /* vpshrdvd */, X86::VPSHRDVDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34202 { 14594 /* vpshrdvd */, X86::VPSHRDVDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34202 { 14594 /* vpshrdvd */, X86::VPSHRDVDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34202 { 14594 /* vpshrdvd */, X86::VPSHRDVDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34203 { 14594 /* vpshrdvd */, X86::VPSHRDVDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34203 { 14594 /* vpshrdvd */, X86::VPSHRDVDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34210 { 14594 /* vpshrdvd */, X86::VPSHRDVDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34210 { 14594 /* vpshrdvd */, X86::VPSHRDVDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34210 { 14594 /* vpshrdvd */, X86::VPSHRDVDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34211 { 14594 /* vpshrdvd */, X86::VPSHRDVDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34211 { 14594 /* vpshrdvd */, X86::VPSHRDVDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34212 { 14594 /* vpshrdvd */, X86::VPSHRDVDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34212 { 14594 /* vpshrdvd */, X86::VPSHRDVDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34215 { 14594 /* vpshrdvd */, X86::VPSHRDVDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34215 { 14594 /* vpshrdvd */, X86::VPSHRDVDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34220 { 14603 /* vpshrdvq */, X86::VPSHRDVQZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34220 { 14603 /* vpshrdvq */, X86::VPSHRDVQZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34220 { 14603 /* vpshrdvq */, X86::VPSHRDVQZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34221 { 14603 /* vpshrdvq */, X86::VPSHRDVQZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34221 { 14603 /* vpshrdvq */, X86::VPSHRDVQZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34224 { 14603 /* vpshrdvq */, X86::VPSHRDVQZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34224 { 14603 /* vpshrdvq */, X86::VPSHRDVQZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34229 { 14603 /* vpshrdvq */, X86::VPSHRDVQZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34229 { 14603 /* vpshrdvq */, X86::VPSHRDVQZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34229 { 14603 /* vpshrdvq */, X86::VPSHRDVQZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34230 { 14603 /* vpshrdvq */, X86::VPSHRDVQZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34230 { 14603 /* vpshrdvq */, X86::VPSHRDVQZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34237 { 14603 /* vpshrdvq */, X86::VPSHRDVQZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34237 { 14603 /* vpshrdvq */, X86::VPSHRDVQZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34237 { 14603 /* vpshrdvq */, X86::VPSHRDVQZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34238 { 14603 /* vpshrdvq */, X86::VPSHRDVQZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34238 { 14603 /* vpshrdvq */, X86::VPSHRDVQZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34239 { 14603 /* vpshrdvq */, X86::VPSHRDVQZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34239 { 14603 /* vpshrdvq */, X86::VPSHRDVQZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34242 { 14603 /* vpshrdvq */, X86::VPSHRDVQZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34242 { 14603 /* vpshrdvq */, X86::VPSHRDVQZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34247 { 14612 /* vpshrdvw */, X86::VPSHRDVWZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34247 { 14612 /* vpshrdvw */, X86::VPSHRDVWZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34247 { 14612 /* vpshrdvw */, X86::VPSHRDVWZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34248 { 14612 /* vpshrdvw */, X86::VPSHRDVWZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34248 { 14612 /* vpshrdvw */, X86::VPSHRDVWZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34253 { 14612 /* vpshrdvw */, X86::VPSHRDVWZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34253 { 14612 /* vpshrdvw */, X86::VPSHRDVWZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34253 { 14612 /* vpshrdvw */, X86::VPSHRDVWZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34254 { 14612 /* vpshrdvw */, X86::VPSHRDVWZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34254 { 14612 /* vpshrdvw */, X86::VPSHRDVWZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34259 { 14612 /* vpshrdvw */, X86::VPSHRDVWZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34259 { 14612 /* vpshrdvw */, X86::VPSHRDVWZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34259 { 14612 /* vpshrdvw */, X86::VPSHRDVWZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34260 { 14612 /* vpshrdvw */, X86::VPSHRDVWZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34260 { 14612 /* vpshrdvw */, X86::VPSHRDVWZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34265 { 14621 /* vpshrdw */, X86::VPSHRDWZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34265 { 14621 /* vpshrdw */, X86::VPSHRDWZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34265 { 14621 /* vpshrdw */, X86::VPSHRDWZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34266 { 14621 /* vpshrdw */, X86::VPSHRDWZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34266 { 14621 /* vpshrdw */, X86::VPSHRDWZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34271 { 14621 /* vpshrdw */, X86::VPSHRDWZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34271 { 14621 /* vpshrdw */, X86::VPSHRDWZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34271 { 14621 /* vpshrdw */, X86::VPSHRDWZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34272 { 14621 /* vpshrdw */, X86::VPSHRDWZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34272 { 14621 /* vpshrdw */, X86::VPSHRDWZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34277 { 14621 /* vpshrdw */, X86::VPSHRDWZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34277 { 14621 /* vpshrdw */, X86::VPSHRDWZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34277 { 14621 /* vpshrdw */, X86::VPSHRDWZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34278 { 14621 /* vpshrdw */, X86::VPSHRDWZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34278 { 14621 /* vpshrdw */, X86::VPSHRDWZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34287 { 14629 /* vpshufb */, X86::VPSHUFBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34287 { 14629 /* vpshufb */, X86::VPSHUFBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34287 { 14629 /* vpshufb */, X86::VPSHUFBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34288 { 14629 /* vpshufb */, X86::VPSHUFBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34288 { 14629 /* vpshufb */, X86::VPSHUFBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34293 { 14629 /* vpshufb */, X86::VPSHUFBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34293 { 14629 /* vpshufb */, X86::VPSHUFBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34293 { 14629 /* vpshufb */, X86::VPSHUFBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34294 { 14629 /* vpshufb */, X86::VPSHUFBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34294 { 14629 /* vpshufb */, X86::VPSHUFBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34299 { 14629 /* vpshufb */, X86::VPSHUFBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34299 { 14629 /* vpshufb */, X86::VPSHUFBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34299 { 14629 /* vpshufb */, X86::VPSHUFBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34300 { 14629 /* vpshufb */, X86::VPSHUFBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34300 { 14629 /* vpshufb */, X86::VPSHUFBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34305 { 14637 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
34305 { 14637 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
34306 { 14637 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
34311 { 14637 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34311 { 14637 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34312 { 14637 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34321 { 14650 /* vpshufd */, X86::VPSHUFDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34321 { 14650 /* vpshufd */, X86::VPSHUFDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34322 { 14650 /* vpshufd */, X86::VPSHUFDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34325 { 14650 /* vpshufd */, X86::VPSHUFDZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34330 { 14650 /* vpshufd */, X86::VPSHUFDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34330 { 14650 /* vpshufd */, X86::VPSHUFDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34331 { 14650 /* vpshufd */, X86::VPSHUFDZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34338 { 14650 /* vpshufd */, X86::VPSHUFDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34338 { 14650 /* vpshufd */, X86::VPSHUFDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34339 { 14650 /* vpshufd */, X86::VPSHUFDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34340 { 14650 /* vpshufd */, X86::VPSHUFDZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34343 { 14650 /* vpshufd */, X86::VPSHUFDZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34352 { 14658 /* vpshufhw */, X86::VPSHUFHWZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34352 { 14658 /* vpshufhw */, X86::VPSHUFHWZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34353 { 14658 /* vpshufhw */, X86::VPSHUFHWZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34358 { 14658 /* vpshufhw */, X86::VPSHUFHWZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34358 { 14658 /* vpshufhw */, X86::VPSHUFHWZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34359 { 14658 /* vpshufhw */, X86::VPSHUFHWZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34364 { 14658 /* vpshufhw */, X86::VPSHUFHWZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34364 { 14658 /* vpshufhw */, X86::VPSHUFHWZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34365 { 14658 /* vpshufhw */, X86::VPSHUFHWZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34374 { 14667 /* vpshuflw */, X86::VPSHUFLWZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34374 { 14667 /* vpshuflw */, X86::VPSHUFLWZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34375 { 14667 /* vpshuflw */, X86::VPSHUFLWZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34380 { 14667 /* vpshuflw */, X86::VPSHUFLWZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34380 { 14667 /* vpshuflw */, X86::VPSHUFLWZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34381 { 14667 /* vpshuflw */, X86::VPSHUFLWZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34386 { 14667 /* vpshuflw */, X86::VPSHUFLWZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34386 { 14667 /* vpshuflw */, X86::VPSHUFLWZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34387 { 14667 /* vpshuflw */, X86::VPSHUFLWZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34414 { 14700 /* vpslld */, X86::VPSLLDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
34414 { 14700 /* vpslld */, X86::VPSLLDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
34415 { 14700 /* vpslld */, X86::VPSLLDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34415 { 14700 /* vpslld */, X86::VPSLLDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34416 { 14700 /* vpslld */, X86::VPSLLDZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
34416 { 14700 /* vpslld */, X86::VPSLLDZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
34417 { 14700 /* vpslld */, X86::VPSLLDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34420 { 14700 /* vpslld */, X86::VPSLLDZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34429 { 14700 /* vpslld */, X86::VPSLLDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
34429 { 14700 /* vpslld */, X86::VPSLLDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
34430 { 14700 /* vpslld */, X86::VPSLLDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34430 { 14700 /* vpslld */, X86::VPSLLDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34431 { 14700 /* vpslld */, X86::VPSLLDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
34431 { 14700 /* vpslld */, X86::VPSLLDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
34432 { 14700 /* vpslld */, X86::VPSLLDZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34443 { 14700 /* vpslld */, X86::VPSLLDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
34443 { 14700 /* vpslld */, X86::VPSLLDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
34444 { 14700 /* vpslld */, X86::VPSLLDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34444 { 14700 /* vpslld */, X86::VPSLLDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34445 { 14700 /* vpslld */, X86::VPSLLDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
34445 { 14700 /* vpslld */, X86::VPSLLDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
34446 { 14700 /* vpslld */, X86::VPSLLDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34447 { 14700 /* vpslld */, X86::VPSLLDZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34450 { 14700 /* vpslld */, X86::VPSLLDZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34457 { 14707 /* vpslldq */, X86::VPSLLDQZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34457 { 14707 /* vpslldq */, X86::VPSLLDQZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34458 { 14707 /* vpslldq */, X86::VPSLLDQZrm, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34473 { 14715 /* vpsllq */, X86::VPSLLQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
34473 { 14715 /* vpsllq */, X86::VPSLLQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
34474 { 14715 /* vpsllq */, X86::VPSLLQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34474 { 14715 /* vpsllq */, X86::VPSLLQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34475 { 14715 /* vpsllq */, X86::VPSLLQZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
34475 { 14715 /* vpsllq */, X86::VPSLLQZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
34476 { 14715 /* vpsllq */, X86::VPSLLQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34479 { 14715 /* vpsllq */, X86::VPSLLQZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34488 { 14715 /* vpsllq */, X86::VPSLLQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
34488 { 14715 /* vpsllq */, X86::VPSLLQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
34489 { 14715 /* vpsllq */, X86::VPSLLQZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34489 { 14715 /* vpsllq */, X86::VPSLLQZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34490 { 14715 /* vpsllq */, X86::VPSLLQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
34490 { 14715 /* vpsllq */, X86::VPSLLQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
34491 { 14715 /* vpsllq */, X86::VPSLLQZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34502 { 14715 /* vpsllq */, X86::VPSLLQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
34502 { 14715 /* vpsllq */, X86::VPSLLQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
34503 { 14715 /* vpsllq */, X86::VPSLLQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34503 { 14715 /* vpsllq */, X86::VPSLLQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34504 { 14715 /* vpsllq */, X86::VPSLLQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
34504 { 14715 /* vpsllq */, X86::VPSLLQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
34505 { 14715 /* vpsllq */, X86::VPSLLQZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34506 { 14715 /* vpsllq */, X86::VPSLLQZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34509 { 14715 /* vpsllq */, X86::VPSLLQZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34518 { 14722 /* vpsllvd */, X86::VPSLLVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34518 { 14722 /* vpsllvd */, X86::VPSLLVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34518 { 14722 /* vpsllvd */, X86::VPSLLVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34519 { 14722 /* vpsllvd */, X86::VPSLLVDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34519 { 14722 /* vpsllvd */, X86::VPSLLVDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34522 { 14722 /* vpsllvd */, X86::VPSLLVDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34522 { 14722 /* vpsllvd */, X86::VPSLLVDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34527 { 14722 /* vpsllvd */, X86::VPSLLVDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34527 { 14722 /* vpsllvd */, X86::VPSLLVDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34527 { 14722 /* vpsllvd */, X86::VPSLLVDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34528 { 14722 /* vpsllvd */, X86::VPSLLVDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34528 { 14722 /* vpsllvd */, X86::VPSLLVDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34535 { 14722 /* vpsllvd */, X86::VPSLLVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34535 { 14722 /* vpsllvd */, X86::VPSLLVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34535 { 14722 /* vpsllvd */, X86::VPSLLVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34536 { 14722 /* vpsllvd */, X86::VPSLLVDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34536 { 14722 /* vpsllvd */, X86::VPSLLVDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34537 { 14722 /* vpsllvd */, X86::VPSLLVDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34537 { 14722 /* vpsllvd */, X86::VPSLLVDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34540 { 14722 /* vpsllvd */, X86::VPSLLVDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34540 { 14722 /* vpsllvd */, X86::VPSLLVDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34549 { 14730 /* vpsllvq */, X86::VPSLLVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34549 { 14730 /* vpsllvq */, X86::VPSLLVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34549 { 14730 /* vpsllvq */, X86::VPSLLVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34550 { 14730 /* vpsllvq */, X86::VPSLLVQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34550 { 14730 /* vpsllvq */, X86::VPSLLVQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34553 { 14730 /* vpsllvq */, X86::VPSLLVQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34553 { 14730 /* vpsllvq */, X86::VPSLLVQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34558 { 14730 /* vpsllvq */, X86::VPSLLVQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34558 { 14730 /* vpsllvq */, X86::VPSLLVQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34558 { 14730 /* vpsllvq */, X86::VPSLLVQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34559 { 14730 /* vpsllvq */, X86::VPSLLVQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34559 { 14730 /* vpsllvq */, X86::VPSLLVQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34566 { 14730 /* vpsllvq */, X86::VPSLLVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34566 { 14730 /* vpsllvq */, X86::VPSLLVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34566 { 14730 /* vpsllvq */, X86::VPSLLVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34567 { 14730 /* vpsllvq */, X86::VPSLLVQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34567 { 14730 /* vpsllvq */, X86::VPSLLVQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34568 { 14730 /* vpsllvq */, X86::VPSLLVQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34568 { 14730 /* vpsllvq */, X86::VPSLLVQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34571 { 14730 /* vpsllvq */, X86::VPSLLVQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34571 { 14730 /* vpsllvq */, X86::VPSLLVQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34576 { 14738 /* vpsllvw */, X86::VPSLLVWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34576 { 14738 /* vpsllvw */, X86::VPSLLVWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34576 { 14738 /* vpsllvw */, X86::VPSLLVWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34577 { 14738 /* vpsllvw */, X86::VPSLLVWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34577 { 14738 /* vpsllvw */, X86::VPSLLVWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34582 { 14738 /* vpsllvw */, X86::VPSLLVWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34582 { 14738 /* vpsllvw */, X86::VPSLLVWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34582 { 14738 /* vpsllvw */, X86::VPSLLVWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34583 { 14738 /* vpsllvw */, X86::VPSLLVWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34583 { 14738 /* vpsllvw */, X86::VPSLLVWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34588 { 14738 /* vpsllvw */, X86::VPSLLVWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34588 { 14738 /* vpsllvw */, X86::VPSLLVWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34588 { 14738 /* vpsllvw */, X86::VPSLLVWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34589 { 14738 /* vpsllvw */, X86::VPSLLVWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34589 { 14738 /* vpsllvw */, X86::VPSLLVWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34604 { 14746 /* vpsllw */, X86::VPSLLWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
34604 { 14746 /* vpsllw */, X86::VPSLLWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
34605 { 14746 /* vpsllw */, X86::VPSLLWZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34605 { 14746 /* vpsllw */, X86::VPSLLWZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34606 { 14746 /* vpsllw */, X86::VPSLLWZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
34606 { 14746 /* vpsllw */, X86::VPSLLWZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
34607 { 14746 /* vpsllw */, X86::VPSLLWZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34616 { 14746 /* vpsllw */, X86::VPSLLWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
34616 { 14746 /* vpsllw */, X86::VPSLLWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
34617 { 14746 /* vpsllw */, X86::VPSLLWZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34617 { 14746 /* vpsllw */, X86::VPSLLWZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34618 { 14746 /* vpsllw */, X86::VPSLLWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
34618 { 14746 /* vpsllw */, X86::VPSLLWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
34619 { 14746 /* vpsllw */, X86::VPSLLWZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34628 { 14746 /* vpsllw */, X86::VPSLLWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
34628 { 14746 /* vpsllw */, X86::VPSLLWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
34629 { 14746 /* vpsllw */, X86::VPSLLWZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34629 { 14746 /* vpsllw */, X86::VPSLLWZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34630 { 14746 /* vpsllw */, X86::VPSLLWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
34630 { 14746 /* vpsllw */, X86::VPSLLWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
34631 { 14746 /* vpsllw */, X86::VPSLLWZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34646 { 14753 /* vpsrad */, X86::VPSRADZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
34646 { 14753 /* vpsrad */, X86::VPSRADZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
34647 { 14753 /* vpsrad */, X86::VPSRADZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34647 { 14753 /* vpsrad */, X86::VPSRADZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34648 { 14753 /* vpsrad */, X86::VPSRADZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
34648 { 14753 /* vpsrad */, X86::VPSRADZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
34649 { 14753 /* vpsrad */, X86::VPSRADZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34652 { 14753 /* vpsrad */, X86::VPSRADZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34661 { 14753 /* vpsrad */, X86::VPSRADZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
34661 { 14753 /* vpsrad */, X86::VPSRADZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
34662 { 14753 /* vpsrad */, X86::VPSRADZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34662 { 14753 /* vpsrad */, X86::VPSRADZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34663 { 14753 /* vpsrad */, X86::VPSRADZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
34663 { 14753 /* vpsrad */, X86::VPSRADZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
34664 { 14753 /* vpsrad */, X86::VPSRADZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34675 { 14753 /* vpsrad */, X86::VPSRADZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
34675 { 14753 /* vpsrad */, X86::VPSRADZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
34676 { 14753 /* vpsrad */, X86::VPSRADZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34676 { 14753 /* vpsrad */, X86::VPSRADZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34677 { 14753 /* vpsrad */, X86::VPSRADZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
34677 { 14753 /* vpsrad */, X86::VPSRADZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
34678 { 14753 /* vpsrad */, X86::VPSRADZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34679 { 14753 /* vpsrad */, X86::VPSRADZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34682 { 14753 /* vpsrad */, X86::VPSRADZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34691 { 14760 /* vpsraq */, X86::VPSRAQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
34691 { 14760 /* vpsraq */, X86::VPSRAQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
34692 { 14760 /* vpsraq */, X86::VPSRAQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34692 { 14760 /* vpsraq */, X86::VPSRAQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34693 { 14760 /* vpsraq */, X86::VPSRAQZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
34693 { 14760 /* vpsraq */, X86::VPSRAQZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
34694 { 14760 /* vpsraq */, X86::VPSRAQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34697 { 14760 /* vpsraq */, X86::VPSRAQZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34706 { 14760 /* vpsraq */, X86::VPSRAQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
34706 { 14760 /* vpsraq */, X86::VPSRAQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
34707 { 14760 /* vpsraq */, X86::VPSRAQZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34707 { 14760 /* vpsraq */, X86::VPSRAQZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34708 { 14760 /* vpsraq */, X86::VPSRAQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
34708 { 14760 /* vpsraq */, X86::VPSRAQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
34709 { 14760 /* vpsraq */, X86::VPSRAQZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34720 { 14760 /* vpsraq */, X86::VPSRAQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
34720 { 14760 /* vpsraq */, X86::VPSRAQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
34721 { 14760 /* vpsraq */, X86::VPSRAQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34721 { 14760 /* vpsraq */, X86::VPSRAQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34722 { 14760 /* vpsraq */, X86::VPSRAQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
34722 { 14760 /* vpsraq */, X86::VPSRAQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
34723 { 14760 /* vpsraq */, X86::VPSRAQZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34724 { 14760 /* vpsraq */, X86::VPSRAQZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34727 { 14760 /* vpsraq */, X86::VPSRAQZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34736 { 14767 /* vpsravd */, X86::VPSRAVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34736 { 14767 /* vpsravd */, X86::VPSRAVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34736 { 14767 /* vpsravd */, X86::VPSRAVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34737 { 14767 /* vpsravd */, X86::VPSRAVDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34737 { 14767 /* vpsravd */, X86::VPSRAVDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34740 { 14767 /* vpsravd */, X86::VPSRAVDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34740 { 14767 /* vpsravd */, X86::VPSRAVDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34745 { 14767 /* vpsravd */, X86::VPSRAVDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34745 { 14767 /* vpsravd */, X86::VPSRAVDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34745 { 14767 /* vpsravd */, X86::VPSRAVDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34746 { 14767 /* vpsravd */, X86::VPSRAVDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34746 { 14767 /* vpsravd */, X86::VPSRAVDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34753 { 14767 /* vpsravd */, X86::VPSRAVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34753 { 14767 /* vpsravd */, X86::VPSRAVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34753 { 14767 /* vpsravd */, X86::VPSRAVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34754 { 14767 /* vpsravd */, X86::VPSRAVDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34754 { 14767 /* vpsravd */, X86::VPSRAVDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34755 { 14767 /* vpsravd */, X86::VPSRAVDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34755 { 14767 /* vpsravd */, X86::VPSRAVDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34758 { 14767 /* vpsravd */, X86::VPSRAVDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34758 { 14767 /* vpsravd */, X86::VPSRAVDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34763 { 14775 /* vpsravq */, X86::VPSRAVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34763 { 14775 /* vpsravq */, X86::VPSRAVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34763 { 14775 /* vpsravq */, X86::VPSRAVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34764 { 14775 /* vpsravq */, X86::VPSRAVQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34764 { 14775 /* vpsravq */, X86::VPSRAVQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34767 { 14775 /* vpsravq */, X86::VPSRAVQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34767 { 14775 /* vpsravq */, X86::VPSRAVQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34772 { 14775 /* vpsravq */, X86::VPSRAVQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34772 { 14775 /* vpsravq */, X86::VPSRAVQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34772 { 14775 /* vpsravq */, X86::VPSRAVQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34773 { 14775 /* vpsravq */, X86::VPSRAVQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34773 { 14775 /* vpsravq */, X86::VPSRAVQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34780 { 14775 /* vpsravq */, X86::VPSRAVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34780 { 14775 /* vpsravq */, X86::VPSRAVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34780 { 14775 /* vpsravq */, X86::VPSRAVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34781 { 14775 /* vpsravq */, X86::VPSRAVQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34781 { 14775 /* vpsravq */, X86::VPSRAVQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34782 { 14775 /* vpsravq */, X86::VPSRAVQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34782 { 14775 /* vpsravq */, X86::VPSRAVQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34785 { 14775 /* vpsravq */, X86::VPSRAVQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34785 { 14775 /* vpsravq */, X86::VPSRAVQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34790 { 14783 /* vpsravw */, X86::VPSRAVWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34790 { 14783 /* vpsravw */, X86::VPSRAVWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34790 { 14783 /* vpsravw */, X86::VPSRAVWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34791 { 14783 /* vpsravw */, X86::VPSRAVWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34791 { 14783 /* vpsravw */, X86::VPSRAVWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34796 { 14783 /* vpsravw */, X86::VPSRAVWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34796 { 14783 /* vpsravw */, X86::VPSRAVWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34796 { 14783 /* vpsravw */, X86::VPSRAVWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34797 { 14783 /* vpsravw */, X86::VPSRAVWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34797 { 14783 /* vpsravw */, X86::VPSRAVWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34802 { 14783 /* vpsravw */, X86::VPSRAVWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34802 { 14783 /* vpsravw */, X86::VPSRAVWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34802 { 14783 /* vpsravw */, X86::VPSRAVWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34803 { 14783 /* vpsravw */, X86::VPSRAVWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34803 { 14783 /* vpsravw */, X86::VPSRAVWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34818 { 14791 /* vpsraw */, X86::VPSRAWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
34818 { 14791 /* vpsraw */, X86::VPSRAWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
34819 { 14791 /* vpsraw */, X86::VPSRAWZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34819 { 14791 /* vpsraw */, X86::VPSRAWZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34820 { 14791 /* vpsraw */, X86::VPSRAWZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
34820 { 14791 /* vpsraw */, X86::VPSRAWZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
34821 { 14791 /* vpsraw */, X86::VPSRAWZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34830 { 14791 /* vpsraw */, X86::VPSRAWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
34830 { 14791 /* vpsraw */, X86::VPSRAWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
34831 { 14791 /* vpsraw */, X86::VPSRAWZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34831 { 14791 /* vpsraw */, X86::VPSRAWZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34832 { 14791 /* vpsraw */, X86::VPSRAWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
34832 { 14791 /* vpsraw */, X86::VPSRAWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
34833 { 14791 /* vpsraw */, X86::VPSRAWZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34842 { 14791 /* vpsraw */, X86::VPSRAWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
34842 { 14791 /* vpsraw */, X86::VPSRAWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
34843 { 14791 /* vpsraw */, X86::VPSRAWZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34843 { 14791 /* vpsraw */, X86::VPSRAWZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34844 { 14791 /* vpsraw */, X86::VPSRAWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
34844 { 14791 /* vpsraw */, X86::VPSRAWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
34845 { 14791 /* vpsraw */, X86::VPSRAWZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34860 { 14798 /* vpsrld */, X86::VPSRLDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
34860 { 14798 /* vpsrld */, X86::VPSRLDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
34861 { 14798 /* vpsrld */, X86::VPSRLDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34861 { 14798 /* vpsrld */, X86::VPSRLDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34862 { 14798 /* vpsrld */, X86::VPSRLDZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
34862 { 14798 /* vpsrld */, X86::VPSRLDZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
34863 { 14798 /* vpsrld */, X86::VPSRLDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34866 { 14798 /* vpsrld */, X86::VPSRLDZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34875 { 14798 /* vpsrld */, X86::VPSRLDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
34875 { 14798 /* vpsrld */, X86::VPSRLDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
34876 { 14798 /* vpsrld */, X86::VPSRLDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34876 { 14798 /* vpsrld */, X86::VPSRLDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34877 { 14798 /* vpsrld */, X86::VPSRLDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
34877 { 14798 /* vpsrld */, X86::VPSRLDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
34878 { 14798 /* vpsrld */, X86::VPSRLDZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34889 { 14798 /* vpsrld */, X86::VPSRLDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
34889 { 14798 /* vpsrld */, X86::VPSRLDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
34890 { 14798 /* vpsrld */, X86::VPSRLDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34890 { 14798 /* vpsrld */, X86::VPSRLDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34891 { 14798 /* vpsrld */, X86::VPSRLDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
34891 { 14798 /* vpsrld */, X86::VPSRLDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
34892 { 14798 /* vpsrld */, X86::VPSRLDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34893 { 14798 /* vpsrld */, X86::VPSRLDZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34896 { 14798 /* vpsrld */, X86::VPSRLDZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34903 { 14805 /* vpsrldq */, X86::VPSRLDQZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34903 { 14805 /* vpsrldq */, X86::VPSRLDQZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34904 { 14805 /* vpsrldq */, X86::VPSRLDQZrm, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34919 { 14813 /* vpsrlq */, X86::VPSRLQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
34919 { 14813 /* vpsrlq */, X86::VPSRLQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
34920 { 14813 /* vpsrlq */, X86::VPSRLQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34920 { 14813 /* vpsrlq */, X86::VPSRLQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34921 { 14813 /* vpsrlq */, X86::VPSRLQZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
34921 { 14813 /* vpsrlq */, X86::VPSRLQZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
34922 { 14813 /* vpsrlq */, X86::VPSRLQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34925 { 14813 /* vpsrlq */, X86::VPSRLQZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34934 { 14813 /* vpsrlq */, X86::VPSRLQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
34934 { 14813 /* vpsrlq */, X86::VPSRLQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
34935 { 14813 /* vpsrlq */, X86::VPSRLQZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34935 { 14813 /* vpsrlq */, X86::VPSRLQZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34936 { 14813 /* vpsrlq */, X86::VPSRLQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
34936 { 14813 /* vpsrlq */, X86::VPSRLQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
34937 { 14813 /* vpsrlq */, X86::VPSRLQZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34948 { 14813 /* vpsrlq */, X86::VPSRLQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
34948 { 14813 /* vpsrlq */, X86::VPSRLQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
34949 { 14813 /* vpsrlq */, X86::VPSRLQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34949 { 14813 /* vpsrlq */, X86::VPSRLQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34950 { 14813 /* vpsrlq */, X86::VPSRLQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
34950 { 14813 /* vpsrlq */, X86::VPSRLQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
34951 { 14813 /* vpsrlq */, X86::VPSRLQZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34952 { 14813 /* vpsrlq */, X86::VPSRLQZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34955 { 14813 /* vpsrlq */, X86::VPSRLQZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34964 { 14820 /* vpsrlvd */, X86::VPSRLVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34964 { 14820 /* vpsrlvd */, X86::VPSRLVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34964 { 14820 /* vpsrlvd */, X86::VPSRLVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34965 { 14820 /* vpsrlvd */, X86::VPSRLVDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34965 { 14820 /* vpsrlvd */, X86::VPSRLVDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34968 { 14820 /* vpsrlvd */, X86::VPSRLVDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34968 { 14820 /* vpsrlvd */, X86::VPSRLVDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34973 { 14820 /* vpsrlvd */, X86::VPSRLVDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34973 { 14820 /* vpsrlvd */, X86::VPSRLVDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34973 { 14820 /* vpsrlvd */, X86::VPSRLVDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34974 { 14820 /* vpsrlvd */, X86::VPSRLVDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34974 { 14820 /* vpsrlvd */, X86::VPSRLVDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34981 { 14820 /* vpsrlvd */, X86::VPSRLVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34981 { 14820 /* vpsrlvd */, X86::VPSRLVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34981 { 14820 /* vpsrlvd */, X86::VPSRLVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34982 { 14820 /* vpsrlvd */, X86::VPSRLVDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34982 { 14820 /* vpsrlvd */, X86::VPSRLVDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34983 { 14820 /* vpsrlvd */, X86::VPSRLVDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34983 { 14820 /* vpsrlvd */, X86::VPSRLVDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34986 { 14820 /* vpsrlvd */, X86::VPSRLVDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34986 { 14820 /* vpsrlvd */, X86::VPSRLVDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34995 { 14828 /* vpsrlvq */, X86::VPSRLVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34995 { 14828 /* vpsrlvq */, X86::VPSRLVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34995 { 14828 /* vpsrlvq */, X86::VPSRLVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34996 { 14828 /* vpsrlvq */, X86::VPSRLVQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34996 { 14828 /* vpsrlvq */, X86::VPSRLVQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34999 { 14828 /* vpsrlvq */, X86::VPSRLVQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34999 { 14828 /* vpsrlvq */, X86::VPSRLVQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35004 { 14828 /* vpsrlvq */, X86::VPSRLVQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35004 { 14828 /* vpsrlvq */, X86::VPSRLVQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35004 { 14828 /* vpsrlvq */, X86::VPSRLVQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35005 { 14828 /* vpsrlvq */, X86::VPSRLVQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35005 { 14828 /* vpsrlvq */, X86::VPSRLVQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35012 { 14828 /* vpsrlvq */, X86::VPSRLVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35012 { 14828 /* vpsrlvq */, X86::VPSRLVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35012 { 14828 /* vpsrlvq */, X86::VPSRLVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35013 { 14828 /* vpsrlvq */, X86::VPSRLVQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35013 { 14828 /* vpsrlvq */, X86::VPSRLVQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35014 { 14828 /* vpsrlvq */, X86::VPSRLVQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35014 { 14828 /* vpsrlvq */, X86::VPSRLVQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35017 { 14828 /* vpsrlvq */, X86::VPSRLVQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35017 { 14828 /* vpsrlvq */, X86::VPSRLVQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35022 { 14836 /* vpsrlvw */, X86::VPSRLVWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35022 { 14836 /* vpsrlvw */, X86::VPSRLVWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35022 { 14836 /* vpsrlvw */, X86::VPSRLVWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35023 { 14836 /* vpsrlvw */, X86::VPSRLVWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35023 { 14836 /* vpsrlvw */, X86::VPSRLVWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35028 { 14836 /* vpsrlvw */, X86::VPSRLVWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35028 { 14836 /* vpsrlvw */, X86::VPSRLVWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35028 { 14836 /* vpsrlvw */, X86::VPSRLVWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35029 { 14836 /* vpsrlvw */, X86::VPSRLVWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35029 { 14836 /* vpsrlvw */, X86::VPSRLVWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35034 { 14836 /* vpsrlvw */, X86::VPSRLVWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35034 { 14836 /* vpsrlvw */, X86::VPSRLVWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35034 { 14836 /* vpsrlvw */, X86::VPSRLVWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35035 { 14836 /* vpsrlvw */, X86::VPSRLVWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35035 { 14836 /* vpsrlvw */, X86::VPSRLVWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35050 { 14844 /* vpsrlw */, X86::VPSRLWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
35050 { 14844 /* vpsrlw */, X86::VPSRLWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
35051 { 14844 /* vpsrlw */, X86::VPSRLWZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35051 { 14844 /* vpsrlw */, X86::VPSRLWZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35052 { 14844 /* vpsrlw */, X86::VPSRLWZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
35052 { 14844 /* vpsrlw */, X86::VPSRLWZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
35053 { 14844 /* vpsrlw */, X86::VPSRLWZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35062 { 14844 /* vpsrlw */, X86::VPSRLWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
35062 { 14844 /* vpsrlw */, X86::VPSRLWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
35063 { 14844 /* vpsrlw */, X86::VPSRLWZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35063 { 14844 /* vpsrlw */, X86::VPSRLWZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35064 { 14844 /* vpsrlw */, X86::VPSRLWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
35064 { 14844 /* vpsrlw */, X86::VPSRLWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
35065 { 14844 /* vpsrlw */, X86::VPSRLWZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35074 { 14844 /* vpsrlw */, X86::VPSRLWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
35074 { 14844 /* vpsrlw */, X86::VPSRLWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
35075 { 14844 /* vpsrlw */, X86::VPSRLWZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35075 { 14844 /* vpsrlw */, X86::VPSRLWZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35076 { 14844 /* vpsrlw */, X86::VPSRLWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
35076 { 14844 /* vpsrlw */, X86::VPSRLWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
35077 { 14844 /* vpsrlw */, X86::VPSRLWZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35086 { 14851 /* vpsubb */, X86::VPSUBBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35086 { 14851 /* vpsubb */, X86::VPSUBBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35086 { 14851 /* vpsubb */, X86::VPSUBBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35087 { 14851 /* vpsubb */, X86::VPSUBBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35087 { 14851 /* vpsubb */, X86::VPSUBBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35092 { 14851 /* vpsubb */, X86::VPSUBBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35092 { 14851 /* vpsubb */, X86::VPSUBBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35092 { 14851 /* vpsubb */, X86::VPSUBBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35093 { 14851 /* vpsubb */, X86::VPSUBBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35093 { 14851 /* vpsubb */, X86::VPSUBBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35098 { 14851 /* vpsubb */, X86::VPSUBBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35098 { 14851 /* vpsubb */, X86::VPSUBBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35098 { 14851 /* vpsubb */, X86::VPSUBBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35099 { 14851 /* vpsubb */, X86::VPSUBBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35099 { 14851 /* vpsubb */, X86::VPSUBBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35108 { 14858 /* vpsubd */, X86::VPSUBDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35108 { 14858 /* vpsubd */, X86::VPSUBDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35108 { 14858 /* vpsubd */, X86::VPSUBDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35109 { 14858 /* vpsubd */, X86::VPSUBDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35109 { 14858 /* vpsubd */, X86::VPSUBDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35112 { 14858 /* vpsubd */, X86::VPSUBDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35112 { 14858 /* vpsubd */, X86::VPSUBDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35117 { 14858 /* vpsubd */, X86::VPSUBDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35117 { 14858 /* vpsubd */, X86::VPSUBDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35117 { 14858 /* vpsubd */, X86::VPSUBDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35118 { 14858 /* vpsubd */, X86::VPSUBDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35118 { 14858 /* vpsubd */, X86::VPSUBDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35125 { 14858 /* vpsubd */, X86::VPSUBDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35125 { 14858 /* vpsubd */, X86::VPSUBDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35125 { 14858 /* vpsubd */, X86::VPSUBDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35126 { 14858 /* vpsubd */, X86::VPSUBDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35126 { 14858 /* vpsubd */, X86::VPSUBDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35127 { 14858 /* vpsubd */, X86::VPSUBDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35127 { 14858 /* vpsubd */, X86::VPSUBDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35130 { 14858 /* vpsubd */, X86::VPSUBDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35130 { 14858 /* vpsubd */, X86::VPSUBDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35139 { 14865 /* vpsubq */, X86::VPSUBQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35139 { 14865 /* vpsubq */, X86::VPSUBQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35139 { 14865 /* vpsubq */, X86::VPSUBQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35140 { 14865 /* vpsubq */, X86::VPSUBQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35140 { 14865 /* vpsubq */, X86::VPSUBQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35143 { 14865 /* vpsubq */, X86::VPSUBQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35143 { 14865 /* vpsubq */, X86::VPSUBQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35148 { 14865 /* vpsubq */, X86::VPSUBQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35148 { 14865 /* vpsubq */, X86::VPSUBQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35148 { 14865 /* vpsubq */, X86::VPSUBQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35149 { 14865 /* vpsubq */, X86::VPSUBQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35149 { 14865 /* vpsubq */, X86::VPSUBQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35156 { 14865 /* vpsubq */, X86::VPSUBQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35156 { 14865 /* vpsubq */, X86::VPSUBQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35156 { 14865 /* vpsubq */, X86::VPSUBQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35157 { 14865 /* vpsubq */, X86::VPSUBQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35157 { 14865 /* vpsubq */, X86::VPSUBQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35158 { 14865 /* vpsubq */, X86::VPSUBQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35158 { 14865 /* vpsubq */, X86::VPSUBQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35161 { 14865 /* vpsubq */, X86::VPSUBQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35161 { 14865 /* vpsubq */, X86::VPSUBQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35170 { 14872 /* vpsubsb */, X86::VPSUBSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35170 { 14872 /* vpsubsb */, X86::VPSUBSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35170 { 14872 /* vpsubsb */, X86::VPSUBSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35171 { 14872 /* vpsubsb */, X86::VPSUBSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35171 { 14872 /* vpsubsb */, X86::VPSUBSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35176 { 14872 /* vpsubsb */, X86::VPSUBSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35176 { 14872 /* vpsubsb */, X86::VPSUBSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35176 { 14872 /* vpsubsb */, X86::VPSUBSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35177 { 14872 /* vpsubsb */, X86::VPSUBSBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35177 { 14872 /* vpsubsb */, X86::VPSUBSBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35182 { 14872 /* vpsubsb */, X86::VPSUBSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35182 { 14872 /* vpsubsb */, X86::VPSUBSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35182 { 14872 /* vpsubsb */, X86::VPSUBSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35183 { 14872 /* vpsubsb */, X86::VPSUBSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35183 { 14872 /* vpsubsb */, X86::VPSUBSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35192 { 14880 /* vpsubsw */, X86::VPSUBSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35192 { 14880 /* vpsubsw */, X86::VPSUBSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35192 { 14880 /* vpsubsw */, X86::VPSUBSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35193 { 14880 /* vpsubsw */, X86::VPSUBSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35193 { 14880 /* vpsubsw */, X86::VPSUBSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35198 { 14880 /* vpsubsw */, X86::VPSUBSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35198 { 14880 /* vpsubsw */, X86::VPSUBSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35198 { 14880 /* vpsubsw */, X86::VPSUBSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35199 { 14880 /* vpsubsw */, X86::VPSUBSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35199 { 14880 /* vpsubsw */, X86::VPSUBSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35204 { 14880 /* vpsubsw */, X86::VPSUBSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35204 { 14880 /* vpsubsw */, X86::VPSUBSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35204 { 14880 /* vpsubsw */, X86::VPSUBSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35205 { 14880 /* vpsubsw */, X86::VPSUBSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35205 { 14880 /* vpsubsw */, X86::VPSUBSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35214 { 14888 /* vpsubusb */, X86::VPSUBUSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35214 { 14888 /* vpsubusb */, X86::VPSUBUSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35214 { 14888 /* vpsubusb */, X86::VPSUBUSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35215 { 14888 /* vpsubusb */, X86::VPSUBUSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35215 { 14888 /* vpsubusb */, X86::VPSUBUSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35220 { 14888 /* vpsubusb */, X86::VPSUBUSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35220 { 14888 /* vpsubusb */, X86::VPSUBUSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35220 { 14888 /* vpsubusb */, X86::VPSUBUSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35221 { 14888 /* vpsubusb */, X86::VPSUBUSBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35221 { 14888 /* vpsubusb */, X86::VPSUBUSBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35226 { 14888 /* vpsubusb */, X86::VPSUBUSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35226 { 14888 /* vpsubusb */, X86::VPSUBUSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35226 { 14888 /* vpsubusb */, X86::VPSUBUSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35227 { 14888 /* vpsubusb */, X86::VPSUBUSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35227 { 14888 /* vpsubusb */, X86::VPSUBUSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35236 { 14897 /* vpsubusw */, X86::VPSUBUSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35236 { 14897 /* vpsubusw */, X86::VPSUBUSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35236 { 14897 /* vpsubusw */, X86::VPSUBUSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35237 { 14897 /* vpsubusw */, X86::VPSUBUSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35237 { 14897 /* vpsubusw */, X86::VPSUBUSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35242 { 14897 /* vpsubusw */, X86::VPSUBUSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35242 { 14897 /* vpsubusw */, X86::VPSUBUSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35242 { 14897 /* vpsubusw */, X86::VPSUBUSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35243 { 14897 /* vpsubusw */, X86::VPSUBUSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35243 { 14897 /* vpsubusw */, X86::VPSUBUSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35248 { 14897 /* vpsubusw */, X86::VPSUBUSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35248 { 14897 /* vpsubusw */, X86::VPSUBUSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35248 { 14897 /* vpsubusw */, X86::VPSUBUSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35249 { 14897 /* vpsubusw */, X86::VPSUBUSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35249 { 14897 /* vpsubusw */, X86::VPSUBUSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35258 { 14906 /* vpsubw */, X86::VPSUBWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35258 { 14906 /* vpsubw */, X86::VPSUBWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35258 { 14906 /* vpsubw */, X86::VPSUBWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35259 { 14906 /* vpsubw */, X86::VPSUBWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35259 { 14906 /* vpsubw */, X86::VPSUBWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35264 { 14906 /* vpsubw */, X86::VPSUBWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35264 { 14906 /* vpsubw */, X86::VPSUBWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35264 { 14906 /* vpsubw */, X86::VPSUBWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35265 { 14906 /* vpsubw */, X86::VPSUBWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35265 { 14906 /* vpsubw */, X86::VPSUBWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35270 { 14906 /* vpsubw */, X86::VPSUBWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35270 { 14906 /* vpsubw */, X86::VPSUBWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35270 { 14906 /* vpsubw */, X86::VPSUBWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35271 { 14906 /* vpsubw */, X86::VPSUBWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35271 { 14906 /* vpsubw */, X86::VPSUBWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35276 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35276 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35276 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35277 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35277 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35280 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35280 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35285 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35285 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35285 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35286 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35286 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35293 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35293 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35293 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35294 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35294 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35295 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35295 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35298 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35298 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35303 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35303 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35303 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35304 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35304 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35307 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35307 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35312 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35312 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35312 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35313 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35313 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35320 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35320 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35320 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35321 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35321 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35322 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35322 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35325 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35325 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35334 { 14942 /* vptestmb */, X86::VPTESTMBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
35334 { 14942 /* vptestmb */, X86::VPTESTMBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
35335 { 14942 /* vptestmb */, X86::VPTESTMBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
35340 { 14942 /* vptestmb */, X86::VPTESTMBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35340 { 14942 /* vptestmb */, X86::VPTESTMBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35341 { 14942 /* vptestmb */, X86::VPTESTMBZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35346 { 14951 /* vptestmd */, X86::VPTESTMDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
35346 { 14951 /* vptestmd */, X86::VPTESTMDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
35347 { 14951 /* vptestmd */, X86::VPTESTMDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
35350 { 14951 /* vptestmd */, X86::VPTESTMDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35355 { 14951 /* vptestmd */, X86::VPTESTMDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35355 { 14951 /* vptestmd */, X86::VPTESTMDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35356 { 14951 /* vptestmd */, X86::VPTESTMDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35359 { 14951 /* vptestmd */, X86::VPTESTMDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35364 { 14960 /* vptestmq */, X86::VPTESTMQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
35364 { 14960 /* vptestmq */, X86::VPTESTMQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
35365 { 14960 /* vptestmq */, X86::VPTESTMQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
35368 { 14960 /* vptestmq */, X86::VPTESTMQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35373 { 14960 /* vptestmq */, X86::VPTESTMQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35373 { 14960 /* vptestmq */, X86::VPTESTMQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35374 { 14960 /* vptestmq */, X86::VPTESTMQZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35377 { 14960 /* vptestmq */, X86::VPTESTMQZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35382 { 14969 /* vptestmw */, X86::VPTESTMWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
35382 { 14969 /* vptestmw */, X86::VPTESTMWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
35383 { 14969 /* vptestmw */, X86::VPTESTMWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
35388 { 14969 /* vptestmw */, X86::VPTESTMWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35388 { 14969 /* vptestmw */, X86::VPTESTMWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35389 { 14969 /* vptestmw */, X86::VPTESTMWZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35394 { 14978 /* vptestnmb */, X86::VPTESTNMBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
35394 { 14978 /* vptestnmb */, X86::VPTESTNMBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
35395 { 14978 /* vptestnmb */, X86::VPTESTNMBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
35400 { 14978 /* vptestnmb */, X86::VPTESTNMBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35400 { 14978 /* vptestnmb */, X86::VPTESTNMBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35401 { 14978 /* vptestnmb */, X86::VPTESTNMBZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35406 { 14988 /* vptestnmd */, X86::VPTESTNMDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
35406 { 14988 /* vptestnmd */, X86::VPTESTNMDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
35407 { 14988 /* vptestnmd */, X86::VPTESTNMDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
35410 { 14988 /* vptestnmd */, X86::VPTESTNMDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35415 { 14988 /* vptestnmd */, X86::VPTESTNMDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35415 { 14988 /* vptestnmd */, X86::VPTESTNMDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35416 { 14988 /* vptestnmd */, X86::VPTESTNMDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35419 { 14988 /* vptestnmd */, X86::VPTESTNMDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35424 { 14998 /* vptestnmq */, X86::VPTESTNMQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
35424 { 14998 /* vptestnmq */, X86::VPTESTNMQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
35425 { 14998 /* vptestnmq */, X86::VPTESTNMQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
35428 { 14998 /* vptestnmq */, X86::VPTESTNMQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35433 { 14998 /* vptestnmq */, X86::VPTESTNMQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35433 { 14998 /* vptestnmq */, X86::VPTESTNMQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35434 { 14998 /* vptestnmq */, X86::VPTESTNMQZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35437 { 14998 /* vptestnmq */, X86::VPTESTNMQZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35442 { 15008 /* vptestnmw */, X86::VPTESTNMWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
35442 { 15008 /* vptestnmw */, X86::VPTESTNMWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
35443 { 15008 /* vptestnmw */, X86::VPTESTNMWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
35448 { 15008 /* vptestnmw */, X86::VPTESTNMWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35448 { 15008 /* vptestnmw */, X86::VPTESTNMWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35449 { 15008 /* vptestnmw */, X86::VPTESTNMWZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35458 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35458 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35458 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35459 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35459 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35464 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35464 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35464 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35465 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35465 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35470 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35470 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35470 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35471 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35471 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35480 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35480 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35480 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35481 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35481 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35484 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35484 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35489 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35489 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35489 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35490 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35490 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35497 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35497 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35497 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35498 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35498 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35499 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35499 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35502 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35502 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35511 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35511 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35511 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35512 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35512 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35515 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35515 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35520 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35520 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35520 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35521 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35521 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35528 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35528 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35528 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35529 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35529 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35530 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35530 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35533 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35533 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35542 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35542 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35542 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35543 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35543 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35548 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35548 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35548 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35549 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35549 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35554 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35554 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35554 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35555 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35555 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35564 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35564 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35564 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35565 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35565 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35570 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35570 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35570 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35571 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35571 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35576 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35576 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35576 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35577 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35577 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35586 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35586 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35586 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35587 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35587 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35590 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35590 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35595 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35595 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35595 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35596 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35596 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35603 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35603 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35603 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35604 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35604 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35605 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35605 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35608 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35608 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35617 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35617 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35617 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35618 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35618 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35621 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35621 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35626 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35626 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35626 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35627 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35627 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35634 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35634 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35634 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35635 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35635 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35636 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35636 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35639 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35639 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35648 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35648 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35648 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35649 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35649 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35654 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35654 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35654 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35655 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35655 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35660 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35660 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35660 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35661 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35661 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35670 { 15114 /* vpxord */, X86::VPXORDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35670 { 15114 /* vpxord */, X86::VPXORDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35670 { 15114 /* vpxord */, X86::VPXORDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35671 { 15114 /* vpxord */, X86::VPXORDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35671 { 15114 /* vpxord */, X86::VPXORDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35674 { 15114 /* vpxord */, X86::VPXORDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35674 { 15114 /* vpxord */, X86::VPXORDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35679 { 15114 /* vpxord */, X86::VPXORDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35679 { 15114 /* vpxord */, X86::VPXORDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35679 { 15114 /* vpxord */, X86::VPXORDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35680 { 15114 /* vpxord */, X86::VPXORDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35680 { 15114 /* vpxord */, X86::VPXORDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35687 { 15114 /* vpxord */, X86::VPXORDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35687 { 15114 /* vpxord */, X86::VPXORDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35687 { 15114 /* vpxord */, X86::VPXORDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35688 { 15114 /* vpxord */, X86::VPXORDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35688 { 15114 /* vpxord */, X86::VPXORDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35689 { 15114 /* vpxord */, X86::VPXORDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35689 { 15114 /* vpxord */, X86::VPXORDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35692 { 15114 /* vpxord */, X86::VPXORDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35692 { 15114 /* vpxord */, X86::VPXORDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35697 { 15121 /* vpxorq */, X86::VPXORQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35697 { 15121 /* vpxorq */, X86::VPXORQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35697 { 15121 /* vpxorq */, X86::VPXORQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35698 { 15121 /* vpxorq */, X86::VPXORQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35698 { 15121 /* vpxorq */, X86::VPXORQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35701 { 15121 /* vpxorq */, X86::VPXORQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35701 { 15121 /* vpxorq */, X86::VPXORQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35706 { 15121 /* vpxorq */, X86::VPXORQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35706 { 15121 /* vpxorq */, X86::VPXORQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35706 { 15121 /* vpxorq */, X86::VPXORQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35707 { 15121 /* vpxorq */, X86::VPXORQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35707 { 15121 /* vpxorq */, X86::VPXORQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35714 { 15121 /* vpxorq */, X86::VPXORQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35714 { 15121 /* vpxorq */, X86::VPXORQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35714 { 15121 /* vpxorq */, X86::VPXORQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35715 { 15121 /* vpxorq */, X86::VPXORQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35715 { 15121 /* vpxorq */, X86::VPXORQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35716 { 15121 /* vpxorq */, X86::VPXORQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35716 { 15121 /* vpxorq */, X86::VPXORQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35719 { 15121 /* vpxorq */, X86::VPXORQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35719 { 15121 /* vpxorq */, X86::VPXORQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35724 { 15128 /* vrangepd */, X86::VRANGEPDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35724 { 15128 /* vrangepd */, X86::VRANGEPDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35724 { 15128 /* vrangepd */, X86::VRANGEPDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35725 { 15128 /* vrangepd */, X86::VRANGEPDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35725 { 15128 /* vrangepd */, X86::VRANGEPDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35728 { 15128 /* vrangepd */, X86::VRANGEPDZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35728 { 15128 /* vrangepd */, X86::VRANGEPDZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35728 { 15128 /* vrangepd */, X86::VRANGEPDZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35729 { 15128 /* vrangepd */, X86::VRANGEPDZrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35729 { 15128 /* vrangepd */, X86::VRANGEPDZrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35734 { 15128 /* vrangepd */, X86::VRANGEPDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35734 { 15128 /* vrangepd */, X86::VRANGEPDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35734 { 15128 /* vrangepd */, X86::VRANGEPDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35735 { 15128 /* vrangepd */, X86::VRANGEPDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35735 { 15128 /* vrangepd */, X86::VRANGEPDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35742 { 15128 /* vrangepd */, X86::VRANGEPDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35742 { 15128 /* vrangepd */, X86::VRANGEPDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35742 { 15128 /* vrangepd */, X86::VRANGEPDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35743 { 15128 /* vrangepd */, X86::VRANGEPDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35743 { 15128 /* vrangepd */, X86::VRANGEPDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35744 { 15128 /* vrangepd */, X86::VRANGEPDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35744 { 15128 /* vrangepd */, X86::VRANGEPDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35744 { 15128 /* vrangepd */, X86::VRANGEPDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35745 { 15128 /* vrangepd */, X86::VRANGEPDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35745 { 15128 /* vrangepd */, X86::VRANGEPDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35748 { 15128 /* vrangepd */, X86::VRANGEPDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35748 { 15128 /* vrangepd */, X86::VRANGEPDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35748 { 15128 /* vrangepd */, X86::VRANGEPDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35749 { 15128 /* vrangepd */, X86::VRANGEPDZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35749 { 15128 /* vrangepd */, X86::VRANGEPDZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35754 { 15137 /* vrangeps */, X86::VRANGEPSZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35754 { 15137 /* vrangeps */, X86::VRANGEPSZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35754 { 15137 /* vrangeps */, X86::VRANGEPSZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35755 { 15137 /* vrangeps */, X86::VRANGEPSZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35755 { 15137 /* vrangeps */, X86::VRANGEPSZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35758 { 15137 /* vrangeps */, X86::VRANGEPSZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35758 { 15137 /* vrangeps */, X86::VRANGEPSZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35758 { 15137 /* vrangeps */, X86::VRANGEPSZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35759 { 15137 /* vrangeps */, X86::VRANGEPSZrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35759 { 15137 /* vrangeps */, X86::VRANGEPSZrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35764 { 15137 /* vrangeps */, X86::VRANGEPSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35764 { 15137 /* vrangeps */, X86::VRANGEPSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35764 { 15137 /* vrangeps */, X86::VRANGEPSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35765 { 15137 /* vrangeps */, X86::VRANGEPSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35765 { 15137 /* vrangeps */, X86::VRANGEPSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35772 { 15137 /* vrangeps */, X86::VRANGEPSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35772 { 15137 /* vrangeps */, X86::VRANGEPSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35772 { 15137 /* vrangeps */, X86::VRANGEPSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35773 { 15137 /* vrangeps */, X86::VRANGEPSZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35773 { 15137 /* vrangeps */, X86::VRANGEPSZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35774 { 15137 /* vrangeps */, X86::VRANGEPSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35774 { 15137 /* vrangeps */, X86::VRANGEPSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35774 { 15137 /* vrangeps */, X86::VRANGEPSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35775 { 15137 /* vrangeps */, X86::VRANGEPSZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35775 { 15137 /* vrangeps */, X86::VRANGEPSZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35778 { 15137 /* vrangeps */, X86::VRANGEPSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35778 { 15137 /* vrangeps */, X86::VRANGEPSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35778 { 15137 /* vrangeps */, X86::VRANGEPSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35779 { 15137 /* vrangeps */, X86::VRANGEPSZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35779 { 15137 /* vrangeps */, X86::VRANGEPSZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35802 { 15164 /* vrcp14pd */, X86::VRCP14PDZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
35802 { 15164 /* vrcp14pd */, X86::VRCP14PDZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
35803 { 15164 /* vrcp14pd */, X86::VRCP14PDZm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
35806 { 15164 /* vrcp14pd */, X86::VRCP14PDZmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35811 { 15164 /* vrcp14pd */, X86::VRCP14PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35811 { 15164 /* vrcp14pd */, X86::VRCP14PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35812 { 15164 /* vrcp14pd */, X86::VRCP14PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
35819 { 15164 /* vrcp14pd */, X86::VRCP14PDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
35819 { 15164 /* vrcp14pd */, X86::VRCP14PDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
35820 { 15164 /* vrcp14pd */, X86::VRCP14PDZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
35821 { 15164 /* vrcp14pd */, X86::VRCP14PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
35824 { 15164 /* vrcp14pd */, X86::VRCP14PDZmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
35829 { 15173 /* vrcp14ps */, X86::VRCP14PSZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
35829 { 15173 /* vrcp14ps */, X86::VRCP14PSZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
35830 { 15173 /* vrcp14ps */, X86::VRCP14PSZm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
35833 { 15173 /* vrcp14ps */, X86::VRCP14PSZmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35838 { 15173 /* vrcp14ps */, X86::VRCP14PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35838 { 15173 /* vrcp14ps */, X86::VRCP14PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35839 { 15173 /* vrcp14ps */, X86::VRCP14PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
35846 { 15173 /* vrcp14ps */, X86::VRCP14PSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
35846 { 15173 /* vrcp14ps */, X86::VRCP14PSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
35847 { 15173 /* vrcp14ps */, X86::VRCP14PSZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
35848 { 15173 /* vrcp14ps */, X86::VRCP14PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
35851 { 15173 /* vrcp14ps */, X86::VRCP14PSZmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
35864 { 15200 /* vrcp28pd */, X86::VRCP28PDZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
35864 { 15200 /* vrcp28pd */, X86::VRCP28PDZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
35865 { 15200 /* vrcp28pd */, X86::VRCP28PDZm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
35866 { 15200 /* vrcp28pd */, X86::VRCP28PDZrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
35866 { 15200 /* vrcp28pd */, X86::VRCP28PDZrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
35867 { 15200 /* vrcp28pd */, X86::VRCP28PDZmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35868 { 15200 /* vrcp28pd */, X86::VRCP28PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35868 { 15200 /* vrcp28pd */, X86::VRCP28PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35869 { 15200 /* vrcp28pd */, X86::VRCP28PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
35870 { 15200 /* vrcp28pd */, X86::VRCP28PDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
35870 { 15200 /* vrcp28pd */, X86::VRCP28PDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
35871 { 15200 /* vrcp28pd */, X86::VRCP28PDZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
35872 { 15200 /* vrcp28pd */, X86::VRCP28PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
35872 { 15200 /* vrcp28pd */, X86::VRCP28PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
35873 { 15200 /* vrcp28pd */, X86::VRCP28PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
35874 { 15200 /* vrcp28pd */, X86::VRCP28PDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
35874 { 15200 /* vrcp28pd */, X86::VRCP28PDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
35875 { 15200 /* vrcp28pd */, X86::VRCP28PDZmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
35876 { 15209 /* vrcp28ps */, X86::VRCP28PSZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
35876 { 15209 /* vrcp28ps */, X86::VRCP28PSZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
35877 { 15209 /* vrcp28ps */, X86::VRCP28PSZm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
35878 { 15209 /* vrcp28ps */, X86::VRCP28PSZrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
35878 { 15209 /* vrcp28ps */, X86::VRCP28PSZrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
35879 { 15209 /* vrcp28ps */, X86::VRCP28PSZmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35880 { 15209 /* vrcp28ps */, X86::VRCP28PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35880 { 15209 /* vrcp28ps */, X86::VRCP28PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35881 { 15209 /* vrcp28ps */, X86::VRCP28PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
35882 { 15209 /* vrcp28ps */, X86::VRCP28PSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
35882 { 15209 /* vrcp28ps */, X86::VRCP28PSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
35883 { 15209 /* vrcp28ps */, X86::VRCP28PSZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
35884 { 15209 /* vrcp28ps */, X86::VRCP28PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
35884 { 15209 /* vrcp28ps */, X86::VRCP28PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
35885 { 15209 /* vrcp28ps */, X86::VRCP28PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
35886 { 15209 /* vrcp28ps */, X86::VRCP28PSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
35886 { 15209 /* vrcp28ps */, X86::VRCP28PSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
35887 { 15209 /* vrcp28ps */, X86::VRCP28PSZmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
35916 { 15250 /* vreducepd */, X86::VREDUCEPDZrri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35916 { 15250 /* vreducepd */, X86::VREDUCEPDZrri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35917 { 15250 /* vreducepd */, X86::VREDUCEPDZrmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35920 { 15250 /* vreducepd */, X86::VREDUCEPDZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35920 { 15250 /* vreducepd */, X86::VREDUCEPDZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35921 { 15250 /* vreducepd */, X86::VREDUCEPDZrmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35926 { 15250 /* vreducepd */, X86::VREDUCEPDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35926 { 15250 /* vreducepd */, X86::VREDUCEPDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35927 { 15250 /* vreducepd */, X86::VREDUCEPDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35934 { 15250 /* vreducepd */, X86::VREDUCEPDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35934 { 15250 /* vreducepd */, X86::VREDUCEPDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35935 { 15250 /* vreducepd */, X86::VREDUCEPDZrmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35936 { 15250 /* vreducepd */, X86::VREDUCEPDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35936 { 15250 /* vreducepd */, X86::VREDUCEPDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35937 { 15250 /* vreducepd */, X86::VREDUCEPDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35940 { 15250 /* vreducepd */, X86::VREDUCEPDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35940 { 15250 /* vreducepd */, X86::VREDUCEPDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35941 { 15250 /* vreducepd */, X86::VREDUCEPDZrmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35946 { 15260 /* vreduceps */, X86::VREDUCEPSZrri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35946 { 15260 /* vreduceps */, X86::VREDUCEPSZrri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35947 { 15260 /* vreduceps */, X86::VREDUCEPSZrmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35950 { 15260 /* vreduceps */, X86::VREDUCEPSZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35950 { 15260 /* vreduceps */, X86::VREDUCEPSZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35951 { 15260 /* vreduceps */, X86::VREDUCEPSZrmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35956 { 15260 /* vreduceps */, X86::VREDUCEPSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35956 { 15260 /* vreduceps */, X86::VREDUCEPSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35957 { 15260 /* vreduceps */, X86::VREDUCEPSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35964 { 15260 /* vreduceps */, X86::VREDUCEPSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35964 { 15260 /* vreduceps */, X86::VREDUCEPSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35965 { 15260 /* vreduceps */, X86::VREDUCEPSZrmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35966 { 15260 /* vreduceps */, X86::VREDUCEPSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35966 { 15260 /* vreduceps */, X86::VREDUCEPSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35967 { 15260 /* vreduceps */, X86::VREDUCEPSZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35970 { 15260 /* vreduceps */, X86::VREDUCEPSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35970 { 15260 /* vreduceps */, X86::VREDUCEPSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35971 { 15260 /* vreduceps */, X86::VREDUCEPSZrmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35994 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35994 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35995 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35998 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35998 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35999 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36004 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
36004 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
36005 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36012 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
36012 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
36013 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36014 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36014 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36015 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36018 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36018 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36019 { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36024 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36024 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36025 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36028 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36028 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36029 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
36034 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
36034 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
36035 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36042 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
36042 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
36043 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36044 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36044 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36045 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
36048 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36048 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
36049 { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
36084 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
36084 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
36085 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
36088 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36093 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
36093 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
36094 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
36101 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
36101 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
36102 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
36103 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
36106 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
36111 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
36111 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
36112 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
36115 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36120 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
36120 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
36121 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
36128 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
36128 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
36129 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
36130 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
36133 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
36146 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
36146 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
36147 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
36148 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
36148 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
36149 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36150 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
36150 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
36151 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
36152 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
36152 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
36153 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
36154 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
36154 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
36155 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
36156 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
36156 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
36157 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
36158 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
36158 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
36159 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
36160 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
36160 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZrb, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
36161 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36162 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
36162 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
36163 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
36164 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
36164 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
36165 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
36166 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
36166 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
36167 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
36168 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
36168 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
36169 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
36198 { 15480 /* vscalefpd */, X86::VSCALEFPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
36198 { 15480 /* vscalefpd */, X86::VSCALEFPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
36198 { 15480 /* vscalefpd */, X86::VSCALEFPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
36199 { 15480 /* vscalefpd */, X86::VSCALEFPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
36199 { 15480 /* vscalefpd */, X86::VSCALEFPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
36202 { 15480 /* vscalefpd */, X86::VSCALEFPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36202 { 15480 /* vscalefpd */, X86::VSCALEFPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36202 { 15480 /* vscalefpd */, X86::VSCALEFPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36203 { 15480 /* vscalefpd */, X86::VSCALEFPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36203 { 15480 /* vscalefpd */, X86::VSCALEFPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36208 { 15480 /* vscalefpd */, X86::VSCALEFPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
36208 { 15480 /* vscalefpd */, X86::VSCALEFPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
36208 { 15480 /* vscalefpd */, X86::VSCALEFPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
36209 { 15480 /* vscalefpd */, X86::VSCALEFPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
36209 { 15480 /* vscalefpd */, X86::VSCALEFPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
36216 { 15480 /* vscalefpd */, X86::VSCALEFPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
36216 { 15480 /* vscalefpd */, X86::VSCALEFPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
36216 { 15480 /* vscalefpd */, X86::VSCALEFPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
36217 { 15480 /* vscalefpd */, X86::VSCALEFPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
36217 { 15480 /* vscalefpd */, X86::VSCALEFPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
36218 { 15480 /* vscalefpd */, X86::VSCALEFPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36218 { 15480 /* vscalefpd */, X86::VSCALEFPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36218 { 15480 /* vscalefpd */, X86::VSCALEFPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36219 { 15480 /* vscalefpd */, X86::VSCALEFPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36219 { 15480 /* vscalefpd */, X86::VSCALEFPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36222 { 15480 /* vscalefpd */, X86::VSCALEFPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36222 { 15480 /* vscalefpd */, X86::VSCALEFPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36222 { 15480 /* vscalefpd */, X86::VSCALEFPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36223 { 15480 /* vscalefpd */, X86::VSCALEFPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36223 { 15480 /* vscalefpd */, X86::VSCALEFPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36228 { 15490 /* vscalefps */, X86::VSCALEFPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
36228 { 15490 /* vscalefps */, X86::VSCALEFPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
36228 { 15490 /* vscalefps */, X86::VSCALEFPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
36229 { 15490 /* vscalefps */, X86::VSCALEFPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
36229 { 15490 /* vscalefps */, X86::VSCALEFPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
36232 { 15490 /* vscalefps */, X86::VSCALEFPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36232 { 15490 /* vscalefps */, X86::VSCALEFPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36232 { 15490 /* vscalefps */, X86::VSCALEFPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36233 { 15490 /* vscalefps */, X86::VSCALEFPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36233 { 15490 /* vscalefps */, X86::VSCALEFPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36238 { 15490 /* vscalefps */, X86::VSCALEFPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
36238 { 15490 /* vscalefps */, X86::VSCALEFPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
36238 { 15490 /* vscalefps */, X86::VSCALEFPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
36239 { 15490 /* vscalefps */, X86::VSCALEFPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
36239 { 15490 /* vscalefps */, X86::VSCALEFPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
36246 { 15490 /* vscalefps */, X86::VSCALEFPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
36246 { 15490 /* vscalefps */, X86::VSCALEFPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
36246 { 15490 /* vscalefps */, X86::VSCALEFPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
36247 { 15490 /* vscalefps */, X86::VSCALEFPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
36247 { 15490 /* vscalefps */, X86::VSCALEFPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
36248 { 15490 /* vscalefps */, X86::VSCALEFPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36248 { 15490 /* vscalefps */, X86::VSCALEFPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36248 { 15490 /* vscalefps */, X86::VSCALEFPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36249 { 15490 /* vscalefps */, X86::VSCALEFPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36249 { 15490 /* vscalefps */, X86::VSCALEFPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36252 { 15490 /* vscalefps */, X86::VSCALEFPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36252 { 15490 /* vscalefps */, X86::VSCALEFPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36252 { 15490 /* vscalefps */, X86::VSCALEFPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36253 { 15490 /* vscalefps */, X86::VSCALEFPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36253 { 15490 /* vscalefps */, X86::VSCALEFPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36274 { 15520 /* vscatterdpd */, X86::VSCATTERDPDZmr, Convert__Reg1_2__Mem512_RC256X5_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
36277 { 15532 /* vscatterdps */, X86::VSCATTERDPSZmr, Convert__Reg1_2__Mem512_RC5125_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
36288 { 15664 /* vscatterqpd */, X86::VSCATTERQPDZmr, Convert__Reg1_2__Mem512_RC5125_0__Tie0_3_3__Reg1_4, AMFBS_None, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
36294 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36294 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36294 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36295 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36295 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36297 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
36297 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
36300 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36300 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36300 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36301 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36301 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36305 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36305 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36305 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36306 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36306 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36307 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
36307 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
36309 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
36309 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
36312 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36312 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36312 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36313 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36313 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36315 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36315 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36318 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36318 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36318 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36319 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36319 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36323 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36323 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36323 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36324 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36324 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36325 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36325 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36327 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36327 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36330 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36330 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36330 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36331 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36331 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36333 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
36333 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
36336 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36336 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36336 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36337 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36337 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36341 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36341 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36341 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36342 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36342 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36343 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
36343 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
36345 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
36345 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
36348 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36348 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36348 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36349 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36349 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36351 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36351 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36354 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36354 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36354 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36355 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36355 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36359 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36359 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36359 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36360 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36360 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36361 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36361 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36363 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36363 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36372 { 15732 /* vshufpd */, X86::VSHUFPDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36372 { 15732 /* vshufpd */, X86::VSHUFPDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36372 { 15732 /* vshufpd */, X86::VSHUFPDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36373 { 15732 /* vshufpd */, X86::VSHUFPDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36373 { 15732 /* vshufpd */, X86::VSHUFPDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36376 { 15732 /* vshufpd */, X86::VSHUFPDZrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36376 { 15732 /* vshufpd */, X86::VSHUFPDZrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36381 { 15732 /* vshufpd */, X86::VSHUFPDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36381 { 15732 /* vshufpd */, X86::VSHUFPDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36381 { 15732 /* vshufpd */, X86::VSHUFPDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36382 { 15732 /* vshufpd */, X86::VSHUFPDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36382 { 15732 /* vshufpd */, X86::VSHUFPDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36389 { 15732 /* vshufpd */, X86::VSHUFPDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36389 { 15732 /* vshufpd */, X86::VSHUFPDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36389 { 15732 /* vshufpd */, X86::VSHUFPDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36390 { 15732 /* vshufpd */, X86::VSHUFPDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36390 { 15732 /* vshufpd */, X86::VSHUFPDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36391 { 15732 /* vshufpd */, X86::VSHUFPDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36391 { 15732 /* vshufpd */, X86::VSHUFPDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36394 { 15732 /* vshufpd */, X86::VSHUFPDZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36394 { 15732 /* vshufpd */, X86::VSHUFPDZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
36403 { 15740 /* vshufps */, X86::VSHUFPSZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36403 { 15740 /* vshufps */, X86::VSHUFPSZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36403 { 15740 /* vshufps */, X86::VSHUFPSZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36404 { 15740 /* vshufps */, X86::VSHUFPSZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36404 { 15740 /* vshufps */, X86::VSHUFPSZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36407 { 15740 /* vshufps */, X86::VSHUFPSZrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
36407 { 15740 /* vshufps */, X86::VSHUFPSZrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
36412 { 15740 /* vshufps */, X86::VSHUFPSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36412 { 15740 /* vshufps */, X86::VSHUFPSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36412 { 15740 /* vshufps */, X86::VSHUFPSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36413 { 15740 /* vshufps */, X86::VSHUFPSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36413 { 15740 /* vshufps */, X86::VSHUFPSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36420 { 15740 /* vshufps */, X86::VSHUFPSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36420 { 15740 /* vshufps */, X86::VSHUFPSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36420 { 15740 /* vshufps */, X86::VSHUFPSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
36421 { 15740 /* vshufps */, X86::VSHUFPSZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36421 { 15740 /* vshufps */, X86::VSHUFPSZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
36422 { 15740 /* vshufps */, X86::VSHUFPSZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
36422 { 15740 /* vshufps */, X86::VSHUFPSZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
36425 { 15740 /* vshufps */, X86::VSHUFPSZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
36425 { 15740 /* vshufps */, X86::VSHUFPSZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
36434 { 15748 /* vsqrtpd */, X86::VSQRTPDZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
36434 { 15748 /* vsqrtpd */, X86::VSQRTPDZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
36435 { 15748 /* vsqrtpd */, X86::VSQRTPDZm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
36438 { 15748 /* vsqrtpd */, X86::VSQRTPDZrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36438 { 15748 /* vsqrtpd */, X86::VSQRTPDZrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36439 { 15748 /* vsqrtpd */, X86::VSQRTPDZmb, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36444 { 15748 /* vsqrtpd */, X86::VSQRTPDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
36444 { 15748 /* vsqrtpd */, X86::VSQRTPDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
36445 { 15748 /* vsqrtpd */, X86::VSQRTPDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
36452 { 15748 /* vsqrtpd */, X86::VSQRTPDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
36452 { 15748 /* vsqrtpd */, X86::VSQRTPDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
36453 { 15748 /* vsqrtpd */, X86::VSQRTPDZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
36454 { 15748 /* vsqrtpd */, X86::VSQRTPDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
36454 { 15748 /* vsqrtpd */, X86::VSQRTPDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
36455 { 15748 /* vsqrtpd */, X86::VSQRTPDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
36458 { 15748 /* vsqrtpd */, X86::VSQRTPDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
36458 { 15748 /* vsqrtpd */, X86::VSQRTPDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
36459 { 15748 /* vsqrtpd */, X86::VSQRTPDZmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
36468 { 15756 /* vsqrtps */, X86::VSQRTPSZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
36468 { 15756 /* vsqrtps */, X86::VSQRTPSZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_VR512 }, },
36469 { 15756 /* vsqrtps */, X86::VSQRTPSZm, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_VR512, MCK_Mem512 }, },
36472 { 15756 /* vsqrtps */, X86::VSQRTPSZrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36472 { 15756 /* vsqrtps */, X86::VSQRTPSZrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36473 { 15756 /* vsqrtps */, X86::VSQRTPSZmb, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36478 { 15756 /* vsqrtps */, X86::VSQRTPSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
36478 { 15756 /* vsqrtps */, X86::VSQRTPSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
36479 { 15756 /* vsqrtps */, X86::VSQRTPSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
36486 { 15756 /* vsqrtps */, X86::VSQRTPSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
36486 { 15756 /* vsqrtps */, X86::VSQRTPSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
36487 { 15756 /* vsqrtps */, X86::VSQRTPSZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
36488 { 15756 /* vsqrtps */, X86::VSQRTPSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
36488 { 15756 /* vsqrtps */, X86::VSQRTPSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
36489 { 15756 /* vsqrtps */, X86::VSQRTPSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
36492 { 15756 /* vsqrtps */, X86::VSQRTPSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
36492 { 15756 /* vsqrtps */, X86::VSQRTPSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
36493 { 15756 /* vsqrtps */, X86::VSQRTPSZmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
36525 { 15789 /* vsubpd */, X86::VSUBPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
36525 { 15789 /* vsubpd */, X86::VSUBPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
36525 { 15789 /* vsubpd */, X86::VSUBPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
36526 { 15789 /* vsubpd */, X86::VSUBPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
36526 { 15789 /* vsubpd */, X86::VSUBPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
36529 { 15789 /* vsubpd */, X86::VSUBPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36529 { 15789 /* vsubpd */, X86::VSUBPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36529 { 15789 /* vsubpd */, X86::VSUBPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36530 { 15789 /* vsubpd */, X86::VSUBPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36530 { 15789 /* vsubpd */, X86::VSUBPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36535 { 15789 /* vsubpd */, X86::VSUBPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
36535 { 15789 /* vsubpd */, X86::VSUBPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
36535 { 15789 /* vsubpd */, X86::VSUBPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
36536 { 15789 /* vsubpd */, X86::VSUBPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
36536 { 15789 /* vsubpd */, X86::VSUBPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
36543 { 15789 /* vsubpd */, X86::VSUBPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
36543 { 15789 /* vsubpd */, X86::VSUBPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
36543 { 15789 /* vsubpd */, X86::VSUBPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
36544 { 15789 /* vsubpd */, X86::VSUBPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
36544 { 15789 /* vsubpd */, X86::VSUBPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
36545 { 15789 /* vsubpd */, X86::VSUBPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36545 { 15789 /* vsubpd */, X86::VSUBPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36545 { 15789 /* vsubpd */, X86::VSUBPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36546 { 15789 /* vsubpd */, X86::VSUBPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36546 { 15789 /* vsubpd */, X86::VSUBPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36549 { 15789 /* vsubpd */, X86::VSUBPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36549 { 15789 /* vsubpd */, X86::VSUBPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36549 { 15789 /* vsubpd */, X86::VSUBPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36550 { 15789 /* vsubpd */, X86::VSUBPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36550 { 15789 /* vsubpd */, X86::VSUBPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36559 { 15796 /* vsubps */, X86::VSUBPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
36559 { 15796 /* vsubps */, X86::VSUBPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
36559 { 15796 /* vsubps */, X86::VSUBPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
36560 { 15796 /* vsubps */, X86::VSUBPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
36560 { 15796 /* vsubps */, X86::VSUBPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
36563 { 15796 /* vsubps */, X86::VSUBPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36563 { 15796 /* vsubps */, X86::VSUBPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36563 { 15796 /* vsubps */, X86::VSUBPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36564 { 15796 /* vsubps */, X86::VSUBPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36564 { 15796 /* vsubps */, X86::VSUBPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36569 { 15796 /* vsubps */, X86::VSUBPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
36569 { 15796 /* vsubps */, X86::VSUBPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
36569 { 15796 /* vsubps */, X86::VSUBPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
36570 { 15796 /* vsubps */, X86::VSUBPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
36570 { 15796 /* vsubps */, X86::VSUBPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
36577 { 15796 /* vsubps */, X86::VSUBPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
36577 { 15796 /* vsubps */, X86::VSUBPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
36577 { 15796 /* vsubps */, X86::VSUBPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
36578 { 15796 /* vsubps */, X86::VSUBPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
36578 { 15796 /* vsubps */, X86::VSUBPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
36579 { 15796 /* vsubps */, X86::VSUBPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36579 { 15796 /* vsubps */, X86::VSUBPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36579 { 15796 /* vsubps */, X86::VSUBPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36580 { 15796 /* vsubps */, X86::VSUBPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36580 { 15796 /* vsubps */, X86::VSUBPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36583 { 15796 /* vsubps */, X86::VSUBPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36583 { 15796 /* vsubps */, X86::VSUBPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36583 { 15796 /* vsubps */, X86::VSUBPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
36584 { 15796 /* vsubps */, X86::VSUBPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36584 { 15796 /* vsubps */, X86::VSUBPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36633 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
36633 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
36633 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
36634 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
36634 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
36637 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36637 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36642 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
36642 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
36642 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
36643 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
36643 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
36650 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
36650 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
36650 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
36651 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
36651 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
36652 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36652 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36655 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36655 { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36664 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
36664 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
36664 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
36665 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
36665 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
36668 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36668 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36673 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
36673 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
36673 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
36674 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
36674 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
36681 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
36681 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
36681 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
36682 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
36682 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
36683 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36683 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36686 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36686 { 15861 /* vunpckhps */, X86::VUNPCKHPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36695 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
36695 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
36695 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
36696 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
36696 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
36699 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36699 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36704 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
36704 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
36704 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
36705 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
36705 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
36712 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
36712 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
36712 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
36713 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
36713 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
36714 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36714 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36717 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36717 { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36726 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
36726 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
36726 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
36727 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
36727 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
36730 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36730 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36735 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
36735 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
36735 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
36736 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
36736 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
36743 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
36743 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
36743 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
36744 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
36744 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
36745 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36745 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36748 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36748 { 15881 /* vunpcklps */, X86::VUNPCKLPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36757 { 15891 /* vxorpd */, X86::VXORPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
36757 { 15891 /* vxorpd */, X86::VXORPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
36757 { 15891 /* vxorpd */, X86::VXORPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
36758 { 15891 /* vxorpd */, X86::VXORPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
36758 { 15891 /* vxorpd */, X86::VXORPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
36761 { 15891 /* vxorpd */, X86::VXORPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36761 { 15891 /* vxorpd */, X86::VXORPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36766 { 15891 /* vxorpd */, X86::VXORPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
36766 { 15891 /* vxorpd */, X86::VXORPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
36766 { 15891 /* vxorpd */, X86::VXORPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
36767 { 15891 /* vxorpd */, X86::VXORPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
36767 { 15891 /* vxorpd */, X86::VXORPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
36774 { 15891 /* vxorpd */, X86::VXORPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
36774 { 15891 /* vxorpd */, X86::VXORPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
36774 { 15891 /* vxorpd */, X86::VXORPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
36775 { 15891 /* vxorpd */, X86::VXORPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
36775 { 15891 /* vxorpd */, X86::VXORPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
36776 { 15891 /* vxorpd */, X86::VXORPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36776 { 15891 /* vxorpd */, X86::VXORPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36779 { 15891 /* vxorpd */, X86::VXORPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36779 { 15891 /* vxorpd */, X86::VXORPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36788 { 15898 /* vxorps */, X86::VXORPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
36788 { 15898 /* vxorps */, X86::VXORPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
36788 { 15898 /* vxorps */, X86::VXORPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
36789 { 15898 /* vxorps */, X86::VXORPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
36789 { 15898 /* vxorps */, X86::VXORPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
36792 { 15898 /* vxorps */, X86::VXORPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36792 { 15898 /* vxorps */, X86::VXORPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36797 { 15898 /* vxorps */, X86::VXORPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
36797 { 15898 /* vxorps */, X86::VXORPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
36797 { 15898 /* vxorps */, X86::VXORPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
36798 { 15898 /* vxorps */, X86::VXORPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
36798 { 15898 /* vxorps */, X86::VXORPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
36805 { 15898 /* vxorps */, X86::VXORPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
36805 { 15898 /* vxorps */, X86::VXORPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
36805 { 15898 /* vxorps */, X86::VXORPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
36806 { 15898 /* vxorps */, X86::VXORPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
36806 { 15898 /* vxorps */, X86::VXORPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
36807 { 15898 /* vxorps */, X86::VXORPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36807 { 15898 /* vxorps */, X86::VXORPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36810 { 15898 /* vxorps */, X86::VXORPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36810 { 15898 /* vxorps */, X86::VXORPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },