reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/X86/X86GenAsmMatcher.inc
 5866     return B == MCK_RST;
 7305     case X86::ST1: OpKind = MCK_RST; break;
 7306     case X86::ST2: OpKind = MCK_RST; break;
 7307     case X86::ST3: OpKind = MCK_RST; break;
 7308     case X86::ST4: OpKind = MCK_RST; break;
 7309     case X86::ST5: OpKind = MCK_RST; break;
 7310     case X86::ST6: OpKind = MCK_RST; break;
 7311     case X86::ST7: OpKind = MCK_RST; break;
 7465   case MCK_RST: return "MCK_RST";
 8615   { 2093 /* fadd */, X86::ADD_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
 8617   { 2093 /* fadd */, X86::ADD_FrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
 8618   { 2093 /* fadd */, X86::ADD_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
 8621   { 2104 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
 8623   { 2104 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
 8624   { 2104 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
 8629   { 2132 /* fcmovb */, X86::CMOVB_F, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
 8630   { 2139 /* fcmovbe */, X86::CMOVBE_F, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
 8631   { 2147 /* fcmove */, X86::CMOVE_F, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
 8632   { 2154 /* fcmovnb */, X86::CMOVNB_F, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
 8633   { 2162 /* fcmovnbe */, X86::CMOVNBE_F, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
 8634   { 2171 /* fcmovne */, X86::CMOVNE_F, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
 8635   { 2179 /* fcmovnu */, X86::CMOVNP_F, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
 8636   { 2187 /* fcmovu */, X86::CMOVP_F, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
 8638   { 2194 /* fcom */, X86::COM_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
 8640   { 2199 /* fcomi */, X86::COM_FIr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
 8642   { 2199 /* fcomi */, X86::COM_FIr, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
 8645   { 2211 /* fcomp */, X86::COMP_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
 8647   { 2217 /* fcompi */, X86::COM_FIPr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
 8649   { 2217 /* fcompi */, X86::COM_FIPr, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
 8656   { 2264 /* fdiv */, X86::DIV_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
 8658   { 2264 /* fdiv */, X86::DIVR_FrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
 8659   { 2264 /* fdiv */, X86::DIV_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
 8662   { 2275 /* fdivp */, X86::DIVR_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
 8664   { 2275 /* fdivp */, X86::DIVR_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
 8665   { 2275 /* fdivp */, X86::DIVR_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
 8666   { 2281 /* fdivr */, X86::DIVR_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
 8668   { 2281 /* fdivr */, X86::DIV_FrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
 8669   { 2281 /* fdivr */, X86::DIVR_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
 8672   { 2294 /* fdivrp */, X86::DIV_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
 8674   { 2294 /* fdivrp */, X86::DIV_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
 8675   { 2294 /* fdivrp */, X86::DIV_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
 8679   { 2320 /* ffree */, X86::FFREE, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
 8680   { 2326 /* ffreep */, X86::FFREEP, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
 8709   { 2611 /* fld */, X86::LD_Frr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
 8723   { 2687 /* fmul */, X86::MUL_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
 8725   { 2687 /* fmul */, X86::MUL_FrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
 8726   { 2687 /* fmul */, X86::MUL_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
 8729   { 2698 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
 8731   { 2698 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
 8732   { 2698 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
 8754   { 2828 /* fst */, X86::ST_Frr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
 8756   { 2837 /* fstp */, X86::ST_FPrr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
 8761   { 2865 /* fsub */, X86::SUB_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
 8763   { 2865 /* fsub */, X86::SUBR_FrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
 8764   { 2865 /* fsub */, X86::SUB_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
 8767   { 2876 /* fsubp */, X86::SUBR_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
 8769   { 2876 /* fsubp */, X86::SUBR_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
 8770   { 2876 /* fsubp */, X86::SUBR_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
 8771   { 2882 /* fsubr */, X86::SUBR_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
 8773   { 2882 /* fsubr */, X86::SUB_FrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
 8774   { 2882 /* fsubr */, X86::SUBR_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
 8777   { 2895 /* fsubrp */, X86::SUB_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
 8779   { 2895 /* fsubrp */, X86::SUB_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
 8780   { 2895 /* fsubrp */, X86::SUB_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
 8785   { 2920 /* fucom */, X86::UCOM_Fr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
 8787   { 2926 /* fucomi */, X86::UCOM_FIr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
 8789   { 2926 /* fucomi */, X86::UCOM_FIr, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
 8791   { 2933 /* fucomp */, X86::UCOM_FPr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
 8793   { 2940 /* fucompi */, X86::UCOM_FIPr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
 8795   { 2940 /* fucompi */, X86::UCOM_FIPr, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
 8799   { 2961 /* fxch */, X86::XCH_F, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23187   { 2093 /* fadd */, X86::ADD_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23191   { 2093 /* fadd */, X86::ADD_FST0r, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23192   { 2093 /* fadd */, X86::ADD_FrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
23194   { 2104 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23196   { 2104 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23197   { 2104 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
23201   { 2132 /* fcmovb */, X86::CMOVB_F, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23202   { 2139 /* fcmovbe */, X86::CMOVBE_F, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23203   { 2147 /* fcmove */, X86::CMOVE_F, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23204   { 2154 /* fcmovnb */, X86::CMOVNB_F, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23205   { 2162 /* fcmovnbe */, X86::CMOVNBE_F, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23206   { 2171 /* fcmovne */, X86::CMOVNE_F, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23207   { 2179 /* fcmovnu */, X86::CMOVNP_F, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23208   { 2187 /* fcmovu */, X86::CMOVP_F, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23210   { 2194 /* fcom */, X86::COM_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23214   { 2199 /* fcomi */, X86::COM_FIr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23216   { 2199 /* fcomi */, X86::COM_FIr, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23218   { 2211 /* fcomp */, X86::COMP_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23222   { 2217 /* fcompi */, X86::COM_FIPr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23224   { 2217 /* fcompi */, X86::COM_FIPr, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23228   { 2264 /* fdiv */, X86::DIV_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23232   { 2264 /* fdiv */, X86::DIV_FST0r, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23233   { 2264 /* fdiv */, X86::DIV_FrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
23235   { 2275 /* fdivp */, X86::DIV_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23237   { 2275 /* fdivp */, X86::DIV_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23238   { 2275 /* fdivp */, X86::DIV_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
23239   { 2281 /* fdivr */, X86::DIVR_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23243   { 2281 /* fdivr */, X86::DIVR_FST0r, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23244   { 2281 /* fdivr */, X86::DIVR_FrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
23246   { 2294 /* fdivrp */, X86::DIVR_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23248   { 2294 /* fdivrp */, X86::DIVR_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23249   { 2294 /* fdivrp */, X86::DIVR_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
23251   { 2320 /* ffree */, X86::FFREE, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23252   { 2326 /* ffreep */, X86::FFREEP, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23281   { 2611 /* fld */, X86::LD_Frr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23295   { 2687 /* fmul */, X86::MUL_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23299   { 2687 /* fmul */, X86::MUL_FST0r, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23300   { 2687 /* fmul */, X86::MUL_FrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
23302   { 2698 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23304   { 2698 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23305   { 2698 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
23326   { 2828 /* fst */, X86::ST_Frr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23329   { 2837 /* fstp */, X86::ST_FPrr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23333   { 2865 /* fsub */, X86::SUB_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23337   { 2865 /* fsub */, X86::SUB_FST0r, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23338   { 2865 /* fsub */, X86::SUB_FrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
23340   { 2876 /* fsubp */, X86::SUB_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23342   { 2876 /* fsubp */, X86::SUB_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23343   { 2876 /* fsubp */, X86::SUB_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
23344   { 2882 /* fsubr */, X86::SUBR_FST0r, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23348   { 2882 /* fsubr */, X86::SUBR_FST0r, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23349   { 2882 /* fsubr */, X86::SUBR_FrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
23351   { 2895 /* fsubrp */, X86::SUBR_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23353   { 2895 /* fsubrp */, X86::SUBR_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23354   { 2895 /* fsubrp */, X86::SUBR_FPrST0, Convert__Reg1_0, AMFBS_None, { MCK_RST, MCK_ST0 }, },
23357   { 2920 /* fucom */, X86::UCOM_Fr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23359   { 2926 /* fucomi */, X86::UCOM_FIr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23361   { 2926 /* fucomi */, X86::UCOM_FIr, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23363   { 2933 /* fucomp */, X86::UCOM_FPr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23365   { 2940 /* fucompi */, X86::UCOM_FIPr, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },
23367   { 2940 /* fucompi */, X86::UCOM_FIPr, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23371   { 2961 /* fxch */, X86::XCH_F, Convert__Reg1_0, AMFBS_None, { MCK_RST }, },