|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/X86/X86GenAsmMatcher.inc 5651 case MCK_GR8: return true;
5667 case MCK_GR8: return true;
6201 case MCK_GR8: return true;
6208 case MCK_GR8: return true;
6369 return B == MCK_GR8;
7094 case X86::SIL: OpKind = MCK_GR8; break;
7095 case X86::DIL: OpKind = MCK_GR8; break;
7096 case X86::BPL: OpKind = MCK_GR8; break;
7097 case X86::SPL: OpKind = MCK_GR8; break;
7098 case X86::R8B: OpKind = MCK_GR8; break;
7099 case X86::R9B: OpKind = MCK_GR8; break;
7100 case X86::R10B: OpKind = MCK_GR8; break;
7101 case X86::R11B: OpKind = MCK_GR8; break;
7102 case X86::R12B: OpKind = MCK_GR8; break;
7103 case X86::R13B: OpKind = MCK_GR8; break;
7104 case X86::R14B: OpKind = MCK_GR8; break;
7105 case X86::R15B: OpKind = MCK_GR8; break;
7489 case MCK_GR8: return "MCK_GR8";
7970 { 20 /* adcb */, X86::ADC8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
7970 { 20 /* adcb */, X86::ADC8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
7971 { 20 /* adcb */, X86::ADC8mr, Convert__Mem85_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
7973 { 20 /* adcb */, X86::ADC8ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR8 }, },
7975 { 20 /* adcb */, X86::ADC8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
8007 { 61 /* addb */, X86::ADD8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
8007 { 61 /* addb */, X86::ADD8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
8008 { 61 /* addb */, X86::ADD8mr, Convert__Mem85_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
8010 { 61 /* addb */, X86::ADD8ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR8 }, },
8012 { 61 /* addb */, X86::ADD8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
8068 { 203 /* andb */, X86::AND8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
8068 { 203 /* andb */, X86::AND8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
8069 { 203 /* andb */, X86::AND8mr, Convert__Mem85_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
8071 { 203 /* andb */, X86::AND8ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR8 }, },
8073 { 203 /* andb */, X86::AND8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
8290 { 824 /* clrb */, X86::XOR8rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR8 }, },
8400 { 1352 /* cmpb */, X86::CMP8rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
8400 { 1352 /* cmpb */, X86::CMP8rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
8401 { 1352 /* cmpb */, X86::CMP8mr, Convert__Mem85_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
8403 { 1352 /* cmpb */, X86::CMP8ri, Convert__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR8 }, },
8405 { 1352 /* cmpb */, X86::CMP8rm, Convert__Reg1_1__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
8447 { 1454 /* cmpxchgb */, X86::CMPXCHG8rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
8447 { 1454 /* cmpxchgb */, X86::CMPXCHG8rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
8448 { 1454 /* cmpxchgb */, X86::CMPXCHG8rm, Convert__Mem85_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
8461 { 1525 /* crc32b */, X86::CRC32r32r8, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR32 }, },
8462 { 1525 /* crc32b */, X86::CRC32r64r8, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR64 }, },
8555 { 1922 /* decb */, X86::DEC8r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
8565 { 1946 /* divb */, X86::DIV8r, Convert__Reg1_0, AMFBS_None, { MCK_GR8 }, },
8567 { 1946 /* divb */, X86::DIV8r, Convert__Reg1_0, AMFBS_None, { MCK_GR8, MCK_AL }, },
8824 { 3110 /* idivb */, X86::IDIV8r, Convert__Reg1_0, AMFBS_None, { MCK_GR8 }, },
8826 { 3110 /* idivb */, X86::IDIV8r, Convert__Reg1_0, AMFBS_None, { MCK_GR8, MCK_AL }, },
8840 { 3139 /* imulb */, X86::IMUL8r, Convert__Reg1_0, AMFBS_None, { MCK_GR8 }, },
8876 { 3174 /* incb */, X86::INC8r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
9155 { 4337 /* mov.s */, X86::MOV8rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
9155 { 4337 /* mov.s */, X86::MOV8rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
9175 { 4414 /* movb */, X86::MOV8rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
9175 { 4414 /* movb */, X86::MOV8rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
9176 { 4414 /* movb */, X86::MOV8mr, Convert__Mem85_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
9177 { 4414 /* movb */, X86::MOV8ri, Convert__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR8 }, },
9181 { 4414 /* movb */, X86::MOV8rm, Convert__Reg1_1__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
9182 { 4419 /* movb.s */, X86::MOV8rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
9182 { 4419 /* movb.s */, X86::MOV8rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
9283 { 4708 /* movsbl */, X86::MOVSX32rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR32 }, },
9285 { 4715 /* movsbq */, X86::MOVSX64rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR64 }, },
9287 { 4722 /* movsbw */, X86::MOVSX16rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR16 }, },
9313 { 4814 /* movsx */, X86::MOVSX16rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR16 }, },
9314 { 4814 /* movsx */, X86::MOVSX32rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR32 }, },
9315 { 4814 /* movsx */, X86::MOVSX64rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR64 }, },
9339 { 4871 /* movzbl */, X86::MOVZX32rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR32 }, },
9341 { 4878 /* movzbq */, X86::MOVZX64rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR64 }, },
9343 { 4885 /* movzbw */, X86::MOVZX16rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR16 }, },
9351 { 4906 /* movzx */, X86::MOVZX16rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR16 }, },
9352 { 4906 /* movzx */, X86::MOVZX32rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR32 }, },
9353 { 4906 /* movzx */, X86::MOVZX64rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR64 }, },
9357 { 4924 /* mulb */, X86::MUL8r, Convert__Reg1_0, AMFBS_None, { MCK_GR8 }, },
9383 { 5002 /* negb */, X86::NEG8r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
9398 { 5045 /* notb */, X86::NOT8r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
9406 { 5068 /* orb */, X86::OR8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
9406 { 5068 /* orb */, X86::OR8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
9407 { 5068 /* orb */, X86::OR8mr, Convert__Mem85_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
9409 { 5068 /* orb */, X86::OR8ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR8 }, },
9411 { 5068 /* orb */, X86::OR8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
10000 { 6611 /* rclb */, X86::RCL8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
10002 { 6611 /* rclb */, X86::RCL8rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR8 }, },
10004 { 6611 /* rclb */, X86::RCL8ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR8 }, },
10028 { 6647 /* rcrb */, X86::RCR8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
10030 { 6647 /* rcrb */, X86::RCR8rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR8 }, },
10032 { 6647 /* rcrb */, X86::RCR8ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR8 }, },
10080 { 6889 /* rolb */, X86::ROL8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
10082 { 6889 /* rolb */, X86::ROL8rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR8 }, },
10084 { 6889 /* rolb */, X86::ROL8ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR8 }, },
10104 { 6913 /* rorb */, X86::ROR8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
10106 { 6913 /* rorb */, X86::ROR8rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR8 }, },
10108 { 6913 /* rorb */, X86::ROR8ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR8 }, },
10148 { 7025 /* sarb */, X86::SAR8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
10150 { 7025 /* sarb */, X86::SAR8rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR8 }, },
10152 { 7025 /* sarb */, X86::SAR8ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR8 }, },
10177 { 7078 /* sbbb */, X86::SBB8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
10177 { 7078 /* sbbb */, X86::SBB8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
10178 { 7078 /* sbbb */, X86::SBB8mr, Convert__Mem85_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
10180 { 7078 /* sbbb */, X86::SBB8ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR8 }, },
10182 { 7078 /* sbbb */, X86::SBB8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
10222 { 7133 /* seta */, X86::SETCCr, Convert__Reg1_0__imm_95_7, AMFBS_None, { MCK_GR8 }, },
10224 { 7138 /* setae */, X86::SETCCr, Convert__Reg1_0__imm_95_3, AMFBS_None, { MCK_GR8 }, },
10226 { 7144 /* setb */, X86::SETCCr, Convert__Reg1_0__imm_95_2, AMFBS_None, { MCK_GR8 }, },
10228 { 7149 /* setbe */, X86::SETCCr, Convert__Reg1_0__imm_95_6, AMFBS_None, { MCK_GR8 }, },
10230 { 7155 /* sete */, X86::SETCCr, Convert__Reg1_0__imm_95_4, AMFBS_None, { MCK_GR8 }, },
10232 { 7160 /* setg */, X86::SETCCr, Convert__Reg1_0__imm_95_15, AMFBS_None, { MCK_GR8 }, },
10234 { 7165 /* setge */, X86::SETCCr, Convert__Reg1_0__imm_95_13, AMFBS_None, { MCK_GR8 }, },
10236 { 7171 /* setl */, X86::SETCCr, Convert__Reg1_0__imm_95_12, AMFBS_None, { MCK_GR8 }, },
10238 { 7176 /* setle */, X86::SETCCr, Convert__Reg1_0__imm_95_14, AMFBS_None, { MCK_GR8 }, },
10240 { 7182 /* setne */, X86::SETCCr, Convert__Reg1_0__imm_95_5, AMFBS_None, { MCK_GR8 }, },
10242 { 7188 /* setno */, X86::SETCCr, Convert__Reg1_0__imm_95_1, AMFBS_None, { MCK_GR8 }, },
10244 { 7194 /* setnp */, X86::SETCCr, Convert__Reg1_0__imm_95_11, AMFBS_None, { MCK_GR8 }, },
10246 { 7200 /* setns */, X86::SETCCr, Convert__Reg1_0__imm_95_9, AMFBS_None, { MCK_GR8 }, },
10248 { 7206 /* seto */, X86::SETCCr, Convert__Reg1_0__imm_95_0, AMFBS_None, { MCK_GR8 }, },
10250 { 7211 /* setp */, X86::SETCCr, Convert__Reg1_0__imm_95_10, AMFBS_None, { MCK_GR8 }, },
10252 { 7216 /* sets */, X86::SETCCr, Convert__Reg1_0__imm_95_8, AMFBS_None, { MCK_GR8 }, },
10275 { 7342 /* shlb */, X86::SHL8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
10277 { 7342 /* shlb */, X86::SHL8rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR8 }, },
10279 { 7342 /* shlb */, X86::SHL8ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR8 }, },
10321 { 7406 /* shrb */, X86::SHR8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
10323 { 7406 /* shrb */, X86::SHR8rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR8 }, },
10325 { 7406 /* shrb */, X86::SHR8ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR8 }, },
10417 { 7688 /* subb */, X86::SUB8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
10417 { 7688 /* subb */, X86::SUB8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
10418 { 7688 /* subb */, X86::SUB8mr, Convert__Mem85_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
10420 { 7688 /* subb */, X86::SUB8ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR8 }, },
10422 { 7688 /* subb */, X86::SUB8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
10469 { 7833 /* testb */, X86::TEST8rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
10469 { 7833 /* testb */, X86::TEST8rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
10470 { 7833 /* testb */, X86::TEST8mr, Convert__Mem85_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
10472 { 7833 /* testb */, X86::TEST8ri, Convert__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR8 }, },
10474 { 7833 /* testb */, X86::TEST8mr, Convert__Mem85_0__Reg1_1, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
22460 { 16064 /* xaddb */, X86::XADD8rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
22460 { 16064 /* xaddb */, X86::XADD8rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
22461 { 16064 /* xaddb */, X86::XADD8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
22470 { 16100 /* xchgb */, X86::XCHG8rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
22470 { 16100 /* xchgb */, X86::XCHG8rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
22471 { 16100 /* xchgb */, X86::XCHG8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
22472 { 16100 /* xchgb */, X86::XCHG8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
22498 { 16196 /* xorb */, X86::XOR8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
22498 { 16196 /* xorb */, X86::XOR8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
22499 { 16196 /* xorb */, X86::XOR8mr, Convert__Mem85_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
22501 { 16196 /* xorb */, X86::XOR8ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR8 }, },
22503 { 16196 /* xorb */, X86::XOR8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
22582 { 16 /* adc */, X86::ADC8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
22582 { 16 /* adc */, X86::ADC8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
22583 { 16 /* adc */, X86::ADC8ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR8, MCK_Imm }, },
22584 { 16 /* adc */, X86::ADC8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
22594 { 16 /* adc */, X86::ADC8mr, Convert__Mem85_0__Reg1_1, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
22619 { 57 /* add */, X86::ADD8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
22619 { 57 /* add */, X86::ADD8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
22620 { 57 /* add */, X86::ADD8ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR8, MCK_Imm }, },
22621 { 57 /* add */, X86::ADD8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
22631 { 57 /* add */, X86::ADD8mr, Convert__Mem85_0__Reg1_1, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
22680 { 199 /* and */, X86::AND8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
22680 { 199 /* and */, X86::AND8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
22681 { 199 /* and */, X86::AND8ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR8, MCK_Imm }, },
22682 { 199 /* and */, X86::AND8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
22692 { 199 /* and */, X86::AND8mr, Convert__Mem85_0__Reg1_1, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
22885 { 820 /* clr */, X86::XOR8rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR8 }, },
23009 { 1348 /* cmp */, X86::CMP8rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
23009 { 1348 /* cmp */, X86::CMP8rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
23010 { 1348 /* cmp */, X86::CMP8ri, Convert__Reg1_0__Imm1_1, AMFBS_None, { MCK_GR8, MCK_Imm }, },
23011 { 1348 /* cmp */, X86::CMP8rm, Convert__Reg1_0__Mem85_1, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
23021 { 1348 /* cmp */, X86::CMP8mr, Convert__Mem85_0__Reg1_1, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
23042 { 1425 /* cmpxchg */, X86::CMPXCHG8rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
23042 { 1425 /* cmpxchg */, X86::CMPXCHG8rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
23046 { 1425 /* cmpxchg */, X86::CMPXCHG8rm, Convert__Mem85_0__Reg1_1, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
23057 { 1519 /* crc32 */, X86::CRC32r32r8, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR8 }, },
23062 { 1519 /* crc32 */, X86::CRC32r64r8, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR8 }, },
23132 { 1918 /* dec */, X86::DEC8r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
23140 { 1942 /* div */, X86::DIV8r, Convert__Reg1_0, AMFBS_None, { MCK_GR8 }, },
23145 { 1942 /* div */, X86::DIV8r, Convert__Reg1_1, AMFBS_None, { MCK_AL, MCK_GR8 }, },
23399 { 3105 /* idiv */, X86::IDIV8r, Convert__Reg1_0, AMFBS_None, { MCK_GR8 }, },
23404 { 3105 /* idiv */, X86::IDIV8r, Convert__Reg1_1, AMFBS_None, { MCK_AL, MCK_GR8 }, },
23415 { 3134 /* imul */, X86::IMUL8r, Convert__Reg1_0, AMFBS_None, { MCK_GR8 }, },
23457 { 3170 /* inc */, X86::INC8r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
23748 { 4333 /* mov */, X86::MOV8rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
23748 { 4333 /* mov */, X86::MOV8rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
23749 { 4333 /* mov */, X86::MOV8ri, Convert__Reg1_0__Imm1_1, AMFBS_None, { MCK_GR8, MCK_Imm }, },
23750 { 4333 /* mov */, X86::MOV8rm, Convert__Reg1_0__Mem85_1, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
23765 { 4333 /* mov */, X86::MOV8mr, Convert__Mem85_0__Reg1_1, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
23770 { 4337 /* mov.s */, X86::MOV8rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
23770 { 4337 /* mov.s */, X86::MOV8rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
23876 { 4814 /* movsx */, X86::MOVSX16rr8, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR8 }, },
23879 { 4814 /* movsx */, X86::MOVSX32rr8, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR8 }, },
23883 { 4814 /* movsx */, X86::MOVSX64rr8, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR8 }, },
23896 { 4906 /* movzx */, X86::MOVZX16rr8, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR8 }, },
23899 { 4906 /* movzx */, X86::MOVZX32rr8, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR8 }, },
23903 { 4906 /* movzx */, X86::MOVZX64rr8, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR8 }, },
23911 { 4920 /* mul */, X86::MUL8r, Convert__Reg1_0, AMFBS_None, { MCK_GR8 }, },
23937 { 4998 /* neg */, X86::NEG8r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
23952 { 5041 /* not */, X86::NOT8r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
23976 { 5065 /* or */, X86::OR8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
23976 { 5065 /* or */, X86::OR8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
23977 { 5065 /* or */, X86::OR8ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR8, MCK_Imm }, },
23978 { 5065 /* or */, X86::OR8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
23988 { 5065 /* or */, X86::OR8mr, Convert__Mem85_0__Reg1_1, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
24557 { 6607 /* rcl */, X86::RCL8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
24568 { 6607 /* rcl */, X86::RCL8rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8, MCK_CL }, },
24569 { 6607 /* rcl */, X86::RCL8ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR8, MCK_ImmUnsignedi8 }, },
24585 { 6643 /* rcr */, X86::RCR8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
24596 { 6643 /* rcr */, X86::RCR8rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8, MCK_CL }, },
24597 { 6643 /* rcr */, X86::RCR8ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR8, MCK_ImmUnsignedi8 }, },
24643 { 6885 /* rol */, X86::ROL8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
24654 { 6885 /* rol */, X86::ROL8rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8, MCK_CL }, },
24655 { 6885 /* rol */, X86::ROL8ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR8, MCK_ImmUnsignedi8 }, },
24667 { 6909 /* ror */, X86::ROR8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
24678 { 6909 /* ror */, X86::ROR8rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8, MCK_CL }, },
24679 { 6909 /* ror */, X86::ROR8ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR8, MCK_ImmUnsignedi8 }, },
24711 { 7021 /* sar */, X86::SAR8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
24722 { 7021 /* sar */, X86::SAR8rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8, MCK_CL }, },
24723 { 7021 /* sar */, X86::SAR8ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR8, MCK_ImmUnsignedi8 }, },
24756 { 7074 /* sbb */, X86::SBB8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
24756 { 7074 /* sbb */, X86::SBB8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
24757 { 7074 /* sbb */, X86::SBB8ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR8, MCK_Imm }, },
24758 { 7074 /* sbb */, X86::SBB8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
24768 { 7074 /* sbb */, X86::SBB8mr, Convert__Mem85_0__Reg1_1, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
24786 { 7133 /* seta */, X86::SETCCr, Convert__Reg1_0__imm_95_7, AMFBS_None, { MCK_GR8 }, },
24788 { 7138 /* setae */, X86::SETCCr, Convert__Reg1_0__imm_95_3, AMFBS_None, { MCK_GR8 }, },
24790 { 7144 /* setb */, X86::SETCCr, Convert__Reg1_0__imm_95_2, AMFBS_None, { MCK_GR8 }, },
24792 { 7149 /* setbe */, X86::SETCCr, Convert__Reg1_0__imm_95_6, AMFBS_None, { MCK_GR8 }, },
24794 { 7155 /* sete */, X86::SETCCr, Convert__Reg1_0__imm_95_4, AMFBS_None, { MCK_GR8 }, },
24796 { 7160 /* setg */, X86::SETCCr, Convert__Reg1_0__imm_95_15, AMFBS_None, { MCK_GR8 }, },
24798 { 7165 /* setge */, X86::SETCCr, Convert__Reg1_0__imm_95_13, AMFBS_None, { MCK_GR8 }, },
24800 { 7171 /* setl */, X86::SETCCr, Convert__Reg1_0__imm_95_12, AMFBS_None, { MCK_GR8 }, },
24802 { 7176 /* setle */, X86::SETCCr, Convert__Reg1_0__imm_95_14, AMFBS_None, { MCK_GR8 }, },
24804 { 7182 /* setne */, X86::SETCCr, Convert__Reg1_0__imm_95_5, AMFBS_None, { MCK_GR8 }, },
24806 { 7188 /* setno */, X86::SETCCr, Convert__Reg1_0__imm_95_1, AMFBS_None, { MCK_GR8 }, },
24808 { 7194 /* setnp */, X86::SETCCr, Convert__Reg1_0__imm_95_11, AMFBS_None, { MCK_GR8 }, },
24810 { 7200 /* setns */, X86::SETCCr, Convert__Reg1_0__imm_95_9, AMFBS_None, { MCK_GR8 }, },
24812 { 7206 /* seto */, X86::SETCCr, Convert__Reg1_0__imm_95_0, AMFBS_None, { MCK_GR8 }, },
24814 { 7211 /* setp */, X86::SETCCr, Convert__Reg1_0__imm_95_10, AMFBS_None, { MCK_GR8 }, },
24816 { 7216 /* sets */, X86::SETCCr, Convert__Reg1_0__imm_95_8, AMFBS_None, { MCK_GR8 }, },
24842 { 7338 /* shl */, X86::SHL8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
24853 { 7338 /* shl */, X86::SHL8rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8, MCK_CL }, },
24854 { 7338 /* shl */, X86::SHL8ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR8, MCK_ImmUnsignedi8 }, },
24888 { 7402 /* shr */, X86::SHR8r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8 }, },
24899 { 7402 /* shr */, X86::SHR8rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR8, MCK_CL }, },
24900 { 7402 /* shr */, X86::SHR8ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR8, MCK_ImmUnsignedi8 }, },
25004 { 7684 /* sub */, X86::SUB8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
25004 { 7684 /* sub */, X86::SUB8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
25005 { 7684 /* sub */, X86::SUB8ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR8, MCK_Imm }, },
25006 { 7684 /* sub */, X86::SUB8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
25016 { 7684 /* sub */, X86::SUB8mr, Convert__Mem85_0__Reg1_1, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
25050 { 7828 /* test */, X86::TEST8rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
25050 { 7828 /* test */, X86::TEST8rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
25051 { 7828 /* test */, X86::TEST8ri, Convert__Reg1_0__Imm1_1, AMFBS_None, { MCK_GR8, MCK_Imm }, },
25052 { 7828 /* test */, X86::TEST8mr, Convert__Mem85_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
25059 { 7828 /* test */, X86::TEST8mr, Convert__Mem85_0__Reg1_1, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
36831 { 16059 /* xadd */, X86::XADD8rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
36831 { 16059 /* xadd */, X86::XADD8rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
36835 { 16059 /* xadd */, X86::XADD8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
36852 { 16095 /* xchg */, X86::XCHG8rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
36852 { 16095 /* xchg */, X86::XCHG8rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
36853 { 16095 /* xchg */, X86::XCHG8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
36857 { 16095 /* xchg */, X86::XCHG8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },
36885 { 16192 /* xor */, X86::XOR8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
36885 { 16192 /* xor */, X86::XOR8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR8, MCK_GR8 }, },
36886 { 16192 /* xor */, X86::XOR8ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR8, MCK_Imm }, },
36887 { 16192 /* xor */, X86::XOR8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, AMFBS_None, { MCK_GR8, MCK_Mem8 }, },
36897 { 16192 /* xor */, X86::XOR8mr, Convert__Mem85_0__Reg1_1, AMFBS_None, { MCK_Mem8, MCK_GR8 }, },