reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/X86/X86GenAsmMatcher.inc
 6773   case MCK_GR32orGR64: {
 7506   case MCK_GR32orGR64: return "MCK_GR32orGR64";
 8608   { 2066 /* extractps */, X86::EXTRACTPSrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
 9243   { 4580 /* movmskpd */, X86::MOVMSKPDrr, Convert__GR32orGR641_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32orGR64 }, },
 9244   { 4589 /* movmskps */, X86::MOVMSKPSrr, Convert__GR32orGR641_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32orGR64 }, },
 9600   { 5520 /* pextrb */, X86::PEXTRBrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
 9606   { 5541 /* pextrw */, X86::MMX_PEXTRWrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR64, MCK_GR32orGR64 }, },
 9607   { 5541 /* pextrw */, X86::PEXTRWrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
 9677   { 5750 /* pinsrb */, X86::PINSRBrr, Convert__Reg1_2__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32 }, },
 9683   { 5771 /* pinsrw */, X86::MMX_PINSRWrr, Convert__Reg1_2__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_VR64 }, },
 9684   { 5771 /* pinsrw */, X86::PINSRWrr, Convert__Reg1_2__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32 }, },
 9727   { 5880 /* pmovmskb */, X86::MMX_PMOVMSKBrr, Convert__GR32orGR641_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_GR32orGR64 }, },
 9728   { 5880 /* pmovmskb */, X86::PMOVMSKBrr, Convert__GR32orGR641_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32orGR64 }, },
10493   { 7857 /* tpause */, X86::TPAUSE, Convert__GR32orGR641_0, AMFBS_None, { MCK_GR32orGR64 }, },
10513   { 7945 /* umwait */, X86::UMWAIT, Convert__GR32orGR641_0, AMFBS_None, { MCK_GR32orGR64 }, },
12604   { 9732 /* vextractps */, X86::VEXTRACTPSrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
15264   { 11792 /* vmovmskpd */, X86::VMOVMSKPDrr, Convert__GR32orGR641_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32orGR64 }, },
15265   { 11792 /* vmovmskpd */, X86::VMOVMSKPDYrr, Convert__GR32orGR641_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_GR32orGR64 }, },
15266   { 11802 /* vmovmskps */, X86::VMOVMSKPSrr, Convert__GR32orGR641_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32orGR64 }, },
15267   { 11802 /* vmovmskps */, X86::VMOVMSKPSYrr, Convert__GR32orGR641_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_GR32orGR64 }, },
17695   { 13177 /* vpextrb */, X86::VPEXTRBrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
17697   { 13177 /* vpextrb */, X86::VPEXTRBZrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_GR32orGR64 }, },
17707   { 13201 /* vpextrw */, X86::VPEXTRWrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
17709   { 13201 /* vpextrw */, X86::VPEXTRWZrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_GR32orGR64 }, },
17787   { 13456 /* vpinsrb */, X86::VPINSRBrr, Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32, MCK_FR32 }, },
17788   { 13456 /* vpinsrb */, X86::VPINSRBZrr, Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32X, MCK_FR32X }, },
17799   { 13480 /* vpinsrw */, X86::VPINSRWrr, Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32, MCK_FR32 }, },
17800   { 13480 /* vpinsrw */, X86::VPINSRWZrr, Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32X, MCK_FR32X }, },
18443   { 13890 /* vpmovmskb */, X86::VPMOVMSKBrr, Convert__GR32orGR641_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32orGR64 }, },
18444   { 13890 /* vpmovmskb */, X86::VPMOVMSKBYrr, Convert__GR32orGR641_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_GR32orGR64 }, },
23180   { 2066 /* extractps */, X86::EXTRACTPSrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
23832   { 4580 /* movmskpd */, X86::MOVMSKPDrr, Convert__GR32orGR641_0__Reg1_1, AMFBS_None, { MCK_GR32orGR64, MCK_FR32 }, },
23833   { 4589 /* movmskps */, X86::MOVMSKPSrr, Convert__GR32orGR641_0__Reg1_1, AMFBS_None, { MCK_GR32orGR64, MCK_FR32 }, },
24154   { 5520 /* pextrb */, X86::PEXTRBrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
24160   { 5541 /* pextrw */, X86::MMX_PEXTRWrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32orGR64, MCK_VR64, MCK_ImmUnsignedi8 }, },
24161   { 5541 /* pextrw */, X86::PEXTRWrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
24231   { 5750 /* pinsrb */, X86::PINSRBrr, Convert__Reg1_0__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
24237   { 5771 /* pinsrw */, X86::MMX_PINSRWrr, Convert__Reg1_0__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_2, AMFBS_None, { MCK_VR64, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
24239   { 5771 /* pinsrw */, X86::PINSRWrr, Convert__Reg1_0__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
24281   { 5880 /* pmovmskb */, X86::MMX_PMOVMSKBrr, Convert__GR32orGR641_0__Reg1_1, AMFBS_None, { MCK_GR32orGR64, MCK_VR64 }, },
24282   { 5880 /* pmovmskb */, X86::PMOVMSKBrr, Convert__GR32orGR641_0__Reg1_1, AMFBS_None, { MCK_GR32orGR64, MCK_FR32 }, },
25061   { 7857 /* tpause */, X86::TPAUSE, Convert__GR32orGR641_0, AMFBS_None, { MCK_GR32orGR64 }, },
25081   { 7945 /* umwait */, X86::UMWAIT, Convert__GR32orGR641_0, AMFBS_None, { MCK_GR32orGR64 }, },
26997   { 9732 /* vextractps */, X86::VEXTRACTPSrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
29632   { 11792 /* vmovmskpd */, X86::VMOVMSKPDrr, Convert__GR32orGR641_0__Reg1_1, AMFBS_None, { MCK_GR32orGR64, MCK_FR32 }, },
29633   { 11792 /* vmovmskpd */, X86::VMOVMSKPDYrr, Convert__GR32orGR641_0__Reg1_1, AMFBS_None, { MCK_GR32orGR64, MCK_VR256 }, },
29634   { 11802 /* vmovmskps */, X86::VMOVMSKPSrr, Convert__GR32orGR641_0__Reg1_1, AMFBS_None, { MCK_GR32orGR64, MCK_FR32 }, },
29635   { 11802 /* vmovmskps */, X86::VMOVMSKPSYrr, Convert__GR32orGR641_0__Reg1_1, AMFBS_None, { MCK_GR32orGR64, MCK_VR256 }, },
32063   { 13177 /* vpextrb */, X86::VPEXTRBrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
32064   { 13177 /* vpextrb */, X86::VPEXTRBZrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32orGR64, MCK_FR32X, MCK_ImmUnsignedi8 }, },
32075   { 13201 /* vpextrw */, X86::VPEXTRWrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
32076   { 13201 /* vpextrw */, X86::VPEXTRWZrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32orGR64, MCK_FR32X, MCK_ImmUnsignedi8 }, },
32155   { 13456 /* vpinsrb */, X86::VPINSRBrr, Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
32157   { 13456 /* vpinsrb */, X86::VPINSRBZrr, Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
32167   { 13480 /* vpinsrw */, X86::VPINSRWrr, Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
32169   { 13480 /* vpinsrw */, X86::VPINSRWZrr, Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
32811   { 13890 /* vpmovmskb */, X86::VPMOVMSKBrr, Convert__GR32orGR641_0__Reg1_1, AMFBS_None, { MCK_GR32orGR64, MCK_FR32 }, },
32812   { 13890 /* vpmovmskb */, X86::VPMOVMSKBYrr, Convert__GR32orGR641_0__Reg1_1, AMFBS_None, { MCK_GR32orGR64, MCK_VR256 }, },