reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

 5507     case MCK_GR32: return true;
 5522     case MCK_GR32: return true;
 5537     case MCK_GR32: return true;
 5550     case MCK_GR32: return true;
 5695     case MCK_GR32: return true;
 5711     case MCK_GR32: return true;
 5729     case MCK_GR32: return true;
 5747     case MCK_GR32: return true;
 5980     case MCK_GR32: return true;
 5991     case MCK_GR32: return true;
 6004     case MCK_GR32: return true;
 6018     case MCK_GR32: return true;
 6034     case MCK_GR32: return true;
 6047     case MCK_GR32: return true;
 6060     case MCK_GR32: return true;
 6102     case MCK_GR32: return true;
 6169     case MCK_GR32: return true;
 6180     case MCK_GR32: return true;
 6302     case MCK_GR32: return true;
 6362     case MCK_GR32: return true;
 6398     case MCK_GR32: return true;
 6417   case MCK_GR32:
 7481   case MCK_GR32: return "MCK_GR32";
 7976   { 25 /* adcl */, X86::ADC32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 7976   { 25 /* adcl */, X86::ADC32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 7977   { 25 /* adcl */, X86::ADC32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
 7979   { 25 /* adcl */, X86::ADC32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_GR32 }, },
 7982   { 25 /* adcl */, X86::ADC32ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32 }, },
 7984   { 25 /* adcl */, X86::ADC32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 8003   { 45 /* adcxl */, X86::ADCX32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8003   { 45 /* adcxl */, X86::ADCX32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8004   { 45 /* adcxl */, X86::ADCX32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 8013   { 66 /* addl */, X86::ADD32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8013   { 66 /* addl */, X86::ADD32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8014   { 66 /* addl */, X86::ADD32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
 8016   { 66 /* addl */, X86::ADD32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_GR32 }, },
 8019   { 66 /* addl */, X86::ADD32ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32 }, },
 8021   { 66 /* addl */, X86::ADD32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 8052   { 128 /* adoxl */, X86::ADOX32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8052   { 128 /* adoxl */, X86::ADOX32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8053   { 128 /* adoxl */, X86::ADOX32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 8074   { 208 /* andl */, X86::AND32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8074   { 208 /* andl */, X86::AND32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8075   { 208 /* andl */, X86::AND32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
 8077   { 208 /* andl */, X86::AND32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_GR32 }, },
 8080   { 208 /* andl */, X86::AND32ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32 }, },
 8082   { 208 /* andl */, X86::AND32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 8083   { 218 /* andnl */, X86::ANDN32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
 8083   { 218 /* andnl */, X86::ANDN32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
 8083   { 218 /* andnl */, X86::ANDN32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
 8084   { 218 /* andnl */, X86::ANDN32rm, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32, MCK_GR32 }, },
 8084   { 218 /* andnl */, X86::ANDN32rm, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32, MCK_GR32 }, },
 8115   { 277 /* bextrl */, X86::BEXTR32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
 8115   { 277 /* bextrl */, X86::BEXTR32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
 8115   { 277 /* bextrl */, X86::BEXTR32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
 8116   { 277 /* bextrl */, X86::BEXTR32rm, Convert__Reg1_2__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
 8116   { 277 /* bextrl */, X86::BEXTR32rm, Convert__Reg1_2__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
 8117   { 277 /* bextrl */, X86::BEXTRI32ri, Convert__Reg1_2__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32, MCK_GR32 }, },
 8117   { 277 /* bextrl */, X86::BEXTRI32ri, Convert__Reg1_2__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32, MCK_GR32 }, },
 8118   { 277 /* bextrl */, X86::BEXTRI32mi, Convert__Reg1_2__Mem325_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem32, MCK_GR32 }, },
 8123   { 299 /* blcfilll */, X86::BLCFILL32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8123   { 299 /* blcfilll */, X86::BLCFILL32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8124   { 299 /* blcfilll */, X86::BLCFILL32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 8127   { 328 /* blcicl */, X86::BLCIC32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8127   { 328 /* blcicl */, X86::BLCIC32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8128   { 328 /* blcicl */, X86::BLCIC32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 8131   { 342 /* blcil */, X86::BLCI32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8131   { 342 /* blcil */, X86::BLCI32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8132   { 342 /* blcil */, X86::BLCI32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 8135   { 361 /* blcmskl */, X86::BLCMSK32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8135   { 361 /* blcmskl */, X86::BLCMSK32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8136   { 361 /* blcmskl */, X86::BLCMSK32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 8139   { 382 /* blcsl */, X86::BLCS32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8139   { 382 /* blcsl */, X86::BLCS32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8140   { 382 /* blcsl */, X86::BLCS32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 8155   { 436 /* blsfilll */, X86::BLSFILL32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8155   { 436 /* blsfilll */, X86::BLSFILL32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8156   { 436 /* blsfilll */, X86::BLSFILL32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 8159   { 465 /* blsicl */, X86::BLSIC32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8159   { 465 /* blsicl */, X86::BLSIC32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8160   { 465 /* blsicl */, X86::BLSIC32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 8163   { 479 /* blsil */, X86::BLSI32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8163   { 479 /* blsil */, X86::BLSI32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8164   { 479 /* blsil */, X86::BLSI32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 8167   { 498 /* blsmskl */, X86::BLSMSK32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8167   { 498 /* blsmskl */, X86::BLSMSK32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8168   { 498 /* blsmskl */, X86::BLSMSK32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 8171   { 519 /* blsrl */, X86::BLSR32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8171   { 519 /* blsrl */, X86::BLSR32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8172   { 519 /* blsrl */, X86::BLSR32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 8175   { 531 /* bndcl */, X86::BNDCL32rr, Convert__Reg1_1__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32, MCK_BNDR }, },
 8179   { 537 /* bndcn */, X86::BNDCN32rr, Convert__Reg1_1__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32, MCK_BNDR }, },
 8183   { 543 /* bndcu */, X86::BNDCU32rr, Convert__Reg1_1__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32, MCK_BNDR }, },
 8197   { 576 /* bound */, X86::BOUNDS32rm, Convert__Reg1_0__Mem325_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_Mem32 }, },
 8198   { 586 /* bsfl */, X86::BSF32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8198   { 586 /* bsfl */, X86::BSF32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8199   { 586 /* bsfl */, X86::BSF32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 8204   { 605 /* bsrl */, X86::BSR32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8204   { 605 /* bsrl */, X86::BSR32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8205   { 605 /* bsrl */, X86::BSR32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 8210   { 626 /* bswapl */, X86::BSWAP32r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
 8214   { 647 /* btcl */, X86::BTC32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8214   { 647 /* btcl */, X86::BTC32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8215   { 647 /* btcl */, X86::BTC32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
 8216   { 647 /* btcl */, X86::BTC32ri8, Convert__Reg1_1__Tie0_2_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32 }, },
 8226   { 662 /* btl */, X86::BT32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8226   { 662 /* btl */, X86::BT32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8227   { 662 /* btl */, X86::BT32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
 8228   { 662 /* btl */, X86::BT32ri8, Convert__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32 }, },
 8235   { 674 /* btrl */, X86::BTR32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8235   { 674 /* btrl */, X86::BTR32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8236   { 674 /* btrl */, X86::BTR32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
 8237   { 674 /* btrl */, X86::BTR32ri8, Convert__Reg1_1__Tie0_2_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32 }, },
 8248   { 693 /* btsl */, X86::BTS32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8248   { 693 /* btsl */, X86::BTS32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8249   { 693 /* btsl */, X86::BTS32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
 8250   { 693 /* btsl */, X86::BTS32ri8, Convert__Reg1_1__Tie0_2_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32 }, },
 8264   { 717 /* bzhil */, X86::BZHI32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
 8264   { 717 /* bzhil */, X86::BZHI32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
 8264   { 717 /* bzhil */, X86::BZHI32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
 8265   { 717 /* bzhil */, X86::BZHI32rm, Convert__Reg1_2__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
 8265   { 717 /* bzhil */, X86::BZHI32rm, Convert__Reg1_2__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
 8271   { 734 /* calll */, X86::CALL32r, Convert__Reg1_1, AMFBS_Not64BitMode, { MCK__STAR_, MCK_GR32 }, },
 8291   { 829 /* clrl */, X86::XOR32rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR32 }, },
 8304   { 897 /* cmovael */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_3, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8304   { 897 /* cmovael */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_3, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8305   { 897 /* cmovael */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_3, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 8310   { 921 /* cmoval */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_7, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8310   { 921 /* cmoval */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_7, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8311   { 921 /* cmoval */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_7, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 8316   { 955 /* cmovbel */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_6, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8316   { 955 /* cmovbel */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_6, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8317   { 955 /* cmovbel */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_6, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 8322   { 979 /* cmovbl */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_2, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8322   { 979 /* cmovbl */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_2, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8323   { 979 /* cmovbl */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_2, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 8328   { 1006 /* cmovel */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_4, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8328   { 1006 /* cmovel */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_4, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8329   { 1006 /* cmovel */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_4, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 8334   { 1040 /* cmovgel */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_13, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8334   { 1040 /* cmovgel */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_13, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8335   { 1040 /* cmovgel */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_13, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 8340   { 1064 /* cmovgl */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_15, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8340   { 1064 /* cmovgl */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_15, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8341   { 1064 /* cmovgl */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_15, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 8346   { 1098 /* cmovlel */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_14, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8346   { 1098 /* cmovlel */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_14, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8347   { 1098 /* cmovlel */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_14, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 8352   { 1122 /* cmovll */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_12, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8352   { 1122 /* cmovll */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_12, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8353   { 1122 /* cmovll */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_12, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 8358   { 1150 /* cmovnel */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_5, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8358   { 1150 /* cmovnel */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_5, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8359   { 1150 /* cmovnel */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_5, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 8364   { 1181 /* cmovnol */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8364   { 1181 /* cmovnol */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8365   { 1181 /* cmovnol */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 8370   { 1212 /* cmovnpl */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_11, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8370   { 1212 /* cmovnpl */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_11, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8371   { 1212 /* cmovnpl */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_11, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 8376   { 1243 /* cmovnsl */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_9, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8376   { 1243 /* cmovnsl */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_9, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8377   { 1243 /* cmovnsl */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_9, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 8382   { 1273 /* cmovol */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8382   { 1273 /* cmovol */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8383   { 1273 /* cmovol */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 8388   { 1300 /* cmovpl */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_10, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8388   { 1300 /* cmovpl */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_10, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8389   { 1300 /* cmovpl */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_10, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 8394   { 1327 /* cmovsl */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_8, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8394   { 1327 /* cmovsl */, X86::CMOV32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_8, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8395   { 1327 /* cmovsl */, X86::CMOV32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0__imm_95_8, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 8406   { 1357 /* cmpl */, X86::CMP32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8406   { 1357 /* cmpl */, X86::CMP32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8407   { 1357 /* cmpl */, X86::CMP32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
 8409   { 1357 /* cmpl */, X86::CMP32ri8, Convert__Reg1_1__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_GR32 }, },
 8412   { 1357 /* cmpl */, X86::CMP32ri, Convert__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32 }, },
 8414   { 1357 /* cmpl */, X86::CMP32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 8449   { 1463 /* cmpxchgl */, X86::CMPXCHG32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8449   { 1463 /* cmpxchgl */, X86::CMPXCHG32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8450   { 1463 /* cmpxchgl */, X86::CMPXCHG32rm, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
 8461   { 1525 /* crc32b */, X86::CRC32r32r8, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR32 }, },
 8463   { 1525 /* crc32b */, X86::CRC32r32m8, Convert__Reg1_1__Tie0_2_2__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR32 }, },
 8465   { 1532 /* crc32l */, X86::CRC32r32r32, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8465   { 1532 /* crc32l */, X86::CRC32r32r32, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8466   { 1532 /* crc32l */, X86::CRC32r32m32, Convert__Reg1_1__Tie0_2_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 8469   { 1546 /* crc32w */, X86::CRC32r32r16, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR32 }, },
 8470   { 1546 /* crc32w */, X86::CRC32r32m16, Convert__Reg1_1__Tie0_2_2__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR32 }, },
 8492   { 1646 /* cvtsd2si */, X86::CVTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
 8494   { 1646 /* cvtsd2si */, X86::CVTSD2SIrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, },
 8496   { 1655 /* cvtsd2sil */, X86::CVTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
 8497   { 1655 /* cvtsd2sil */, X86::CVTSD2SIrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, },
 8502   { 1684 /* cvtsi2sd */, X86::CVTSI2SDrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
 8505   { 1693 /* cvtsi2sdl */, X86::CVTSI2SDrr_Int, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
 8509   { 1713 /* cvtsi2ss */, X86::CVTSI2SSrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
 8512   { 1722 /* cvtsi2ssl */, X86::CVTSI2SSrr_Int, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
 8518   { 1751 /* cvtss2si */, X86::CVTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
 8520   { 1751 /* cvtss2si */, X86::CVTSS2SIrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 8522   { 1760 /* cvtss2sil */, X86::CVTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
 8523   { 1760 /* cvtss2sil */, X86::CVTSS2SIrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 8534   { 1820 /* cvttsd2si */, X86::CVTTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
 8536   { 1820 /* cvttsd2si */, X86::CVTTSD2SIrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, },
 8538   { 1830 /* cvttsd2sil */, X86::CVTTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
 8539   { 1830 /* cvttsd2sil */, X86::CVTTSD2SIrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, },
 8542   { 1852 /* cvttss2si */, X86::CVTTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
 8544   { 1852 /* cvttss2si */, X86::CVTTSS2SIrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 8546   { 1862 /* cvttss2sil */, X86::CVTTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
 8547   { 1862 /* cvttss2sil */, X86::CVTTSS2SIrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 8557   { 1927 /* decl */, X86::DEC32r_alt, Convert__Reg1_0__Tie0_1_1, AMFBS_Not64BitMode, { MCK_GR32 }, },
 8558   { 1927 /* decl */, X86::DEC32r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
 8569   { 1951 /* divl */, X86::DIV32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
 8571   { 1951 /* divl */, X86::DIV32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32, MCK_EAX }, },
 8601   { 2042 /* enqcmd */, X86::ENQCMD32, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_GR32 }, },
 8604   { 2049 /* enqcmds */, X86::ENQCMDS32, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_GR32 }, },
 8828   { 3116 /* idivl */, X86::IDIV32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
 8830   { 3116 /* idivl */, X86::IDIV32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32, MCK_EAX }, },
 8842   { 3145 /* imull */, X86::IMUL32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
 8844   { 3145 /* imull */, X86::IMUL32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8844   { 3145 /* imull */, X86::IMUL32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 8845   { 3145 /* imull */, X86::IMUL32rri8, Convert__Reg1_1__Reg1_1__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_GR32 }, },
 8846   { 3145 /* imull */, X86::IMUL32rri, Convert__Reg1_1__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32 }, },
 8847   { 3145 /* imull */, X86::IMUL32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 8848   { 3145 /* imull */, X86::IMUL32rri8, Convert__Reg1_2__Reg1_1__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_GR32, MCK_GR32 }, },
 8848   { 3145 /* imull */, X86::IMUL32rri8, Convert__Reg1_2__Reg1_1__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_GR32, MCK_GR32 }, },
 8849   { 3145 /* imull */, X86::IMUL32rmi8, Convert__Reg1_2__Mem325_1__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_Mem32, MCK_GR32 }, },
 8850   { 3145 /* imull */, X86::IMUL32rri, Convert__Reg1_2__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32, MCK_GR32 }, },
 8850   { 3145 /* imull */, X86::IMUL32rri, Convert__Reg1_2__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32, MCK_GR32 }, },
 8851   { 3145 /* imull */, X86::IMUL32rmi, Convert__Reg1_2__Mem325_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem32, MCK_GR32 }, },
 8878   { 3179 /* incl */, X86::INC32r_alt, Convert__Reg1_0__Tie0_1_1, AMFBS_Not64BitMode, { MCK_GR32 }, },
 8879   { 3179 /* incl */, X86::INC32r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
 8883   { 3189 /* incsspd */, X86::INCSSPD, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
 8903   { 3274 /* invept */, X86::INVEPT32, Convert__Reg1_1__Mem1285_0, AMFBS_Not64BitMode, { MCK_Mem128, MCK_GR32 }, },
 8908   { 3296 /* invpcid */, X86::INVPCID32, Convert__Reg1_1__Mem1285_0, AMFBS_Not64BitMode, { MCK_Mem128, MCK_GR32 }, },
 8910   { 3304 /* invvpid */, X86::INVVPID32, Convert__Reg1_1__Mem1285_0, AMFBS_Not64BitMode, { MCK_Mem128, MCK_GR32 }, },
 8936   { 3391 /* jmpl */, X86::JMP32r, Convert__Reg1_1, AMFBS_Not64BitMode, { MCK__STAR_, MCK_GR32 }, },
 8965   { 3513 /* kmovb */, X86::KMOVBrk, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_GR32 }, },
 8967   { 3513 /* kmovb */, X86::KMOVBkr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VK1 }, },
 8970   { 3519 /* kmovd */, X86::KMOVDrk, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_GR32 }, },
 8972   { 3519 /* kmovd */, X86::KMOVDkr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VK1 }, },
 8980   { 3531 /* kmovw */, X86::KMOVWrk, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VK1, MCK_GR32 }, },
 8982   { 3531 /* kmovw */, X86::KMOVWkr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VK1 }, },
 9020   { 3805 /* larl */, X86::LAR32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 9020   { 3805 /* larl */, X86::LAR32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 9021   { 3805 /* larl */, X86::LAR32rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR32 }, },
 9022   { 3810 /* larq */, X86::LAR64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR64 }, },
 9037   { 3865 /* ldsl */, X86::LDS32rm, Convert__Reg1_1__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem, MCK_GR32 }, },
 9039   { 3879 /* leal */, X86::LEA32r, Convert__Reg1_1__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem, MCK_GR32 }, },
 9040   { 3879 /* leal */, X86::LEA64_32r, Convert__Reg1_1__Mem5_0, AMFBS_In64BitMode, { MCK_Mem, MCK_GR32 }, },
 9045   { 3904 /* lesl */, X86::LES32rm, Convert__Reg1_1__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem, MCK_GR32 }, },
 9048   { 3925 /* lfsl */, X86::LFS32rm, Convert__Reg1_1__Mem5_0, AMFBS_None, { MCK_Mem, MCK_GR32 }, },
 9054   { 3973 /* lgsl */, X86::LGS32rm, Convert__Reg1_1__Mem5_0, AMFBS_None, { MCK_Mem, MCK_GR32 }, },
 9071   { 4051 /* llwpcb */, X86::LLWPCB, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
 9097   { 4149 /* lsll */, X86::LSL32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 9097   { 4149 /* lsll */, X86::LSL32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 9098   { 4149 /* lsll */, X86::LSL32rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR32 }, },
 9099   { 4154 /* lslq */, X86::LSL64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR64 }, },
 9103   { 4168 /* lssl */, X86::LSS32rm, Convert__Reg1_1__Mem5_0, AMFBS_None, { MCK_Mem, MCK_GR32 }, },
 9108   { 4192 /* lwpins */, X86::LWPINS32rri, Convert__Reg1_2__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32, MCK_GR32 }, },
 9108   { 4192 /* lwpins */, X86::LWPINS32rri, Convert__Reg1_2__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32, MCK_GR32 }, },
 9109   { 4192 /* lwpins */, X86::LWPINS64rri, Convert__Reg1_2__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32, MCK_GR64 }, },
 9110   { 4192 /* lwpins */, X86::LWPINS32rmi, Convert__Reg1_2__Mem325_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem32, MCK_GR32 }, },
 9112   { 4199 /* lwpval */, X86::LWPVAL32rri, Convert__Reg1_2__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32, MCK_GR32 }, },
 9112   { 4199 /* lwpval */, X86::LWPVAL32rri, Convert__Reg1_2__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32, MCK_GR32 }, },
 9113   { 4199 /* lwpval */, X86::LWPVAL64rri, Convert__Reg1_2__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32, MCK_GR64 }, },
 9114   { 4199 /* lwpval */, X86::LWPVAL32rmi, Convert__Reg1_2__Mem325_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem32, MCK_GR32 }, },
 9116   { 4212 /* lzcntl */, X86::LZCNT32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 9116   { 4212 /* lzcntl */, X86::LZCNT32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 9117   { 4212 /* lzcntl */, X86::LZCNT32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 9153   { 4337 /* mov.s */, X86::MOV32rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 9153   { 4337 /* mov.s */, X86::MOV32rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 9183   { 4432 /* movbel */, X86::MOVBE32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
 9184   { 4432 /* movbel */, X86::MOVBE32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 9189   { 4453 /* movd */, X86::MMX_MOVD64grr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_GR32 }, },
 9192   { 4453 /* movd */, X86::MOVPDI2DIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
 9195   { 4453 /* movd */, X86::MMX_MOVD64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR64 }, },
 9196   { 4453 /* movd */, X86::MOVDI2PDIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
 9204   { 4466 /* movdir64b */, X86::MOVDIR64B32, Convert__Reg1_1__Mem5125_0, AMFBS_None, { MCK_Mem512, MCK_GR32 }, },
 9206   { 4476 /* movdiri */, X86::MOVDIRI32, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
 9224   { 4546 /* movl */, X86::MOV32rs, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_SEGMENT_REG, MCK_GR32 }, },
 9225   { 4546 /* movl */, X86::MOV32rc, Convert__Reg1_1__Reg1_0, AMFBS_Not64BitMode, { MCK_CONTROL_REG, MCK_GR32 }, },
 9226   { 4546 /* movl */, X86::MOV32rd, Convert__Reg1_1__Reg1_0, AMFBS_Not64BitMode, { MCK_DEBUG_REG, MCK_GR32 }, },
 9227   { 4546 /* movl */, X86::MOV32sr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_SEGMENT_REG }, },
 9228   { 4546 /* movl */, X86::MOV32cr, Convert__Reg1_1__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32, MCK_CONTROL_REG }, },
 9229   { 4546 /* movl */, X86::MOV32dr, Convert__Reg1_1__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32, MCK_DEBUG_REG }, },
 9230   { 4546 /* movl */, X86::MOV32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 9230   { 4546 /* movl */, X86::MOV32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 9231   { 4546 /* movl */, X86::MOV32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
 9232   { 4546 /* movl */, X86::MOV32ri, Convert__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32 }, },
 9236   { 4546 /* movl */, X86::MOV32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 9237   { 4551 /* movl.s */, X86::MOV32rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 9237   { 4551 /* movl.s */, X86::MOV32rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 9247   { 4622 /* movntil */, X86::MOVNTImr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
 9283   { 4708 /* movsbl */, X86::MOVSX32rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR32 }, },
 9284   { 4708 /* movsbl */, X86::MOVSX32rm8, Convert__Reg1_1__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR32 }, },
 9298   { 4767 /* movslq */, X86::MOVSX64rr32, Convert__Reg1_1__Reg1_0, AMFBS_In64BitMode, { MCK_GR32, MCK_GR64 }, },
 9306   { 4800 /* movswl */, X86::MOVSX32rr16, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR32 }, },
 9307   { 4800 /* movswl */, X86::MOVSX32rm16, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR32 }, },
 9310   { 4814 /* movsx */, X86::MOVSX32rr16, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR32 }, },
 9312   { 4814 /* movsx */, X86::MOVSX64rr32, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR64 }, },
 9314   { 4814 /* movsx */, X86::MOVSX32rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR32 }, },
 9339   { 4871 /* movzbl */, X86::MOVZX32rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR32 }, },
 9340   { 4871 /* movzbl */, X86::MOVZX32rm8, Convert__Reg1_1__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR32 }, },
 9345   { 4892 /* movzwl */, X86::MOVZX32rr16, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR32 }, },
 9346   { 4892 /* movzwl */, X86::MOVZX32rm16, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR32 }, },
 9349   { 4906 /* movzx */, X86::MOVZX32rr16, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR32 }, },
 9352   { 4906 /* movzx */, X86::MOVZX32rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR32 }, },
 9359   { 4929 /* mull */, X86::MUL32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
 9373   { 4973 /* mulxl */, X86::MULX32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
 9373   { 4973 /* mulxl */, X86::MULX32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
 9373   { 4973 /* mulxl */, X86::MULX32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
 9374   { 4973 /* mulxl */, X86::MULX32rm, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32, MCK_GR32 }, },
 9374   { 4973 /* mulxl */, X86::MULX32rm, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32, MCK_GR32 }, },
 9385   { 5007 /* negl */, X86::NEG32r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
 9392   { 5026 /* nopl */, X86::NOOPLr, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
 9400   { 5050 /* notl */, X86::NOT32r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
 9412   { 5072 /* orl */, X86::OR32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 9412   { 5072 /* orl */, X86::OR32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 9413   { 5072 /* orl */, X86::OR32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
 9415   { 5072 /* orl */, X86::OR32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_GR32 }, },
 9418   { 5072 /* orl */, X86::OR32ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32 }, },
 9420   { 5072 /* orl */, X86::OR32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 9592   { 5491 /* pdepl */, X86::PDEP32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
 9592   { 5491 /* pdepl */, X86::PDEP32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
 9592   { 5491 /* pdepl */, X86::PDEP32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
 9593   { 5491 /* pdepl */, X86::PDEP32rm, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32, MCK_GR32 }, },
 9593   { 5491 /* pdepl */, X86::PDEP32rm, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32, MCK_GR32 }, },
 9596   { 5508 /* pextl */, X86::PEXT32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
 9596   { 5508 /* pextl */, X86::PEXT32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
 9596   { 5508 /* pextl */, X86::PEXT32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
 9597   { 5508 /* pextl */, X86::PEXT32rm, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32, MCK_GR32 }, },
 9597   { 5508 /* pextl */, X86::PEXT32rm, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32, MCK_GR32 }, },
 9602   { 5527 /* pextrd */, X86::PEXTRDrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32 }, },
 9679   { 5757 /* pinsrd */, X86::PINSRDrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32, MCK_FR32 }, },
 9781   { 6081 /* popcntl */, X86::POPCNT32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 9781   { 6081 /* popcntl */, X86::POPCNT32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
 9782   { 6081 /* popcntl */, X86::POPCNT32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
 9795   { 6134 /* popl */, X86::POP32r, Convert__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32 }, },
 9933   { 6431 /* ptwritel */, X86::PTWRITEr, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
 9976   { 6584 /* pushl */, X86::PUSH32r, Convert__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32 }, },
10006   { 6616 /* rcll */, X86::RCL32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
10008   { 6616 /* rcll */, X86::RCL32rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR32 }, },
10010   { 6616 /* rcll */, X86::RCL32ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32 }, },
10034   { 6652 /* rcrl */, X86::RCR32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
10036   { 6652 /* rcrl */, X86::RCR32rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR32 }, },
10038   { 6652 /* rcrl */, X86::RCR32ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32 }, },
10052   { 6676 /* rdfsbasel */, X86::RDFSBASE, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR32 }, },
10054   { 6705 /* rdgsbasel */, X86::RDGSBASE, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR32 }, },
10057   { 6731 /* rdpid */, X86::RDPID32, Convert__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32 }, },
10061   { 6757 /* rdrandl */, X86::RDRAND32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
10064   { 6788 /* rdseedl */, X86::RDSEED32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
10067   { 6812 /* rdsspd */, X86::RDSSPD, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
10086   { 6894 /* roll */, X86::ROL32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
10088   { 6894 /* roll */, X86::ROL32rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR32 }, },
10090   { 6894 /* roll */, X86::ROL32ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32 }, },
10110   { 6918 /* rorl */, X86::ROR32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
10112   { 6918 /* rorl */, X86::ROR32rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR32 }, },
10114   { 6918 /* rorl */, X86::ROR32ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32 }, },
10128   { 6938 /* rorxl */, X86::RORX32ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32, MCK_GR32 }, },
10128   { 6938 /* rorxl */, X86::RORX32ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32, MCK_GR32 }, },
10129   { 6938 /* rorxl */, X86::RORX32mi, Convert__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_GR32 }, },
10154   { 7030 /* sarl */, X86::SAR32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
10156   { 7030 /* sarl */, X86::SAR32rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR32 }, },
10158   { 7030 /* sarl */, X86::SAR32ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32 }, },
10172   { 7050 /* sarxl */, X86::SARX32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
10172   { 7050 /* sarxl */, X86::SARX32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
10172   { 7050 /* sarxl */, X86::SARX32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
10173   { 7050 /* sarxl */, X86::SARX32rm, Convert__Reg1_2__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
10173   { 7050 /* sarxl */, X86::SARX32rm, Convert__Reg1_2__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
10183   { 7083 /* sbbl */, X86::SBB32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
10183   { 7083 /* sbbl */, X86::SBB32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
10184   { 7083 /* sbbl */, X86::SBB32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
10186   { 7083 /* sbbl */, X86::SBB32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_GR32 }, },
10189   { 7083 /* sbbl */, X86::SBB32ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32 }, },
10191   { 7083 /* sbbl */, X86::SBB32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
10281   { 7352 /* shldl */, X86::SHLD32rrCL, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
10281   { 7352 /* shldl */, X86::SHLD32rrCL, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
10282   { 7352 /* shldl */, X86::SHLD32mrCL, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
10283   { 7352 /* shldl */, X86::SHLD32rrCL, Convert__Reg1_2__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_CL, MCK_GR32, MCK_GR32 }, },
10283   { 7352 /* shldl */, X86::SHLD32rrCL, Convert__Reg1_2__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_CL, MCK_GR32, MCK_GR32 }, },
10284   { 7352 /* shldl */, X86::SHLD32mrCL, Convert__Mem325_2__Reg1_1, AMFBS_None, { MCK_CL, MCK_GR32, MCK_Mem32 }, },
10285   { 7352 /* shldl */, X86::SHLD32rri8, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32, MCK_GR32 }, },
10285   { 7352 /* shldl */, X86::SHLD32rri8, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32, MCK_GR32 }, },
10286   { 7352 /* shldl */, X86::SHLD32mri8, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32, MCK_Mem32 }, },
10299   { 7370 /* shll */, X86::SHL32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
10301   { 7370 /* shll */, X86::SHL32rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR32 }, },
10303   { 7370 /* shll */, X86::SHL32ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32 }, },
10317   { 7390 /* shlxl */, X86::SHLX32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
10317   { 7390 /* shlxl */, X86::SHLX32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
10317   { 7390 /* shlxl */, X86::SHLX32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
10318   { 7390 /* shlxl */, X86::SHLX32rm, Convert__Reg1_2__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
10318   { 7390 /* shlxl */, X86::SHLX32rm, Convert__Reg1_2__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
10327   { 7416 /* shrdl */, X86::SHRD32rrCL, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
10327   { 7416 /* shrdl */, X86::SHRD32rrCL, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
10328   { 7416 /* shrdl */, X86::SHRD32mrCL, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
10329   { 7416 /* shrdl */, X86::SHRD32rrCL, Convert__Reg1_2__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_CL, MCK_GR32, MCK_GR32 }, },
10329   { 7416 /* shrdl */, X86::SHRD32rrCL, Convert__Reg1_2__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_CL, MCK_GR32, MCK_GR32 }, },
10330   { 7416 /* shrdl */, X86::SHRD32mrCL, Convert__Mem325_2__Reg1_1, AMFBS_None, { MCK_CL, MCK_GR32, MCK_Mem32 }, },
10331   { 7416 /* shrdl */, X86::SHRD32rri8, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32, MCK_GR32 }, },
10331   { 7416 /* shrdl */, X86::SHRD32rri8, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32, MCK_GR32 }, },
10332   { 7416 /* shrdl */, X86::SHRD32mri8, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32, MCK_Mem32 }, },
10345   { 7434 /* shrl */, X86::SHR32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
10347   { 7434 /* shrl */, X86::SHR32rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR32 }, },
10349   { 7434 /* shrl */, X86::SHR32ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32 }, },
10363   { 7454 /* shrxl */, X86::SHRX32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
10363   { 7454 /* shrxl */, X86::SHRX32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
10363   { 7454 /* shrxl */, X86::SHRX32rr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
10364   { 7454 /* shrxl */, X86::SHRX32rm, Convert__Reg1_2__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
10364   { 7454 /* shrxl */, X86::SHRX32rm, Convert__Reg1_2__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
10376   { 7521 /* sldtl */, X86::SLDT32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
10380   { 7539 /* slwpcb */, X86::SLWPCB, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
10382   { 7551 /* smswl */, X86::SMSW32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
10413   { 7669 /* strl */, X86::STR32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
10423   { 7693 /* subl */, X86::SUB32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
10423   { 7693 /* subl */, X86::SUB32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
10424   { 7693 /* subl */, X86::SUB32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
10426   { 7693 /* subl */, X86::SUB32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_GR32 }, },
10429   { 7693 /* subl */, X86::SUB32ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32 }, },
10431   { 7693 /* subl */, X86::SUB32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
10465   { 7812 /* t1mskcl */, X86::T1MSKC32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
10465   { 7812 /* t1mskcl */, X86::T1MSKC32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
10466   { 7812 /* t1mskcl */, X86::T1MSKC32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
10475   { 7839 /* testl */, X86::TEST32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
10475   { 7839 /* testl */, X86::TEST32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
10476   { 7839 /* testl */, X86::TEST32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
10478   { 7839 /* testl */, X86::TEST32ri, Convert__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32 }, },
10480   { 7839 /* testl */, X86::TEST32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
10494   { 7870 /* tzcntl */, X86::TZCNT32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
10494   { 7870 /* tzcntl */, X86::TZCNT32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
10495   { 7870 /* tzcntl */, X86::TZCNT32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
10500   { 7897 /* tzmskl */, X86::TZMSK32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
10500   { 7897 /* tzmskl */, X86::TZMSK32rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
10501   { 7897 /* tzmskl */, X86::TZMSK32rm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
10511   { 7936 /* umonitor */, X86::UMONITOR32, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
11728   { 8844 /* vcvtsd2si */, X86::VCVTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
11730   { 8844 /* vcvtsd2si */, X86::VCVTSD2SIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
11732   { 8844 /* vcvtsd2si */, X86::VCVTSD2SIZrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, },
11733   { 8844 /* vcvtsd2si */, X86::VCVTSD2SIrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, },
11736   { 8844 /* vcvtsd2si */, X86::VCVTSD2SIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, },
11738   { 8854 /* vcvtsd2sil */, X86::VCVTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
11739   { 8854 /* vcvtsd2sil */, X86::VCVTSD2SIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
11740   { 8854 /* vcvtsd2sil */, X86::VCVTSD2SIrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, },
11741   { 8854 /* vcvtsd2sil */, X86::VCVTSD2SIZrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, },
11742   { 8854 /* vcvtsd2sil */, X86::VCVTSD2SIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, },
11759   { 8886 /* vcvtsd2usi */, X86::VCVTSD2USIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
11761   { 8886 /* vcvtsd2usi */, X86::VCVTSD2USIZrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, },
11763   { 8886 /* vcvtsd2usi */, X86::VCVTSD2USIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, },
11765   { 8897 /* vcvtsd2usil */, X86::VCVTSD2USIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
11766   { 8897 /* vcvtsd2usil */, X86::VCVTSD2USIZrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, },
11767   { 8897 /* vcvtsd2usil */, X86::VCVTSD2USIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, },
11771   { 8921 /* vcvtsi2sd */, X86::VCVTSI2SDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32, MCK_FR32 }, },
11772   { 8921 /* vcvtsi2sd */, X86::VCVTSI2SDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK_FR32X }, },
11778   { 8931 /* vcvtsi2sdl */, X86::VCVTSI2SDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32, MCK_FR32 }, },
11779   { 8931 /* vcvtsi2sdl */, X86::VCVTSI2SDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK_FR32X }, },
11787   { 8953 /* vcvtsi2ss */, X86::VCVTSI2SSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32, MCK_FR32 }, },
11788   { 8953 /* vcvtsi2ss */, X86::VCVTSI2SSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK_FR32X }, },
11793   { 8953 /* vcvtsi2ss */, X86::VCVTSI2SSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, AMFBS_None, { MCK_GR32, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
11795   { 8963 /* vcvtsi2ssl */, X86::VCVTSI2SSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32, MCK_FR32 }, },
11796   { 8963 /* vcvtsi2ssl */, X86::VCVTSI2SSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK_FR32X }, },
11799   { 8963 /* vcvtsi2ssl */, X86::VCVTSI2SSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, AMFBS_None, { MCK_GR32, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
11816   { 8995 /* vcvtss2si */, X86::VCVTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
11818   { 8995 /* vcvtss2si */, X86::VCVTSS2SIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
11820   { 8995 /* vcvtss2si */, X86::VCVTSS2SIZrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
11821   { 8995 /* vcvtss2si */, X86::VCVTSS2SIrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
11824   { 8995 /* vcvtss2si */, X86::VCVTSS2SIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, },
11826   { 9005 /* vcvtss2sil */, X86::VCVTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
11827   { 9005 /* vcvtss2sil */, X86::VCVTSS2SIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
11828   { 9005 /* vcvtss2sil */, X86::VCVTSS2SIrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
11829   { 9005 /* vcvtss2sil */, X86::VCVTSS2SIZrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
11830   { 9005 /* vcvtss2sil */, X86::VCVTSS2SIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, },
11836   { 9027 /* vcvtss2usi */, X86::VCVTSS2USIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
11838   { 9027 /* vcvtss2usi */, X86::VCVTSS2USIZrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
11840   { 9027 /* vcvtss2usi */, X86::VCVTSS2USIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, },
11842   { 9038 /* vcvtss2usil */, X86::VCVTSS2USIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
11843   { 9038 /* vcvtss2usil */, X86::VCVTSS2USIZrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
11844   { 9038 /* vcvtss2usil */, X86::VCVTSS2USIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, AMFBS_None, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, },
12122   { 9204 /* vcvttsd2si */, X86::VCVTTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
12124   { 9204 /* vcvttsd2si */, X86::VCVTTSD2SIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
12126   { 9204 /* vcvttsd2si */, X86::VCVTTSD2SIZrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, },
12127   { 9204 /* vcvttsd2si */, X86::VCVTTSD2SIrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, },
12130   { 9204 /* vcvttsd2si */, X86::VCVTTSD2SIZrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
12132   { 9215 /* vcvttsd2sil */, X86::VCVTTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
12133   { 9215 /* vcvttsd2sil */, X86::VCVTTSD2SIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
12134   { 9215 /* vcvttsd2sil */, X86::VCVTTSD2SIrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, },
12135   { 9215 /* vcvttsd2sil */, X86::VCVTTSD2SIZrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, },
12136   { 9215 /* vcvttsd2sil */, X86::VCVTTSD2SIZrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
12142   { 9239 /* vcvttsd2usi */, X86::VCVTTSD2USIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
12144   { 9239 /* vcvttsd2usi */, X86::VCVTTSD2USIZrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, },
12146   { 9239 /* vcvttsd2usi */, X86::VCVTTSD2USIZrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
12148   { 9251 /* vcvttsd2usil */, X86::VCVTTSD2USIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
12149   { 9251 /* vcvttsd2usil */, X86::VCVTTSD2USIZrm_Int, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_GR32 }, },
12150   { 9251 /* vcvttsd2usil */, X86::VCVTTSD2USIZrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
12154   { 9277 /* vcvttss2si */, X86::VCVTTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
12156   { 9277 /* vcvttss2si */, X86::VCVTTSS2SIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
12158   { 9277 /* vcvttss2si */, X86::VCVTTSS2SIZrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
12159   { 9277 /* vcvttss2si */, X86::VCVTTSS2SIrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
12162   { 9277 /* vcvttss2si */, X86::VCVTTSS2SIZrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
12164   { 9288 /* vcvttss2sil */, X86::VCVTTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
12165   { 9288 /* vcvttss2sil */, X86::VCVTTSS2SIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
12166   { 9288 /* vcvttss2sil */, X86::VCVTTSS2SIrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
12167   { 9288 /* vcvttss2sil */, X86::VCVTTSS2SIZrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
12168   { 9288 /* vcvttss2sil */, X86::VCVTTSS2SIZrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
12174   { 9312 /* vcvttss2usi */, X86::VCVTTSS2USIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
12176   { 9312 /* vcvttss2usi */, X86::VCVTTSS2USIZrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
12178   { 9312 /* vcvttss2usi */, X86::VCVTTSS2USIZrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
12180   { 9324 /* vcvttss2usil */, X86::VCVTTSS2USIZrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
12181   { 9324 /* vcvttss2usil */, X86::VCVTTSS2USIZrm_Int, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
12182   { 9324 /* vcvttss2usil */, X86::VCVTTSS2USIZrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
12315   { 9418 /* vcvtusi2sd */, X86::VCVTUSI2SDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK_FR32X }, },
12319   { 9429 /* vcvtusi2sdl */, X86::VCVTUSI2SDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK_FR32X }, },
12324   { 9453 /* vcvtusi2ss */, X86::VCVTUSI2SSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK_FR32X }, },
12327   { 9453 /* vcvtusi2ss */, X86::VCVTUSI2SSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, AMFBS_None, { MCK_GR32, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
12329   { 9464 /* vcvtusi2ssl */, X86::VCVTUSI2SSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK_FR32X }, },
12331   { 9464 /* vcvtusi2ssl */, X86::VCVTUSI2SSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, AMFBS_None, { MCK_GR32, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
12606   { 9732 /* vextractps */, X86::VEXTRACTPSZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_GR32 }, },
14996   { 11561 /* vmovd */, X86::VMOVPDI2DIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
14999   { 11561 /* vmovd */, X86::VMOVDI2PDIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
15000   { 11561 /* vmovd */, X86::VMOVDI2PDIZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X }, },
15003   { 11561 /* vmovd */, X86::VMOVPDI2DIZrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
15462   { 11983 /* vmreadl */, X86::VMREAD32rr, Convert__Reg1_1__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32, MCK_GR32 }, },
15462   { 11983 /* vmreadl */, X86::VMREAD32rr, Convert__Reg1_1__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32, MCK_GR32 }, },
15463   { 11983 /* vmreadl */, X86::VMREAD32mr, Convert__Mem325_1__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32, MCK_Mem32 }, },
15561   { 12057 /* vmwritel */, X86::VMWRITE32rr, Convert__Reg1_1__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32, MCK_GR32 }, },
15561   { 12057 /* vmwritel */, X86::VMWRITE32rr, Convert__Reg1_1__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32, MCK_GR32 }, },
15562   { 12057 /* vmwritel */, X86::VMWRITE32rm, Convert__Reg1_1__Mem325_0, AMFBS_Not64BitMode, { MCK_Mem32, MCK_GR32 }, },
16341   { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZ128r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X }, },
16342   { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZ256r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR256X }, },
16343   { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR512 }, },
16352   { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16353   { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16354   { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16361   { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16362   { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16363   { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16372   { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZ128r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X }, },
16373   { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZ256r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR256X }, },
16374   { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR512 }, },
16383   { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16384   { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16385   { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16392   { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16393   { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16394   { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16440   { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZ128r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X }, },
16441   { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZ256r, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR256X }, },
16442   { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR512 }, },
16451   { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16452   { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16453   { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16460   { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16461   { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16462   { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17699   { 13185 /* vpextrd */, X86::VPEXTRDrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32 }, },
17701   { 13185 /* vpextrd */, X86::VPEXTRDZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_GR32 }, },
17791   { 13464 /* vpinsrd */, X86::VPINSRDrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32, MCK_FR32, MCK_FR32 }, },
17792   { 13464 /* vpinsrd */, X86::VPINSRDZrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32, MCK_FR32X, MCK_FR32X }, },
22448   { 15955 /* wrfsbasel */, X86::WRFSBASE, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR32 }, },
22450   { 15984 /* wrgsbasel */, X86::WRGSBASE, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR32 }, },
22454   { 16017 /* wrssd */, X86::WRSSD, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22456   { 16029 /* wrussd */, X86::WRUSSD, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22462   { 16070 /* xaddl */, X86::XADD32rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22462   { 16070 /* xaddl */, X86::XADD32rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22463   { 16070 /* xaddl */, X86::XADD32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22474   { 16106 /* xchgl */, X86::XCHG32ar, Convert__Reg1_1__Tie0_2_2, AMFBS_None, { MCK_EAX, MCK_GR32 }, },
22475   { 16106 /* xchgl */, X86::XCHG32ar, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32, MCK_EAX }, },
22476   { 16106 /* xchgl */, X86::XCHG32rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22476   { 16106 /* xchgl */, X86::XCHG32rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22477   { 16106 /* xchgl */, X86::XCHG32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22478   { 16106 /* xchgl */, X86::XCHG32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
22504   { 16201 /* xorl */, X86::XOR32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22504   { 16201 /* xorl */, X86::XOR32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22505   { 16201 /* xorl */, X86::XOR32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22507   { 16201 /* xorl */, X86::XOR32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, AMFBS_None, { MCK_ImmSExti32i8, MCK_GR32 }, },
22510   { 16201 /* xorl */, X86::XOR32ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR32 }, },
22512   { 16201 /* xorl */, X86::XOR32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
22574   { 16 /* adc */, X86::ADC32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22574   { 16 /* adc */, X86::ADC32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22575   { 16 /* adc */, X86::ADC32ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1, AMFBS_None, { MCK_GR32, MCK_ImmSExti32i8 }, },
22576   { 16 /* adc */, X86::ADC32ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR32, MCK_Imm }, },
22577   { 16 /* adc */, X86::ADC32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22588   { 16 /* adc */, X86::ADC32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
22596   { 40 /* adcx */, X86::ADCX32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22596   { 40 /* adcx */, X86::ADCX32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22597   { 40 /* adcx */, X86::ADCX32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22611   { 57 /* add */, X86::ADD32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22611   { 57 /* add */, X86::ADD32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22612   { 57 /* add */, X86::ADD32ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1, AMFBS_None, { MCK_GR32, MCK_ImmSExti32i8 }, },
22613   { 57 /* add */, X86::ADD32ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR32, MCK_Imm }, },
22614   { 57 /* add */, X86::ADD32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22625   { 57 /* add */, X86::ADD32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
22645   { 123 /* adox */, X86::ADOX32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22645   { 123 /* adox */, X86::ADOX32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22646   { 123 /* adox */, X86::ADOX32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22672   { 199 /* and */, X86::AND32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22672   { 199 /* and */, X86::AND32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22673   { 199 /* and */, X86::AND32ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1, AMFBS_None, { MCK_GR32, MCK_ImmSExti32i8 }, },
22674   { 199 /* and */, X86::AND32ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR32, MCK_Imm }, },
22675   { 199 /* and */, X86::AND32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22686   { 199 /* and */, X86::AND32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
22694   { 213 /* andn */, X86::ANDN32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
22694   { 213 /* andn */, X86::ANDN32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
22694   { 213 /* andn */, X86::ANDN32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
22695   { 213 /* andn */, X86::ANDN32rm, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_Mem32 }, },
22695   { 213 /* andn */, X86::ANDN32rm, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_Mem32 }, },
22708   { 271 /* bextr */, X86::BEXTR32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
22708   { 271 /* bextr */, X86::BEXTR32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
22708   { 271 /* bextr */, X86::BEXTR32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
22709   { 271 /* bextr */, X86::BEXTRI32ri, Convert__Reg1_0__Reg1_1__Imm1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_Imm }, },
22709   { 271 /* bextr */, X86::BEXTRI32ri, Convert__Reg1_0__Reg1_1__Imm1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_Imm }, },
22710   { 271 /* bextr */, X86::BEXTR32rm, Convert__Reg1_0__Mem325_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
22710   { 271 /* bextr */, X86::BEXTR32rm, Convert__Reg1_0__Mem325_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
22711   { 271 /* bextr */, X86::BEXTRI32mi, Convert__Reg1_0__Mem325_1__Imm1_2, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_Imm }, },
22716   { 291 /* blcfill */, X86::BLCFILL32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22716   { 291 /* blcfill */, X86::BLCFILL32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22717   { 291 /* blcfill */, X86::BLCFILL32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22720   { 317 /* blci */, X86::BLCI32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22720   { 317 /* blci */, X86::BLCI32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22721   { 317 /* blci */, X86::BLCI32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22724   { 322 /* blcic */, X86::BLCIC32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22724   { 322 /* blcic */, X86::BLCIC32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22725   { 322 /* blcic */, X86::BLCIC32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22728   { 354 /* blcmsk */, X86::BLCMSK32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22728   { 354 /* blcmsk */, X86::BLCMSK32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22729   { 354 /* blcmsk */, X86::BLCMSK32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22732   { 377 /* blcs */, X86::BLCS32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22732   { 377 /* blcs */, X86::BLCS32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22733   { 377 /* blcs */, X86::BLCS32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22748   { 428 /* blsfill */, X86::BLSFILL32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22748   { 428 /* blsfill */, X86::BLSFILL32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22749   { 428 /* blsfill */, X86::BLSFILL32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22752   { 454 /* blsi */, X86::BLSI32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22752   { 454 /* blsi */, X86::BLSI32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22753   { 454 /* blsi */, X86::BLSI32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22756   { 459 /* blsic */, X86::BLSIC32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22756   { 459 /* blsic */, X86::BLSIC32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22757   { 459 /* blsic */, X86::BLSIC32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22760   { 491 /* blsmsk */, X86::BLSMSK32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22760   { 491 /* blsmsk */, X86::BLSMSK32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22761   { 491 /* blsmsk */, X86::BLSMSK32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22764   { 514 /* blsr */, X86::BLSR32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22764   { 514 /* blsr */, X86::BLSR32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22765   { 514 /* blsr */, X86::BLSR32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22768   { 531 /* bndcl */, X86::BNDCL32rr, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_BNDR, MCK_GR32 }, },
22772   { 537 /* bndcn */, X86::BNDCN32rr, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_BNDR, MCK_GR32 }, },
22776   { 543 /* bndcu */, X86::BNDCU32rr, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_BNDR, MCK_GR32 }, },
22790   { 576 /* bound */, X86::BOUNDS32rm, Convert__Reg1_0__Mem325_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_Mem32 }, },
22793   { 582 /* bsf */, X86::BSF32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22793   { 582 /* bsf */, X86::BSF32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22794   { 582 /* bsf */, X86::BSF32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22799   { 601 /* bsr */, X86::BSR32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22799   { 601 /* bsr */, X86::BSR32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22800   { 601 /* bsr */, X86::BSR32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22803   { 620 /* bswap */, X86::BSWAP32r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
22807   { 640 /* bt */, X86::BT32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22807   { 640 /* bt */, X86::BT32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22808   { 640 /* bt */, X86::BT32ri8, Convert__Reg1_0__ImmUnsignedi81_1, AMFBS_None, { MCK_GR32, MCK_ImmUnsignedi8 }, },
22813   { 640 /* bt */, X86::BT32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
22819   { 643 /* btc */, X86::BTC32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22819   { 643 /* btc */, X86::BTC32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22820   { 643 /* btc */, X86::BTC32ri8, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR32, MCK_ImmUnsignedi8 }, },
22825   { 643 /* btc */, X86::BTC32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
22831   { 670 /* btr */, X86::BTR32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22831   { 670 /* btr */, X86::BTR32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22832   { 670 /* btr */, X86::BTR32ri8, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR32, MCK_ImmUnsignedi8 }, },
22837   { 670 /* btr */, X86::BTR32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
22843   { 689 /* bts */, X86::BTS32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22843   { 689 /* bts */, X86::BTS32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22844   { 689 /* bts */, X86::BTS32ri8, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR32, MCK_ImmUnsignedi8 }, },
22849   { 689 /* bts */, X86::BTS32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
22853   { 712 /* bzhi */, X86::BZHI32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
22853   { 712 /* bzhi */, X86::BZHI32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
22853   { 712 /* bzhi */, X86::BZHI32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
22854   { 712 /* bzhi */, X86::BZHI32rm, Convert__Reg1_0__Mem325_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
22854   { 712 /* bzhi */, X86::BZHI32rm, Convert__Reg1_0__Mem325_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
22858   { 729 /* call */, X86::CALL32r, Convert__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32 }, },
22883   { 820 /* clr */, X86::XOR32rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR32 }, },
22896   { 884 /* cmova */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_7, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22896   { 884 /* cmova */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_7, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22897   { 884 /* cmova */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_7, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22902   { 890 /* cmovae */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_3, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22902   { 890 /* cmovae */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_3, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22903   { 890 /* cmovae */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_3, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22908   { 942 /* cmovb */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_2, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22908   { 942 /* cmovb */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_2, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22909   { 942 /* cmovb */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_2, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22914   { 948 /* cmovbe */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_6, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22914   { 948 /* cmovbe */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_6, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22915   { 948 /* cmovbe */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_6, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22920   { 1000 /* cmove */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_4, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22920   { 1000 /* cmove */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_4, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22921   { 1000 /* cmove */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_4, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22926   { 1027 /* cmovg */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_15, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22926   { 1027 /* cmovg */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_15, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22927   { 1027 /* cmovg */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_15, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22932   { 1033 /* cmovge */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_13, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22932   { 1033 /* cmovge */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_13, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22933   { 1033 /* cmovge */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_13, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22938   { 1085 /* cmovl */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_12, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22938   { 1085 /* cmovl */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_12, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22939   { 1085 /* cmovl */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_12, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22944   { 1091 /* cmovle */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_14, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22944   { 1091 /* cmovle */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_14, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22945   { 1091 /* cmovle */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_14, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22950   { 1143 /* cmovne */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_5, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22950   { 1143 /* cmovne */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_5, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22951   { 1143 /* cmovne */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_5, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22956   { 1174 /* cmovno */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22956   { 1174 /* cmovno */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22957   { 1174 /* cmovno */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22962   { 1205 /* cmovnp */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_11, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22962   { 1205 /* cmovnp */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_11, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22963   { 1205 /* cmovnp */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_11, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22968   { 1236 /* cmovns */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_9, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22968   { 1236 /* cmovns */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_9, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22969   { 1236 /* cmovns */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_9, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22974   { 1267 /* cmovo */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22974   { 1267 /* cmovo */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_0, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22975   { 1267 /* cmovo */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22980   { 1294 /* cmovp */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_10, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22980   { 1294 /* cmovp */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_10, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22981   { 1294 /* cmovp */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_10, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
22986   { 1321 /* cmovs */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_8, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22986   { 1321 /* cmovs */, X86::CMOV32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_8, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
22987   { 1321 /* cmovs */, X86::CMOV32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1__imm_95_8, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
23001   { 1348 /* cmp */, X86::CMP32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23001   { 1348 /* cmp */, X86::CMP32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23002   { 1348 /* cmp */, X86::CMP32ri8, Convert__Reg1_0__ImmSExti32i81_1, AMFBS_None, { MCK_GR32, MCK_ImmSExti32i8 }, },
23003   { 1348 /* cmp */, X86::CMP32ri, Convert__Reg1_0__Imm1_1, AMFBS_None, { MCK_GR32, MCK_Imm }, },
23004   { 1348 /* cmp */, X86::CMP32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
23015   { 1348 /* cmp */, X86::CMP32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
23040   { 1425 /* cmpxchg */, X86::CMPXCHG32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23040   { 1425 /* cmpxchg */, X86::CMPXCHG32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23044   { 1425 /* cmpxchg */, X86::CMPXCHG32rm, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
23055   { 1519 /* crc32 */, X86::CRC32r32r16, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR16 }, },
23056   { 1519 /* crc32 */, X86::CRC32r32r32, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23056   { 1519 /* crc32 */, X86::CRC32r32r32, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23057   { 1519 /* crc32 */, X86::CRC32r32r8, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR8 }, },
23058   { 1519 /* crc32 */, X86::CRC32r32m16, Convert__Reg1_0__Tie0_1_1__Mem165_1, AMFBS_None, { MCK_GR32, MCK_Mem16 }, },
23059   { 1519 /* crc32 */, X86::CRC32r32m32, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
23060   { 1519 /* crc32 */, X86::CRC32r32m8, Convert__Reg1_0__Tie0_1_1__Mem85_1, AMFBS_None, { MCK_GR32, MCK_Mem8 }, },
23086   { 1646 /* cvtsd2si */, X86::CVTSD2SIrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
23087   { 1646 /* cvtsd2si */, X86::CVTSD2SIrm_Int, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR32, MCK_Mem64 }, },
23092   { 1684 /* cvtsi2sd */, X86::CVTSI2SDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
23096   { 1713 /* cvtsi2ss */, X86::CVTSI2SSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
23102   { 1751 /* cvtss2si */, X86::CVTSS2SIrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
23103   { 1751 /* cvtss2si */, X86::CVTSS2SIrm_Int, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
23114   { 1820 /* cvttsd2si */, X86::CVTTSD2SIrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
23115   { 1820 /* cvttsd2si */, X86::CVTTSD2SIrm_Int, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR32, MCK_Mem64 }, },
23118   { 1852 /* cvttss2si */, X86::CVTTSS2SIrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
23119   { 1852 /* cvttss2si */, X86::CVTTSS2SIrm_Int, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
23129   { 1918 /* dec */, X86::DEC32r_alt, Convert__Reg1_0__Tie0_1_1, AMFBS_Not64BitMode, { MCK_GR32 }, },
23130   { 1918 /* dec */, X86::DEC32r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
23138   { 1942 /* div */, X86::DIV32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
23149   { 1942 /* div */, X86::DIV32r, Convert__Reg1_1, AMFBS_None, { MCK_EAX, MCK_GR32 }, },
23173   { 2042 /* enqcmd */, X86::ENQCMD32, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_GR32, MCK_Mem512 }, },
23176   { 2049 /* enqcmds */, X86::ENQCMDS32, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_GR32, MCK_Mem512 }, },
23397   { 3105 /* idiv */, X86::IDIV32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
23408   { 3105 /* idiv */, X86::IDIV32r, Convert__Reg1_1, AMFBS_None, { MCK_EAX, MCK_GR32 }, },
23413   { 3134 /* imul */, X86::IMUL32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
23424   { 3134 /* imul */, X86::IMUL32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23424   { 3134 /* imul */, X86::IMUL32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23425   { 3134 /* imul */, X86::IMUL32rri8, Convert__Reg1_0__Reg1_0__ImmSExti32i81_1, AMFBS_None, { MCK_GR32, MCK_ImmSExti32i8 }, },
23426   { 3134 /* imul */, X86::IMUL32rri, Convert__Reg1_0__Reg1_0__Imm1_1, AMFBS_None, { MCK_GR32, MCK_Imm }, },
23427   { 3134 /* imul */, X86::IMUL32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
23436   { 3134 /* imul */, X86::IMUL32rri8, Convert__Reg1_0__Reg1_1__ImmSExti32i81_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_ImmSExti32i8 }, },
23436   { 3134 /* imul */, X86::IMUL32rri8, Convert__Reg1_0__Reg1_1__ImmSExti32i81_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_ImmSExti32i8 }, },
23437   { 3134 /* imul */, X86::IMUL32rri, Convert__Reg1_0__Reg1_1__Imm1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_Imm }, },
23437   { 3134 /* imul */, X86::IMUL32rri, Convert__Reg1_0__Reg1_1__Imm1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_Imm }, },
23438   { 3134 /* imul */, X86::IMUL32rmi8, Convert__Reg1_0__Mem325_1__ImmSExti32i81_2, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_ImmSExti32i8 }, },
23439   { 3134 /* imul */, X86::IMUL32rmi, Convert__Reg1_0__Mem325_1__Imm1_2, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_Imm }, },
23454   { 3170 /* inc */, X86::INC32r_alt, Convert__Reg1_0__Tie0_1_1, AMFBS_Not64BitMode, { MCK_GR32 }, },
23455   { 3170 /* inc */, X86::INC32r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
23462   { 3189 /* incsspd */, X86::INCSSPD, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
23480   { 3274 /* invept */, X86::INVEPT32, Convert__Reg1_0__Mem1285_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_Mem128 }, },
23485   { 3296 /* invpcid */, X86::INVPCID32, Convert__Reg1_0__Mem1285_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_Mem128 }, },
23487   { 3304 /* invvpid */, X86::INVVPID32, Convert__Reg1_0__Mem1285_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_Mem128 }, },
23506   { 3387 /* jmp */, X86::JMP32r, Convert__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32 }, },
23538   { 3513 /* kmovb */, X86::KMOVBkr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_GR32 }, },
23540   { 3513 /* kmovb */, X86::KMOVBrk, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_VK1 }, },
23543   { 3519 /* kmovd */, X86::KMOVDkr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_GR32 }, },
23545   { 3519 /* kmovd */, X86::KMOVDrk, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_VK1 }, },
23553   { 3531 /* kmovw */, X86::KMOVWkr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VK1, MCK_GR32 }, },
23555   { 3531 /* kmovw */, X86::KMOVWrk, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_VK1 }, },
23595   { 3801 /* lar */, X86::LAR32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23595   { 3801 /* lar */, X86::LAR32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23596   { 3801 /* lar */, X86::LAR32rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR32, MCK_Mem16 }, },
23597   { 3801 /* lar */, X86::LAR64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR32 }, },
23608   { 3861 /* lds */, X86::LDS32rm, Convert__Reg1_0__Mem5_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_Mem }, },
23610   { 3875 /* lea */, X86::LEA32r, Convert__Reg1_0__Mem5_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_Mem }, },
23611   { 3875 /* lea */, X86::LEA64_32r, Convert__Reg1_0__Mem5_1, AMFBS_In64BitMode, { MCK_GR32, MCK_Mem }, },
23616   { 3900 /* les */, X86::LES32rm, Convert__Reg1_0__Mem5_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_Mem }, },
23619   { 3921 /* lfs */, X86::LFS32rm, Convert__Reg1_0__Mem5_1, AMFBS_None, { MCK_GR32, MCK_Mem }, },
23625   { 3969 /* lgs */, X86::LGS32rm, Convert__Reg1_0__Mem5_1, AMFBS_None, { MCK_GR32, MCK_Mem }, },
23637   { 4051 /* llwpcb */, X86::LLWPCB, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
23663   { 4145 /* lsl */, X86::LSL32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23663   { 4145 /* lsl */, X86::LSL32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23664   { 4145 /* lsl */, X86::LSL32rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR32, MCK_Mem16 }, },
23665   { 4145 /* lsl */, X86::LSL64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR32 }, },
23668   { 4164 /* lss */, X86::LSS32rm, Convert__Reg1_0__Mem5_1, AMFBS_None, { MCK_GR32, MCK_Mem }, },
23672   { 4192 /* lwpins */, X86::LWPINS32rri, Convert__Reg1_0__Reg1_1__Imm1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_Imm }, },
23672   { 4192 /* lwpins */, X86::LWPINS32rri, Convert__Reg1_0__Reg1_1__Imm1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_Imm }, },
23673   { 4192 /* lwpins */, X86::LWPINS32rmi, Convert__Reg1_0__Mem325_1__Imm1_2, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_Imm }, },
23674   { 4192 /* lwpins */, X86::LWPINS64rri, Convert__Reg1_0__Reg1_1__Imm1_2, AMFBS_None, { MCK_GR64, MCK_GR32, MCK_Imm }, },
23676   { 4199 /* lwpval */, X86::LWPVAL32rri, Convert__Reg1_0__Reg1_1__Imm1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_Imm }, },
23676   { 4199 /* lwpval */, X86::LWPVAL32rri, Convert__Reg1_0__Reg1_1__Imm1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_Imm }, },
23677   { 4199 /* lwpval */, X86::LWPVAL32rmi, Convert__Reg1_0__Mem325_1__Imm1_2, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_Imm }, },
23678   { 4199 /* lwpval */, X86::LWPVAL64rri, Convert__Reg1_0__Reg1_1__Imm1_2, AMFBS_None, { MCK_GR64, MCK_GR32, MCK_Imm }, },
23682   { 4206 /* lzcnt */, X86::LZCNT32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23682   { 4206 /* lzcnt */, X86::LZCNT32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23683   { 4206 /* lzcnt */, X86::LZCNT32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
23724   { 4333 /* mov */, X86::MOV32sr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_SEGMENT_REG, MCK_GR32 }, },
23727   { 4333 /* mov */, X86::MOV32cr, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_CONTROL_REG, MCK_GR32 }, },
23729   { 4333 /* mov */, X86::MOV32dr, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_DEBUG_REG, MCK_GR32 }, },
23735   { 4333 /* mov */, X86::MOV32rs, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_SEGMENT_REG }, },
23736   { 4333 /* mov */, X86::MOV32rc, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_CONTROL_REG }, },
23737   { 4333 /* mov */, X86::MOV32rd, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_DEBUG_REG }, },
23738   { 4333 /* mov */, X86::MOV32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23738   { 4333 /* mov */, X86::MOV32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23739   { 4333 /* mov */, X86::MOV32ri, Convert__Reg1_0__Imm1_1, AMFBS_None, { MCK_GR32, MCK_Imm }, },
23740   { 4333 /* mov */, X86::MOV32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
23761   { 4333 /* mov */, X86::MOV32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
23768   { 4337 /* mov.s */, X86::MOV32rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23768   { 4337 /* mov.s */, X86::MOV32rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23789   { 4426 /* movbe */, X86::MOVBE32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
23792   { 4426 /* movbe */, X86::MOVBE32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
23794   { 4453 /* movd */, X86::MMX_MOVD64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_GR32 }, },
23797   { 4453 /* movd */, X86::MOVDI2PDIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
23800   { 4453 /* movd */, X86::MMX_MOVD64grr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_VR64 }, },
23801   { 4453 /* movd */, X86::MOVPDI2DIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
23809   { 4466 /* movdir64b */, X86::MOVDIR64B32, Convert__Reg1_0__Mem5125_1, AMFBS_None, { MCK_GR32, MCK_Mem512 }, },
23811   { 4476 /* movdiri */, X86::MOVDIRI32, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
23836   { 4615 /* movnti */, X86::MOVNTImr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
23878   { 4814 /* movsx */, X86::MOVSX32rr16, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR16 }, },
23879   { 4814 /* movsx */, X86::MOVSX32rr8, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR8 }, },
23880   { 4814 /* movsx */, X86::MOVSX32rm16, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR32, MCK_Mem16 }, },
23881   { 4814 /* movsx */, X86::MOVSX32rm8, Convert__Reg1_0__Mem85_1, AMFBS_None, { MCK_GR32, MCK_Mem8 }, },
23886   { 4820 /* movsxd */, X86::MOVSX64rr32, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_GR64, MCK_GR32 }, },
23898   { 4906 /* movzx */, X86::MOVZX32rr16, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR16 }, },
23899   { 4906 /* movzx */, X86::MOVZX32rr8, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR8 }, },
23900   { 4906 /* movzx */, X86::MOVZX32rm16, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR32, MCK_Mem16 }, },
23901   { 4906 /* movzx */, X86::MOVZX32rm8, Convert__Reg1_0__Mem85_1, AMFBS_None, { MCK_GR32, MCK_Mem8 }, },
23909   { 4920 /* mul */, X86::MUL32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
23924   { 4968 /* mulx */, X86::MULX32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
23924   { 4968 /* mulx */, X86::MULX32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
23924   { 4968 /* mulx */, X86::MULX32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
23925   { 4968 /* mulx */, X86::MULX32rm, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_Mem32 }, },
23925   { 4968 /* mulx */, X86::MULX32rm, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_Mem32 }, },
23935   { 4998 /* neg */, X86::NEG32r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
23944   { 5022 /* nop */, X86::NOOPLr, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
23950   { 5041 /* not */, X86::NOT32r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
23968   { 5065 /* or */, X86::OR32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23968   { 5065 /* or */, X86::OR32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
23969   { 5065 /* or */, X86::OR32ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1, AMFBS_None, { MCK_GR32, MCK_ImmSExti32i8 }, },
23970   { 5065 /* or */, X86::OR32ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR32, MCK_Imm }, },
23971   { 5065 /* or */, X86::OR32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
23982   { 5065 /* or */, X86::OR32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
24146   { 5486 /* pdep */, X86::PDEP32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
24146   { 5486 /* pdep */, X86::PDEP32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
24146   { 5486 /* pdep */, X86::PDEP32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
24147   { 5486 /* pdep */, X86::PDEP32rm, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_Mem32 }, },
24147   { 5486 /* pdep */, X86::PDEP32rm, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_Mem32 }, },
24150   { 5503 /* pext */, X86::PEXT32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
24150   { 5503 /* pext */, X86::PEXT32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
24150   { 5503 /* pext */, X86::PEXT32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
24151   { 5503 /* pext */, X86::PEXT32rm, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_Mem32 }, },
24151   { 5503 /* pext */, X86::PEXT32rm, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_Mem32 }, },
24156   { 5527 /* pextrd */, X86::PEXTRDrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24233   { 5757 /* pinsrd */, X86::PINSRDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_GR32, MCK_ImmUnsignedi8 }, },
24346   { 6058 /* pop */, X86::POP32r, Convert__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32 }, },
24355   { 6074 /* popcnt */, X86::POPCNT32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
24355   { 6074 /* popcnt */, X86::POPCNT32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
24356   { 6074 /* popcnt */, X86::POPCNT32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
24487   { 6423 /* ptwrite */, X86::PTWRITEr, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
24534   { 6531 /* push */, X86::PUSH32r, Convert__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32 }, },
24555   { 6607 /* rcl */, X86::RCL32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
24564   { 6607 /* rcl */, X86::RCL32rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32, MCK_CL }, },
24565   { 6607 /* rcl */, X86::RCL32ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR32, MCK_ImmUnsignedi8 }, },
24583   { 6643 /* rcr */, X86::RCR32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
24592   { 6643 /* rcr */, X86::RCR32rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32, MCK_CL }, },
24593   { 6643 /* rcr */, X86::RCR32ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR32, MCK_ImmUnsignedi8 }, },
24606   { 6667 /* rdfsbase */, X86::RDFSBASE, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR32 }, },
24608   { 6696 /* rdgsbase */, X86::RDGSBASE, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR32 }, },
24611   { 6731 /* rdpid */, X86::RDPID32, Convert__Reg1_0, AMFBS_Not64BitMode, { MCK_GR32 }, },
24616   { 6750 /* rdrand */, X86::RDRAND32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
24619   { 6781 /* rdseed */, X86::RDSEED32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
24621   { 6812 /* rdsspd */, X86::RDSSPD, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
24641   { 6885 /* rol */, X86::ROL32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
24650   { 6885 /* rol */, X86::ROL32rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32, MCK_CL }, },
24651   { 6885 /* rol */, X86::ROL32ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR32, MCK_ImmUnsignedi8 }, },
24665   { 6909 /* ror */, X86::ROR32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
24674   { 6909 /* ror */, X86::ROR32rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32, MCK_CL }, },
24675   { 6909 /* ror */, X86::ROR32ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR32, MCK_ImmUnsignedi8 }, },
24688   { 6933 /* rorx */, X86::RORX32ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_ImmUnsignedi8 }, },
24688   { 6933 /* rorx */, X86::RORX32ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_ImmUnsignedi8 }, },
24689   { 6933 /* rorx */, X86::RORX32mi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
24709   { 7021 /* sar */, X86::SAR32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
24718   { 7021 /* sar */, X86::SAR32rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32, MCK_CL }, },
24719   { 7021 /* sar */, X86::SAR32ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR32, MCK_ImmUnsignedi8 }, },
24732   { 7045 /* sarx */, X86::SARX32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
24732   { 7045 /* sarx */, X86::SARX32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
24732   { 7045 /* sarx */, X86::SARX32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
24733   { 7045 /* sarx */, X86::SARX32rm, Convert__Reg1_0__Mem325_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
24733   { 7045 /* sarx */, X86::SARX32rm, Convert__Reg1_0__Mem325_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
24748   { 7074 /* sbb */, X86::SBB32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
24748   { 7074 /* sbb */, X86::SBB32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
24749   { 7074 /* sbb */, X86::SBB32ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1, AMFBS_None, { MCK_GR32, MCK_ImmSExti32i8 }, },
24750   { 7074 /* sbb */, X86::SBB32ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR32, MCK_Imm }, },
24751   { 7074 /* sbb */, X86::SBB32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
24762   { 7074 /* sbb */, X86::SBB32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
24840   { 7338 /* shl */, X86::SHL32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
24849   { 7338 /* shl */, X86::SHL32rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32, MCK_CL }, },
24850   { 7338 /* shl */, X86::SHL32ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR32, MCK_ImmUnsignedi8 }, },
24864   { 7347 /* shld */, X86::SHLD32rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
24864   { 7347 /* shld */, X86::SHLD32rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
24867   { 7347 /* shld */, X86::SHLD32mrCL, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
24871   { 7347 /* shld */, X86::SHLD32rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_CL }, },
24871   { 7347 /* shld */, X86::SHLD32rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_CL }, },
24872   { 7347 /* shld */, X86::SHLD32rri8, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_ImmUnsignedi8 }, },
24872   { 7347 /* shld */, X86::SHLD32rri8, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_ImmUnsignedi8 }, },
24877   { 7347 /* shld */, X86::SHLD32mrCL, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32, MCK_CL }, },
24878   { 7347 /* shld */, X86::SHLD32mri8, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem32, MCK_GR32, MCK_ImmUnsignedi8 }, },
24881   { 7385 /* shlx */, X86::SHLX32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
24881   { 7385 /* shlx */, X86::SHLX32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
24881   { 7385 /* shlx */, X86::SHLX32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
24882   { 7385 /* shlx */, X86::SHLX32rm, Convert__Reg1_0__Mem325_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
24882   { 7385 /* shlx */, X86::SHLX32rm, Convert__Reg1_0__Mem325_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
24886   { 7402 /* shr */, X86::SHR32r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32 }, },
24895   { 7402 /* shr */, X86::SHR32rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32, MCK_CL }, },
24896   { 7402 /* shr */, X86::SHR32ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR32, MCK_ImmUnsignedi8 }, },
24910   { 7411 /* shrd */, X86::SHRD32rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
24910   { 7411 /* shrd */, X86::SHRD32rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
24913   { 7411 /* shrd */, X86::SHRD32mrCL, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
24917   { 7411 /* shrd */, X86::SHRD32rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_CL }, },
24917   { 7411 /* shrd */, X86::SHRD32rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_CL }, },
24918   { 7411 /* shrd */, X86::SHRD32rri8, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_ImmUnsignedi8 }, },
24918   { 7411 /* shrd */, X86::SHRD32rri8, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_ImmUnsignedi8 }, },
24923   { 7411 /* shrd */, X86::SHRD32mrCL, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32, MCK_CL }, },
24924   { 7411 /* shrd */, X86::SHRD32mri8, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem32, MCK_GR32, MCK_ImmUnsignedi8 }, },
24927   { 7449 /* shrx */, X86::SHRX32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
24927   { 7449 /* shrx */, X86::SHRX32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
24927   { 7449 /* shrx */, X86::SHRX32rr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
24928   { 7449 /* shrx */, X86::SHRX32rm, Convert__Reg1_0__Mem325_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
24928   { 7449 /* shrx */, X86::SHRX32rm, Convert__Reg1_0__Mem325_1__Reg1_2, AMFBS_None, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
24940   { 7516 /* sldt */, X86::SLDT32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
24944   { 7539 /* slwpcb */, X86::SLWPCB, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
24947   { 7546 /* smsw */, X86::SMSW32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
24982   { 7665 /* str */, X86::STR32r, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
24996   { 7684 /* sub */, X86::SUB32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
24996   { 7684 /* sub */, X86::SUB32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
24997   { 7684 /* sub */, X86::SUB32ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1, AMFBS_None, { MCK_GR32, MCK_ImmSExti32i8 }, },
24998   { 7684 /* sub */, X86::SUB32ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR32, MCK_Imm }, },
24999   { 7684 /* sub */, X86::SUB32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
25010   { 7684 /* sub */, X86::SUB32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
25033   { 7805 /* t1mskc */, X86::T1MSKC32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
25033   { 7805 /* t1mskc */, X86::T1MSKC32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
25034   { 7805 /* t1mskc */, X86::T1MSKC32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
25044   { 7828 /* test */, X86::TEST32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
25044   { 7828 /* test */, X86::TEST32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
25045   { 7828 /* test */, X86::TEST32ri, Convert__Reg1_0__Imm1_1, AMFBS_None, { MCK_GR32, MCK_Imm }, },
25046   { 7828 /* test */, X86::TEST32mr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
25055   { 7828 /* test */, X86::TEST32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
25064   { 7864 /* tzcnt */, X86::TZCNT32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
25064   { 7864 /* tzcnt */, X86::TZCNT32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
25065   { 7864 /* tzcnt */, X86::TZCNT32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
25068   { 7891 /* tzmsk */, X86::TZMSK32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
25068   { 7891 /* tzmsk */, X86::TZMSK32rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
25069   { 7891 /* tzmsk */, X86::TZMSK32rm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
25079   { 7936 /* umonitor */, X86::UMONITOR32, Convert__Reg1_0, AMFBS_None, { MCK_GR32 }, },
26246   { 8844 /* vcvtsd2si */, X86::VCVTSD2SIrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
26247   { 8844 /* vcvtsd2si */, X86::VCVTSD2SIZrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X }, },
26248   { 8844 /* vcvtsd2si */, X86::VCVTSD2SIZrm_Int, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR32, MCK_Mem64 }, },
26249   { 8844 /* vcvtsd2si */, X86::VCVTSD2SIrm_Int, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR32, MCK_Mem64 }, },
26254   { 8844 /* vcvtsd2si */, X86::VCVTSD2SIZrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK_AVX512RC }, },
26267   { 8886 /* vcvtsd2usi */, X86::VCVTSD2USIZrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X }, },
26268   { 8886 /* vcvtsd2usi */, X86::VCVTSD2USIZrm_Int, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR32, MCK_Mem64 }, },
26271   { 8886 /* vcvtsd2usi */, X86::VCVTSD2USIZrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK_AVX512RC }, },
26273   { 8921 /* vcvtsi2sd */, X86::VCVTSI2SDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_GR32 }, },
26277   { 8921 /* vcvtsi2sd */, X86::VCVTSI2SDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_GR32 }, },
26282   { 8953 /* vcvtsi2ss */, X86::VCVTSI2SSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_GR32 }, },
26286   { 8953 /* vcvtsi2ss */, X86::VCVTSI2SSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_GR32 }, },
26290   { 8953 /* vcvtsi2ss */, X86::VCVTSI2SSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_AVX512RC, MCK_GR32 }, },
26303   { 8995 /* vcvtss2si */, X86::VCVTSS2SIrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
26304   { 8995 /* vcvtss2si */, X86::VCVTSS2SIZrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X }, },
26305   { 8995 /* vcvtss2si */, X86::VCVTSS2SIZrm_Int, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
26306   { 8995 /* vcvtss2si */, X86::VCVTSS2SIrm_Int, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
26311   { 8995 /* vcvtss2si */, X86::VCVTSS2SIZrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK_AVX512RC }, },
26313   { 9027 /* vcvtss2usi */, X86::VCVTSS2USIZrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X }, },
26314   { 9027 /* vcvtss2usi */, X86::VCVTSS2USIZrm_Int, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
26317   { 9027 /* vcvtss2usi */, X86::VCVTSS2USIZrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK_AVX512RC }, },
26567   { 9204 /* vcvttsd2si */, X86::VCVTTSD2SIrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
26568   { 9204 /* vcvttsd2si */, X86::VCVTTSD2SIZrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X }, },
26569   { 9204 /* vcvttsd2si */, X86::VCVTTSD2SIZrm_Int, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR32, MCK_Mem64 }, },
26570   { 9204 /* vcvttsd2si */, X86::VCVTTSD2SIrm_Int, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR32, MCK_Mem64 }, },
26575   { 9204 /* vcvttsd2si */, X86::VCVTTSD2SIZrrb_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK__123_sae_125_ }, },
26577   { 9239 /* vcvttsd2usi */, X86::VCVTTSD2USIZrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X }, },
26578   { 9239 /* vcvttsd2usi */, X86::VCVTTSD2USIZrm_Int, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_GR32, MCK_Mem64 }, },
26581   { 9239 /* vcvttsd2usi */, X86::VCVTTSD2USIZrrb_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK__123_sae_125_ }, },
26583   { 9277 /* vcvttss2si */, X86::VCVTTSS2SIrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
26584   { 9277 /* vcvttss2si */, X86::VCVTTSS2SIZrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X }, },
26585   { 9277 /* vcvttss2si */, X86::VCVTTSS2SIZrm_Int, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
26586   { 9277 /* vcvttss2si */, X86::VCVTTSS2SIrm_Int, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
26591   { 9277 /* vcvttss2si */, X86::VCVTTSS2SIZrrb_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK__123_sae_125_ }, },
26593   { 9312 /* vcvttss2usi */, X86::VCVTTSS2USIZrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X }, },
26594   { 9312 /* vcvttss2usi */, X86::VCVTTSS2USIZrm_Int, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
26597   { 9312 /* vcvttss2usi */, X86::VCVTTSS2USIZrrb_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK__123_sae_125_ }, },
26716   { 9418 /* vcvtusi2sd */, X86::VCVTUSI2SDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_GR32 }, },
26721   { 9453 /* vcvtusi2ss */, X86::VCVTUSI2SSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_GR32 }, },
26725   { 9453 /* vcvtusi2ss */, X86::VCVTUSI2SSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_AVX512RC, MCK_GR32 }, },
26996   { 9732 /* vextractps */, X86::VEXTRACTPSZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29364   { 11561 /* vmovd */, X86::VMOVDI2PDIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
29367   { 11561 /* vmovd */, X86::VMOVPDI2DIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
29368   { 11561 /* vmovd */, X86::VMOVPDI2DIZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32X }, },
29371   { 11561 /* vmovd */, X86::VMOVDI2PDIZrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
29830   { 11976 /* vmread */, X86::VMREAD32rr, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_GR32 }, },
29830   { 11976 /* vmread */, X86::VMREAD32rr, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_GR32 }, },
29832   { 11976 /* vmread */, X86::VMREAD32mr, Convert__Mem325_0__Reg1_1, AMFBS_Not64BitMode, { MCK_Mem32, MCK_GR32 }, },
29929   { 12049 /* vmwrite */, X86::VMWRITE32rr, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_GR32 }, },
29929   { 12049 /* vmwrite */, X86::VMWRITE32rr, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_GR32 }, },
29930   { 12049 /* vmwrite */, X86::VMWRITE32rm, Convert__Reg1_0__Mem325_1, AMFBS_Not64BitMode, { MCK_GR32, MCK_Mem32 }, },
30711   { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
30714   { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_GR32 }, },
30717   { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_GR32 }, },
30720   { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
30723   { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
30726   { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
30729   { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
30732   { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
30735   { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
30742   { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
30745   { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_GR32 }, },
30748   { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_GR32 }, },
30751   { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
30754   { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
30757   { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
30760   { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
30763   { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
30766   { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
30810   { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZ128r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32X, MCK_GR32 }, },
30813   { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZ256r, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256X, MCK_GR32 }, },
30816   { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR512, MCK_GR32 }, },
30819   { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
30822   { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
30825   { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
30828   { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
30831   { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
30834   { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
32067   { 13185 /* vpextrd */, X86::VPEXTRDrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
32068   { 13185 /* vpextrd */, X86::VPEXTRDZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK_ImmUnsignedi8 }, },
32159   { 13464 /* vpinsrd */, X86::VPINSRDrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_GR32, MCK_ImmUnsignedi8 }, },
32161   { 13464 /* vpinsrd */, X86::VPINSRDZrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_GR32, MCK_ImmUnsignedi8 }, },
36816   { 15946 /* wrfsbase */, X86::WRFSBASE, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR32 }, },
36818   { 15975 /* wrgsbase */, X86::WRGSBASE, Convert__Reg1_0, AMFBS_In64BitMode, { MCK_GR32 }, },
36822   { 16017 /* wrssd */, X86::WRSSD, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
36824   { 16029 /* wrussd */, X86::WRUSSD, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
36829   { 16059 /* xadd */, X86::XADD32rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
36829   { 16059 /* xadd */, X86::XADD32rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
36833   { 16059 /* xadd */, X86::XADD32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
36840   { 16095 /* xchg */, X86::XCHG32ar, Convert__Reg1_1__Tie0_2_2, AMFBS_None, { MCK_EAX, MCK_GR32 }, },
36846   { 16095 /* xchg */, X86::XCHG32ar, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR32, MCK_EAX }, },
36847   { 16095 /* xchg */, X86::XCHG32rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
36847   { 16095 /* xchg */, X86::XCHG32rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
36848   { 16095 /* xchg */, X86::XCHG32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
36855   { 16095 /* xchg */, X86::XCHG32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },
36877   { 16192 /* xor */, X86::XOR32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
36877   { 16192 /* xor */, X86::XOR32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR32 }, },
36878   { 16192 /* xor */, X86::XOR32ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1, AMFBS_None, { MCK_GR32, MCK_ImmSExti32i8 }, },
36879   { 16192 /* xor */, X86::XOR32ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR32, MCK_Imm }, },
36880   { 16192 /* xor */, X86::XOR32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_GR32, MCK_Mem32 }, },
36891   { 16192 /* xor */, X86::XOR32mr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_GR32 }, },