|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/X86/X86GenAsmMatcher.inc 5659 case MCK_GR16: return true;
5681 case MCK_GR16: return true;
6159 case MCK_GR16: return true;
6356 return B == MCK_GR16;
7143 case X86::R8W: OpKind = MCK_GR16; break;
7144 case X86::R9W: OpKind = MCK_GR16; break;
7145 case X86::R10W: OpKind = MCK_GR16; break;
7146 case X86::R11W: OpKind = MCK_GR16; break;
7147 case X86::R12W: OpKind = MCK_GR16; break;
7148 case X86::R13W: OpKind = MCK_GR16; break;
7149 case X86::R14W: OpKind = MCK_GR16; break;
7150 case X86::R15W: OpKind = MCK_GR16; break;
7480 case MCK_GR16: return "MCK_GR16";
7994 { 35 /* adcw */, X86::ADC16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
7994 { 35 /* adcw */, X86::ADC16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
7995 { 35 /* adcw */, X86::ADC16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
7997 { 35 /* adcw */, X86::ADC16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_GR16 }, },
8000 { 35 /* adcw */, X86::ADC16ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR16 }, },
8002 { 35 /* adcw */, X86::ADC16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8043 { 118 /* addw */, X86::ADD16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8043 { 118 /* addw */, X86::ADD16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8044 { 118 /* addw */, X86::ADD16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
8046 { 118 /* addw */, X86::ADD16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_GR16 }, },
8049 { 118 /* addw */, X86::ADD16ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR16 }, },
8051 { 118 /* addw */, X86::ADD16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8104 { 261 /* andw */, X86::AND16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8104 { 261 /* andw */, X86::AND16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8105 { 261 /* andw */, X86::AND16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
8107 { 261 /* andw */, X86::AND16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_GR16 }, },
8110 { 261 /* andw */, X86::AND16ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR16 }, },
8112 { 261 /* andw */, X86::AND16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8113 { 266 /* arpl */, X86::ARPL16rr, Convert__Reg1_1__Reg1_0, AMFBS_Not64BitMode, { MCK_GR16, MCK_GR16 }, },
8113 { 266 /* arpl */, X86::ARPL16rr, Convert__Reg1_1__Reg1_0, AMFBS_Not64BitMode, { MCK_GR16, MCK_GR16 }, },
8114 { 266 /* arpl */, X86::ARPL16mr, Convert__Mem165_1__Reg1_0, AMFBS_Not64BitMode, { MCK_GR16, MCK_Mem16 }, },
8196 { 576 /* bound */, X86::BOUNDS16rm, Convert__Reg1_0__Mem165_1, AMFBS_Not64BitMode, { MCK_GR16, MCK_Mem16 }, },
8202 { 596 /* bsfw */, X86::BSF16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8202 { 596 /* bsfw */, X86::BSF16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8203 { 596 /* bsfw */, X86::BSF16rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8208 { 615 /* bsrw */, X86::BSR16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8208 { 615 /* bsrw */, X86::BSR16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8209 { 615 /* bsrw */, X86::BSR16rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8222 { 657 /* btcw */, X86::BTC16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8222 { 657 /* btcw */, X86::BTC16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8223 { 657 /* btcw */, X86::BTC16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
8224 { 657 /* btcw */, X86::BTC16ri8, Convert__Reg1_1__Tie0_2_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16 }, },
8243 { 684 /* btrw */, X86::BTR16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8243 { 684 /* btrw */, X86::BTR16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8244 { 684 /* btrw */, X86::BTR16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
8245 { 684 /* btrw */, X86::BTR16ri8, Convert__Reg1_1__Tie0_2_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16 }, },
8256 { 703 /* btsw */, X86::BTS16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8256 { 703 /* btsw */, X86::BTS16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8257 { 703 /* btsw */, X86::BTS16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
8258 { 703 /* btsw */, X86::BTS16ri8, Convert__Reg1_1__Tie0_2_2__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16 }, },
8260 { 708 /* btw */, X86::BT16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8260 { 708 /* btw */, X86::BT16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8261 { 708 /* btw */, X86::BT16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
8262 { 708 /* btw */, X86::BT16ri8, Convert__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16 }, },
8278 { 746 /* callw */, X86::CALL16r, Convert__Reg1_1, AMFBS_Not64BitMode, { MCK__STAR_, MCK_GR16 }, },
8294 { 848 /* clrw */, X86::XOR16rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR16 }, },
8308 { 913 /* cmovaew */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_3, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8308 { 913 /* cmovaew */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_3, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8309 { 913 /* cmovaew */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_3, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8314 { 935 /* cmovaw */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_7, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8314 { 935 /* cmovaw */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_7, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8315 { 935 /* cmovaw */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_7, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8320 { 971 /* cmovbew */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_6, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8320 { 971 /* cmovbew */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_6, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8321 { 971 /* cmovbew */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_6, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8326 { 993 /* cmovbw */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_2, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8326 { 993 /* cmovbw */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_2, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8327 { 993 /* cmovbw */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_2, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8332 { 1020 /* cmovew */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_4, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8332 { 1020 /* cmovew */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_4, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8333 { 1020 /* cmovew */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_4, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8338 { 1056 /* cmovgew */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_13, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8338 { 1056 /* cmovgew */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_13, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8339 { 1056 /* cmovgew */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_13, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8344 { 1078 /* cmovgw */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_15, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8344 { 1078 /* cmovgw */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_15, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8345 { 1078 /* cmovgw */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_15, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8350 { 1114 /* cmovlew */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_14, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8350 { 1114 /* cmovlew */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_14, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8351 { 1114 /* cmovlew */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_14, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8356 { 1136 /* cmovlw */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_12, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8356 { 1136 /* cmovlw */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_12, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8357 { 1136 /* cmovlw */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_12, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8362 { 1166 /* cmovnew */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_5, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8362 { 1166 /* cmovnew */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_5, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8363 { 1166 /* cmovnew */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_5, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8368 { 1197 /* cmovnow */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8368 { 1197 /* cmovnow */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8369 { 1197 /* cmovnow */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8374 { 1228 /* cmovnpw */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_11, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8374 { 1228 /* cmovnpw */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_11, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8375 { 1228 /* cmovnpw */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_11, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8380 { 1259 /* cmovnsw */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_9, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8380 { 1259 /* cmovnsw */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_9, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8381 { 1259 /* cmovnsw */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_9, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8386 { 1287 /* cmovow */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8386 { 1287 /* cmovow */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8387 { 1287 /* cmovow */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8392 { 1314 /* cmovpw */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_10, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8392 { 1314 /* cmovpw */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_10, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8393 { 1314 /* cmovpw */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_10, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8398 { 1341 /* cmovsw */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_8, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8398 { 1341 /* cmovsw */, X86::CMOV16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_8, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8399 { 1341 /* cmovsw */, X86::CMOV16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0__imm_95_8, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8436 { 1420 /* cmpw */, X86::CMP16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8436 { 1420 /* cmpw */, X86::CMP16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8437 { 1420 /* cmpw */, X86::CMP16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
8439 { 1420 /* cmpw */, X86::CMP16ri8, Convert__Reg1_1__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_GR16 }, },
8442 { 1420 /* cmpw */, X86::CMP16ri, Convert__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR16 }, },
8444 { 1420 /* cmpw */, X86::CMP16rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8453 { 1481 /* cmpxchgw */, X86::CMPXCHG16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8453 { 1481 /* cmpxchgw */, X86::CMPXCHG16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8454 { 1481 /* cmpxchgw */, X86::CMPXCHG16rm, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
8469 { 1546 /* crc32w */, X86::CRC32r32r16, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR32 }, },
8562 { 1937 /* decw */, X86::DEC16r_alt, Convert__Reg1_0__Tie0_1_1, AMFBS_Not64BitMode, { MCK_GR16 }, },
8563 { 1937 /* decw */, X86::DEC16r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
8585 { 1985 /* divw */, X86::DIV16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
8587 { 1985 /* divw */, X86::DIV16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16, MCK_AX }, },
8600 { 2042 /* enqcmd */, X86::ENQCMD16, Convert__Reg1_1__Mem5125_0, AMFBS_Not64BitMode, { MCK_Mem512, MCK_GR16 }, },
8603 { 2049 /* enqcmds */, X86::ENQCMDS16, Convert__Reg1_1__Mem5125_0, AMFBS_Not64BitMode, { MCK_Mem512, MCK_GR16 }, },
8836 { 3128 /* idivw */, X86::IDIV16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
8838 { 3128 /* idivw */, X86::IDIV16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16, MCK_AX }, },
8862 { 3157 /* imulw */, X86::IMUL16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
8864 { 3157 /* imulw */, X86::IMUL16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8864 { 3157 /* imulw */, X86::IMUL16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
8865 { 3157 /* imulw */, X86::IMUL16rri8, Convert__Reg1_1__Reg1_1__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_GR16 }, },
8866 { 3157 /* imulw */, X86::IMUL16rri, Convert__Reg1_1__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR16 }, },
8867 { 3157 /* imulw */, X86::IMUL16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
8868 { 3157 /* imulw */, X86::IMUL16rri8, Convert__Reg1_2__Reg1_1__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_GR16, MCK_GR16 }, },
8868 { 3157 /* imulw */, X86::IMUL16rri8, Convert__Reg1_2__Reg1_1__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_GR16, MCK_GR16 }, },
8869 { 3157 /* imulw */, X86::IMUL16rmi8, Convert__Reg1_2__Mem165_1__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_Mem16, MCK_GR16 }, },
8870 { 3157 /* imulw */, X86::IMUL16rri, Convert__Reg1_2__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR16, MCK_GR16 }, },
8870 { 3157 /* imulw */, X86::IMUL16rri, Convert__Reg1_2__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR16, MCK_GR16 }, },
8871 { 3157 /* imulw */, X86::IMUL16rmi, Convert__Reg1_2__Mem165_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_Mem16, MCK_GR16 }, },
8885 { 3205 /* incw */, X86::INC16r_alt, Convert__Reg1_0__Tie0_1_1, AMFBS_Not64BitMode, { MCK_GR16 }, },
8886 { 3205 /* incw */, X86::INC16r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
8941 { 3401 /* jmpw */, X86::JMP16r, Convert__Reg1_1, AMFBS_Not64BitMode, { MCK__STAR_, MCK_GR16 }, },
9024 { 3815 /* larw */, X86::LAR16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
9024 { 3815 /* larw */, X86::LAR16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
9025 { 3815 /* larw */, X86::LAR16rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
9038 { 3870 /* ldsw */, X86::LDS16rm, Convert__Reg1_1__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem, MCK_GR16 }, },
9044 { 3895 /* leaw */, X86::LEA16r, Convert__Reg1_1__Mem5_0, AMFBS_None, { MCK_Mem, MCK_GR16 }, },
9046 { 3909 /* lesw */, X86::LES16rm, Convert__Reg1_1__Mem5_0, AMFBS_Not64BitMode, { MCK_Mem, MCK_GR16 }, },
9050 { 3935 /* lfsw */, X86::LFS16rm, Convert__Reg1_1__Mem5_0, AMFBS_None, { MCK_Mem, MCK_GR16 }, },
9056 { 3983 /* lgsw */, X86::LGS16rm, Convert__Reg1_1__Mem5_0, AMFBS_None, { MCK_Mem, MCK_GR16 }, },
9069 { 4045 /* lldtw */, X86::LLDT16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
9073 { 4063 /* lmsww */, X86::LMSW16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
9101 { 4159 /* lslw */, X86::LSL16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
9101 { 4159 /* lslw */, X86::LSL16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
9102 { 4159 /* lslw */, X86::LSL16rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
9105 { 4178 /* lssw */, X86::LSS16rm, Convert__Reg1_1__Mem5_0, AMFBS_None, { MCK_Mem, MCK_GR16 }, },
9106 { 4187 /* ltrw */, X86::LTRr, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
9120 { 4226 /* lzcntw */, X86::LZCNT16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
9120 { 4226 /* lzcntw */, X86::LZCNT16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
9121 { 4226 /* lzcntw */, X86::LZCNT16rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
9152 { 4337 /* mov.s */, X86::MOV16rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
9152 { 4337 /* mov.s */, X86::MOV16rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
9187 { 4446 /* movbew */, X86::MOVBE16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
9188 { 4446 /* movbew */, X86::MOVBE16rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
9203 { 4466 /* movdir64b */, X86::MOVDIR64B16, Convert__Reg1_1__Mem5125_0, AMFBS_Not64BitMode, { MCK_Mem512, MCK_GR16 }, },
9287 { 4722 /* movsbw */, X86::MOVSX16rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR16 }, },
9288 { 4722 /* movsbw */, X86::MOVSX16rm8, Convert__Reg1_1__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR16 }, },
9306 { 4800 /* movswl */, X86::MOVSX32rr16, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR32 }, },
9308 { 4807 /* movswq */, X86::MOVSX64rr16, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR64 }, },
9310 { 4814 /* movsx */, X86::MOVSX32rr16, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR32 }, },
9311 { 4814 /* movsx */, X86::MOVSX64rr16, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR64 }, },
9313 { 4814 /* movsx */, X86::MOVSX16rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR16 }, },
9316 { 4814 /* movsx */, X86::MOVSX16rm8, Convert__Reg1_1__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR16 }, },
9327 { 4859 /* movw */, X86::MOV16rs, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_SEGMENT_REG, MCK_GR16 }, },
9329 { 4859 /* movw */, X86::MOV16sr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_SEGMENT_REG }, },
9330 { 4859 /* movw */, X86::MOV16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
9330 { 4859 /* movw */, X86::MOV16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
9331 { 4859 /* movw */, X86::MOV16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
9332 { 4859 /* movw */, X86::MOV16ri, Convert__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR16 }, },
9337 { 4859 /* movw */, X86::MOV16rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
9338 { 4864 /* movw.s */, X86::MOV16rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
9338 { 4864 /* movw.s */, X86::MOV16rr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
9343 { 4885 /* movzbw */, X86::MOVZX16rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR16 }, },
9344 { 4885 /* movzbw */, X86::MOVZX16rm8, Convert__Reg1_1__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR16 }, },
9345 { 4892 /* movzwl */, X86::MOVZX32rr16, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR32 }, },
9347 { 4899 /* movzwq */, X86::MOVZX64rr16, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR64 }, },
9349 { 4906 /* movzx */, X86::MOVZX32rr16, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR32 }, },
9350 { 4906 /* movzx */, X86::MOVZX64rr16, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR64 }, },
9351 { 4906 /* movzx */, X86::MOVZX16rr8, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR8, MCK_GR16 }, },
9354 { 4906 /* movzx */, X86::MOVZX16rm8, Convert__Reg1_1__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_GR16 }, },
9371 { 4963 /* mulw */, X86::MUL16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
9389 { 5017 /* negw */, X86::NEG16r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
9396 { 5036 /* nopw */, X86::NOOPWr, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
9404 { 5060 /* notw */, X86::NOT16r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
9434 { 5090 /* orw */, X86::OR16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
9434 { 5090 /* orw */, X86::OR16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
9435 { 5090 /* orw */, X86::OR16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
9437 { 5090 /* orw */, X86::OR16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_GR16 }, },
9440 { 5090 /* orw */, X86::OR16ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR16 }, },
9442 { 5090 /* orw */, X86::OR16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
9785 { 6097 /* popcntw */, X86::POPCNT16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
9785 { 6097 /* popcntw */, X86::POPCNT16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
9786 { 6097 /* popcntw */, X86::POPCNT16rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
9806 { 6144 /* popw */, X86::POP16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
9992 { 6596 /* pushw */, X86::PUSH16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
10018 { 6626 /* rclw */, X86::RCL16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
10020 { 6626 /* rclw */, X86::RCL16rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR16 }, },
10022 { 6626 /* rclw */, X86::RCL16ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16 }, },
10046 { 6662 /* rcrw */, X86::RCR16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
10048 { 6662 /* rcrw */, X86::RCR16rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR16 }, },
10050 { 6662 /* rcrw */, X86::RCR16ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16 }, },
10063 { 6773 /* rdrandw */, X86::RDRAND16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
10066 { 6804 /* rdseedw */, X86::RDSEED16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
10098 { 6904 /* rolw */, X86::ROL16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
10100 { 6904 /* rolw */, X86::ROL16rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR16 }, },
10102 { 6904 /* rolw */, X86::ROL16ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16 }, },
10122 { 6928 /* rorw */, X86::ROR16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
10124 { 6928 /* rorw */, X86::ROR16rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR16 }, },
10126 { 6928 /* rorw */, X86::ROR16ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16 }, },
10166 { 7040 /* sarw */, X86::SAR16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
10168 { 7040 /* sarw */, X86::SAR16rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR16 }, },
10170 { 7040 /* sarw */, X86::SAR16ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16 }, },
10201 { 7093 /* sbbw */, X86::SBB16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
10201 { 7093 /* sbbw */, X86::SBB16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
10202 { 7093 /* sbbw */, X86::SBB16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
10204 { 7093 /* sbbw */, X86::SBB16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_GR16 }, },
10207 { 7093 /* sbbw */, X86::SBB16ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR16 }, },
10209 { 7093 /* sbbw */, X86::SBB16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
10293 { 7364 /* shldw */, X86::SHLD16rrCL, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
10293 { 7364 /* shldw */, X86::SHLD16rrCL, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
10294 { 7364 /* shldw */, X86::SHLD16mrCL, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
10295 { 7364 /* shldw */, X86::SHLD16rrCL, Convert__Reg1_2__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_CL, MCK_GR16, MCK_GR16 }, },
10295 { 7364 /* shldw */, X86::SHLD16rrCL, Convert__Reg1_2__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_CL, MCK_GR16, MCK_GR16 }, },
10296 { 7364 /* shldw */, X86::SHLD16mrCL, Convert__Mem165_2__Reg1_1, AMFBS_None, { MCK_CL, MCK_GR16, MCK_Mem16 }, },
10297 { 7364 /* shldw */, X86::SHLD16rri8, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16, MCK_GR16 }, },
10297 { 7364 /* shldw */, X86::SHLD16rri8, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16, MCK_GR16 }, },
10298 { 7364 /* shldw */, X86::SHLD16mri8, Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16, MCK_Mem16 }, },
10311 { 7380 /* shlw */, X86::SHL16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
10313 { 7380 /* shlw */, X86::SHL16rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR16 }, },
10315 { 7380 /* shlw */, X86::SHL16ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16 }, },
10339 { 7428 /* shrdw */, X86::SHRD16rrCL, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
10339 { 7428 /* shrdw */, X86::SHRD16rrCL, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
10340 { 7428 /* shrdw */, X86::SHRD16mrCL, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
10341 { 7428 /* shrdw */, X86::SHRD16rrCL, Convert__Reg1_2__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_CL, MCK_GR16, MCK_GR16 }, },
10341 { 7428 /* shrdw */, X86::SHRD16rrCL, Convert__Reg1_2__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_CL, MCK_GR16, MCK_GR16 }, },
10342 { 7428 /* shrdw */, X86::SHRD16mrCL, Convert__Mem165_2__Reg1_1, AMFBS_None, { MCK_CL, MCK_GR16, MCK_Mem16 }, },
10343 { 7428 /* shrdw */, X86::SHRD16rri8, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16, MCK_GR16 }, },
10343 { 7428 /* shrdw */, X86::SHRD16rri8, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16, MCK_GR16 }, },
10344 { 7428 /* shrdw */, X86::SHRD16mri8, Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16, MCK_Mem16 }, },
10357 { 7444 /* shrw */, X86::SHR16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
10359 { 7444 /* shrw */, X86::SHR16rCL, Convert__Reg1_1__Tie0_1_1, AMFBS_None, { MCK_CL, MCK_GR16 }, },
10361 { 7444 /* shrw */, X86::SHR16ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR16 }, },
10378 { 7533 /* sldtw */, X86::SLDT16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
10384 { 7563 /* smsww */, X86::SMSW16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
10415 { 7679 /* strw */, X86::STR16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
10449 { 7727 /* subw */, X86::SUB16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
10449 { 7727 /* subw */, X86::SUB16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
10450 { 7727 /* subw */, X86::SUB16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
10452 { 7727 /* subw */, X86::SUB16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_GR16 }, },
10455 { 7727 /* subw */, X86::SUB16ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR16 }, },
10457 { 7727 /* subw */, X86::SUB16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
10487 { 7851 /* testw */, X86::TEST16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
10487 { 7851 /* testw */, X86::TEST16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
10488 { 7851 /* testw */, X86::TEST16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
10490 { 7851 /* testw */, X86::TEST16ri, Convert__Reg1_1__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR16 }, },
10492 { 7851 /* testw */, X86::TEST16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
10498 { 7884 /* tzcntw */, X86::TZCNT16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
10498 { 7884 /* tzcntw */, X86::TZCNT16rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
10499 { 7884 /* tzcntw */, X86::TZCNT16rm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
10510 { 7936 /* umonitor */, X86::UMONITOR16, Convert__Reg1_0, AMFBS_Not64BitMode, { MCK_GR16 }, },
12476 { 9548 /* verr */, X86::VERRr, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
12478 { 9553 /* verw */, X86::VERWr, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
22466 { 16082 /* xaddw */, X86::XADD16rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22466 { 16082 /* xaddw */, X86::XADD16rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22467 { 16082 /* xaddw */, X86::XADD16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
22485 { 16118 /* xchgw */, X86::XCHG16ar, Convert__Reg1_1__Tie0_2_2, AMFBS_None, { MCK_AX, MCK_GR16 }, },
22486 { 16118 /* xchgw */, X86::XCHG16ar, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16, MCK_AX }, },
22487 { 16118 /* xchgw */, X86::XCHG16rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22487 { 16118 /* xchgw */, X86::XCHG16rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22488 { 16118 /* xchgw */, X86::XCHG16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
22489 { 16118 /* xchgw */, X86::XCHG16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
22526 { 16223 /* xorw */, X86::XOR16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22526 { 16223 /* xorw */, X86::XOR16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22527 { 16223 /* xorw */, X86::XOR16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
22529 { 16223 /* xorw */, X86::XOR16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, AMFBS_None, { MCK_ImmSExti16i8, MCK_GR16 }, },
22532 { 16223 /* xorw */, X86::XOR16ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, AMFBS_None, { MCK_Imm, MCK_GR16 }, },
22534 { 16223 /* xorw */, X86::XOR16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
22570 { 16 /* adc */, X86::ADC16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22570 { 16 /* adc */, X86::ADC16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22571 { 16 /* adc */, X86::ADC16ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1, AMFBS_None, { MCK_GR16, MCK_ImmSExti16i8 }, },
22572 { 16 /* adc */, X86::ADC16ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR16, MCK_Imm }, },
22573 { 16 /* adc */, X86::ADC16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
22585 { 16 /* adc */, X86::ADC16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
22607 { 57 /* add */, X86::ADD16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22607 { 57 /* add */, X86::ADD16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22608 { 57 /* add */, X86::ADD16ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1, AMFBS_None, { MCK_GR16, MCK_ImmSExti16i8 }, },
22609 { 57 /* add */, X86::ADD16ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR16, MCK_Imm }, },
22610 { 57 /* add */, X86::ADD16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
22622 { 57 /* add */, X86::ADD16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
22668 { 199 /* and */, X86::AND16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22668 { 199 /* and */, X86::AND16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22669 { 199 /* and */, X86::AND16ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1, AMFBS_None, { MCK_GR16, MCK_ImmSExti16i8 }, },
22670 { 199 /* and */, X86::AND16ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR16, MCK_Imm }, },
22671 { 199 /* and */, X86::AND16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
22683 { 199 /* and */, X86::AND16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
22706 { 266 /* arpl */, X86::ARPL16rr, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_GR16, MCK_GR16 }, },
22706 { 266 /* arpl */, X86::ARPL16rr, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_GR16, MCK_GR16 }, },
22707 { 266 /* arpl */, X86::ARPL16mr, Convert__Mem165_0__Reg1_1, AMFBS_Not64BitMode, { MCK_Mem16, MCK_GR16 }, },
22789 { 576 /* bound */, X86::BOUNDS16rm, Convert__Reg1_0__Mem165_1, AMFBS_Not64BitMode, { MCK_GR16, MCK_Mem16 }, },
22791 { 582 /* bsf */, X86::BSF16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22791 { 582 /* bsf */, X86::BSF16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22792 { 582 /* bsf */, X86::BSF16rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
22797 { 601 /* bsr */, X86::BSR16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22797 { 601 /* bsr */, X86::BSR16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22798 { 601 /* bsr */, X86::BSR16rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
22805 { 640 /* bt */, X86::BT16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22805 { 640 /* bt */, X86::BT16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22806 { 640 /* bt */, X86::BT16ri8, Convert__Reg1_0__ImmUnsignedi81_1, AMFBS_None, { MCK_GR16, MCK_ImmUnsignedi8 }, },
22811 { 640 /* bt */, X86::BT16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
22817 { 643 /* btc */, X86::BTC16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22817 { 643 /* btc */, X86::BTC16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22818 { 643 /* btc */, X86::BTC16ri8, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR16, MCK_ImmUnsignedi8 }, },
22823 { 643 /* btc */, X86::BTC16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
22829 { 670 /* btr */, X86::BTR16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22829 { 670 /* btr */, X86::BTR16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22830 { 670 /* btr */, X86::BTR16ri8, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR16, MCK_ImmUnsignedi8 }, },
22835 { 670 /* btr */, X86::BTR16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
22841 { 689 /* bts */, X86::BTS16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22841 { 689 /* bts */, X86::BTS16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22842 { 689 /* bts */, X86::BTS16ri8, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR16, MCK_ImmUnsignedi8 }, },
22847 { 689 /* bts */, X86::BTS16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
22857 { 729 /* call */, X86::CALL16r, Convert__Reg1_0, AMFBS_Not64BitMode, { MCK_GR16 }, },
22882 { 820 /* clr */, X86::XOR16rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR16 }, },
22894 { 884 /* cmova */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_7, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22894 { 884 /* cmova */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_7, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22895 { 884 /* cmova */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_7, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
22900 { 890 /* cmovae */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_3, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22900 { 890 /* cmovae */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_3, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22901 { 890 /* cmovae */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_3, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
22906 { 942 /* cmovb */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_2, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22906 { 942 /* cmovb */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_2, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22907 { 942 /* cmovb */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_2, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
22912 { 948 /* cmovbe */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_6, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22912 { 948 /* cmovbe */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_6, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22913 { 948 /* cmovbe */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_6, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
22918 { 1000 /* cmove */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_4, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22918 { 1000 /* cmove */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_4, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22919 { 1000 /* cmove */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_4, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
22924 { 1027 /* cmovg */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_15, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22924 { 1027 /* cmovg */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_15, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22925 { 1027 /* cmovg */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_15, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
22930 { 1033 /* cmovge */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_13, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22930 { 1033 /* cmovge */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_13, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22931 { 1033 /* cmovge */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_13, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
22936 { 1085 /* cmovl */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_12, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22936 { 1085 /* cmovl */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_12, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22937 { 1085 /* cmovl */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_12, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
22942 { 1091 /* cmovle */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_14, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22942 { 1091 /* cmovle */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_14, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22943 { 1091 /* cmovle */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_14, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
22948 { 1143 /* cmovne */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_5, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22948 { 1143 /* cmovne */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_5, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22949 { 1143 /* cmovne */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_5, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
22954 { 1174 /* cmovno */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22954 { 1174 /* cmovno */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22955 { 1174 /* cmovno */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
22960 { 1205 /* cmovnp */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_11, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22960 { 1205 /* cmovnp */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_11, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22961 { 1205 /* cmovnp */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_11, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
22966 { 1236 /* cmovns */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_9, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22966 { 1236 /* cmovns */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_9, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22967 { 1236 /* cmovns */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_9, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
22972 { 1267 /* cmovo */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22972 { 1267 /* cmovo */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_0, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22973 { 1267 /* cmovo */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
22978 { 1294 /* cmovp */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_10, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22978 { 1294 /* cmovp */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_10, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22979 { 1294 /* cmovp */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_10, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
22984 { 1321 /* cmovs */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_8, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22984 { 1321 /* cmovs */, X86::CMOV16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_8, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22985 { 1321 /* cmovs */, X86::CMOV16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1__imm_95_8, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
22997 { 1348 /* cmp */, X86::CMP16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22997 { 1348 /* cmp */, X86::CMP16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
22998 { 1348 /* cmp */, X86::CMP16ri8, Convert__Reg1_0__ImmSExti16i81_1, AMFBS_None, { MCK_GR16, MCK_ImmSExti16i8 }, },
22999 { 1348 /* cmp */, X86::CMP16ri, Convert__Reg1_0__Imm1_1, AMFBS_None, { MCK_GR16, MCK_Imm }, },
23000 { 1348 /* cmp */, X86::CMP16rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
23012 { 1348 /* cmp */, X86::CMP16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
23039 { 1425 /* cmpxchg */, X86::CMPXCHG16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23039 { 1425 /* cmpxchg */, X86::CMPXCHG16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23043 { 1425 /* cmpxchg */, X86::CMPXCHG16rm, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
23055 { 1519 /* crc32 */, X86::CRC32r32r16, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR16 }, },
23127 { 1918 /* dec */, X86::DEC16r_alt, Convert__Reg1_0__Tie0_1_1, AMFBS_Not64BitMode, { MCK_GR16 }, },
23128 { 1918 /* dec */, X86::DEC16r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
23137 { 1942 /* div */, X86::DIV16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
23147 { 1942 /* div */, X86::DIV16r, Convert__Reg1_1, AMFBS_None, { MCK_AX, MCK_GR16 }, },
23172 { 2042 /* enqcmd */, X86::ENQCMD16, Convert__Reg1_0__Mem5125_1, AMFBS_Not64BitMode, { MCK_GR16, MCK_Mem512 }, },
23175 { 2049 /* enqcmds */, X86::ENQCMDS16, Convert__Reg1_0__Mem5125_1, AMFBS_Not64BitMode, { MCK_GR16, MCK_Mem512 }, },
23396 { 3105 /* idiv */, X86::IDIV16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
23406 { 3105 /* idiv */, X86::IDIV16r, Convert__Reg1_1, AMFBS_None, { MCK_AX, MCK_GR16 }, },
23412 { 3134 /* imul */, X86::IMUL16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
23420 { 3134 /* imul */, X86::IMUL16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23420 { 3134 /* imul */, X86::IMUL16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23421 { 3134 /* imul */, X86::IMUL16rri8, Convert__Reg1_0__Reg1_0__ImmSExti16i81_1, AMFBS_None, { MCK_GR16, MCK_ImmSExti16i8 }, },
23422 { 3134 /* imul */, X86::IMUL16rri, Convert__Reg1_0__Reg1_0__Imm1_1, AMFBS_None, { MCK_GR16, MCK_Imm }, },
23423 { 3134 /* imul */, X86::IMUL16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
23432 { 3134 /* imul */, X86::IMUL16rri8, Convert__Reg1_0__Reg1_1__ImmSExti16i81_2, AMFBS_None, { MCK_GR16, MCK_GR16, MCK_ImmSExti16i8 }, },
23432 { 3134 /* imul */, X86::IMUL16rri8, Convert__Reg1_0__Reg1_1__ImmSExti16i81_2, AMFBS_None, { MCK_GR16, MCK_GR16, MCK_ImmSExti16i8 }, },
23433 { 3134 /* imul */, X86::IMUL16rri, Convert__Reg1_0__Reg1_1__Imm1_2, AMFBS_None, { MCK_GR16, MCK_GR16, MCK_Imm }, },
23433 { 3134 /* imul */, X86::IMUL16rri, Convert__Reg1_0__Reg1_1__Imm1_2, AMFBS_None, { MCK_GR16, MCK_GR16, MCK_Imm }, },
23434 { 3134 /* imul */, X86::IMUL16rmi8, Convert__Reg1_0__Mem165_1__ImmSExti16i81_2, AMFBS_None, { MCK_GR16, MCK_Mem16, MCK_ImmSExti16i8 }, },
23435 { 3134 /* imul */, X86::IMUL16rmi, Convert__Reg1_0__Mem165_1__Imm1_2, AMFBS_None, { MCK_GR16, MCK_Mem16, MCK_Imm }, },
23452 { 3170 /* inc */, X86::INC16r_alt, Convert__Reg1_0__Tie0_1_1, AMFBS_Not64BitMode, { MCK_GR16 }, },
23453 { 3170 /* inc */, X86::INC16r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
23505 { 3387 /* jmp */, X86::JMP16r, Convert__Reg1_0, AMFBS_Not64BitMode, { MCK_GR16 }, },
23593 { 3801 /* lar */, X86::LAR16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23593 { 3801 /* lar */, X86::LAR16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23594 { 3801 /* lar */, X86::LAR16rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
23607 { 3861 /* lds */, X86::LDS16rm, Convert__Reg1_0__Mem5_1, AMFBS_Not64BitMode, { MCK_GR16, MCK_Mem }, },
23609 { 3875 /* lea */, X86::LEA16r, Convert__Reg1_0__Mem5_1, AMFBS_None, { MCK_GR16, MCK_Mem }, },
23615 { 3900 /* les */, X86::LES16rm, Convert__Reg1_0__Mem5_1, AMFBS_Not64BitMode, { MCK_GR16, MCK_Mem }, },
23618 { 3921 /* lfs */, X86::LFS16rm, Convert__Reg1_0__Mem5_1, AMFBS_None, { MCK_GR16, MCK_Mem }, },
23624 { 3969 /* lgs */, X86::LGS16rm, Convert__Reg1_0__Mem5_1, AMFBS_None, { MCK_GR16, MCK_Mem }, },
23635 { 4040 /* lldt */, X86::LLDT16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
23639 { 4058 /* lmsw */, X86::LMSW16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
23661 { 4145 /* lsl */, X86::LSL16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23661 { 4145 /* lsl */, X86::LSL16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23662 { 4145 /* lsl */, X86::LSL16rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
23667 { 4164 /* lss */, X86::LSS16rm, Convert__Reg1_0__Mem5_1, AMFBS_None, { MCK_GR16, MCK_Mem }, },
23670 { 4183 /* ltr */, X86::LTRr, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
23680 { 4206 /* lzcnt */, X86::LZCNT16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23680 { 4206 /* lzcnt */, X86::LZCNT16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23681 { 4206 /* lzcnt */, X86::LZCNT16rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
23723 { 4333 /* mov */, X86::MOV16sr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_SEGMENT_REG, MCK_GR16 }, },
23731 { 4333 /* mov */, X86::MOV16rs, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_SEGMENT_REG }, },
23732 { 4333 /* mov */, X86::MOV16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23732 { 4333 /* mov */, X86::MOV16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23733 { 4333 /* mov */, X86::MOV16ri, Convert__Reg1_0__Imm1_1, AMFBS_None, { MCK_GR16, MCK_Imm }, },
23734 { 4333 /* mov */, X86::MOV16rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
23759 { 4333 /* mov */, X86::MOV16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
23767 { 4337 /* mov.s */, X86::MOV16rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23767 { 4337 /* mov.s */, X86::MOV16rr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23788 { 4426 /* movbe */, X86::MOVBE16rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
23791 { 4426 /* movbe */, X86::MOVBE16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
23808 { 4466 /* movdir64b */, X86::MOVDIR64B16, Convert__Reg1_0__Mem5125_1, AMFBS_Not64BitMode, { MCK_GR16, MCK_Mem512 }, },
23876 { 4814 /* movsx */, X86::MOVSX16rr8, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR8 }, },
23877 { 4814 /* movsx */, X86::MOVSX16rm8, Convert__Reg1_0__Mem85_1, AMFBS_None, { MCK_GR16, MCK_Mem8 }, },
23878 { 4814 /* movsx */, X86::MOVSX32rr16, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR16 }, },
23882 { 4814 /* movsx */, X86::MOVSX64rr16, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR16 }, },
23896 { 4906 /* movzx */, X86::MOVZX16rr8, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR8 }, },
23897 { 4906 /* movzx */, X86::MOVZX16rm8, Convert__Reg1_0__Mem85_1, AMFBS_None, { MCK_GR16, MCK_Mem8 }, },
23898 { 4906 /* movzx */, X86::MOVZX32rr16, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_GR16 }, },
23902 { 4906 /* movzx */, X86::MOVZX64rr16, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_GR16 }, },
23908 { 4920 /* mul */, X86::MUL16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
23934 { 4998 /* neg */, X86::NEG16r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
23943 { 5022 /* nop */, X86::NOOPWr, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
23949 { 5041 /* not */, X86::NOT16r, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
23964 { 5065 /* or */, X86::OR16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23964 { 5065 /* or */, X86::OR16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
23965 { 5065 /* or */, X86::OR16ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1, AMFBS_None, { MCK_GR16, MCK_ImmSExti16i8 }, },
23966 { 5065 /* or */, X86::OR16ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR16, MCK_Imm }, },
23967 { 5065 /* or */, X86::OR16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
23979 { 5065 /* or */, X86::OR16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
24345 { 6058 /* pop */, X86::POP16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
24353 { 6074 /* popcnt */, X86::POPCNT16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
24353 { 6074 /* popcnt */, X86::POPCNT16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
24354 { 6074 /* popcnt */, X86::POPCNT16rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
24533 { 6531 /* push */, X86::PUSH16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
24554 { 6607 /* rcl */, X86::RCL16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
24562 { 6607 /* rcl */, X86::RCL16rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16, MCK_CL }, },
24563 { 6607 /* rcl */, X86::RCL16ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR16, MCK_ImmUnsignedi8 }, },
24582 { 6643 /* rcr */, X86::RCR16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
24590 { 6643 /* rcr */, X86::RCR16rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16, MCK_CL }, },
24591 { 6643 /* rcr */, X86::RCR16ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR16, MCK_ImmUnsignedi8 }, },
24615 { 6750 /* rdrand */, X86::RDRAND16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
24618 { 6781 /* rdseed */, X86::RDSEED16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
24640 { 6885 /* rol */, X86::ROL16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
24648 { 6885 /* rol */, X86::ROL16rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16, MCK_CL }, },
24649 { 6885 /* rol */, X86::ROL16ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR16, MCK_ImmUnsignedi8 }, },
24664 { 6909 /* ror */, X86::ROR16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
24672 { 6909 /* ror */, X86::ROR16rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16, MCK_CL }, },
24673 { 6909 /* ror */, X86::ROR16ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR16, MCK_ImmUnsignedi8 }, },
24708 { 7021 /* sar */, X86::SAR16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
24716 { 7021 /* sar */, X86::SAR16rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16, MCK_CL }, },
24717 { 7021 /* sar */, X86::SAR16ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR16, MCK_ImmUnsignedi8 }, },
24744 { 7074 /* sbb */, X86::SBB16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
24744 { 7074 /* sbb */, X86::SBB16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
24745 { 7074 /* sbb */, X86::SBB16ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1, AMFBS_None, { MCK_GR16, MCK_ImmSExti16i8 }, },
24746 { 7074 /* sbb */, X86::SBB16ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR16, MCK_Imm }, },
24747 { 7074 /* sbb */, X86::SBB16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
24759 { 7074 /* sbb */, X86::SBB16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
24839 { 7338 /* shl */, X86::SHL16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
24847 { 7338 /* shl */, X86::SHL16rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16, MCK_CL }, },
24848 { 7338 /* shl */, X86::SHL16ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR16, MCK_ImmUnsignedi8 }, },
24863 { 7347 /* shld */, X86::SHLD16rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
24863 { 7347 /* shld */, X86::SHLD16rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
24866 { 7347 /* shld */, X86::SHLD16mrCL, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
24869 { 7347 /* shld */, X86::SHLD16rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16, MCK_CL }, },
24869 { 7347 /* shld */, X86::SHLD16rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16, MCK_CL }, },
24870 { 7347 /* shld */, X86::SHLD16rri8, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR16, MCK_GR16, MCK_ImmUnsignedi8 }, },
24870 { 7347 /* shld */, X86::SHLD16rri8, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR16, MCK_GR16, MCK_ImmUnsignedi8 }, },
24875 { 7347 /* shld */, X86::SHLD16mrCL, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16, MCK_CL }, },
24876 { 7347 /* shld */, X86::SHLD16mri8, Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem16, MCK_GR16, MCK_ImmUnsignedi8 }, },
24885 { 7402 /* shr */, X86::SHR16r1, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16 }, },
24893 { 7402 /* shr */, X86::SHR16rCL, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16, MCK_CL }, },
24894 { 7402 /* shr */, X86::SHR16ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_GR16, MCK_ImmUnsignedi8 }, },
24909 { 7411 /* shrd */, X86::SHRD16rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
24909 { 7411 /* shrd */, X86::SHRD16rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
24912 { 7411 /* shrd */, X86::SHRD16mrCL, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
24915 { 7411 /* shrd */, X86::SHRD16rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16, MCK_CL }, },
24915 { 7411 /* shrd */, X86::SHRD16rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16, MCK_CL }, },
24916 { 7411 /* shrd */, X86::SHRD16rri8, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR16, MCK_GR16, MCK_ImmUnsignedi8 }, },
24916 { 7411 /* shrd */, X86::SHRD16rri8, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR16, MCK_GR16, MCK_ImmUnsignedi8 }, },
24921 { 7411 /* shrd */, X86::SHRD16mrCL, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16, MCK_CL }, },
24922 { 7411 /* shrd */, X86::SHRD16mri8, Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem16, MCK_GR16, MCK_ImmUnsignedi8 }, },
24939 { 7516 /* sldt */, X86::SLDT16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
24946 { 7546 /* smsw */, X86::SMSW16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
24981 { 7665 /* str */, X86::STR16r, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
24992 { 7684 /* sub */, X86::SUB16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
24992 { 7684 /* sub */, X86::SUB16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
24993 { 7684 /* sub */, X86::SUB16ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1, AMFBS_None, { MCK_GR16, MCK_ImmSExti16i8 }, },
24994 { 7684 /* sub */, X86::SUB16ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR16, MCK_Imm }, },
24995 { 7684 /* sub */, X86::SUB16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
25007 { 7684 /* sub */, X86::SUB16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
25041 { 7828 /* test */, X86::TEST16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
25041 { 7828 /* test */, X86::TEST16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
25042 { 7828 /* test */, X86::TEST16ri, Convert__Reg1_0__Imm1_1, AMFBS_None, { MCK_GR16, MCK_Imm }, },
25043 { 7828 /* test */, X86::TEST16mr, Convert__Mem165_1__Reg1_0, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
25053 { 7828 /* test */, X86::TEST16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
25062 { 7864 /* tzcnt */, X86::TZCNT16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
25062 { 7864 /* tzcnt */, X86::TZCNT16rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
25063 { 7864 /* tzcnt */, X86::TZCNT16rm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
25078 { 7936 /* umonitor */, X86::UMONITOR16, Convert__Reg1_0, AMFBS_Not64BitMode, { MCK_GR16 }, },
26868 { 9548 /* verr */, X86::VERRr, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
26870 { 9553 /* verw */, X86::VERWr, Convert__Reg1_0, AMFBS_None, { MCK_GR16 }, },
36828 { 16059 /* xadd */, X86::XADD16rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
36828 { 16059 /* xadd */, X86::XADD16rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
36832 { 16059 /* xadd */, X86::XADD16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
36838 { 16095 /* xchg */, X86::XCHG16ar, Convert__Reg1_1__Tie0_2_2, AMFBS_None, { MCK_AX, MCK_GR16 }, },
36843 { 16095 /* xchg */, X86::XCHG16ar, Convert__Reg1_0__Tie0_1_1, AMFBS_None, { MCK_GR16, MCK_AX }, },
36844 { 16095 /* xchg */, X86::XCHG16rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
36844 { 16095 /* xchg */, X86::XCHG16rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
36845 { 16095 /* xchg */, X86::XCHG16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
36854 { 16095 /* xchg */, X86::XCHG16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },
36873 { 16192 /* xor */, X86::XOR16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
36873 { 16192 /* xor */, X86::XOR16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_GR16, MCK_GR16 }, },
36874 { 16192 /* xor */, X86::XOR16ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1, AMFBS_None, { MCK_GR16, MCK_ImmSExti16i8 }, },
36875 { 16192 /* xor */, X86::XOR16ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, AMFBS_None, { MCK_GR16, MCK_Imm }, },
36876 { 16192 /* xor */, X86::XOR16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, AMFBS_None, { MCK_GR16, MCK_Mem16 }, },
36888 { 16192 /* xor */, X86::XOR16mr, Convert__Mem165_0__Reg1_1, AMFBS_None, { MCK_Mem16, MCK_GR16 }, },