|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/X86/X86GenAsmMatcher.inc 5871 case MCK_FR32: return true;
6414 case MCK_FR32:
7201 case X86::XMM1: OpKind = MCK_FR32; break;
7202 case X86::XMM2: OpKind = MCK_FR32; break;
7203 case X86::XMM3: OpKind = MCK_FR32; break;
7204 case X86::XMM4: OpKind = MCK_FR32; break;
7205 case X86::XMM5: OpKind = MCK_FR32; break;
7206 case X86::XMM6: OpKind = MCK_FR32; break;
7207 case X86::XMM7: OpKind = MCK_FR32; break;
7208 case X86::XMM8: OpKind = MCK_FR32; break;
7209 case X86::XMM9: OpKind = MCK_FR32; break;
7210 case X86::XMM10: OpKind = MCK_FR32; break;
7211 case X86::XMM11: OpKind = MCK_FR32; break;
7212 case X86::XMM12: OpKind = MCK_FR32; break;
7213 case X86::XMM13: OpKind = MCK_FR32; break;
7214 case X86::XMM14: OpKind = MCK_FR32; break;
7215 case X86::XMM15: OpKind = MCK_FR32; break;
7479 case MCK_FR32: return "MCK_FR32";
8022 { 71 /* addpd */, X86::ADDPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8022 { 71 /* addpd */, X86::ADDPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8023 { 71 /* addpd */, X86::ADDPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8024 { 77 /* addps */, X86::ADDPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8024 { 77 /* addps */, X86::ADDPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8025 { 77 /* addps */, X86::ADDPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8035 { 88 /* addsd */, X86::ADDSDrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8035 { 88 /* addsd */, X86::ADDSDrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8036 { 88 /* addsd */, X86::ADDSDrm_Int, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
8037 { 94 /* addss */, X86::ADDSSrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8037 { 94 /* addss */, X86::ADDSSrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8038 { 94 /* addss */, X86::ADDSSrm_Int, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
8039 { 100 /* addsubpd */, X86::ADDSUBPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8039 { 100 /* addsubpd */, X86::ADDSUBPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8040 { 100 /* addsubpd */, X86::ADDSUBPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8041 { 109 /* addsubps */, X86::ADDSUBPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8041 { 109 /* addsubps */, X86::ADDSUBPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8042 { 109 /* addsubps */, X86::ADDSUBPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8056 { 140 /* aesdec */, X86::AESDECrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8056 { 140 /* aesdec */, X86::AESDECrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8057 { 140 /* aesdec */, X86::AESDECrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8058 { 147 /* aesdeclast */, X86::AESDECLASTrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8058 { 147 /* aesdeclast */, X86::AESDECLASTrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8059 { 147 /* aesdeclast */, X86::AESDECLASTrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8060 { 158 /* aesenc */, X86::AESENCrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8060 { 158 /* aesenc */, X86::AESENCrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8061 { 158 /* aesenc */, X86::AESENCrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8062 { 165 /* aesenclast */, X86::AESENCLASTrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8062 { 165 /* aesenclast */, X86::AESENCLASTrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8063 { 165 /* aesenclast */, X86::AESENCLASTrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8064 { 176 /* aesimc */, X86::AESIMCrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8064 { 176 /* aesimc */, X86::AESIMCrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8065 { 176 /* aesimc */, X86::AESIMCrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8066 { 183 /* aeskeygenassist */, X86::AESKEYGENASSIST128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8066 { 183 /* aeskeygenassist */, X86::AESKEYGENASSIST128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8067 { 183 /* aeskeygenassist */, X86::AESKEYGENASSIST128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8085 { 224 /* andnpd */, X86::ANDNPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8085 { 224 /* andnpd */, X86::ANDNPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8086 { 224 /* andnpd */, X86::ANDNPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8087 { 231 /* andnps */, X86::ANDNPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8087 { 231 /* andnps */, X86::ANDNPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8088 { 231 /* andnps */, X86::ANDNPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8091 { 244 /* andpd */, X86::ANDPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8091 { 244 /* andpd */, X86::ANDPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8092 { 244 /* andpd */, X86::ANDPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8093 { 250 /* andps */, X86::ANDPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8093 { 250 /* andps */, X86::ANDPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8094 { 250 /* andps */, X86::ANDPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8143 { 394 /* blendpd */, X86::BLENDPDrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8143 { 394 /* blendpd */, X86::BLENDPDrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8144 { 394 /* blendpd */, X86::BLENDPDrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8145 { 402 /* blendps */, X86::BLENDPSrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8145 { 402 /* blendps */, X86::BLENDPSrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8146 { 402 /* blendps */, X86::BLENDPSrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8147 { 410 /* blendvpd */, X86::BLENDVPDrr0, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8147 { 410 /* blendvpd */, X86::BLENDVPDrr0, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8148 { 410 /* blendvpd */, X86::BLENDVPDrm0, Convert__Reg1_1__Tie0_2_2__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8149 { 410 /* blendvpd */, X86::BLENDVPDrr0, Convert__Reg1_2__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_XMM0, MCK_FR32, MCK_FR32 }, },
8149 { 410 /* blendvpd */, X86::BLENDVPDrr0, Convert__Reg1_2__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_XMM0, MCK_FR32, MCK_FR32 }, },
8150 { 410 /* blendvpd */, X86::BLENDVPDrm0, Convert__Reg1_2__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_XMM0, MCK_Mem128, MCK_FR32 }, },
8151 { 419 /* blendvps */, X86::BLENDVPSrr0, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8151 { 419 /* blendvps */, X86::BLENDVPSrr0, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8152 { 419 /* blendvps */, X86::BLENDVPSrm0, Convert__Reg1_1__Tie0_2_2__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8153 { 419 /* blendvps */, X86::BLENDVPSrr0, Convert__Reg1_2__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_XMM0, MCK_FR32, MCK_FR32 }, },
8153 { 419 /* blendvps */, X86::BLENDVPSrr0, Convert__Reg1_2__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_XMM0, MCK_FR32, MCK_FR32 }, },
8154 { 419 /* blendvps */, X86::BLENDVPSrm0, Convert__Reg1_2__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_XMM0, MCK_Mem128, MCK_FR32 }, },
8415 { 1362 /* cmppd */, X86::CMPPDrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8415 { 1362 /* cmppd */, X86::CMPPDrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8416 { 1362 /* cmppd */, X86::CMPPDrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8417 { 1368 /* cmpps */, X86::CMPPSrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8417 { 1368 /* cmpps */, X86::CMPPSrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8418 { 1368 /* cmpps */, X86::CMPPSrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8429 { 1390 /* cmpsd */, X86::CMPSDrr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8429 { 1390 /* cmpsd */, X86::CMPSDrr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8430 { 1390 /* cmpsd */, X86::CMPSDrm_Int, Convert__Reg1_2__Tie0_1_1__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32 }, },
8433 { 1408 /* cmpss */, X86::CMPSSrr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8433 { 1408 /* cmpss */, X86::CMPSSrr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8434 { 1408 /* cmpss */, X86::CMPSSrm_Int, Convert__Reg1_2__Tie0_1_1__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32 }, },
8455 { 1490 /* comisd */, X86::COMISDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8455 { 1490 /* comisd */, X86::COMISDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8456 { 1490 /* comisd */, X86::COMISDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
8457 { 1497 /* comiss */, X86::COMISSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8457 { 1497 /* comiss */, X86::COMISSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8458 { 1497 /* comiss */, X86::COMISSrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
8472 { 1556 /* cvtdq2pd */, X86::CVTDQ2PDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8472 { 1556 /* cvtdq2pd */, X86::CVTDQ2PDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8473 { 1556 /* cvtdq2pd */, X86::CVTDQ2PDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
8474 { 1565 /* cvtdq2ps */, X86::CVTDQ2PSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8474 { 1565 /* cvtdq2ps */, X86::CVTDQ2PSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8475 { 1565 /* cvtdq2ps */, X86::CVTDQ2PSrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8476 { 1574 /* cvtpd2dq */, X86::CVTPD2DQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8476 { 1574 /* cvtpd2dq */, X86::CVTPD2DQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8477 { 1574 /* cvtpd2dq */, X86::CVTPD2DQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8478 { 1583 /* cvtpd2pi */, X86::MMX_CVTPD2PIirr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR64 }, },
8480 { 1592 /* cvtpd2ps */, X86::CVTPD2PSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8480 { 1592 /* cvtpd2ps */, X86::CVTPD2PSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8481 { 1592 /* cvtpd2ps */, X86::CVTPD2PSrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8482 { 1601 /* cvtpi2pd */, X86::MMX_CVTPI2PDirr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_FR32 }, },
8483 { 1601 /* cvtpi2pd */, X86::MMX_CVTPI2PDirm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
8484 { 1610 /* cvtpi2ps */, X86::MMX_CVTPI2PSirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_FR32 }, },
8485 { 1610 /* cvtpi2ps */, X86::MMX_CVTPI2PSirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
8486 { 1619 /* cvtps2dq */, X86::CVTPS2DQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8486 { 1619 /* cvtps2dq */, X86::CVTPS2DQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8487 { 1619 /* cvtps2dq */, X86::CVTPS2DQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8488 { 1628 /* cvtps2pd */, X86::CVTPS2PDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8488 { 1628 /* cvtps2pd */, X86::CVTPS2PDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8489 { 1628 /* cvtps2pd */, X86::CVTPS2PDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
8490 { 1637 /* cvtps2pi */, X86::MMX_CVTPS2PIirr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR64 }, },
8492 { 1646 /* cvtsd2si */, X86::CVTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
8493 { 1646 /* cvtsd2si */, X86::CVTSD2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
8496 { 1655 /* cvtsd2sil */, X86::CVTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
8498 { 1665 /* cvtsd2siq */, X86::CVTSD2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
8500 { 1675 /* cvtsd2ss */, X86::CVTSD2SSrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8500 { 1675 /* cvtsd2ss */, X86::CVTSD2SSrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8501 { 1675 /* cvtsd2ss */, X86::CVTSD2SSrm_Int, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
8502 { 1684 /* cvtsi2sd */, X86::CVTSI2SDrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
8503 { 1684 /* cvtsi2sd */, X86::CVTSI642SDrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
8504 { 1684 /* cvtsi2sd */, X86::CVTSI2SDrm_Int, Convert__Reg1_1__Tie0_2_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
8505 { 1693 /* cvtsi2sdl */, X86::CVTSI2SDrr_Int, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
8506 { 1693 /* cvtsi2sdl */, X86::CVTSI2SDrm_Int, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
8507 { 1703 /* cvtsi2sdq */, X86::CVTSI642SDrr_Int, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
8508 { 1703 /* cvtsi2sdq */, X86::CVTSI642SDrm_Int, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
8509 { 1713 /* cvtsi2ss */, X86::CVTSI2SSrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
8510 { 1713 /* cvtsi2ss */, X86::CVTSI642SSrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
8511 { 1713 /* cvtsi2ss */, X86::CVTSI2SSrm_Int, Convert__Reg1_1__Tie0_2_2__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
8512 { 1722 /* cvtsi2ssl */, X86::CVTSI2SSrr_Int, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
8513 { 1722 /* cvtsi2ssl */, X86::CVTSI2SSrm_Int, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
8514 { 1732 /* cvtsi2ssq */, X86::CVTSI642SSrr_Int, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
8515 { 1732 /* cvtsi2ssq */, X86::CVTSI642SSrm_Int, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
8516 { 1742 /* cvtss2sd */, X86::CVTSS2SDrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8516 { 1742 /* cvtss2sd */, X86::CVTSS2SDrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8517 { 1742 /* cvtss2sd */, X86::CVTSS2SDrm_Int, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
8518 { 1751 /* cvtss2si */, X86::CVTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
8519 { 1751 /* cvtss2si */, X86::CVTSS2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
8522 { 1760 /* cvtss2sil */, X86::CVTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
8524 { 1770 /* cvtss2siq */, X86::CVTSS2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
8526 { 1780 /* cvttpd2dq */, X86::CVTTPD2DQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8526 { 1780 /* cvttpd2dq */, X86::CVTTPD2DQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8527 { 1780 /* cvttpd2dq */, X86::CVTTPD2DQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8528 { 1790 /* cvttpd2pi */, X86::MMX_CVTTPD2PIirr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR64 }, },
8530 { 1800 /* cvttps2dq */, X86::CVTTPS2DQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8530 { 1800 /* cvttps2dq */, X86::CVTTPS2DQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8531 { 1800 /* cvttps2dq */, X86::CVTTPS2DQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8532 { 1810 /* cvttps2pi */, X86::MMX_CVTTPS2PIirr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR64 }, },
8534 { 1820 /* cvttsd2si */, X86::CVTTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
8535 { 1820 /* cvttsd2si */, X86::CVTTSD2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
8538 { 1830 /* cvttsd2sil */, X86::CVTTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
8540 { 1841 /* cvttsd2siq */, X86::CVTTSD2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
8542 { 1852 /* cvttss2si */, X86::CVTTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
8543 { 1852 /* cvttss2si */, X86::CVTTSS2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
8546 { 1862 /* cvttss2sil */, X86::CVTTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
8548 { 1873 /* cvttss2siq */, X86::CVTTSS2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
8573 { 1956 /* divpd */, X86::DIVPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8573 { 1956 /* divpd */, X86::DIVPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8574 { 1956 /* divpd */, X86::DIVPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8575 { 1962 /* divps */, X86::DIVPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8575 { 1962 /* divps */, X86::DIVPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8576 { 1962 /* divps */, X86::DIVPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8581 { 1973 /* divsd */, X86::DIVSDrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8581 { 1973 /* divsd */, X86::DIVSDrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8582 { 1973 /* divsd */, X86::DIVSDrm_Int, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
8583 { 1979 /* divss */, X86::DIVSSrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8583 { 1979 /* divss */, X86::DIVSSrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8584 { 1979 /* divss */, X86::DIVSSrm_Int, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
8589 { 1990 /* dppd */, X86::DPPDrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8589 { 1990 /* dppd */, X86::DPPDrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8590 { 1990 /* dppd */, X86::DPPDrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8591 { 1995 /* dpps */, X86::DPPSrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8591 { 1995 /* dpps */, X86::DPPSrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8592 { 1995 /* dpps */, X86::DPPSrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8608 { 2066 /* extractps */, X86::EXTRACTPSrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
8609 { 2066 /* extractps */, X86::EXTRACTPSmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem32 }, },
8610 { 2076 /* extrq */, X86::EXTRQ, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8610 { 2076 /* extrq */, X86::EXTRQ, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8611 { 2076 /* extrq */, X86::EXTRQI, Convert__Reg1_2__Tie0_3_3__ImmUnsignedi81_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_ImmUnsignedi8, MCK_FR32 }, },
8808 { 3029 /* gf2p8affineinvqb */, X86::GF2P8AFFINEINVQBrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8808 { 3029 /* gf2p8affineinvqb */, X86::GF2P8AFFINEINVQBrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8809 { 3029 /* gf2p8affineinvqb */, X86::GF2P8AFFINEINVQBrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8810 { 3046 /* gf2p8affineqb */, X86::GF2P8AFFINEQBrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8810 { 3046 /* gf2p8affineqb */, X86::GF2P8AFFINEQBrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8811 { 3046 /* gf2p8affineqb */, X86::GF2P8AFFINEQBrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8812 { 3060 /* gf2p8mulb */, X86::GF2P8MULBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8812 { 3060 /* gf2p8mulb */, X86::GF2P8MULBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8813 { 3060 /* gf2p8mulb */, X86::GF2P8MULBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8815 { 3073 /* haddpd */, X86::HADDPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8815 { 3073 /* haddpd */, X86::HADDPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8816 { 3073 /* haddpd */, X86::HADDPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8817 { 3080 /* haddps */, X86::HADDPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8817 { 3080 /* haddps */, X86::HADDPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8818 { 3080 /* haddps */, X86::HADDPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8820 { 3091 /* hsubpd */, X86::HSUBPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8820 { 3091 /* hsubpd */, X86::HSUBPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8821 { 3091 /* hsubpd */, X86::HSUBPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8822 { 3098 /* hsubps */, X86::HSUBPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8822 { 3098 /* hsubps */, X86::HSUBPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8823 { 3098 /* hsubps */, X86::HSUBPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
8893 { 3228 /* insertps */, X86::INSERTPSrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8893 { 3228 /* insertps */, X86::INSERTPSrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8894 { 3228 /* insertps */, X86::INSERTPSrm, Convert__Reg1_2__Tie0_1_1__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32 }, },
8895 { 3237 /* insertq */, X86::INSERTQ, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8895 { 3237 /* insertq */, X86::INSERTQ, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
8896 { 3237 /* insertq */, X86::INSERTQI, Convert__Reg1_3__Tie0_4_4__Reg1_2__ImmUnsignedi81_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8896 { 3237 /* insertq */, X86::INSERTQI, Convert__Reg1_3__Tie0_4_4__Reg1_2__ImmUnsignedi81_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9035 { 3847 /* lddqu */, X86::LDDQUrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9122 { 4233 /* maskmovdqu */, X86::MASKMOVDQU, Convert__Reg1_1__Reg1_0, AMFBS_Not64BitMode, { MCK_FR32, MCK_FR32 }, },
9122 { 4233 /* maskmovdqu */, X86::MASKMOVDQU, Convert__Reg1_1__Reg1_0, AMFBS_Not64BitMode, { MCK_FR32, MCK_FR32 }, },
9123 { 4233 /* maskmovdqu */, X86::MASKMOVDQU64, Convert__Reg1_1__Reg1_0, AMFBS_In64BitMode, { MCK_FR32, MCK_FR32 }, },
9123 { 4233 /* maskmovdqu */, X86::MASKMOVDQU64, Convert__Reg1_1__Reg1_0, AMFBS_In64BitMode, { MCK_FR32, MCK_FR32 }, },
9126 { 4253 /* maxpd */, X86::MAXPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9126 { 4253 /* maxpd */, X86::MAXPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9127 { 4253 /* maxpd */, X86::MAXPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9128 { 4259 /* maxps */, X86::MAXPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9128 { 4259 /* maxps */, X86::MAXPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9129 { 4259 /* maxps */, X86::MAXPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9130 { 4265 /* maxsd */, X86::MAXSDrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9130 { 4265 /* maxsd */, X86::MAXSDrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9131 { 4265 /* maxsd */, X86::MAXSDrm_Int, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
9132 { 4271 /* maxss */, X86::MAXSSrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9132 { 4271 /* maxss */, X86::MAXSSrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9133 { 4271 /* maxss */, X86::MAXSSrm_Int, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
9135 { 4284 /* minpd */, X86::MINPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9135 { 4284 /* minpd */, X86::MINPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9136 { 4284 /* minpd */, X86::MINPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9137 { 4290 /* minps */, X86::MINPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9137 { 4290 /* minps */, X86::MINPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9138 { 4290 /* minps */, X86::MINPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9139 { 4296 /* minsd */, X86::MINSDrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9139 { 4296 /* minsd */, X86::MINSDrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9140 { 4296 /* minsd */, X86::MINSDrm_Int, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
9141 { 4302 /* minss */, X86::MINSSrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9141 { 4302 /* minss */, X86::MINSSrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9142 { 4302 /* minss */, X86::MINSSrm_Int, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
9165 { 4382 /* movapd */, X86::MOVAPDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9165 { 4382 /* movapd */, X86::MOVAPDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9166 { 4382 /* movapd */, X86::MOVAPDmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
9167 { 4382 /* movapd */, X86::MOVAPDrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9168 { 4389 /* movapd.s */, X86::MOVAPDrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9168 { 4389 /* movapd.s */, X86::MOVAPDrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9169 { 4398 /* movaps */, X86::MOVAPSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9169 { 4398 /* movaps */, X86::MOVAPSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9170 { 4398 /* movaps */, X86::MOVAPSmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
9171 { 4398 /* movaps */, X86::MOVAPSrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9172 { 4405 /* movaps.s */, X86::MOVAPSrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9172 { 4405 /* movaps.s */, X86::MOVAPSrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9192 { 4453 /* movd */, X86::MOVPDI2DIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
9193 { 4453 /* movd */, X86::MOVPQIto64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
9194 { 4453 /* movd */, X86::MOVPDI2DImr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
9196 { 4453 /* movd */, X86::MOVDI2PDIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
9198 { 4453 /* movd */, X86::MOV64toPQIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
9200 { 4453 /* movd */, X86::MOVDI2PDIrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
9201 { 4458 /* movddup */, X86::MOVDDUPrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9201 { 4458 /* movddup */, X86::MOVDDUPrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9202 { 4458 /* movddup */, X86::MOVDDUPrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
9208 { 4484 /* movdq2q */, X86::MMX_MOVDQ2Qrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR64 }, },
9209 { 4492 /* movdqa */, X86::MOVDQArr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9209 { 4492 /* movdqa */, X86::MOVDQArr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9210 { 4492 /* movdqa */, X86::MOVDQAmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
9211 { 4492 /* movdqa */, X86::MOVDQArm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9212 { 4499 /* movdqa.s */, X86::MOVDQArr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9212 { 4499 /* movdqa.s */, X86::MOVDQArr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9213 { 4508 /* movdqu */, X86::MOVDQUrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9213 { 4508 /* movdqu */, X86::MOVDQUrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9214 { 4508 /* movdqu */, X86::MOVDQUmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
9215 { 4508 /* movdqu */, X86::MOVDQUrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9216 { 4515 /* movdqu.s */, X86::MOVDQUrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9216 { 4515 /* movdqu.s */, X86::MOVDQUrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9217 { 4524 /* movhlps */, X86::MOVHLPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9217 { 4524 /* movhlps */, X86::MOVHLPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9218 { 4532 /* movhpd */, X86::MOVHPDmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
9219 { 4532 /* movhpd */, X86::MOVHPDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
9220 { 4539 /* movhps */, X86::MOVHPSmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
9221 { 4539 /* movhps */, X86::MOVHPSrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
9238 { 4558 /* movlhps */, X86::MOVLHPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9238 { 4558 /* movlhps */, X86::MOVLHPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9239 { 4566 /* movlpd */, X86::MOVLPDmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
9240 { 4566 /* movlpd */, X86::MOVLPDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
9241 { 4573 /* movlps */, X86::MOVLPSmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
9242 { 4573 /* movlps */, X86::MOVLPSrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
9243 { 4580 /* movmskpd */, X86::MOVMSKPDrr, Convert__GR32orGR641_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32orGR64 }, },
9244 { 4589 /* movmskps */, X86::MOVMSKPSrr, Convert__GR32orGR641_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32orGR64 }, },
9245 { 4598 /* movntdq */, X86::MOVNTDQmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
9246 { 4606 /* movntdqa */, X86::MOVNTDQArm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9249 { 4638 /* movntpd */, X86::MOVNTPDmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
9250 { 4646 /* movntps */, X86::MOVNTPSmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
9252 { 4661 /* movntsd */, X86::MOVNTSD, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
9253 { 4669 /* movntss */, X86::MOVNTSS, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
9261 { 4677 /* movq */, X86::MOVZPQILo2PQIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9261 { 4677 /* movq */, X86::MOVZPQILo2PQIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9262 { 4677 /* movq */, X86::MOVPQIto64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
9263 { 4677 /* movq */, X86::MOVPQI2QImr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
9268 { 4677 /* movq */, X86::MOV64toPQIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
9276 { 4677 /* movq */, X86::MOVQI2PQIrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
9279 { 4682 /* movq.s */, X86::MOVPQI2QIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9279 { 4682 /* movq.s */, X86::MOVPQI2QIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9281 { 4689 /* movq2dq */, X86::MMX_MOVQ2DQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR64, MCK_FR32 }, },
9289 { 4729 /* movsd */, X86::MOVSDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9289 { 4729 /* movsd */, X86::MOVSDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9290 { 4729 /* movsd */, X86::MOVSDmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
9291 { 4729 /* movsd */, X86::MOVSDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
9292 { 4735 /* movsd.s */, X86::MOVSDrr_REV, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9292 { 4735 /* movsd.s */, X86::MOVSDrr_REV, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9293 { 4743 /* movshdup */, X86::MOVSHDUPrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9293 { 4743 /* movshdup */, X86::MOVSHDUPrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9294 { 4743 /* movshdup */, X86::MOVSHDUPrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9296 { 4758 /* movsldup */, X86::MOVSLDUPrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9296 { 4758 /* movsldup */, X86::MOVSLDUPrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9297 { 4758 /* movsldup */, X86::MOVSLDUPrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9301 { 4780 /* movss */, X86::MOVSSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9301 { 4780 /* movss */, X86::MOVSSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9302 { 4780 /* movss */, X86::MOVSSmr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
9303 { 4780 /* movss */, X86::MOVSSrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
9304 { 4786 /* movss.s */, X86::MOVSSrr_REV, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9304 { 4786 /* movss.s */, X86::MOVSSrr_REV, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9317 { 4827 /* movupd */, X86::MOVUPDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9317 { 4827 /* movupd */, X86::MOVUPDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9318 { 4827 /* movupd */, X86::MOVUPDmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
9319 { 4827 /* movupd */, X86::MOVUPDrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9320 { 4834 /* movupd.s */, X86::MOVUPDrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9320 { 4834 /* movupd.s */, X86::MOVUPDrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9321 { 4843 /* movups */, X86::MOVUPSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9321 { 4843 /* movups */, X86::MOVUPSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9322 { 4843 /* movups */, X86::MOVUPSmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
9323 { 4843 /* movups */, X86::MOVUPSrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9324 { 4850 /* movups.s */, X86::MOVUPSrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9324 { 4850 /* movups.s */, X86::MOVUPSrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9355 { 4912 /* mpsadbw */, X86::MPSADBWrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9355 { 4912 /* mpsadbw */, X86::MPSADBWrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9356 { 4912 /* mpsadbw */, X86::MPSADBWrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
9361 { 4934 /* mulpd */, X86::MULPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9361 { 4934 /* mulpd */, X86::MULPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9362 { 4934 /* mulpd */, X86::MULPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9363 { 4940 /* mulps */, X86::MULPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9363 { 4940 /* mulps */, X86::MULPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9364 { 4940 /* mulps */, X86::MULPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9367 { 4951 /* mulsd */, X86::MULSDrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9367 { 4951 /* mulsd */, X86::MULSDrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9368 { 4951 /* mulsd */, X86::MULSDrm_Int, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
9369 { 4957 /* mulss */, X86::MULSSrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9369 { 4957 /* mulss */, X86::MULSSrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9370 { 4957 /* mulss */, X86::MULSSrm_Int, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
9421 { 5076 /* orpd */, X86::ORPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9421 { 5076 /* orpd */, X86::ORPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9422 { 5076 /* orpd */, X86::ORPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9423 { 5081 /* orps */, X86::ORPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9423 { 5081 /* orps */, X86::ORPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9424 { 5081 /* orps */, X86::ORPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9459 { 5142 /* pabsb */, X86::PABSBrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9459 { 5142 /* pabsb */, X86::PABSBrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9460 { 5142 /* pabsb */, X86::PABSBrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9463 { 5148 /* pabsd */, X86::PABSDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9463 { 5148 /* pabsd */, X86::PABSDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9464 { 5148 /* pabsd */, X86::PABSDrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9467 { 5154 /* pabsw */, X86::PABSWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9467 { 5154 /* pabsw */, X86::PABSWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9468 { 5154 /* pabsw */, X86::PABSWrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9471 { 5160 /* packssdw */, X86::PACKSSDWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9471 { 5160 /* packssdw */, X86::PACKSSDWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9472 { 5160 /* packssdw */, X86::PACKSSDWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9475 { 5169 /* packsswb */, X86::PACKSSWBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9475 { 5169 /* packsswb */, X86::PACKSSWBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9476 { 5169 /* packsswb */, X86::PACKSSWBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9478 { 5178 /* packusdw */, X86::PACKUSDWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9478 { 5178 /* packusdw */, X86::PACKUSDWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9479 { 5178 /* packusdw */, X86::PACKUSDWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9481 { 5187 /* packuswb */, X86::PACKUSWBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9481 { 5187 /* packuswb */, X86::PACKUSWBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9482 { 5187 /* packuswb */, X86::PACKUSWBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9485 { 5196 /* paddb */, X86::PADDBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9485 { 5196 /* paddb */, X86::PADDBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9486 { 5196 /* paddb */, X86::PADDBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9489 { 5202 /* paddd */, X86::PADDDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9489 { 5202 /* paddd */, X86::PADDDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9490 { 5202 /* paddd */, X86::PADDDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9493 { 5208 /* paddq */, X86::PADDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9493 { 5208 /* paddq */, X86::PADDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9494 { 5208 /* paddq */, X86::PADDQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9497 { 5214 /* paddsb */, X86::PADDSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9497 { 5214 /* paddsb */, X86::PADDSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9498 { 5214 /* paddsb */, X86::PADDSBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9501 { 5221 /* paddsw */, X86::PADDSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9501 { 5221 /* paddsw */, X86::PADDSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9502 { 5221 /* paddsw */, X86::PADDSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9505 { 5228 /* paddusb */, X86::PADDUSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9505 { 5228 /* paddusb */, X86::PADDUSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9506 { 5228 /* paddusb */, X86::PADDUSBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9509 { 5236 /* paddusw */, X86::PADDUSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9509 { 5236 /* paddusw */, X86::PADDUSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9510 { 5236 /* paddusw */, X86::PADDUSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9513 { 5244 /* paddw */, X86::PADDWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9513 { 5244 /* paddw */, X86::PADDWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9514 { 5244 /* paddw */, X86::PADDWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9517 { 5250 /* palignr */, X86::PALIGNRrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9517 { 5250 /* palignr */, X86::PALIGNRrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9518 { 5250 /* palignr */, X86::PALIGNRrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
9521 { 5258 /* pand */, X86::PANDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9521 { 5258 /* pand */, X86::PANDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9522 { 5258 /* pand */, X86::PANDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9525 { 5263 /* pandn */, X86::PANDNrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9525 { 5263 /* pandn */, X86::PANDNrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9526 { 5263 /* pandn */, X86::PANDNrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9530 { 5275 /* pavgb */, X86::PAVGBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9530 { 5275 /* pavgb */, X86::PAVGBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9531 { 5275 /* pavgb */, X86::PAVGBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9536 { 5289 /* pavgw */, X86::PAVGWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9536 { 5289 /* pavgw */, X86::PAVGWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9537 { 5289 /* pavgw */, X86::PAVGWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9539 { 5295 /* pblendvb */, X86::PBLENDVBrr0, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9539 { 5295 /* pblendvb */, X86::PBLENDVBrr0, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9540 { 5295 /* pblendvb */, X86::PBLENDVBrm0, Convert__Reg1_1__Tie0_2_2__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9541 { 5295 /* pblendvb */, X86::PBLENDVBrr0, Convert__Reg1_2__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_XMM0, MCK_FR32, MCK_FR32 }, },
9541 { 5295 /* pblendvb */, X86::PBLENDVBrr0, Convert__Reg1_2__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_XMM0, MCK_FR32, MCK_FR32 }, },
9542 { 5295 /* pblendvb */, X86::PBLENDVBrm0, Convert__Reg1_2__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_XMM0, MCK_Mem128, MCK_FR32 }, },
9543 { 5304 /* pblendw */, X86::PBLENDWrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9543 { 5304 /* pblendw */, X86::PBLENDWrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9544 { 5304 /* pblendw */, X86::PBLENDWrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
9545 { 5312 /* pclmulhqhqdq */, X86::PCLMULQDQrr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_17, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9545 { 5312 /* pclmulhqhqdq */, X86::PCLMULQDQrr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_17, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9546 { 5312 /* pclmulhqhqdq */, X86::PCLMULQDQrm, Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_17, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9547 { 5325 /* pclmulhqlqdq */, X86::PCLMULQDQrr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9547 { 5325 /* pclmulhqlqdq */, X86::PCLMULQDQrr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9548 { 5325 /* pclmulhqlqdq */, X86::PCLMULQDQrm, Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9549 { 5338 /* pclmullqhqdq */, X86::PCLMULQDQrr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_16, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9549 { 5338 /* pclmullqhqdq */, X86::PCLMULQDQrr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_16, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9550 { 5338 /* pclmullqhqdq */, X86::PCLMULQDQrm, Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_16, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9551 { 5351 /* pclmullqlqdq */, X86::PCLMULQDQrr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9551 { 5351 /* pclmullqlqdq */, X86::PCLMULQDQrr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9552 { 5351 /* pclmullqlqdq */, X86::PCLMULQDQrm, Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9553 { 5364 /* pclmulqdq */, X86::PCLMULQDQrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9553 { 5364 /* pclmulqdq */, X86::PCLMULQDQrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9554 { 5364 /* pclmulqdq */, X86::PCLMULQDQrm, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
9556 { 5374 /* pcmpeqb */, X86::PCMPEQBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9556 { 5374 /* pcmpeqb */, X86::PCMPEQBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9557 { 5374 /* pcmpeqb */, X86::PCMPEQBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9560 { 5382 /* pcmpeqd */, X86::PCMPEQDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9560 { 5382 /* pcmpeqd */, X86::PCMPEQDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9561 { 5382 /* pcmpeqd */, X86::PCMPEQDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9563 { 5390 /* pcmpeqq */, X86::PCMPEQQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9563 { 5390 /* pcmpeqq */, X86::PCMPEQQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9564 { 5390 /* pcmpeqq */, X86::PCMPEQQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9566 { 5398 /* pcmpeqw */, X86::PCMPEQWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9566 { 5398 /* pcmpeqw */, X86::PCMPEQWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9567 { 5398 /* pcmpeqw */, X86::PCMPEQWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9569 { 5406 /* pcmpestri */, X86::PCMPESTRIrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9569 { 5406 /* pcmpestri */, X86::PCMPESTRIrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9570 { 5406 /* pcmpestri */, X86::PCMPESTRIrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
9571 { 5416 /* pcmpestrm */, X86::PCMPESTRMrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9571 { 5416 /* pcmpestrm */, X86::PCMPESTRMrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9572 { 5416 /* pcmpestrm */, X86::PCMPESTRMrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
9574 { 5426 /* pcmpgtb */, X86::PCMPGTBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9574 { 5426 /* pcmpgtb */, X86::PCMPGTBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9575 { 5426 /* pcmpgtb */, X86::PCMPGTBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9578 { 5434 /* pcmpgtd */, X86::PCMPGTDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9578 { 5434 /* pcmpgtd */, X86::PCMPGTDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9579 { 5434 /* pcmpgtd */, X86::PCMPGTDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9581 { 5442 /* pcmpgtq */, X86::PCMPGTQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9581 { 5442 /* pcmpgtq */, X86::PCMPGTQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9582 { 5442 /* pcmpgtq */, X86::PCMPGTQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9584 { 5450 /* pcmpgtw */, X86::PCMPGTWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9584 { 5450 /* pcmpgtw */, X86::PCMPGTWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9585 { 5450 /* pcmpgtw */, X86::PCMPGTWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9587 { 5458 /* pcmpistri */, X86::PCMPISTRIrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9587 { 5458 /* pcmpistri */, X86::PCMPISTRIrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9588 { 5458 /* pcmpistri */, X86::PCMPISTRIrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
9589 { 5468 /* pcmpistrm */, X86::PCMPISTRMrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9589 { 5468 /* pcmpistrm */, X86::PCMPISTRMrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9590 { 5468 /* pcmpistrm */, X86::PCMPISTRMrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
9600 { 5520 /* pextrb */, X86::PEXTRBrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
9601 { 5520 /* pextrb */, X86::PEXTRBmr, Convert__Mem85_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem8 }, },
9602 { 5527 /* pextrd */, X86::PEXTRDrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32 }, },
9603 { 5527 /* pextrd */, X86::PEXTRDmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem32 }, },
9604 { 5534 /* pextrq */, X86::PEXTRQrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR64 }, },
9605 { 5534 /* pextrq */, X86::PEXTRQmr, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem64 }, },
9607 { 5541 /* pextrw */, X86::PEXTRWrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
9608 { 5541 /* pextrw */, X86::PEXTRWmr, Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem16 }, },
9648 { 5683 /* phaddd */, X86::PHADDDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9648 { 5683 /* phaddd */, X86::PHADDDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9649 { 5683 /* phaddd */, X86::PHADDDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9652 { 5690 /* phaddsw */, X86::PHADDSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9652 { 5690 /* phaddsw */, X86::PHADDSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9653 { 5690 /* phaddsw */, X86::PHADDSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9656 { 5698 /* phaddw */, X86::PHADDWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9656 { 5698 /* phaddw */, X86::PHADDWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9657 { 5698 /* phaddw */, X86::PHADDWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9659 { 5705 /* phminposuw */, X86::PHMINPOSUWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9659 { 5705 /* phminposuw */, X86::PHMINPOSUWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9660 { 5705 /* phminposuw */, X86::PHMINPOSUWrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9662 { 5716 /* phsubd */, X86::PHSUBDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9662 { 5716 /* phsubd */, X86::PHSUBDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9663 { 5716 /* phsubd */, X86::PHSUBDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9666 { 5723 /* phsubsw */, X86::PHSUBSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9666 { 5723 /* phsubsw */, X86::PHSUBSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9667 { 5723 /* phsubsw */, X86::PHSUBSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9670 { 5731 /* phsubw */, X86::PHSUBWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9670 { 5731 /* phsubw */, X86::PHSUBWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9671 { 5731 /* phsubw */, X86::PHSUBWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9677 { 5750 /* pinsrb */, X86::PINSRBrr, Convert__Reg1_2__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32 }, },
9678 { 5750 /* pinsrb */, X86::PINSRBrm, Convert__Reg1_2__Tie0_1_1__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK_FR32 }, },
9679 { 5757 /* pinsrd */, X86::PINSRDrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32, MCK_FR32 }, },
9680 { 5757 /* pinsrd */, X86::PINSRDrm, Convert__Reg1_2__Tie0_1_1__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32 }, },
9681 { 5764 /* pinsrq */, X86::PINSRQrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR64, MCK_FR32 }, },
9682 { 5764 /* pinsrq */, X86::PINSRQrm, Convert__Reg1_2__Tie0_1_1__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32 }, },
9684 { 5771 /* pinsrw */, X86::PINSRWrr, Convert__Reg1_2__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32 }, },
9686 { 5771 /* pinsrw */, X86::PINSRWrm, Convert__Reg1_2__Tie0_1_1__Mem165_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem16, MCK_FR32 }, },
9688 { 5778 /* pmaddubsw */, X86::PMADDUBSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9688 { 5778 /* pmaddubsw */, X86::PMADDUBSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9689 { 5778 /* pmaddubsw */, X86::PMADDUBSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9692 { 5788 /* pmaddwd */, X86::PMADDWDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9692 { 5788 /* pmaddwd */, X86::PMADDWDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9693 { 5788 /* pmaddwd */, X86::PMADDWDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9695 { 5796 /* pmaxsb */, X86::PMAXSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9695 { 5796 /* pmaxsb */, X86::PMAXSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9696 { 5796 /* pmaxsb */, X86::PMAXSBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9697 { 5803 /* pmaxsd */, X86::PMAXSDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9697 { 5803 /* pmaxsd */, X86::PMAXSDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9698 { 5803 /* pmaxsd */, X86::PMAXSDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9700 { 5810 /* pmaxsw */, X86::PMAXSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9700 { 5810 /* pmaxsw */, X86::PMAXSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9701 { 5810 /* pmaxsw */, X86::PMAXSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9704 { 5817 /* pmaxub */, X86::PMAXUBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9704 { 5817 /* pmaxub */, X86::PMAXUBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9705 { 5817 /* pmaxub */, X86::PMAXUBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9707 { 5824 /* pmaxud */, X86::PMAXUDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9707 { 5824 /* pmaxud */, X86::PMAXUDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9708 { 5824 /* pmaxud */, X86::PMAXUDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9709 { 5831 /* pmaxuw */, X86::PMAXUWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9709 { 5831 /* pmaxuw */, X86::PMAXUWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9710 { 5831 /* pmaxuw */, X86::PMAXUWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9711 { 5838 /* pminsb */, X86::PMINSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9711 { 5838 /* pminsb */, X86::PMINSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9712 { 5838 /* pminsb */, X86::PMINSBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9713 { 5845 /* pminsd */, X86::PMINSDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9713 { 5845 /* pminsd */, X86::PMINSDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9714 { 5845 /* pminsd */, X86::PMINSDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9716 { 5852 /* pminsw */, X86::PMINSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9716 { 5852 /* pminsw */, X86::PMINSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9717 { 5852 /* pminsw */, X86::PMINSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9720 { 5859 /* pminub */, X86::PMINUBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9720 { 5859 /* pminub */, X86::PMINUBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9721 { 5859 /* pminub */, X86::PMINUBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9723 { 5866 /* pminud */, X86::PMINUDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9723 { 5866 /* pminud */, X86::PMINUDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9724 { 5866 /* pminud */, X86::PMINUDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9725 { 5873 /* pminuw */, X86::PMINUWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9725 { 5873 /* pminuw */, X86::PMINUWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9726 { 5873 /* pminuw */, X86::PMINUWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9728 { 5880 /* pmovmskb */, X86::PMOVMSKBrr, Convert__GR32orGR641_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32orGR64 }, },
9729 { 5889 /* pmovsxbd */, X86::PMOVSXBDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9729 { 5889 /* pmovsxbd */, X86::PMOVSXBDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9730 { 5889 /* pmovsxbd */, X86::PMOVSXBDrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
9731 { 5898 /* pmovsxbq */, X86::PMOVSXBQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9731 { 5898 /* pmovsxbq */, X86::PMOVSXBQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9732 { 5898 /* pmovsxbq */, X86::PMOVSXBQrm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_FR32 }, },
9733 { 5907 /* pmovsxbw */, X86::PMOVSXBWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9733 { 5907 /* pmovsxbw */, X86::PMOVSXBWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9734 { 5907 /* pmovsxbw */, X86::PMOVSXBWrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
9735 { 5916 /* pmovsxdq */, X86::PMOVSXDQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9735 { 5916 /* pmovsxdq */, X86::PMOVSXDQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9736 { 5916 /* pmovsxdq */, X86::PMOVSXDQrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
9737 { 5925 /* pmovsxwd */, X86::PMOVSXWDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9737 { 5925 /* pmovsxwd */, X86::PMOVSXWDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9738 { 5925 /* pmovsxwd */, X86::PMOVSXWDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
9739 { 5934 /* pmovsxwq */, X86::PMOVSXWQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9739 { 5934 /* pmovsxwq */, X86::PMOVSXWQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9740 { 5934 /* pmovsxwq */, X86::PMOVSXWQrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
9741 { 5943 /* pmovzxbd */, X86::PMOVZXBDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9741 { 5943 /* pmovzxbd */, X86::PMOVZXBDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9742 { 5943 /* pmovzxbd */, X86::PMOVZXBDrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
9743 { 5952 /* pmovzxbq */, X86::PMOVZXBQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9743 { 5952 /* pmovzxbq */, X86::PMOVZXBQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9744 { 5952 /* pmovzxbq */, X86::PMOVZXBQrm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_FR32 }, },
9745 { 5961 /* pmovzxbw */, X86::PMOVZXBWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9745 { 5961 /* pmovzxbw */, X86::PMOVZXBWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9746 { 5961 /* pmovzxbw */, X86::PMOVZXBWrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
9747 { 5970 /* pmovzxdq */, X86::PMOVZXDQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9747 { 5970 /* pmovzxdq */, X86::PMOVZXDQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9748 { 5970 /* pmovzxdq */, X86::PMOVZXDQrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
9749 { 5979 /* pmovzxwd */, X86::PMOVZXWDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9749 { 5979 /* pmovzxwd */, X86::PMOVZXWDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9750 { 5979 /* pmovzxwd */, X86::PMOVZXWDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
9751 { 5988 /* pmovzxwq */, X86::PMOVZXWQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9751 { 5988 /* pmovzxwq */, X86::PMOVZXWQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9752 { 5988 /* pmovzxwq */, X86::PMOVZXWQrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
9753 { 5997 /* pmuldq */, X86::PMULDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9753 { 5997 /* pmuldq */, X86::PMULDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9754 { 5997 /* pmuldq */, X86::PMULDQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9756 { 6004 /* pmulhrsw */, X86::PMULHRSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9756 { 6004 /* pmulhrsw */, X86::PMULHRSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9757 { 6004 /* pmulhrsw */, X86::PMULHRSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9762 { 6021 /* pmulhuw */, X86::PMULHUWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9762 { 6021 /* pmulhuw */, X86::PMULHUWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9763 { 6021 /* pmulhuw */, X86::PMULHUWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9766 { 6029 /* pmulhw */, X86::PMULHWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9766 { 6029 /* pmulhw */, X86::PMULHWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9767 { 6029 /* pmulhw */, X86::PMULHWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9769 { 6036 /* pmulld */, X86::PMULLDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9769 { 6036 /* pmulld */, X86::PMULLDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9770 { 6036 /* pmulld */, X86::PMULLDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9772 { 6043 /* pmullw */, X86::PMULLWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9772 { 6043 /* pmullw */, X86::PMULLWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9773 { 6043 /* pmullw */, X86::PMULLWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9776 { 6050 /* pmuludq */, X86::PMULUDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9776 { 6050 /* pmuludq */, X86::PMULUDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9777 { 6050 /* pmuludq */, X86::PMULUDQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9809 { 6149 /* por */, X86::PORrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9809 { 6149 /* por */, X86::PORrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9810 { 6149 /* por */, X86::PORrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9820 { 6229 /* psadbw */, X86::PSADBWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9820 { 6229 /* psadbw */, X86::PSADBWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9821 { 6229 /* psadbw */, X86::PSADBWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9824 { 6236 /* pshufb */, X86::PSHUFBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9824 { 6236 /* pshufb */, X86::PSHUFBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9825 { 6236 /* pshufb */, X86::PSHUFBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9827 { 6243 /* pshufd */, X86::PSHUFDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9827 { 6243 /* pshufd */, X86::PSHUFDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9828 { 6243 /* pshufd */, X86::PSHUFDmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
9829 { 6250 /* pshufhw */, X86::PSHUFHWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9829 { 6250 /* pshufhw */, X86::PSHUFHWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9830 { 6250 /* pshufhw */, X86::PSHUFHWmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
9831 { 6258 /* pshuflw */, X86::PSHUFLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9831 { 6258 /* pshuflw */, X86::PSHUFLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9832 { 6258 /* pshuflw */, X86::PSHUFLWmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
9836 { 6273 /* psignb */, X86::PSIGNBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9836 { 6273 /* psignb */, X86::PSIGNBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9837 { 6273 /* psignb */, X86::PSIGNBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9840 { 6280 /* psignd */, X86::PSIGNDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9840 { 6280 /* psignd */, X86::PSIGNDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9841 { 6280 /* psignd */, X86::PSIGNDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9844 { 6287 /* psignw */, X86::PSIGNWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9844 { 6287 /* psignw */, X86::PSIGNWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9845 { 6287 /* psignw */, X86::PSIGNWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9848 { 6294 /* pslld */, X86::PSLLDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9848 { 6294 /* pslld */, X86::PSLLDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9850 { 6294 /* pslld */, X86::PSLLDri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32 }, },
9851 { 6294 /* pslld */, X86::PSLLDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9853 { 6300 /* pslldq */, X86::PSLLDQri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32 }, },
9855 { 6307 /* psllq */, X86::PSLLQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9855 { 6307 /* psllq */, X86::PSLLQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9857 { 6307 /* psllq */, X86::PSLLQri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32 }, },
9858 { 6307 /* psllq */, X86::PSLLQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9861 { 6313 /* psllw */, X86::PSLLWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9861 { 6313 /* psllw */, X86::PSLLWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9863 { 6313 /* psllw */, X86::PSLLWri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32 }, },
9864 { 6313 /* psllw */, X86::PSLLWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9867 { 6319 /* psrad */, X86::PSRADrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9867 { 6319 /* psrad */, X86::PSRADrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9869 { 6319 /* psrad */, X86::PSRADri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32 }, },
9870 { 6319 /* psrad */, X86::PSRADrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9873 { 6325 /* psraw */, X86::PSRAWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9873 { 6325 /* psraw */, X86::PSRAWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9875 { 6325 /* psraw */, X86::PSRAWri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32 }, },
9876 { 6325 /* psraw */, X86::PSRAWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9879 { 6331 /* psrld */, X86::PSRLDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9879 { 6331 /* psrld */, X86::PSRLDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9881 { 6331 /* psrld */, X86::PSRLDri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32 }, },
9882 { 6331 /* psrld */, X86::PSRLDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9884 { 6337 /* psrldq */, X86::PSRLDQri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32 }, },
9886 { 6344 /* psrlq */, X86::PSRLQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9886 { 6344 /* psrlq */, X86::PSRLQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9888 { 6344 /* psrlq */, X86::PSRLQri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32 }, },
9889 { 6344 /* psrlq */, X86::PSRLQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9892 { 6350 /* psrlw */, X86::PSRLWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9892 { 6350 /* psrlw */, X86::PSRLWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9894 { 6350 /* psrlw */, X86::PSRLWri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32 }, },
9895 { 6350 /* psrlw */, X86::PSRLWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9898 { 6356 /* psubb */, X86::PSUBBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9898 { 6356 /* psubb */, X86::PSUBBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9899 { 6356 /* psubb */, X86::PSUBBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9902 { 6362 /* psubd */, X86::PSUBDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9902 { 6362 /* psubd */, X86::PSUBDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9903 { 6362 /* psubd */, X86::PSUBDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9906 { 6368 /* psubq */, X86::PSUBQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9906 { 6368 /* psubq */, X86::PSUBQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9907 { 6368 /* psubq */, X86::PSUBQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9910 { 6374 /* psubsb */, X86::PSUBSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9910 { 6374 /* psubsb */, X86::PSUBSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9911 { 6374 /* psubsb */, X86::PSUBSBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9914 { 6381 /* psubsw */, X86::PSUBSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9914 { 6381 /* psubsw */, X86::PSUBSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9915 { 6381 /* psubsw */, X86::PSUBSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9918 { 6388 /* psubusb */, X86::PSUBUSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9918 { 6388 /* psubusb */, X86::PSUBUSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9919 { 6388 /* psubusb */, X86::PSUBUSBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9922 { 6396 /* psubusw */, X86::PSUBUSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9922 { 6396 /* psubusw */, X86::PSUBUSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9923 { 6396 /* psubusw */, X86::PSUBUSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9926 { 6404 /* psubw */, X86::PSUBWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9926 { 6404 /* psubw */, X86::PSUBWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9927 { 6404 /* psubw */, X86::PSUBWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9931 { 6417 /* ptest */, X86::PTESTrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9931 { 6417 /* ptest */, X86::PTESTrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9932 { 6417 /* ptest */, X86::PTESTrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9938 { 6449 /* punpckhbw */, X86::PUNPCKHBWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9938 { 6449 /* punpckhbw */, X86::PUNPCKHBWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9939 { 6449 /* punpckhbw */, X86::PUNPCKHBWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9942 { 6459 /* punpckhdq */, X86::PUNPCKHDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9942 { 6459 /* punpckhdq */, X86::PUNPCKHDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9943 { 6459 /* punpckhdq */, X86::PUNPCKHDQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9945 { 6469 /* punpckhqdq */, X86::PUNPCKHQDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9945 { 6469 /* punpckhqdq */, X86::PUNPCKHQDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9946 { 6469 /* punpckhqdq */, X86::PUNPCKHQDQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9948 { 6480 /* punpckhwd */, X86::PUNPCKHWDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9948 { 6480 /* punpckhwd */, X86::PUNPCKHWDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9949 { 6480 /* punpckhwd */, X86::PUNPCKHWDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9952 { 6490 /* punpcklbw */, X86::PUNPCKLBWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9952 { 6490 /* punpcklbw */, X86::PUNPCKLBWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9953 { 6490 /* punpcklbw */, X86::PUNPCKLBWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9956 { 6500 /* punpckldq */, X86::PUNPCKLDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9956 { 6500 /* punpckldq */, X86::PUNPCKLDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9957 { 6500 /* punpckldq */, X86::PUNPCKLDQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9959 { 6510 /* punpcklqdq */, X86::PUNPCKLQDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9959 { 6510 /* punpcklqdq */, X86::PUNPCKLQDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9960 { 6510 /* punpcklqdq */, X86::PUNPCKLQDQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9962 { 6521 /* punpcklwd */, X86::PUNPCKLWDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9962 { 6521 /* punpcklwd */, X86::PUNPCKLWDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9963 { 6521 /* punpcklwd */, X86::PUNPCKLWDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
9997 { 6602 /* pxor */, X86::PXORrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9997 { 6602 /* pxor */, X86::PXORrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
9998 { 6602 /* pxor */, X86::PXORrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10024 { 6631 /* rcpps */, X86::RCPPSr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10024 { 6631 /* rcpps */, X86::RCPPSr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10025 { 6631 /* rcpps */, X86::RCPPSm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10026 { 6637 /* rcpss */, X86::RCPSSr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10026 { 6637 /* rcpss */, X86::RCPSSr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10027 { 6637 /* rcpss */, X86::RCPSSm_Int, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
10132 { 6950 /* roundpd */, X86::ROUNDPDr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
10132 { 6950 /* roundpd */, X86::ROUNDPDr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
10133 { 6950 /* roundpd */, X86::ROUNDPDm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
10134 { 6958 /* roundps */, X86::ROUNDPSr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
10134 { 6958 /* roundps */, X86::ROUNDPSr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
10135 { 6958 /* roundps */, X86::ROUNDPSm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
10136 { 6966 /* roundsd */, X86::ROUNDSDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
10136 { 6966 /* roundsd */, X86::ROUNDSDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
10137 { 6966 /* roundsd */, X86::ROUNDSDm_Int, Convert__Reg1_2__Tie0_1_1__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32 }, },
10138 { 6974 /* roundss */, X86::ROUNDSSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
10138 { 6974 /* roundss */, X86::ROUNDSSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
10139 { 6974 /* roundss */, X86::ROUNDSSm_Int, Convert__Reg1_2__Tie0_1_1__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32 }, },
10141 { 6986 /* rsqrtps */, X86::RSQRTPSr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10141 { 6986 /* rsqrtps */, X86::RSQRTPSr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10142 { 6986 /* rsqrtps */, X86::RSQRTPSm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10143 { 6994 /* rsqrtss */, X86::RSQRTSSr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10143 { 6994 /* rsqrtss */, X86::RSQRTSSr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10144 { 6994 /* rsqrtss */, X86::RSQRTSSm_Int, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
10259 { 7266 /* sha1msg1 */, X86::SHA1MSG1rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10259 { 7266 /* sha1msg1 */, X86::SHA1MSG1rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10260 { 7266 /* sha1msg1 */, X86::SHA1MSG1rm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10261 { 7275 /* sha1msg2 */, X86::SHA1MSG2rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10261 { 7275 /* sha1msg2 */, X86::SHA1MSG2rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10262 { 7275 /* sha1msg2 */, X86::SHA1MSG2rm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10263 { 7284 /* sha1nexte */, X86::SHA1NEXTErr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10263 { 7284 /* sha1nexte */, X86::SHA1NEXTErr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10264 { 7284 /* sha1nexte */, X86::SHA1NEXTErm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10265 { 7294 /* sha1rnds4 */, X86::SHA1RNDS4rri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
10265 { 7294 /* sha1rnds4 */, X86::SHA1RNDS4rri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
10266 { 7294 /* sha1rnds4 */, X86::SHA1RNDS4rmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
10267 { 7304 /* sha256msg1 */, X86::SHA256MSG1rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10267 { 7304 /* sha256msg1 */, X86::SHA256MSG1rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10268 { 7304 /* sha256msg1 */, X86::SHA256MSG1rm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10269 { 7315 /* sha256msg2 */, X86::SHA256MSG2rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10269 { 7315 /* sha256msg2 */, X86::SHA256MSG2rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10270 { 7315 /* sha256msg2 */, X86::SHA256MSG2rm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10271 { 7326 /* sha256rnds2 */, X86::SHA256RNDS2rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10271 { 7326 /* sha256rnds2 */, X86::SHA256RNDS2rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10272 { 7326 /* sha256rnds2 */, X86::SHA256RNDS2rm, Convert__Reg1_1__Tie0_2_2__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10273 { 7326 /* sha256rnds2 */, X86::SHA256RNDS2rr, Convert__Reg1_2__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_XMM0, MCK_FR32, MCK_FR32 }, },
10273 { 7326 /* sha256rnds2 */, X86::SHA256RNDS2rr, Convert__Reg1_2__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_XMM0, MCK_FR32, MCK_FR32 }, },
10274 { 7326 /* sha256rnds2 */, X86::SHA256RNDS2rm, Convert__Reg1_2__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_XMM0, MCK_Mem128, MCK_FR32 }, },
10367 { 7466 /* shufpd */, X86::SHUFPDrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
10367 { 7466 /* shufpd */, X86::SHUFPDrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
10368 { 7466 /* shufpd */, X86::SHUFPDrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
10369 { 7473 /* shufps */, X86::SHUFPSrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
10369 { 7473 /* shufps */, X86::SHUFPSrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
10370 { 7473 /* shufps */, X86::SHUFPSrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
10386 { 7569 /* sqrtpd */, X86::SQRTPDr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10386 { 7569 /* sqrtpd */, X86::SQRTPDr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10387 { 7569 /* sqrtpd */, X86::SQRTPDm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10388 { 7576 /* sqrtps */, X86::SQRTPSr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10388 { 7576 /* sqrtps */, X86::SQRTPSr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10389 { 7576 /* sqrtps */, X86::SQRTPSm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10390 { 7583 /* sqrtsd */, X86::SQRTSDr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10390 { 7583 /* sqrtsd */, X86::SQRTSDr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10391 { 7583 /* sqrtsd */, X86::SQRTSDm_Int, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
10392 { 7590 /* sqrtss */, X86::SQRTSSr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10392 { 7590 /* sqrtss */, X86::SQRTSSr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10393 { 7590 /* sqrtss */, X86::SQRTSSm_Int, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
10432 { 7698 /* subpd */, X86::SUBPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10432 { 7698 /* subpd */, X86::SUBPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10433 { 7698 /* subpd */, X86::SUBPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10434 { 7704 /* subps */, X86::SUBPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10434 { 7704 /* subps */, X86::SUBPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10435 { 7704 /* subps */, X86::SUBPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10445 { 7715 /* subsd */, X86::SUBSDrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10445 { 7715 /* subsd */, X86::SUBSDrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10446 { 7715 /* subsd */, X86::SUBSDrm_Int, Convert__Reg1_1__Tie0_1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
10447 { 7721 /* subss */, X86::SUBSSrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10447 { 7721 /* subss */, X86::SUBSSrr_Int, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10448 { 7721 /* subss */, X86::SUBSSrm_Int, Convert__Reg1_1__Tie0_1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
10504 { 7911 /* ucomisd */, X86::UCOMISDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10504 { 7911 /* ucomisd */, X86::UCOMISDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10505 { 7911 /* ucomisd */, X86::UCOMISDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
10506 { 7919 /* ucomiss */, X86::UCOMISSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10506 { 7919 /* ucomiss */, X86::UCOMISSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10507 { 7919 /* ucomiss */, X86::UCOMISSrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
10514 { 7952 /* unpckhpd */, X86::UNPCKHPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10514 { 7952 /* unpckhpd */, X86::UNPCKHPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10515 { 7952 /* unpckhpd */, X86::UNPCKHPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10516 { 7961 /* unpckhps */, X86::UNPCKHPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10516 { 7961 /* unpckhps */, X86::UNPCKHPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10517 { 7961 /* unpckhps */, X86::UNPCKHPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10518 { 7970 /* unpcklpd */, X86::UNPCKLPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10518 { 7970 /* unpcklpd */, X86::UNPCKLPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10519 { 7970 /* unpcklpd */, X86::UNPCKLPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10520 { 7979 /* unpcklps */, X86::UNPCKLPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10520 { 7979 /* unpcklps */, X86::UNPCKLPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10521 { 7979 /* unpcklps */, X86::UNPCKLPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10534 { 8030 /* vaddpd */, X86::VADDPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10534 { 8030 /* vaddpd */, X86::VADDPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10534 { 8030 /* vaddpd */, X86::VADDPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10539 { 8030 /* vaddpd */, X86::VADDPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10539 { 8030 /* vaddpd */, X86::VADDPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10568 { 8037 /* vaddps */, X86::VADDPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10568 { 8037 /* vaddps */, X86::VADDPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10568 { 8037 /* vaddps */, X86::VADDPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10573 { 8037 /* vaddps */, X86::VADDPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10573 { 8037 /* vaddps */, X86::VADDPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10602 { 8044 /* vaddsd */, X86::VADDSDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10602 { 8044 /* vaddsd */, X86::VADDSDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10602 { 8044 /* vaddsd */, X86::VADDSDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10604 { 8044 /* vaddsd */, X86::VADDSDrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
10604 { 8044 /* vaddsd */, X86::VADDSDrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
10613 { 8051 /* vaddss */, X86::VADDSSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10613 { 8051 /* vaddss */, X86::VADDSSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10613 { 8051 /* vaddss */, X86::VADDSSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10615 { 8051 /* vaddss */, X86::VADDSSrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
10615 { 8051 /* vaddss */, X86::VADDSSrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
10624 { 8058 /* vaddsubpd */, X86::VADDSUBPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10624 { 8058 /* vaddsubpd */, X86::VADDSUBPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10624 { 8058 /* vaddsubpd */, X86::VADDSUBPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10626 { 8058 /* vaddsubpd */, X86::VADDSUBPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10626 { 8058 /* vaddsubpd */, X86::VADDSUBPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10628 { 8068 /* vaddsubps */, X86::VADDSUBPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10628 { 8068 /* vaddsubps */, X86::VADDSUBPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10628 { 8068 /* vaddsubps */, X86::VADDSUBPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10630 { 8068 /* vaddsubps */, X86::VADDSUBPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10630 { 8068 /* vaddsubps */, X86::VADDSUBPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10632 { 8078 /* vaesdec */, X86::VAESDECrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10632 { 8078 /* vaesdec */, X86::VAESDECrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10632 { 8078 /* vaesdec */, X86::VAESDECrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10637 { 8078 /* vaesdec */, X86::VAESDECrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10637 { 8078 /* vaesdec */, X86::VAESDECrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10642 { 8086 /* vaesdeclast */, X86::VAESDECLASTrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10642 { 8086 /* vaesdeclast */, X86::VAESDECLASTrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10642 { 8086 /* vaesdeclast */, X86::VAESDECLASTrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10647 { 8086 /* vaesdeclast */, X86::VAESDECLASTrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10647 { 8086 /* vaesdeclast */, X86::VAESDECLASTrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10652 { 8098 /* vaesenc */, X86::VAESENCrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10652 { 8098 /* vaesenc */, X86::VAESENCrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10652 { 8098 /* vaesenc */, X86::VAESENCrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10657 { 8098 /* vaesenc */, X86::VAESENCrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10657 { 8098 /* vaesenc */, X86::VAESENCrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10662 { 8106 /* vaesenclast */, X86::VAESENCLASTrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10662 { 8106 /* vaesenclast */, X86::VAESENCLASTrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10662 { 8106 /* vaesenclast */, X86::VAESENCLASTrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10667 { 8106 /* vaesenclast */, X86::VAESENCLASTrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10667 { 8106 /* vaesenclast */, X86::VAESENCLASTrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10672 { 8118 /* vaesimc */, X86::VAESIMCrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10672 { 8118 /* vaesimc */, X86::VAESIMCrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
10673 { 8118 /* vaesimc */, X86::VAESIMCrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
10674 { 8126 /* vaeskeygenassist */, X86::VAESKEYGENASSIST128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
10674 { 8126 /* vaeskeygenassist */, X86::VAESKEYGENASSIST128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
10675 { 8126 /* vaeskeygenassist */, X86::VAESKEYGENASSIST128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
10730 { 8159 /* vandnpd */, X86::VANDNPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10730 { 8159 /* vandnpd */, X86::VANDNPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10730 { 8159 /* vandnpd */, X86::VANDNPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10735 { 8159 /* vandnpd */, X86::VANDNPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10735 { 8159 /* vandnpd */, X86::VANDNPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10761 { 8167 /* vandnps */, X86::VANDNPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10761 { 8167 /* vandnps */, X86::VANDNPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10761 { 8167 /* vandnps */, X86::VANDNPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10766 { 8167 /* vandnps */, X86::VANDNPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10766 { 8167 /* vandnps */, X86::VANDNPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10792 { 8175 /* vandpd */, X86::VANDPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10792 { 8175 /* vandpd */, X86::VANDPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10792 { 8175 /* vandpd */, X86::VANDPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10797 { 8175 /* vandpd */, X86::VANDPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10797 { 8175 /* vandpd */, X86::VANDPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10823 { 8182 /* vandps */, X86::VANDPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10823 { 8182 /* vandps */, X86::VANDPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10823 { 8182 /* vandps */, X86::VANDPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10828 { 8182 /* vandps */, X86::VANDPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10828 { 8182 /* vandps */, X86::VANDPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10908 { 8209 /* vblendpd */, X86::VBLENDPDrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
10908 { 8209 /* vblendpd */, X86::VBLENDPDrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
10908 { 8209 /* vblendpd */, X86::VBLENDPDrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
10910 { 8209 /* vblendpd */, X86::VBLENDPDrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10910 { 8209 /* vblendpd */, X86::VBLENDPDrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10912 { 8218 /* vblendps */, X86::VBLENDPSrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
10912 { 8218 /* vblendps */, X86::VBLENDPSrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
10912 { 8218 /* vblendps */, X86::VBLENDPSrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
10914 { 8218 /* vblendps */, X86::VBLENDPSrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10914 { 8218 /* vblendps */, X86::VBLENDPSrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10916 { 8227 /* vblendvpd */, X86::VBLENDVPDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
10916 { 8227 /* vblendvpd */, X86::VBLENDVPDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
10916 { 8227 /* vblendvpd */, X86::VBLENDVPDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
10916 { 8227 /* vblendvpd */, X86::VBLENDVPDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
10917 { 8227 /* vblendvpd */, X86::VBLENDVPDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10917 { 8227 /* vblendvpd */, X86::VBLENDVPDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10917 { 8227 /* vblendvpd */, X86::VBLENDVPDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10920 { 8237 /* vblendvps */, X86::VBLENDVPSrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
10920 { 8237 /* vblendvps */, X86::VBLENDVPSrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
10920 { 8237 /* vblendvps */, X86::VBLENDVPSrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
10920 { 8237 /* vblendvps */, X86::VBLENDVPSrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
10921 { 8237 /* vblendvps */, X86::VBLENDVPSrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10921 { 8237 /* vblendvps */, X86::VBLENDVPSrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10921 { 8237 /* vblendvps */, X86::VBLENDVPSrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10992 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
11006 { 8450 /* vbroadcastss */, X86::VBROADCASTSSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
11006 { 8450 /* vbroadcastss */, X86::VBROADCASTSSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
11007 { 8450 /* vbroadcastss */, X86::VBROADCASTSSYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
11011 { 8450 /* vbroadcastss */, X86::VBROADCASTSSrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
11028 { 8463 /* vcmppd */, X86::VCMPPDrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11028 { 8463 /* vcmppd */, X86::VCMPPDrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11028 { 8463 /* vcmppd */, X86::VCMPPDrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11033 { 8463 /* vcmppd */, X86::VCMPPDrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11033 { 8463 /* vcmppd */, X86::VCMPPDrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11052 { 8470 /* vcmpps */, X86::VCMPPSrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11052 { 8470 /* vcmpps */, X86::VCMPPSrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11052 { 8470 /* vcmpps */, X86::VCMPPSrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11057 { 8470 /* vcmpps */, X86::VCMPPSrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11057 { 8470 /* vcmpps */, X86::VCMPPSrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11076 { 8477 /* vcmpsd */, X86::VCMPSDrr_Int, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11076 { 8477 /* vcmpsd */, X86::VCMPSDrr_Int, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11076 { 8477 /* vcmpsd */, X86::VCMPSDrr_Int, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11078 { 8477 /* vcmpsd */, X86::VCMPSDrm_Int, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
11078 { 8477 /* vcmpsd */, X86::VCMPSDrm_Int, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
11084 { 8484 /* vcmpss */, X86::VCMPSSrr_Int, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11084 { 8484 /* vcmpss */, X86::VCMPSSrr_Int, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11084 { 8484 /* vcmpss */, X86::VCMPSSrr_Int, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11086 { 8484 /* vcmpss */, X86::VCMPSSrm_Int, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
11086 { 8484 /* vcmpss */, X86::VCMPSSrm_Int, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
11092 { 8491 /* vcomisd */, X86::VCOMISDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
11092 { 8491 /* vcomisd */, X86::VCOMISDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
11094 { 8491 /* vcomisd */, X86::VCOMISDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
11097 { 8499 /* vcomiss */, X86::VCOMISSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
11097 { 8499 /* vcomiss */, X86::VCOMISSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
11099 { 8499 /* vcomiss */, X86::VCOMISSrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
11132 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
11132 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
11133 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
11140 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
11163 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
11163 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
11168 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
11253 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
11253 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
11254 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
11279 { 8620 /* vcvtpd2dqx */, X86::VCVTPD2DQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
11279 { 8620 /* vcvtpd2dqx */, X86::VCVTPD2DQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
11281 { 8620 /* vcvtpd2dqx */, X86::VCVTPD2DQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
11290 { 8631 /* vcvtpd2dqy */, X86::VCVTPD2DQYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
11292 { 8631 /* vcvtpd2dqy */, X86::VCVTPD2DQYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32 }, },
11301 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
11301 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
11302 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
11327 { 8652 /* vcvtpd2psx */, X86::VCVTPD2PSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
11327 { 8652 /* vcvtpd2psx */, X86::VCVTPD2PSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
11329 { 8652 /* vcvtpd2psx */, X86::VCVTPD2PSrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
11338 { 8663 /* vcvtpd2psy */, X86::VCVTPD2PSYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
11340 { 8663 /* vcvtpd2psy */, X86::VCVTPD2PSYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32 }, },
11451 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
11451 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
11452 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
11459 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
11476 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
11476 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
11481 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
11510 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
11510 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
11511 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
11518 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
11544 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
11544 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
11545 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHmr, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem64 }, },
11546 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHYrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_FR32 }, },
11728 { 8844 /* vcvtsd2si */, X86::VCVTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
11729 { 8844 /* vcvtsd2si */, X86::VCVTSD2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
11738 { 8854 /* vcvtsd2sil */, X86::VCVTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
11743 { 8865 /* vcvtsd2siq */, X86::VCVTSD2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
11748 { 8876 /* vcvtsd2ss */, X86::VCVTSD2SSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11748 { 8876 /* vcvtsd2ss */, X86::VCVTSD2SSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11748 { 8876 /* vcvtsd2ss */, X86::VCVTSD2SSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11750 { 8876 /* vcvtsd2ss */, X86::VCVTSD2SSrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
11750 { 8876 /* vcvtsd2ss */, X86::VCVTSD2SSrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
11771 { 8921 /* vcvtsi2sd */, X86::VCVTSI2SDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32, MCK_FR32 }, },
11771 { 8921 /* vcvtsi2sd */, X86::VCVTSI2SDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32, MCK_FR32 }, },
11773 { 8921 /* vcvtsi2sd */, X86::VCVTSI642SDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32, MCK_FR32 }, },
11773 { 8921 /* vcvtsi2sd */, X86::VCVTSI642SDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32, MCK_FR32 }, },
11775 { 8921 /* vcvtsi2sd */, X86::VCVTSI2SDrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
11775 { 8921 /* vcvtsi2sd */, X86::VCVTSI2SDrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
11778 { 8931 /* vcvtsi2sdl */, X86::VCVTSI2SDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32, MCK_FR32 }, },
11778 { 8931 /* vcvtsi2sdl */, X86::VCVTSI2SDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32, MCK_FR32 }, },
11780 { 8931 /* vcvtsi2sdl */, X86::VCVTSI2SDrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
11780 { 8931 /* vcvtsi2sdl */, X86::VCVTSI2SDrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
11782 { 8942 /* vcvtsi2sdq */, X86::VCVTSI642SDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32, MCK_FR32 }, },
11782 { 8942 /* vcvtsi2sdq */, X86::VCVTSI642SDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32, MCK_FR32 }, },
11784 { 8942 /* vcvtsi2sdq */, X86::VCVTSI642SDrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
11784 { 8942 /* vcvtsi2sdq */, X86::VCVTSI642SDrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
11787 { 8953 /* vcvtsi2ss */, X86::VCVTSI2SSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32, MCK_FR32 }, },
11787 { 8953 /* vcvtsi2ss */, X86::VCVTSI2SSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32, MCK_FR32 }, },
11789 { 8953 /* vcvtsi2ss */, X86::VCVTSI642SSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32, MCK_FR32 }, },
11789 { 8953 /* vcvtsi2ss */, X86::VCVTSI642SSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32, MCK_FR32 }, },
11791 { 8953 /* vcvtsi2ss */, X86::VCVTSI2SSrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
11791 { 8953 /* vcvtsi2ss */, X86::VCVTSI2SSrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
11795 { 8963 /* vcvtsi2ssl */, X86::VCVTSI2SSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32, MCK_FR32 }, },
11795 { 8963 /* vcvtsi2ssl */, X86::VCVTSI2SSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32, MCK_FR32 }, },
11797 { 8963 /* vcvtsi2ssl */, X86::VCVTSI2SSrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
11797 { 8963 /* vcvtsi2ssl */, X86::VCVTSI2SSrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
11800 { 8974 /* vcvtsi2ssq */, X86::VCVTSI642SSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32, MCK_FR32 }, },
11800 { 8974 /* vcvtsi2ssq */, X86::VCVTSI642SSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32, MCK_FR32 }, },
11802 { 8974 /* vcvtsi2ssq */, X86::VCVTSI642SSrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
11802 { 8974 /* vcvtsi2ssq */, X86::VCVTSI642SSrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
11805 { 8985 /* vcvtss2sd */, X86::VCVTSS2SDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11805 { 8985 /* vcvtss2sd */, X86::VCVTSS2SDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11805 { 8985 /* vcvtss2sd */, X86::VCVTSS2SDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11807 { 8985 /* vcvtss2sd */, X86::VCVTSS2SDrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
11807 { 8985 /* vcvtss2sd */, X86::VCVTSS2SDrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
11816 { 8995 /* vcvtss2si */, X86::VCVTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
11817 { 8995 /* vcvtss2si */, X86::VCVTSS2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
11826 { 9005 /* vcvtss2sil */, X86::VCVTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
11831 { 9016 /* vcvtss2siq */, X86::VCVTSS2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
11848 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
11848 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
11849 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
11874 { 9073 /* vcvttpd2dqx */, X86::VCVTTPD2DQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
11874 { 9073 /* vcvttpd2dqx */, X86::VCVTTPD2DQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
11876 { 9073 /* vcvttpd2dqx */, X86::VCVTTPD2DQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
11885 { 9085 /* vcvttpd2dqy */, X86::VCVTTPD2DQYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
11887 { 9085 /* vcvttpd2dqy */, X86::VCVTTPD2DQYrm, Convert__Reg1_1__Mem2565_0, AMFBS_None, { MCK_Mem256, MCK_FR32 }, },
11998 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
11998 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
12003 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
12122 { 9204 /* vcvttsd2si */, X86::VCVTTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
12123 { 9204 /* vcvttsd2si */, X86::VCVTTSD2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
12132 { 9215 /* vcvttsd2sil */, X86::VCVTTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
12137 { 9227 /* vcvttsd2siq */, X86::VCVTTSD2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
12154 { 9277 /* vcvttss2si */, X86::VCVTTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
12155 { 9277 /* vcvttss2si */, X86::VCVTTSS2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
12164 { 9288 /* vcvttss2sil */, X86::VCVTTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
12169 { 9300 /* vcvttss2siq */, X86::VCVTTSS2SI64rr_Int, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
12353 { 9498 /* vdivpd */, X86::VDIVPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12353 { 9498 /* vdivpd */, X86::VDIVPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12353 { 9498 /* vdivpd */, X86::VDIVPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12358 { 9498 /* vdivpd */, X86::VDIVPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12358 { 9498 /* vdivpd */, X86::VDIVPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12387 { 9505 /* vdivps */, X86::VDIVPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12387 { 9505 /* vdivps */, X86::VDIVPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12387 { 9505 /* vdivps */, X86::VDIVPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12392 { 9505 /* vdivps */, X86::VDIVPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12392 { 9505 /* vdivps */, X86::VDIVPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12421 { 9512 /* vdivsd */, X86::VDIVSDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12421 { 9512 /* vdivsd */, X86::VDIVSDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12421 { 9512 /* vdivsd */, X86::VDIVSDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12423 { 9512 /* vdivsd */, X86::VDIVSDrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
12423 { 9512 /* vdivsd */, X86::VDIVSDrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
12432 { 9519 /* vdivss */, X86::VDIVSSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12432 { 9519 /* vdivss */, X86::VDIVSSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12432 { 9519 /* vdivss */, X86::VDIVSSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12434 { 9519 /* vdivss */, X86::VDIVSSrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
12434 { 9519 /* vdivss */, X86::VDIVSSrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
12470 { 9536 /* vdppd */, X86::VDPPDrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12470 { 9536 /* vdppd */, X86::VDPPDrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12470 { 9536 /* vdppd */, X86::VDPPDrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12471 { 9536 /* vdppd */, X86::VDPPDrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12471 { 9536 /* vdppd */, X86::VDPPDrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12472 { 9542 /* vdpps */, X86::VDPPSrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12472 { 9542 /* vdpps */, X86::VDPPSrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12472 { 9542 /* vdpps */, X86::VDPPSrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12474 { 9542 /* vdpps */, X86::VDPPSrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12474 { 9542 /* vdpps */, X86::VDPPSrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12540 { 9594 /* vextractf128 */, X86::VEXTRACTF128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_FR32 }, },
12572 { 9663 /* vextracti128 */, X86::VEXTRACTI128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_FR32 }, },
12604 { 9732 /* vextractps */, X86::VEXTRACTPSrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
12605 { 9732 /* vextractps */, X86::VEXTRACTPSmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem32 }, },
12686 { 9791 /* vfmadd132pd */, X86::VFMADD132PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12686 { 9791 /* vfmadd132pd */, X86::VFMADD132PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12686 { 9791 /* vfmadd132pd */, X86::VFMADD132PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12691 { 9791 /* vfmadd132pd */, X86::VFMADD132PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12691 { 9791 /* vfmadd132pd */, X86::VFMADD132PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12720 { 9803 /* vfmadd132ps */, X86::VFMADD132PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12720 { 9803 /* vfmadd132ps */, X86::VFMADD132PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12720 { 9803 /* vfmadd132ps */, X86::VFMADD132PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12725 { 9803 /* vfmadd132ps */, X86::VFMADD132PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12725 { 9803 /* vfmadd132ps */, X86::VFMADD132PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12754 { 9815 /* vfmadd132sd */, X86::VFMADD132SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12754 { 9815 /* vfmadd132sd */, X86::VFMADD132SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12754 { 9815 /* vfmadd132sd */, X86::VFMADD132SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12756 { 9815 /* vfmadd132sd */, X86::VFMADD132SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
12756 { 9815 /* vfmadd132sd */, X86::VFMADD132SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
12765 { 9827 /* vfmadd132ss */, X86::VFMADD132SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12765 { 9827 /* vfmadd132ss */, X86::VFMADD132SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12765 { 9827 /* vfmadd132ss */, X86::VFMADD132SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12767 { 9827 /* vfmadd132ss */, X86::VFMADD132SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
12767 { 9827 /* vfmadd132ss */, X86::VFMADD132SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
12776 { 9839 /* vfmadd213pd */, X86::VFMADD213PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12776 { 9839 /* vfmadd213pd */, X86::VFMADD213PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12776 { 9839 /* vfmadd213pd */, X86::VFMADD213PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12781 { 9839 /* vfmadd213pd */, X86::VFMADD213PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12781 { 9839 /* vfmadd213pd */, X86::VFMADD213PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12810 { 9851 /* vfmadd213ps */, X86::VFMADD213PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12810 { 9851 /* vfmadd213ps */, X86::VFMADD213PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12810 { 9851 /* vfmadd213ps */, X86::VFMADD213PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12815 { 9851 /* vfmadd213ps */, X86::VFMADD213PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12815 { 9851 /* vfmadd213ps */, X86::VFMADD213PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12844 { 9863 /* vfmadd213sd */, X86::VFMADD213SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12844 { 9863 /* vfmadd213sd */, X86::VFMADD213SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12844 { 9863 /* vfmadd213sd */, X86::VFMADD213SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12846 { 9863 /* vfmadd213sd */, X86::VFMADD213SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
12846 { 9863 /* vfmadd213sd */, X86::VFMADD213SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
12855 { 9875 /* vfmadd213ss */, X86::VFMADD213SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12855 { 9875 /* vfmadd213ss */, X86::VFMADD213SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12855 { 9875 /* vfmadd213ss */, X86::VFMADD213SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12857 { 9875 /* vfmadd213ss */, X86::VFMADD213SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
12857 { 9875 /* vfmadd213ss */, X86::VFMADD213SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
12866 { 9887 /* vfmadd231pd */, X86::VFMADD231PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12866 { 9887 /* vfmadd231pd */, X86::VFMADD231PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12866 { 9887 /* vfmadd231pd */, X86::VFMADD231PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12871 { 9887 /* vfmadd231pd */, X86::VFMADD231PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12871 { 9887 /* vfmadd231pd */, X86::VFMADD231PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12900 { 9899 /* vfmadd231ps */, X86::VFMADD231PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12900 { 9899 /* vfmadd231ps */, X86::VFMADD231PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12900 { 9899 /* vfmadd231ps */, X86::VFMADD231PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12905 { 9899 /* vfmadd231ps */, X86::VFMADD231PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12905 { 9899 /* vfmadd231ps */, X86::VFMADD231PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12934 { 9911 /* vfmadd231sd */, X86::VFMADD231SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12934 { 9911 /* vfmadd231sd */, X86::VFMADD231SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12934 { 9911 /* vfmadd231sd */, X86::VFMADD231SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12936 { 9911 /* vfmadd231sd */, X86::VFMADD231SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
12936 { 9911 /* vfmadd231sd */, X86::VFMADD231SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
12945 { 9923 /* vfmadd231ss */, X86::VFMADD231SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12945 { 9923 /* vfmadd231ss */, X86::VFMADD231SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12945 { 9923 /* vfmadd231ss */, X86::VFMADD231SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12947 { 9923 /* vfmadd231ss */, X86::VFMADD231SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
12947 { 9923 /* vfmadd231ss */, X86::VFMADD231SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
12956 { 9935 /* vfmaddpd */, X86::VFMADDPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12956 { 9935 /* vfmaddpd */, X86::VFMADDPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12956 { 9935 /* vfmaddpd */, X86::VFMADDPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12956 { 9935 /* vfmaddpd */, X86::VFMADDPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12957 { 9935 /* vfmaddpd */, X86::VFMADDPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12957 { 9935 /* vfmaddpd */, X86::VFMADDPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12957 { 9935 /* vfmaddpd */, X86::VFMADDPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12960 { 9935 /* vfmaddpd */, X86::VFMADDPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12960 { 9935 /* vfmaddpd */, X86::VFMADDPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12960 { 9935 /* vfmaddpd */, X86::VFMADDPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12962 { 9944 /* vfmaddps */, X86::VFMADDPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12962 { 9944 /* vfmaddps */, X86::VFMADDPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12962 { 9944 /* vfmaddps */, X86::VFMADDPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12962 { 9944 /* vfmaddps */, X86::VFMADDPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12963 { 9944 /* vfmaddps */, X86::VFMADDPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12963 { 9944 /* vfmaddps */, X86::VFMADDPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12963 { 9944 /* vfmaddps */, X86::VFMADDPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12966 { 9944 /* vfmaddps */, X86::VFMADDPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12966 { 9944 /* vfmaddps */, X86::VFMADDPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12966 { 9944 /* vfmaddps */, X86::VFMADDPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12968 { 9953 /* vfmaddsd */, X86::VFMADDSD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12968 { 9953 /* vfmaddsd */, X86::VFMADDSD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12968 { 9953 /* vfmaddsd */, X86::VFMADDSD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12968 { 9953 /* vfmaddsd */, X86::VFMADDSD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12969 { 9953 /* vfmaddsd */, X86::VFMADDSD4mr, Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
12969 { 9953 /* vfmaddsd */, X86::VFMADDSD4mr, Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
12969 { 9953 /* vfmaddsd */, X86::VFMADDSD4mr, Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
12970 { 9953 /* vfmaddsd */, X86::VFMADDSD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12970 { 9953 /* vfmaddsd */, X86::VFMADDSD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12970 { 9953 /* vfmaddsd */, X86::VFMADDSD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12971 { 9962 /* vfmaddss */, X86::VFMADDSS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12971 { 9962 /* vfmaddss */, X86::VFMADDSS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12971 { 9962 /* vfmaddss */, X86::VFMADDSS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12971 { 9962 /* vfmaddss */, X86::VFMADDSS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12972 { 9962 /* vfmaddss */, X86::VFMADDSS4mr, Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
12972 { 9962 /* vfmaddss */, X86::VFMADDSS4mr, Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
12972 { 9962 /* vfmaddss */, X86::VFMADDSS4mr, Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
12973 { 9962 /* vfmaddss */, X86::VFMADDSS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12973 { 9962 /* vfmaddss */, X86::VFMADDSS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12973 { 9962 /* vfmaddss */, X86::VFMADDSS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12974 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12974 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12974 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12979 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12979 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13008 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13008 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13008 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13013 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13013 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13042 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13042 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13042 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13047 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13047 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13076 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13076 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13076 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13081 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13081 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13110 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13110 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13110 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13115 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13115 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13144 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13144 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13144 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13149 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13149 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13178 { 10061 /* vfmaddsubpd */, X86::VFMADDSUBPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13178 { 10061 /* vfmaddsubpd */, X86::VFMADDSUBPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13178 { 10061 /* vfmaddsubpd */, X86::VFMADDSUBPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13178 { 10061 /* vfmaddsubpd */, X86::VFMADDSUBPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13179 { 10061 /* vfmaddsubpd */, X86::VFMADDSUBPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13179 { 10061 /* vfmaddsubpd */, X86::VFMADDSUBPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13179 { 10061 /* vfmaddsubpd */, X86::VFMADDSUBPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13182 { 10061 /* vfmaddsubpd */, X86::VFMADDSUBPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13182 { 10061 /* vfmaddsubpd */, X86::VFMADDSUBPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13182 { 10061 /* vfmaddsubpd */, X86::VFMADDSUBPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13184 { 10073 /* vfmaddsubps */, X86::VFMADDSUBPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13184 { 10073 /* vfmaddsubps */, X86::VFMADDSUBPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13184 { 10073 /* vfmaddsubps */, X86::VFMADDSUBPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13184 { 10073 /* vfmaddsubps */, X86::VFMADDSUBPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13185 { 10073 /* vfmaddsubps */, X86::VFMADDSUBPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13185 { 10073 /* vfmaddsubps */, X86::VFMADDSUBPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13185 { 10073 /* vfmaddsubps */, X86::VFMADDSUBPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13188 { 10073 /* vfmaddsubps */, X86::VFMADDSUBPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13188 { 10073 /* vfmaddsubps */, X86::VFMADDSUBPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13188 { 10073 /* vfmaddsubps */, X86::VFMADDSUBPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13190 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13190 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13190 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13195 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13195 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13224 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13224 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13224 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13229 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13229 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13258 { 10109 /* vfmsub132sd */, X86::VFMSUB132SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13258 { 10109 /* vfmsub132sd */, X86::VFMSUB132SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13258 { 10109 /* vfmsub132sd */, X86::VFMSUB132SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13260 { 10109 /* vfmsub132sd */, X86::VFMSUB132SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
13260 { 10109 /* vfmsub132sd */, X86::VFMSUB132SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
13269 { 10121 /* vfmsub132ss */, X86::VFMSUB132SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13269 { 10121 /* vfmsub132ss */, X86::VFMSUB132SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13269 { 10121 /* vfmsub132ss */, X86::VFMSUB132SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13271 { 10121 /* vfmsub132ss */, X86::VFMSUB132SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13271 { 10121 /* vfmsub132ss */, X86::VFMSUB132SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13280 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13280 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13280 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13285 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13285 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13314 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13314 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13314 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13319 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13319 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13348 { 10157 /* vfmsub213sd */, X86::VFMSUB213SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13348 { 10157 /* vfmsub213sd */, X86::VFMSUB213SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13348 { 10157 /* vfmsub213sd */, X86::VFMSUB213SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13350 { 10157 /* vfmsub213sd */, X86::VFMSUB213SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
13350 { 10157 /* vfmsub213sd */, X86::VFMSUB213SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
13359 { 10169 /* vfmsub213ss */, X86::VFMSUB213SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13359 { 10169 /* vfmsub213ss */, X86::VFMSUB213SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13359 { 10169 /* vfmsub213ss */, X86::VFMSUB213SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13361 { 10169 /* vfmsub213ss */, X86::VFMSUB213SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13361 { 10169 /* vfmsub213ss */, X86::VFMSUB213SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13370 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13370 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13370 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13375 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13375 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13404 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13404 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13404 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13409 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13409 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13438 { 10205 /* vfmsub231sd */, X86::VFMSUB231SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13438 { 10205 /* vfmsub231sd */, X86::VFMSUB231SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13438 { 10205 /* vfmsub231sd */, X86::VFMSUB231SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13440 { 10205 /* vfmsub231sd */, X86::VFMSUB231SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
13440 { 10205 /* vfmsub231sd */, X86::VFMSUB231SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
13449 { 10217 /* vfmsub231ss */, X86::VFMSUB231SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13449 { 10217 /* vfmsub231ss */, X86::VFMSUB231SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13449 { 10217 /* vfmsub231ss */, X86::VFMSUB231SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13451 { 10217 /* vfmsub231ss */, X86::VFMSUB231SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13451 { 10217 /* vfmsub231ss */, X86::VFMSUB231SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13460 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13460 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13460 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13465 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13465 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13494 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13494 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13494 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13499 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13499 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13528 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13528 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13528 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13533 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13533 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13562 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13562 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13562 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13567 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13567 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13596 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13596 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13596 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13601 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13601 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13630 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13630 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13630 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13635 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13635 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13664 { 10319 /* vfmsubaddpd */, X86::VFMSUBADDPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13664 { 10319 /* vfmsubaddpd */, X86::VFMSUBADDPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13664 { 10319 /* vfmsubaddpd */, X86::VFMSUBADDPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13664 { 10319 /* vfmsubaddpd */, X86::VFMSUBADDPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13665 { 10319 /* vfmsubaddpd */, X86::VFMSUBADDPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13665 { 10319 /* vfmsubaddpd */, X86::VFMSUBADDPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13665 { 10319 /* vfmsubaddpd */, X86::VFMSUBADDPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13668 { 10319 /* vfmsubaddpd */, X86::VFMSUBADDPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13668 { 10319 /* vfmsubaddpd */, X86::VFMSUBADDPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13668 { 10319 /* vfmsubaddpd */, X86::VFMSUBADDPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13670 { 10331 /* vfmsubaddps */, X86::VFMSUBADDPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13670 { 10331 /* vfmsubaddps */, X86::VFMSUBADDPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13670 { 10331 /* vfmsubaddps */, X86::VFMSUBADDPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13670 { 10331 /* vfmsubaddps */, X86::VFMSUBADDPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13671 { 10331 /* vfmsubaddps */, X86::VFMSUBADDPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13671 { 10331 /* vfmsubaddps */, X86::VFMSUBADDPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13671 { 10331 /* vfmsubaddps */, X86::VFMSUBADDPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13674 { 10331 /* vfmsubaddps */, X86::VFMSUBADDPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13674 { 10331 /* vfmsubaddps */, X86::VFMSUBADDPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13674 { 10331 /* vfmsubaddps */, X86::VFMSUBADDPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13676 { 10343 /* vfmsubpd */, X86::VFMSUBPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13676 { 10343 /* vfmsubpd */, X86::VFMSUBPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13676 { 10343 /* vfmsubpd */, X86::VFMSUBPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13676 { 10343 /* vfmsubpd */, X86::VFMSUBPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13677 { 10343 /* vfmsubpd */, X86::VFMSUBPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13677 { 10343 /* vfmsubpd */, X86::VFMSUBPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13677 { 10343 /* vfmsubpd */, X86::VFMSUBPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13680 { 10343 /* vfmsubpd */, X86::VFMSUBPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13680 { 10343 /* vfmsubpd */, X86::VFMSUBPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13680 { 10343 /* vfmsubpd */, X86::VFMSUBPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13682 { 10352 /* vfmsubps */, X86::VFMSUBPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13682 { 10352 /* vfmsubps */, X86::VFMSUBPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13682 { 10352 /* vfmsubps */, X86::VFMSUBPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13682 { 10352 /* vfmsubps */, X86::VFMSUBPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13683 { 10352 /* vfmsubps */, X86::VFMSUBPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13683 { 10352 /* vfmsubps */, X86::VFMSUBPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13683 { 10352 /* vfmsubps */, X86::VFMSUBPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13686 { 10352 /* vfmsubps */, X86::VFMSUBPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13686 { 10352 /* vfmsubps */, X86::VFMSUBPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13686 { 10352 /* vfmsubps */, X86::VFMSUBPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13688 { 10361 /* vfmsubsd */, X86::VFMSUBSD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13688 { 10361 /* vfmsubsd */, X86::VFMSUBSD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13688 { 10361 /* vfmsubsd */, X86::VFMSUBSD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13688 { 10361 /* vfmsubsd */, X86::VFMSUBSD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13689 { 10361 /* vfmsubsd */, X86::VFMSUBSD4mr, Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
13689 { 10361 /* vfmsubsd */, X86::VFMSUBSD4mr, Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
13689 { 10361 /* vfmsubsd */, X86::VFMSUBSD4mr, Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
13690 { 10361 /* vfmsubsd */, X86::VFMSUBSD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13690 { 10361 /* vfmsubsd */, X86::VFMSUBSD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13690 { 10361 /* vfmsubsd */, X86::VFMSUBSD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13691 { 10370 /* vfmsubss */, X86::VFMSUBSS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13691 { 10370 /* vfmsubss */, X86::VFMSUBSS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13691 { 10370 /* vfmsubss */, X86::VFMSUBSS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13691 { 10370 /* vfmsubss */, X86::VFMSUBSS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13692 { 10370 /* vfmsubss */, X86::VFMSUBSS4mr, Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13692 { 10370 /* vfmsubss */, X86::VFMSUBSS4mr, Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13692 { 10370 /* vfmsubss */, X86::VFMSUBSS4mr, Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13693 { 10370 /* vfmsubss */, X86::VFMSUBSS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13693 { 10370 /* vfmsubss */, X86::VFMSUBSS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13693 { 10370 /* vfmsubss */, X86::VFMSUBSS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13694 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13694 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13694 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13699 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13699 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13728 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13728 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13728 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13733 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13733 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13762 { 10405 /* vfnmadd132sd */, X86::VFNMADD132SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13762 { 10405 /* vfnmadd132sd */, X86::VFNMADD132SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13762 { 10405 /* vfnmadd132sd */, X86::VFNMADD132SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13764 { 10405 /* vfnmadd132sd */, X86::VFNMADD132SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
13764 { 10405 /* vfnmadd132sd */, X86::VFNMADD132SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
13773 { 10418 /* vfnmadd132ss */, X86::VFNMADD132SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13773 { 10418 /* vfnmadd132ss */, X86::VFNMADD132SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13773 { 10418 /* vfnmadd132ss */, X86::VFNMADD132SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13775 { 10418 /* vfnmadd132ss */, X86::VFNMADD132SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13775 { 10418 /* vfnmadd132ss */, X86::VFNMADD132SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13784 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13784 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13784 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13789 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13789 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13818 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13818 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13818 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13823 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13823 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13852 { 10457 /* vfnmadd213sd */, X86::VFNMADD213SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13852 { 10457 /* vfnmadd213sd */, X86::VFNMADD213SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13852 { 10457 /* vfnmadd213sd */, X86::VFNMADD213SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13854 { 10457 /* vfnmadd213sd */, X86::VFNMADD213SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
13854 { 10457 /* vfnmadd213sd */, X86::VFNMADD213SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
13863 { 10470 /* vfnmadd213ss */, X86::VFNMADD213SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13863 { 10470 /* vfnmadd213ss */, X86::VFNMADD213SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13863 { 10470 /* vfnmadd213ss */, X86::VFNMADD213SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13865 { 10470 /* vfnmadd213ss */, X86::VFNMADD213SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13865 { 10470 /* vfnmadd213ss */, X86::VFNMADD213SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13874 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13874 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13874 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13879 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13879 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13908 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13908 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13908 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13913 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13913 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13942 { 10509 /* vfnmadd231sd */, X86::VFNMADD231SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13942 { 10509 /* vfnmadd231sd */, X86::VFNMADD231SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13942 { 10509 /* vfnmadd231sd */, X86::VFNMADD231SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13944 { 10509 /* vfnmadd231sd */, X86::VFNMADD231SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
13944 { 10509 /* vfnmadd231sd */, X86::VFNMADD231SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
13953 { 10522 /* vfnmadd231ss */, X86::VFNMADD231SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13953 { 10522 /* vfnmadd231ss */, X86::VFNMADD231SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13953 { 10522 /* vfnmadd231ss */, X86::VFNMADD231SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13955 { 10522 /* vfnmadd231ss */, X86::VFNMADD231SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13955 { 10522 /* vfnmadd231ss */, X86::VFNMADD231SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13964 { 10535 /* vfnmaddpd */, X86::VFNMADDPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13964 { 10535 /* vfnmaddpd */, X86::VFNMADDPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13964 { 10535 /* vfnmaddpd */, X86::VFNMADDPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13964 { 10535 /* vfnmaddpd */, X86::VFNMADDPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13965 { 10535 /* vfnmaddpd */, X86::VFNMADDPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13965 { 10535 /* vfnmaddpd */, X86::VFNMADDPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13965 { 10535 /* vfnmaddpd */, X86::VFNMADDPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13968 { 10535 /* vfnmaddpd */, X86::VFNMADDPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13968 { 10535 /* vfnmaddpd */, X86::VFNMADDPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13968 { 10535 /* vfnmaddpd */, X86::VFNMADDPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13970 { 10545 /* vfnmaddps */, X86::VFNMADDPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13970 { 10545 /* vfnmaddps */, X86::VFNMADDPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13970 { 10545 /* vfnmaddps */, X86::VFNMADDPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13970 { 10545 /* vfnmaddps */, X86::VFNMADDPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13971 { 10545 /* vfnmaddps */, X86::VFNMADDPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13971 { 10545 /* vfnmaddps */, X86::VFNMADDPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13971 { 10545 /* vfnmaddps */, X86::VFNMADDPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13974 { 10545 /* vfnmaddps */, X86::VFNMADDPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13974 { 10545 /* vfnmaddps */, X86::VFNMADDPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13974 { 10545 /* vfnmaddps */, X86::VFNMADDPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13976 { 10555 /* vfnmaddsd */, X86::VFNMADDSD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13976 { 10555 /* vfnmaddsd */, X86::VFNMADDSD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13976 { 10555 /* vfnmaddsd */, X86::VFNMADDSD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13976 { 10555 /* vfnmaddsd */, X86::VFNMADDSD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13977 { 10555 /* vfnmaddsd */, X86::VFNMADDSD4mr, Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
13977 { 10555 /* vfnmaddsd */, X86::VFNMADDSD4mr, Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
13977 { 10555 /* vfnmaddsd */, X86::VFNMADDSD4mr, Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
13978 { 10555 /* vfnmaddsd */, X86::VFNMADDSD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13978 { 10555 /* vfnmaddsd */, X86::VFNMADDSD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13978 { 10555 /* vfnmaddsd */, X86::VFNMADDSD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13979 { 10565 /* vfnmaddss */, X86::VFNMADDSS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13979 { 10565 /* vfnmaddss */, X86::VFNMADDSS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13979 { 10565 /* vfnmaddss */, X86::VFNMADDSS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13979 { 10565 /* vfnmaddss */, X86::VFNMADDSS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13980 { 10565 /* vfnmaddss */, X86::VFNMADDSS4mr, Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13980 { 10565 /* vfnmaddss */, X86::VFNMADDSS4mr, Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13980 { 10565 /* vfnmaddss */, X86::VFNMADDSS4mr, Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13981 { 10565 /* vfnmaddss */, X86::VFNMADDSS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13981 { 10565 /* vfnmaddss */, X86::VFNMADDSS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13981 { 10565 /* vfnmaddss */, X86::VFNMADDSS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13982 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13982 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13982 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13987 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13987 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14016 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14016 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14016 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14021 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14021 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14050 { 10601 /* vfnmsub132sd */, X86::VFNMSUB132SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14050 { 10601 /* vfnmsub132sd */, X86::VFNMSUB132SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14050 { 10601 /* vfnmsub132sd */, X86::VFNMSUB132SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14052 { 10601 /* vfnmsub132sd */, X86::VFNMSUB132SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
14052 { 10601 /* vfnmsub132sd */, X86::VFNMSUB132SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
14061 { 10614 /* vfnmsub132ss */, X86::VFNMSUB132SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14061 { 10614 /* vfnmsub132ss */, X86::VFNMSUB132SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14061 { 10614 /* vfnmsub132ss */, X86::VFNMSUB132SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14063 { 10614 /* vfnmsub132ss */, X86::VFNMSUB132SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
14063 { 10614 /* vfnmsub132ss */, X86::VFNMSUB132SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
14072 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14072 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14072 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14077 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14077 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14106 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14106 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14106 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14111 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14111 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14140 { 10653 /* vfnmsub213sd */, X86::VFNMSUB213SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14140 { 10653 /* vfnmsub213sd */, X86::VFNMSUB213SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14140 { 10653 /* vfnmsub213sd */, X86::VFNMSUB213SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14142 { 10653 /* vfnmsub213sd */, X86::VFNMSUB213SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
14142 { 10653 /* vfnmsub213sd */, X86::VFNMSUB213SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
14151 { 10666 /* vfnmsub213ss */, X86::VFNMSUB213SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14151 { 10666 /* vfnmsub213ss */, X86::VFNMSUB213SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14151 { 10666 /* vfnmsub213ss */, X86::VFNMSUB213SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14153 { 10666 /* vfnmsub213ss */, X86::VFNMSUB213SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
14153 { 10666 /* vfnmsub213ss */, X86::VFNMSUB213SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
14162 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14162 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14162 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14167 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14167 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14196 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14196 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14196 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14201 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14201 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14230 { 10705 /* vfnmsub231sd */, X86::VFNMSUB231SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14230 { 10705 /* vfnmsub231sd */, X86::VFNMSUB231SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14230 { 10705 /* vfnmsub231sd */, X86::VFNMSUB231SDr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14232 { 10705 /* vfnmsub231sd */, X86::VFNMSUB231SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
14232 { 10705 /* vfnmsub231sd */, X86::VFNMSUB231SDm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
14241 { 10718 /* vfnmsub231ss */, X86::VFNMSUB231SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14241 { 10718 /* vfnmsub231ss */, X86::VFNMSUB231SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14241 { 10718 /* vfnmsub231ss */, X86::VFNMSUB231SSr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14243 { 10718 /* vfnmsub231ss */, X86::VFNMSUB231SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
14243 { 10718 /* vfnmsub231ss */, X86::VFNMSUB231SSm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
14252 { 10731 /* vfnmsubpd */, X86::VFNMSUBPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14252 { 10731 /* vfnmsubpd */, X86::VFNMSUBPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14252 { 10731 /* vfnmsubpd */, X86::VFNMSUBPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14252 { 10731 /* vfnmsubpd */, X86::VFNMSUBPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14253 { 10731 /* vfnmsubpd */, X86::VFNMSUBPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14253 { 10731 /* vfnmsubpd */, X86::VFNMSUBPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14253 { 10731 /* vfnmsubpd */, X86::VFNMSUBPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14256 { 10731 /* vfnmsubpd */, X86::VFNMSUBPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14256 { 10731 /* vfnmsubpd */, X86::VFNMSUBPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14256 { 10731 /* vfnmsubpd */, X86::VFNMSUBPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14258 { 10741 /* vfnmsubps */, X86::VFNMSUBPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14258 { 10741 /* vfnmsubps */, X86::VFNMSUBPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14258 { 10741 /* vfnmsubps */, X86::VFNMSUBPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14258 { 10741 /* vfnmsubps */, X86::VFNMSUBPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14259 { 10741 /* vfnmsubps */, X86::VFNMSUBPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14259 { 10741 /* vfnmsubps */, X86::VFNMSUBPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14259 { 10741 /* vfnmsubps */, X86::VFNMSUBPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14262 { 10741 /* vfnmsubps */, X86::VFNMSUBPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14262 { 10741 /* vfnmsubps */, X86::VFNMSUBPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14262 { 10741 /* vfnmsubps */, X86::VFNMSUBPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14264 { 10751 /* vfnmsubsd */, X86::VFNMSUBSD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14264 { 10751 /* vfnmsubsd */, X86::VFNMSUBSD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14264 { 10751 /* vfnmsubsd */, X86::VFNMSUBSD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14264 { 10751 /* vfnmsubsd */, X86::VFNMSUBSD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14265 { 10751 /* vfnmsubsd */, X86::VFNMSUBSD4mr, Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
14265 { 10751 /* vfnmsubsd */, X86::VFNMSUBSD4mr, Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
14265 { 10751 /* vfnmsubsd */, X86::VFNMSUBSD4mr, Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
14266 { 10751 /* vfnmsubsd */, X86::VFNMSUBSD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14266 { 10751 /* vfnmsubsd */, X86::VFNMSUBSD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14266 { 10751 /* vfnmsubsd */, X86::VFNMSUBSD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14267 { 10761 /* vfnmsubss */, X86::VFNMSUBSS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14267 { 10761 /* vfnmsubss */, X86::VFNMSUBSS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14267 { 10761 /* vfnmsubss */, X86::VFNMSUBSS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14267 { 10761 /* vfnmsubss */, X86::VFNMSUBSS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14268 { 10761 /* vfnmsubss */, X86::VFNMSUBSS4mr, Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
14268 { 10761 /* vfnmsubss */, X86::VFNMSUBSS4mr, Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
14268 { 10761 /* vfnmsubss */, X86::VFNMSUBSS4mr, Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
14269 { 10761 /* vfnmsubss */, X86::VFNMSUBSS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14269 { 10761 /* vfnmsubss */, X86::VFNMSUBSS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14269 { 10761 /* vfnmsubss */, X86::VFNMSUBSS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14338 { 10887 /* vfrczpd */, X86::VFRCZPDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
14338 { 10887 /* vfrczpd */, X86::VFRCZPDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
14340 { 10887 /* vfrczpd */, X86::VFRCZPDrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
14342 { 10895 /* vfrczps */, X86::VFRCZPSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
14342 { 10895 /* vfrczps */, X86::VFRCZPSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
14344 { 10895 /* vfrczps */, X86::VFRCZPSrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
14346 { 10903 /* vfrczsd */, X86::VFRCZSDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
14346 { 10903 /* vfrczsd */, X86::VFRCZSDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
14347 { 10903 /* vfrczsd */, X86::VFRCZSDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
14348 { 10911 /* vfrczss */, X86::VFRCZSSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
14348 { 10911 /* vfrczss */, X86::VFRCZSSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
14349 { 10911 /* vfrczss */, X86::VFRCZSSrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
14350 { 10919 /* vgatherdpd */, X86::VGATHERDPDrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
14350 { 10919 /* vgatherdpd */, X86::VGATHERDPDrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
14355 { 10930 /* vgatherdps */, X86::VGATHERDPSrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
14355 { 10930 /* vgatherdps */, X86::VGATHERDPSrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
14368 { 11053 /* vgatherqpd */, X86::VGATHERQPDrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
14368 { 11053 /* vgatherqpd */, X86::VGATHERQPDrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
14373 { 11064 /* vgatherqps */, X86::VGATHERQPSYrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC2565_1__Tie1_1_1, AMFBS_None, { MCK_FR32, MCK_Mem128_RC256, MCK_FR32 }, },
14373 { 11064 /* vgatherqps */, X86::VGATHERQPSYrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC2565_1__Tie1_1_1, AMFBS_None, { MCK_FR32, MCK_Mem128_RC256, MCK_FR32 }, },
14374 { 11064 /* vgatherqps */, X86::VGATHERQPSrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem64_RC1285_1__Tie1_1_1, AMFBS_None, { MCK_FR32, MCK_Mem64_RC128, MCK_FR32 }, },
14374 { 11064 /* vgatherqps */, X86::VGATHERQPSrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem64_RC1285_1__Tie1_1_1, AMFBS_None, { MCK_FR32, MCK_Mem64_RC128, MCK_FR32 }, },
14534 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14534 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14534 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14539 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14539 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14565 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14565 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14565 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14570 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14570 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14596 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14596 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14596 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14601 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14601 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14618 { 11203 /* vhaddpd */, X86::VHADDPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14618 { 11203 /* vhaddpd */, X86::VHADDPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14618 { 11203 /* vhaddpd */, X86::VHADDPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14620 { 11203 /* vhaddpd */, X86::VHADDPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14620 { 11203 /* vhaddpd */, X86::VHADDPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14622 { 11211 /* vhaddps */, X86::VHADDPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14622 { 11211 /* vhaddps */, X86::VHADDPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14622 { 11211 /* vhaddps */, X86::VHADDPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14624 { 11211 /* vhaddps */, X86::VHADDPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14624 { 11211 /* vhaddps */, X86::VHADDPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14626 { 11219 /* vhsubpd */, X86::VHSUBPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14626 { 11219 /* vhsubpd */, X86::VHSUBPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14626 { 11219 /* vhsubpd */, X86::VHSUBPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14628 { 11219 /* vhsubpd */, X86::VHSUBPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14628 { 11219 /* vhsubpd */, X86::VHSUBPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14630 { 11227 /* vhsubps */, X86::VHSUBPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14630 { 11227 /* vhsubps */, X86::VHSUBPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14630 { 11227 /* vhsubps */, X86::VHSUBPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14632 { 11227 /* vhsubps */, X86::VHSUBPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14632 { 11227 /* vhsubps */, X86::VHSUBPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14634 { 11235 /* vinsertf128 */, X86::VINSERTF128rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_VR256, MCK_VR256 }, },
14672 { 11299 /* vinserti128 */, X86::VINSERTI128rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_VR256, MCK_VR256 }, },
14710 { 11363 /* vinsertps */, X86::VINSERTPSrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14710 { 11363 /* vinsertps */, X86::VINSERTPSrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14710 { 11363 /* vinsertps */, X86::VINSERTPSrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14712 { 11363 /* vinsertps */, X86::VINSERTPSrm, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
14712 { 11363 /* vinsertps */, X86::VINSERTPSrm, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
14714 { 11373 /* vlddqu */, X86::VLDDQUrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
14717 { 11389 /* vmaskmovdqu */, X86::VMASKMOVDQU, Convert__Reg1_1__Reg1_0, AMFBS_Not64BitMode, { MCK_FR32, MCK_FR32 }, },
14717 { 11389 /* vmaskmovdqu */, X86::VMASKMOVDQU, Convert__Reg1_1__Reg1_0, AMFBS_Not64BitMode, { MCK_FR32, MCK_FR32 }, },
14718 { 11389 /* vmaskmovdqu */, X86::VMASKMOVDQU64, Convert__Reg1_1__Reg1_0, AMFBS_In64BitMode, { MCK_FR32, MCK_FR32 }, },
14718 { 11389 /* vmaskmovdqu */, X86::VMASKMOVDQU64, Convert__Reg1_1__Reg1_0, AMFBS_In64BitMode, { MCK_FR32, MCK_FR32 }, },
14719 { 11401 /* vmaskmovpd */, X86::VMASKMOVPDmr, Convert__Mem1285_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
14719 { 11401 /* vmaskmovpd */, X86::VMASKMOVPDmr, Convert__Mem1285_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
14721 { 11401 /* vmaskmovpd */, X86::VMASKMOVPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14721 { 11401 /* vmaskmovpd */, X86::VMASKMOVPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14723 { 11412 /* vmaskmovps */, X86::VMASKMOVPSmr, Convert__Mem1285_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
14723 { 11412 /* vmaskmovps */, X86::VMASKMOVPSmr, Convert__Mem1285_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
14725 { 11412 /* vmaskmovps */, X86::VMASKMOVPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14725 { 11412 /* vmaskmovps */, X86::VMASKMOVPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14727 { 11423 /* vmaxpd */, X86::VMAXPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14727 { 11423 /* vmaxpd */, X86::VMAXPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14727 { 11423 /* vmaxpd */, X86::VMAXPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14732 { 11423 /* vmaxpd */, X86::VMAXPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14732 { 11423 /* vmaxpd */, X86::VMAXPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14761 { 11430 /* vmaxps */, X86::VMAXPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14761 { 11430 /* vmaxps */, X86::VMAXPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14761 { 11430 /* vmaxps */, X86::VMAXPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14766 { 11430 /* vmaxps */, X86::VMAXPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14766 { 11430 /* vmaxps */, X86::VMAXPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14795 { 11437 /* vmaxsd */, X86::VMAXSDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14795 { 11437 /* vmaxsd */, X86::VMAXSDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14795 { 11437 /* vmaxsd */, X86::VMAXSDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14797 { 11437 /* vmaxsd */, X86::VMAXSDrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
14797 { 11437 /* vmaxsd */, X86::VMAXSDrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
14806 { 11444 /* vmaxss */, X86::VMAXSSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14806 { 11444 /* vmaxss */, X86::VMAXSSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14806 { 11444 /* vmaxss */, X86::VMAXSSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14808 { 11444 /* vmaxss */, X86::VMAXSSrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
14808 { 11444 /* vmaxss */, X86::VMAXSSrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
14820 { 11473 /* vminpd */, X86::VMINPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14820 { 11473 /* vminpd */, X86::VMINPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14820 { 11473 /* vminpd */, X86::VMINPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14825 { 11473 /* vminpd */, X86::VMINPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14825 { 11473 /* vminpd */, X86::VMINPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14854 { 11480 /* vminps */, X86::VMINPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14854 { 11480 /* vminps */, X86::VMINPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14854 { 11480 /* vminps */, X86::VMINPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14859 { 11480 /* vminps */, X86::VMINPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14859 { 11480 /* vminps */, X86::VMINPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14888 { 11487 /* vminsd */, X86::VMINSDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14888 { 11487 /* vminsd */, X86::VMINSDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14888 { 11487 /* vminsd */, X86::VMINSDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14890 { 11487 /* vminsd */, X86::VMINSDrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
14890 { 11487 /* vminsd */, X86::VMINSDrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
14899 { 11494 /* vminss */, X86::VMINSSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14899 { 11494 /* vminss */, X86::VMINSSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14899 { 11494 /* vminss */, X86::VMINSSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14901 { 11494 /* vminss */, X86::VMINSSrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
14901 { 11494 /* vminss */, X86::VMINSSrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
14914 { 11525 /* vmovapd */, X86::VMOVAPDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
14914 { 11525 /* vmovapd */, X86::VMOVAPDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
14915 { 11525 /* vmovapd */, X86::VMOVAPDmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
14924 { 11525 /* vmovapd */, X86::VMOVAPDrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
14944 { 11533 /* vmovapd.s */, X86::VMOVAPDrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
14944 { 11533 /* vmovapd.s */, X86::VMOVAPDrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
14955 { 11543 /* vmovaps */, X86::VMOVAPSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
14955 { 11543 /* vmovaps */, X86::VMOVAPSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
14956 { 11543 /* vmovaps */, X86::VMOVAPSmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
14965 { 11543 /* vmovaps */, X86::VMOVAPSrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
14985 { 11551 /* vmovaps.s */, X86::VMOVAPSrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
14985 { 11551 /* vmovaps.s */, X86::VMOVAPSrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
14996 { 11561 /* vmovd */, X86::VMOVPDI2DIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
14997 { 11561 /* vmovd */, X86::VMOVPQIto64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
14998 { 11561 /* vmovd */, X86::VMOVPDI2DImr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
14999 { 11561 /* vmovd */, X86::VMOVDI2PDIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
15001 { 11561 /* vmovd */, X86::VMOV64toPQIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
15006 { 11561 /* vmovd */, X86::VMOVDI2PDIrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
15008 { 11567 /* vmovddup */, X86::VMOVDDUPrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15008 { 11567 /* vmovddup */, X86::VMOVDDUPrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15016 { 11567 /* vmovddup */, X86::VMOVDDUPrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
15030 { 11576 /* vmovdqa */, X86::VMOVDQArr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15030 { 11576 /* vmovdqa */, X86::VMOVDQArr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15031 { 11576 /* vmovdqa */, X86::VMOVDQAmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
15034 { 11576 /* vmovdqa */, X86::VMOVDQArm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
15036 { 11584 /* vmovdqa.s */, X86::VMOVDQArr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15036 { 11584 /* vmovdqa.s */, X86::VMOVDQArr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15104 { 11638 /* vmovdqu */, X86::VMOVDQUrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15104 { 11638 /* vmovdqu */, X86::VMOVDQUrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15105 { 11638 /* vmovdqu */, X86::VMOVDQUmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
15108 { 11638 /* vmovdqu */, X86::VMOVDQUrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
15110 { 11646 /* vmovdqu.s */, X86::VMOVDQUrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15110 { 11646 /* vmovdqu.s */, X86::VMOVDQUrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15244 { 11742 /* vmovhlps */, X86::VMOVHLPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15244 { 11742 /* vmovhlps */, X86::VMOVHLPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15244 { 11742 /* vmovhlps */, X86::VMOVHLPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15246 { 11751 /* vmovhpd */, X86::VMOVHPDmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
15248 { 11751 /* vmovhpd */, X86::VMOVHPDrm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
15248 { 11751 /* vmovhpd */, X86::VMOVHPDrm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
15250 { 11759 /* vmovhps */, X86::VMOVHPSmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
15252 { 11759 /* vmovhps */, X86::VMOVHPSrm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
15252 { 11759 /* vmovhps */, X86::VMOVHPSrm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
15254 { 11767 /* vmovlhps */, X86::VMOVLHPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15254 { 11767 /* vmovlhps */, X86::VMOVLHPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15254 { 11767 /* vmovlhps */, X86::VMOVLHPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15256 { 11776 /* vmovlpd */, X86::VMOVLPDmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
15258 { 11776 /* vmovlpd */, X86::VMOVLPDrm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
15258 { 11776 /* vmovlpd */, X86::VMOVLPDrm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
15260 { 11784 /* vmovlps */, X86::VMOVLPSmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
15262 { 11784 /* vmovlps */, X86::VMOVLPSrm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
15262 { 11784 /* vmovlps */, X86::VMOVLPSrm, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
15264 { 11792 /* vmovmskpd */, X86::VMOVMSKPDrr, Convert__GR32orGR641_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32orGR64 }, },
15266 { 11802 /* vmovmskps */, X86::VMOVMSKPSrr, Convert__GR32orGR641_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32orGR64 }, },
15268 { 11812 /* vmovntdq */, X86::VMOVNTDQmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
15273 { 11821 /* vmovntdqa */, X86::VMOVNTDQArm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
15278 { 11831 /* vmovntpd */, X86::VMOVNTPDmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
15283 { 11840 /* vmovntps */, X86::VMOVNTPSmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
15288 { 11849 /* vmovq */, X86::VMOVZPQILo2PQIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15288 { 11849 /* vmovq */, X86::VMOVZPQILo2PQIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15289 { 11849 /* vmovq */, X86::VMOVPQIto64rr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
15290 { 11849 /* vmovq */, X86::VMOVPQI2QImr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
15291 { 11849 /* vmovq */, X86::VMOV64toPQIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
15296 { 11849 /* vmovq */, X86::VMOVQI2PQIrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
15298 { 11855 /* vmovq.s */, X86::VMOVPQI2QIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15298 { 11855 /* vmovq.s */, X86::VMOVPQI2QIrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15300 { 11863 /* vmovsd */, X86::VMOVSDmr, Convert__Mem645_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
15302 { 11863 /* vmovsd */, X86::VMOVSDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
15304 { 11863 /* vmovsd */, X86::VMOVSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15304 { 11863 /* vmovsd */, X86::VMOVSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15304 { 11863 /* vmovsd */, X86::VMOVSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15311 { 11870 /* vmovsd.s */, X86::VMOVSDrr_REV, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15311 { 11870 /* vmovsd.s */, X86::VMOVSDrr_REV, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15311 { 11870 /* vmovsd.s */, X86::VMOVSDrr_REV, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15315 { 11879 /* vmovshdup */, X86::VMOVSHDUPrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15315 { 11879 /* vmovshdup */, X86::VMOVSHDUPrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15320 { 11879 /* vmovshdup */, X86::VMOVSHDUPrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
15337 { 11889 /* vmovsldup */, X86::VMOVSLDUPrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15337 { 11889 /* vmovsldup */, X86::VMOVSLDUPrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15342 { 11889 /* vmovsldup */, X86::VMOVSLDUPrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
15359 { 11899 /* vmovss */, X86::VMOVSSmr, Convert__Mem325_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
15361 { 11899 /* vmovss */, X86::VMOVSSrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
15363 { 11899 /* vmovss */, X86::VMOVSSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15363 { 11899 /* vmovss */, X86::VMOVSSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15363 { 11899 /* vmovss */, X86::VMOVSSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15370 { 11906 /* vmovss.s */, X86::VMOVSSrr_REV, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15370 { 11906 /* vmovss.s */, X86::VMOVSSrr_REV, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15370 { 11906 /* vmovss.s */, X86::VMOVSSrr_REV, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15374 { 11915 /* vmovupd */, X86::VMOVUPDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15374 { 11915 /* vmovupd */, X86::VMOVUPDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15375 { 11915 /* vmovupd */, X86::VMOVUPDmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
15384 { 11915 /* vmovupd */, X86::VMOVUPDrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
15404 { 11923 /* vmovupd.s */, X86::VMOVUPDrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15404 { 11923 /* vmovupd.s */, X86::VMOVUPDrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15415 { 11933 /* vmovups */, X86::VMOVUPSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15415 { 11933 /* vmovups */, X86::VMOVUPSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15416 { 11933 /* vmovups */, X86::VMOVUPSmr, Convert__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
15425 { 11933 /* vmovups */, X86::VMOVUPSrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
15445 { 11941 /* vmovups.s */, X86::VMOVUPSrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15445 { 11941 /* vmovups.s */, X86::VMOVUPSrr_REV, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15456 { 11951 /* vmpsadbw */, X86::VMPSADBWrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15456 { 11951 /* vmpsadbw */, X86::VMPSADBWrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15456 { 11951 /* vmpsadbw */, X86::VMPSADBWrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15458 { 11951 /* vmpsadbw */, X86::VMPSADBWrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15458 { 11951 /* vmpsadbw */, X86::VMPSADBWrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15471 { 12021 /* vmulpd */, X86::VMULPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15471 { 12021 /* vmulpd */, X86::VMULPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15471 { 12021 /* vmulpd */, X86::VMULPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15476 { 12021 /* vmulpd */, X86::VMULPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15476 { 12021 /* vmulpd */, X86::VMULPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15505 { 12028 /* vmulps */, X86::VMULPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15505 { 12028 /* vmulps */, X86::VMULPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15505 { 12028 /* vmulps */, X86::VMULPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15510 { 12028 /* vmulps */, X86::VMULPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15510 { 12028 /* vmulps */, X86::VMULPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15539 { 12035 /* vmulsd */, X86::VMULSDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15539 { 12035 /* vmulsd */, X86::VMULSDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15539 { 12035 /* vmulsd */, X86::VMULSDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15541 { 12035 /* vmulsd */, X86::VMULSDrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
15541 { 12035 /* vmulsd */, X86::VMULSDrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
15550 { 12042 /* vmulss */, X86::VMULSSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15550 { 12042 /* vmulss */, X86::VMULSSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15550 { 12042 /* vmulss */, X86::VMULSSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15552 { 12042 /* vmulss */, X86::VMULSSrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
15552 { 12042 /* vmulss */, X86::VMULSSrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
15567 { 12088 /* vorpd */, X86::VORPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15567 { 12088 /* vorpd */, X86::VORPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15567 { 12088 /* vorpd */, X86::VORPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15572 { 12088 /* vorpd */, X86::VORPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15572 { 12088 /* vorpd */, X86::VORPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15598 { 12094 /* vorps */, X86::VORPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15598 { 12094 /* vorps */, X86::VORPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15598 { 12094 /* vorps */, X86::VORPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15603 { 12094 /* vorps */, X86::VORPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15603 { 12094 /* vorps */, X86::VORPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15653 { 12149 /* vpabsb */, X86::VPABSBrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15653 { 12149 /* vpabsb */, X86::VPABSBrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15658 { 12149 /* vpabsb */, X86::VPABSBrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
15675 { 12156 /* vpabsd */, X86::VPABSDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15675 { 12156 /* vpabsd */, X86::VPABSDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15680 { 12156 /* vpabsd */, X86::VPABSDrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
15733 { 12170 /* vpabsw */, X86::VPABSWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15733 { 12170 /* vpabsw */, X86::VPABSWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
15738 { 12170 /* vpabsw */, X86::VPABSWrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
15755 { 12177 /* vpackssdw */, X86::VPACKSSDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15755 { 12177 /* vpackssdw */, X86::VPACKSSDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15755 { 12177 /* vpackssdw */, X86::VPACKSSDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15760 { 12177 /* vpackssdw */, X86::VPACKSSDWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15760 { 12177 /* vpackssdw */, X86::VPACKSSDWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15786 { 12187 /* vpacksswb */, X86::VPACKSSWBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15786 { 12187 /* vpacksswb */, X86::VPACKSSWBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15786 { 12187 /* vpacksswb */, X86::VPACKSSWBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15791 { 12187 /* vpacksswb */, X86::VPACKSSWBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15791 { 12187 /* vpacksswb */, X86::VPACKSSWBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15808 { 12197 /* vpackusdw */, X86::VPACKUSDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15808 { 12197 /* vpackusdw */, X86::VPACKUSDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15808 { 12197 /* vpackusdw */, X86::VPACKUSDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15813 { 12197 /* vpackusdw */, X86::VPACKUSDWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15813 { 12197 /* vpackusdw */, X86::VPACKUSDWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15839 { 12207 /* vpackuswb */, X86::VPACKUSWBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15839 { 12207 /* vpackuswb */, X86::VPACKUSWBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15839 { 12207 /* vpackuswb */, X86::VPACKUSWBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15844 { 12207 /* vpackuswb */, X86::VPACKUSWBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15844 { 12207 /* vpackuswb */, X86::VPACKUSWBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15861 { 12217 /* vpaddb */, X86::VPADDBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15861 { 12217 /* vpaddb */, X86::VPADDBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15861 { 12217 /* vpaddb */, X86::VPADDBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15866 { 12217 /* vpaddb */, X86::VPADDBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15866 { 12217 /* vpaddb */, X86::VPADDBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15883 { 12224 /* vpaddd */, X86::VPADDDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15883 { 12224 /* vpaddd */, X86::VPADDDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15883 { 12224 /* vpaddd */, X86::VPADDDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15888 { 12224 /* vpaddd */, X86::VPADDDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15888 { 12224 /* vpaddd */, X86::VPADDDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15914 { 12231 /* vpaddq */, X86::VPADDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15914 { 12231 /* vpaddq */, X86::VPADDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15914 { 12231 /* vpaddq */, X86::VPADDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15919 { 12231 /* vpaddq */, X86::VPADDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15919 { 12231 /* vpaddq */, X86::VPADDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15945 { 12238 /* vpaddsb */, X86::VPADDSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15945 { 12238 /* vpaddsb */, X86::VPADDSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15945 { 12238 /* vpaddsb */, X86::VPADDSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15950 { 12238 /* vpaddsb */, X86::VPADDSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15950 { 12238 /* vpaddsb */, X86::VPADDSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15967 { 12246 /* vpaddsw */, X86::VPADDSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15967 { 12246 /* vpaddsw */, X86::VPADDSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15967 { 12246 /* vpaddsw */, X86::VPADDSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15972 { 12246 /* vpaddsw */, X86::VPADDSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15972 { 12246 /* vpaddsw */, X86::VPADDSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15989 { 12254 /* vpaddusb */, X86::VPADDUSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15989 { 12254 /* vpaddusb */, X86::VPADDUSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15989 { 12254 /* vpaddusb */, X86::VPADDUSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15994 { 12254 /* vpaddusb */, X86::VPADDUSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15994 { 12254 /* vpaddusb */, X86::VPADDUSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16011 { 12263 /* vpaddusw */, X86::VPADDUSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16011 { 12263 /* vpaddusw */, X86::VPADDUSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16011 { 12263 /* vpaddusw */, X86::VPADDUSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16016 { 12263 /* vpaddusw */, X86::VPADDUSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16016 { 12263 /* vpaddusw */, X86::VPADDUSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16033 { 12272 /* vpaddw */, X86::VPADDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16033 { 12272 /* vpaddw */, X86::VPADDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16033 { 12272 /* vpaddw */, X86::VPADDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16038 { 12272 /* vpaddw */, X86::VPADDWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16038 { 12272 /* vpaddw */, X86::VPADDWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16055 { 12279 /* vpalignr */, X86::VPALIGNRrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16055 { 12279 /* vpalignr */, X86::VPALIGNRrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16055 { 12279 /* vpalignr */, X86::VPALIGNRrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16060 { 12279 /* vpalignr */, X86::VPALIGNRrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16060 { 12279 /* vpalignr */, X86::VPALIGNRrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16077 { 12288 /* vpand */, X86::VPANDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16077 { 12288 /* vpand */, X86::VPANDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16077 { 12288 /* vpand */, X86::VPANDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16079 { 12288 /* vpand */, X86::VPANDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16079 { 12288 /* vpand */, X86::VPANDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16108 { 12301 /* vpandn */, X86::VPANDNrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16108 { 12301 /* vpandn */, X86::VPANDNrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16108 { 12301 /* vpandn */, X86::VPANDNrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16110 { 12301 /* vpandn */, X86::VPANDNrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16110 { 12301 /* vpandn */, X86::VPANDNrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16193 { 12331 /* vpavgb */, X86::VPAVGBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16193 { 12331 /* vpavgb */, X86::VPAVGBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16193 { 12331 /* vpavgb */, X86::VPAVGBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16198 { 12331 /* vpavgb */, X86::VPAVGBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16198 { 12331 /* vpavgb */, X86::VPAVGBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16215 { 12338 /* vpavgw */, X86::VPAVGWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16215 { 12338 /* vpavgw */, X86::VPAVGWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16215 { 12338 /* vpavgw */, X86::VPAVGWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16220 { 12338 /* vpavgw */, X86::VPAVGWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16220 { 12338 /* vpavgw */, X86::VPAVGWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16237 { 12345 /* vpblendd */, X86::VPBLENDDrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16237 { 12345 /* vpblendd */, X86::VPBLENDDrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16237 { 12345 /* vpblendd */, X86::VPBLENDDrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16239 { 12345 /* vpblendd */, X86::VPBLENDDrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16239 { 12345 /* vpblendd */, X86::VPBLENDDrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16331 { 12394 /* vpblendvb */, X86::VPBLENDVBrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16331 { 12394 /* vpblendvb */, X86::VPBLENDVBrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16331 { 12394 /* vpblendvb */, X86::VPBLENDVBrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16331 { 12394 /* vpblendvb */, X86::VPBLENDVBrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16332 { 12394 /* vpblendvb */, X86::VPBLENDVBrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16332 { 12394 /* vpblendvb */, X86::VPBLENDVBrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16332 { 12394 /* vpblendvb */, X86::VPBLENDVBrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16335 { 12404 /* vpblendw */, X86::VPBLENDWrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16335 { 12404 /* vpblendw */, X86::VPBLENDWrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16335 { 12404 /* vpblendw */, X86::VPBLENDWrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16337 { 12404 /* vpblendw */, X86::VPBLENDWrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16337 { 12404 /* vpblendw */, X86::VPBLENDWrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16339 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
16339 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
16340 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
16347 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrm, Convert__Reg1_1__Mem85_0, AMFBS_None, { MCK_Mem8, MCK_FR32 }, },
16370 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
16370 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
16371 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
16378 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
16407 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
16407 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
16408 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
16415 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
16438 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
16438 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
16439 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
16446 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_FR32 }, },
16469 { 12497 /* vpclmulhqhqdq */, X86::VPCLMULQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16469 { 12497 /* vpclmulhqhqdq */, X86::VPCLMULQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16469 { 12497 /* vpclmulhqhqdq */, X86::VPCLMULQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16474 { 12497 /* vpclmulhqhqdq */, X86::VPCLMULQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_17, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16474 { 12497 /* vpclmulhqhqdq */, X86::VPCLMULQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_17, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16479 { 12511 /* vpclmulhqlqdq */, X86::VPCLMULQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16479 { 12511 /* vpclmulhqlqdq */, X86::VPCLMULQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16479 { 12511 /* vpclmulhqlqdq */, X86::VPCLMULQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16484 { 12511 /* vpclmulhqlqdq */, X86::VPCLMULQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_1, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16484 { 12511 /* vpclmulhqlqdq */, X86::VPCLMULQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_1, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16489 { 12525 /* vpclmullqhqdq */, X86::VPCLMULQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16489 { 12525 /* vpclmullqhqdq */, X86::VPCLMULQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16489 { 12525 /* vpclmullqhqdq */, X86::VPCLMULQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16494 { 12525 /* vpclmullqhqdq */, X86::VPCLMULQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_16, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16494 { 12525 /* vpclmullqhqdq */, X86::VPCLMULQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_16, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16499 { 12539 /* vpclmullqlqdq */, X86::VPCLMULQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16499 { 12539 /* vpclmullqlqdq */, X86::VPCLMULQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16499 { 12539 /* vpclmullqlqdq */, X86::VPCLMULQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16504 { 12539 /* vpclmullqlqdq */, X86::VPCLMULQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16504 { 12539 /* vpclmullqlqdq */, X86::VPCLMULQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16509 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16509 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16509 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16514 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQrm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16514 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQrm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16519 { 12564 /* vpcmov */, X86::VPCMOVrrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16519 { 12564 /* vpcmov */, X86::VPCMOVrrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16519 { 12564 /* vpcmov */, X86::VPCMOVrrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16519 { 12564 /* vpcmov */, X86::VPCMOVrrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16520 { 12564 /* vpcmov */, X86::VPCMOVrmr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16520 { 12564 /* vpcmov */, X86::VPCMOVrmr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16520 { 12564 /* vpcmov */, X86::VPCMOVrmr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16523 { 12564 /* vpcmov */, X86::VPCMOVrrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16523 { 12564 /* vpcmov */, X86::VPCMOVrrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16523 { 12564 /* vpcmov */, X86::VPCMOVrrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16555 { 12585 /* vpcmpeqb */, X86::VPCMPEQBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16555 { 12585 /* vpcmpeqb */, X86::VPCMPEQBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16555 { 12585 /* vpcmpeqb */, X86::VPCMPEQBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16560 { 12585 /* vpcmpeqb */, X86::VPCMPEQBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16560 { 12585 /* vpcmpeqb */, X86::VPCMPEQBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16571 { 12594 /* vpcmpeqd */, X86::VPCMPEQDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16571 { 12594 /* vpcmpeqd */, X86::VPCMPEQDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16571 { 12594 /* vpcmpeqd */, X86::VPCMPEQDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16576 { 12594 /* vpcmpeqd */, X86::VPCMPEQDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16576 { 12594 /* vpcmpeqd */, X86::VPCMPEQDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16593 { 12603 /* vpcmpeqq */, X86::VPCMPEQQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16593 { 12603 /* vpcmpeqq */, X86::VPCMPEQQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16593 { 12603 /* vpcmpeqq */, X86::VPCMPEQQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16598 { 12603 /* vpcmpeqq */, X86::VPCMPEQQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16598 { 12603 /* vpcmpeqq */, X86::VPCMPEQQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16615 { 12612 /* vpcmpeqw */, X86::VPCMPEQWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16615 { 12612 /* vpcmpeqw */, X86::VPCMPEQWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16615 { 12612 /* vpcmpeqw */, X86::VPCMPEQWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16620 { 12612 /* vpcmpeqw */, X86::VPCMPEQWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16620 { 12612 /* vpcmpeqw */, X86::VPCMPEQWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16631 { 12621 /* vpcmpestri */, X86::VPCMPESTRIrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
16631 { 12621 /* vpcmpestri */, X86::VPCMPESTRIrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
16632 { 12621 /* vpcmpestri */, X86::VPCMPESTRIrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
16633 { 12632 /* vpcmpestrm */, X86::VPCMPESTRMrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
16633 { 12632 /* vpcmpestrm */, X86::VPCMPESTRMrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
16634 { 12632 /* vpcmpestrm */, X86::VPCMPESTRMrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
16635 { 12643 /* vpcmpgtb */, X86::VPCMPGTBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16635 { 12643 /* vpcmpgtb */, X86::VPCMPGTBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16635 { 12643 /* vpcmpgtb */, X86::VPCMPGTBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16640 { 12643 /* vpcmpgtb */, X86::VPCMPGTBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16640 { 12643 /* vpcmpgtb */, X86::VPCMPGTBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16651 { 12652 /* vpcmpgtd */, X86::VPCMPGTDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16651 { 12652 /* vpcmpgtd */, X86::VPCMPGTDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16651 { 12652 /* vpcmpgtd */, X86::VPCMPGTDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16656 { 12652 /* vpcmpgtd */, X86::VPCMPGTDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16656 { 12652 /* vpcmpgtd */, X86::VPCMPGTDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16673 { 12661 /* vpcmpgtq */, X86::VPCMPGTQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16673 { 12661 /* vpcmpgtq */, X86::VPCMPGTQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16673 { 12661 /* vpcmpgtq */, X86::VPCMPGTQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16678 { 12661 /* vpcmpgtq */, X86::VPCMPGTQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16678 { 12661 /* vpcmpgtq */, X86::VPCMPGTQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16695 { 12670 /* vpcmpgtw */, X86::VPCMPGTWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16695 { 12670 /* vpcmpgtw */, X86::VPCMPGTWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16695 { 12670 /* vpcmpgtw */, X86::VPCMPGTWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16700 { 12670 /* vpcmpgtw */, X86::VPCMPGTWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16700 { 12670 /* vpcmpgtw */, X86::VPCMPGTWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16711 { 12679 /* vpcmpistri */, X86::VPCMPISTRIrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
16711 { 12679 /* vpcmpistri */, X86::VPCMPISTRIrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
16712 { 12679 /* vpcmpistri */, X86::VPCMPISTRIrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
16713 { 12690 /* vpcmpistrm */, X86::VPCMPISTRMrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
16713 { 12690 /* vpcmpistrm */, X86::VPCMPISTRMrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
16714 { 12690 /* vpcmpistrm */, X86::VPCMPISTRMrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
16805 { 12747 /* vpcomb */, X86::VPCOMBri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16805 { 12747 /* vpcomb */, X86::VPCOMBri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16805 { 12747 /* vpcomb */, X86::VPCOMBri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16806 { 12747 /* vpcomb */, X86::VPCOMBmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16806 { 12747 /* vpcomb */, X86::VPCOMBmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16807 { 12754 /* vpcomd */, X86::VPCOMDri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16807 { 12754 /* vpcomd */, X86::VPCOMDri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16807 { 12754 /* vpcomd */, X86::VPCOMDri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16808 { 12754 /* vpcomd */, X86::VPCOMDmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16808 { 12754 /* vpcomd */, X86::VPCOMDmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16869 { 12809 /* vpcomq */, X86::VPCOMQri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16869 { 12809 /* vpcomq */, X86::VPCOMQri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16869 { 12809 /* vpcomq */, X86::VPCOMQri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16870 { 12809 /* vpcomq */, X86::VPCOMQmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16870 { 12809 /* vpcomq */, X86::VPCOMQmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16871 { 12816 /* vpcomub */, X86::VPCOMUBri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16871 { 12816 /* vpcomub */, X86::VPCOMUBri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16871 { 12816 /* vpcomub */, X86::VPCOMUBri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16872 { 12816 /* vpcomub */, X86::VPCOMUBmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16872 { 12816 /* vpcomub */, X86::VPCOMUBmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16873 { 12824 /* vpcomud */, X86::VPCOMUDri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16873 { 12824 /* vpcomud */, X86::VPCOMUDri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16873 { 12824 /* vpcomud */, X86::VPCOMUDri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16874 { 12824 /* vpcomud */, X86::VPCOMUDmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16874 { 12824 /* vpcomud */, X86::VPCOMUDmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16875 { 12832 /* vpcomuq */, X86::VPCOMUQri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16875 { 12832 /* vpcomuq */, X86::VPCOMUQri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16875 { 12832 /* vpcomuq */, X86::VPCOMUQri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16876 { 12832 /* vpcomuq */, X86::VPCOMUQmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16876 { 12832 /* vpcomuq */, X86::VPCOMUQmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16877 { 12840 /* vpcomuw */, X86::VPCOMUWri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16877 { 12840 /* vpcomuw */, X86::VPCOMUWri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16877 { 12840 /* vpcomuw */, X86::VPCOMUWri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16878 { 12840 /* vpcomuw */, X86::VPCOMUWmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16878 { 12840 /* vpcomuw */, X86::VPCOMUWmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16879 { 12848 /* vpcomw */, X86::VPCOMWri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16879 { 12848 /* vpcomw */, X86::VPCOMWri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16879 { 12848 /* vpcomw */, X86::VPCOMWri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16880 { 12848 /* vpcomw */, X86::VPCOMWmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16880 { 12848 /* vpcomw */, X86::VPCOMWmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17229 { 13009 /* vpermil2pd */, X86::VPERMIL2PDrr, Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17229 { 13009 /* vpermil2pd */, X86::VPERMIL2PDrr, Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17229 { 13009 /* vpermil2pd */, X86::VPERMIL2PDrr, Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17229 { 13009 /* vpermil2pd */, X86::VPERMIL2PDrr, Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17230 { 13009 /* vpermil2pd */, X86::VPERMIL2PDmr, Convert__Reg1_4__Reg1_3__Mem1285_2__Reg1_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17230 { 13009 /* vpermil2pd */, X86::VPERMIL2PDmr, Convert__Reg1_4__Reg1_3__Mem1285_2__Reg1_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17230 { 13009 /* vpermil2pd */, X86::VPERMIL2PDmr, Convert__Reg1_4__Reg1_3__Mem1285_2__Reg1_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17233 { 13009 /* vpermil2pd */, X86::VPERMIL2PDrm, Convert__Reg1_4__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17233 { 13009 /* vpermil2pd */, X86::VPERMIL2PDrm, Convert__Reg1_4__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17233 { 13009 /* vpermil2pd */, X86::VPERMIL2PDrm, Convert__Reg1_4__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17235 { 13020 /* vpermil2ps */, X86::VPERMIL2PSrr, Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17235 { 13020 /* vpermil2ps */, X86::VPERMIL2PSrr, Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17235 { 13020 /* vpermil2ps */, X86::VPERMIL2PSrr, Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17235 { 13020 /* vpermil2ps */, X86::VPERMIL2PSrr, Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17236 { 13020 /* vpermil2ps */, X86::VPERMIL2PSmr, Convert__Reg1_4__Reg1_3__Mem1285_2__Reg1_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17236 { 13020 /* vpermil2ps */, X86::VPERMIL2PSmr, Convert__Reg1_4__Reg1_3__Mem1285_2__Reg1_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17236 { 13020 /* vpermil2ps */, X86::VPERMIL2PSmr, Convert__Reg1_4__Reg1_3__Mem1285_2__Reg1_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17239 { 13020 /* vpermil2ps */, X86::VPERMIL2PSrm, Convert__Reg1_4__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17239 { 13020 /* vpermil2ps */, X86::VPERMIL2PSrm, Convert__Reg1_4__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17239 { 13020 /* vpermil2ps */, X86::VPERMIL2PSrm, Convert__Reg1_4__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi41_0, AMFBS_None, { MCK_ImmUnsignedi4, MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17241 { 13031 /* vpermilpd */, X86::VPERMILPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17241 { 13031 /* vpermilpd */, X86::VPERMILPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17241 { 13031 /* vpermilpd */, X86::VPERMILPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17246 { 13031 /* vpermilpd */, X86::VPERMILPDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
17246 { 13031 /* vpermilpd */, X86::VPERMILPDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
17251 { 13031 /* vpermilpd */, X86::VPERMILPDmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
17256 { 13031 /* vpermilpd */, X86::VPERMILPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17256 { 13031 /* vpermilpd */, X86::VPERMILPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17303 { 13041 /* vpermilps */, X86::VPERMILPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17303 { 13041 /* vpermilps */, X86::VPERMILPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17303 { 13041 /* vpermilps */, X86::VPERMILPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17308 { 13041 /* vpermilps */, X86::VPERMILPSri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
17308 { 13041 /* vpermilps */, X86::VPERMILPSri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
17313 { 13041 /* vpermilps */, X86::VPERMILPSmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
17318 { 13041 /* vpermilps */, X86::VPERMILPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17318 { 13041 /* vpermilps */, X86::VPERMILPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17695 { 13177 /* vpextrb */, X86::VPEXTRBrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
17696 { 13177 /* vpextrb */, X86::VPEXTRBmr, Convert__Mem85_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem8 }, },
17699 { 13185 /* vpextrd */, X86::VPEXTRDrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32 }, },
17700 { 13185 /* vpextrd */, X86::VPEXTRDmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem32 }, },
17703 { 13193 /* vpextrq */, X86::VPEXTRQrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR64 }, },
17704 { 13193 /* vpextrq */, X86::VPEXTRQmr, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem64 }, },
17707 { 13201 /* vpextrw */, X86::VPEXTRWrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
17708 { 13201 /* vpextrw */, X86::VPEXTRWmr, Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem16 }, },
17711 { 13209 /* vpgatherdd */, X86::VPGATHERDDrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
17711 { 13209 /* vpgatherdd */, X86::VPGATHERDDrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
17716 { 13220 /* vpgatherdq */, X86::VPGATHERDQrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
17716 { 13220 /* vpgatherdq */, X86::VPGATHERDQrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
17721 { 13231 /* vpgatherqd */, X86::VPGATHERQDYrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC2565_1__Tie1_1_1, AMFBS_None, { MCK_FR32, MCK_Mem128_RC256, MCK_FR32 }, },
17721 { 13231 /* vpgatherqd */, X86::VPGATHERQDYrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC2565_1__Tie1_1_1, AMFBS_None, { MCK_FR32, MCK_Mem128_RC256, MCK_FR32 }, },
17722 { 13231 /* vpgatherqd */, X86::VPGATHERQDrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem64_RC1285_1__Tie1_1_1, AMFBS_None, { MCK_FR32, MCK_Mem64_RC128, MCK_FR32 }, },
17722 { 13231 /* vpgatherqd */, X86::VPGATHERQDrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem64_RC1285_1__Tie1_1_1, AMFBS_None, { MCK_FR32, MCK_Mem64_RC128, MCK_FR32 }, },
17726 { 13242 /* vpgatherqq */, X86::VPGATHERQQrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
17726 { 13242 /* vpgatherqq */, X86::VPGATHERQQrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
17731 { 13253 /* vphaddbd */, X86::VPHADDBDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17731 { 13253 /* vphaddbd */, X86::VPHADDBDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17732 { 13253 /* vphaddbd */, X86::VPHADDBDrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
17733 { 13262 /* vphaddbq */, X86::VPHADDBQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17733 { 13262 /* vphaddbq */, X86::VPHADDBQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17734 { 13262 /* vphaddbq */, X86::VPHADDBQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
17735 { 13271 /* vphaddbw */, X86::VPHADDBWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17735 { 13271 /* vphaddbw */, X86::VPHADDBWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17736 { 13271 /* vphaddbw */, X86::VPHADDBWrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
17737 { 13280 /* vphaddd */, X86::VPHADDDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17737 { 13280 /* vphaddd */, X86::VPHADDDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17737 { 13280 /* vphaddd */, X86::VPHADDDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17739 { 13280 /* vphaddd */, X86::VPHADDDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17739 { 13280 /* vphaddd */, X86::VPHADDDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17741 { 13288 /* vphadddq */, X86::VPHADDDQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17741 { 13288 /* vphadddq */, X86::VPHADDDQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17742 { 13288 /* vphadddq */, X86::VPHADDDQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
17743 { 13297 /* vphaddsw */, X86::VPHADDSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17743 { 13297 /* vphaddsw */, X86::VPHADDSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17743 { 13297 /* vphaddsw */, X86::VPHADDSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17745 { 13297 /* vphaddsw */, X86::VPHADDSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17745 { 13297 /* vphaddsw */, X86::VPHADDSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17747 { 13306 /* vphaddubd */, X86::VPHADDUBDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17747 { 13306 /* vphaddubd */, X86::VPHADDUBDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17748 { 13306 /* vphaddubd */, X86::VPHADDUBDrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
17749 { 13316 /* vphaddubq */, X86::VPHADDUBQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17749 { 13316 /* vphaddubq */, X86::VPHADDUBQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17750 { 13316 /* vphaddubq */, X86::VPHADDUBQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
17751 { 13326 /* vphaddubw */, X86::VPHADDUBWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17751 { 13326 /* vphaddubw */, X86::VPHADDUBWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17752 { 13326 /* vphaddubw */, X86::VPHADDUBWrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
17753 { 13336 /* vphaddudq */, X86::VPHADDUDQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17753 { 13336 /* vphaddudq */, X86::VPHADDUDQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17754 { 13336 /* vphaddudq */, X86::VPHADDUDQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
17755 { 13346 /* vphadduwd */, X86::VPHADDUWDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17755 { 13346 /* vphadduwd */, X86::VPHADDUWDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17756 { 13346 /* vphadduwd */, X86::VPHADDUWDrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
17757 { 13356 /* vphadduwq */, X86::VPHADDUWQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17757 { 13356 /* vphadduwq */, X86::VPHADDUWQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17758 { 13356 /* vphadduwq */, X86::VPHADDUWQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
17759 { 13366 /* vphaddw */, X86::VPHADDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17759 { 13366 /* vphaddw */, X86::VPHADDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17759 { 13366 /* vphaddw */, X86::VPHADDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17761 { 13366 /* vphaddw */, X86::VPHADDWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17761 { 13366 /* vphaddw */, X86::VPHADDWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17763 { 13374 /* vphaddwd */, X86::VPHADDWDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17763 { 13374 /* vphaddwd */, X86::VPHADDWDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17764 { 13374 /* vphaddwd */, X86::VPHADDWDrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
17765 { 13383 /* vphaddwq */, X86::VPHADDWQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17765 { 13383 /* vphaddwq */, X86::VPHADDWQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17766 { 13383 /* vphaddwq */, X86::VPHADDWQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
17767 { 13392 /* vphminposuw */, X86::VPHMINPOSUWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17767 { 13392 /* vphminposuw */, X86::VPHMINPOSUWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17768 { 13392 /* vphminposuw */, X86::VPHMINPOSUWrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
17769 { 13404 /* vphsubbw */, X86::VPHSUBBWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17769 { 13404 /* vphsubbw */, X86::VPHSUBBWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17770 { 13404 /* vphsubbw */, X86::VPHSUBBWrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
17771 { 13413 /* vphsubd */, X86::VPHSUBDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17771 { 13413 /* vphsubd */, X86::VPHSUBDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17771 { 13413 /* vphsubd */, X86::VPHSUBDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17773 { 13413 /* vphsubd */, X86::VPHSUBDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17773 { 13413 /* vphsubd */, X86::VPHSUBDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17775 { 13421 /* vphsubdq */, X86::VPHSUBDQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17775 { 13421 /* vphsubdq */, X86::VPHSUBDQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17776 { 13421 /* vphsubdq */, X86::VPHSUBDQrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
17777 { 13430 /* vphsubsw */, X86::VPHSUBSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17777 { 13430 /* vphsubsw */, X86::VPHSUBSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17777 { 13430 /* vphsubsw */, X86::VPHSUBSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17779 { 13430 /* vphsubsw */, X86::VPHSUBSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17779 { 13430 /* vphsubsw */, X86::VPHSUBSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17781 { 13439 /* vphsubw */, X86::VPHSUBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17781 { 13439 /* vphsubw */, X86::VPHSUBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17781 { 13439 /* vphsubw */, X86::VPHSUBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17783 { 13439 /* vphsubw */, X86::VPHSUBWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17783 { 13439 /* vphsubw */, X86::VPHSUBWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17785 { 13447 /* vphsubwd */, X86::VPHSUBWDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17785 { 13447 /* vphsubwd */, X86::VPHSUBWDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
17786 { 13447 /* vphsubwd */, X86::VPHSUBWDrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
17787 { 13456 /* vpinsrb */, X86::VPINSRBrr, Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32, MCK_FR32 }, },
17787 { 13456 /* vpinsrb */, X86::VPINSRBrr, Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32, MCK_FR32 }, },
17789 { 13456 /* vpinsrb */, X86::VPINSRBrm, Convert__Reg1_3__Reg1_2__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK_FR32, MCK_FR32 }, },
17789 { 13456 /* vpinsrb */, X86::VPINSRBrm, Convert__Reg1_3__Reg1_2__Mem85_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem8, MCK_FR32, MCK_FR32 }, },
17791 { 13464 /* vpinsrd */, X86::VPINSRDrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32, MCK_FR32, MCK_FR32 }, },
17791 { 13464 /* vpinsrd */, X86::VPINSRDrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32, MCK_FR32, MCK_FR32 }, },
17793 { 13464 /* vpinsrd */, X86::VPINSRDrm, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
17793 { 13464 /* vpinsrd */, X86::VPINSRDrm, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
17795 { 13472 /* vpinsrq */, X86::VPINSRQrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR64, MCK_FR32, MCK_FR32 }, },
17795 { 13472 /* vpinsrq */, X86::VPINSRQrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR64, MCK_FR32, MCK_FR32 }, },
17797 { 13472 /* vpinsrq */, X86::VPINSRQrm, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
17797 { 13472 /* vpinsrq */, X86::VPINSRQrm, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
17799 { 13480 /* vpinsrw */, X86::VPINSRWrr, Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32, MCK_FR32 }, },
17799 { 13480 /* vpinsrw */, X86::VPINSRWrr, Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32, MCK_FR32 }, },
17801 { 13480 /* vpinsrw */, X86::VPINSRWrm, Convert__Reg1_3__Reg1_2__Mem165_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem16, MCK_FR32, MCK_FR32 }, },
17801 { 13480 /* vpinsrw */, X86::VPINSRWrm, Convert__Reg1_3__Reg1_2__Mem165_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem16, MCK_FR32, MCK_FR32 }, },
17857 { 13506 /* vpmacsdd */, X86::VPMACSDDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17857 { 13506 /* vpmacsdd */, X86::VPMACSDDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17857 { 13506 /* vpmacsdd */, X86::VPMACSDDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17857 { 13506 /* vpmacsdd */, X86::VPMACSDDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17858 { 13506 /* vpmacsdd */, X86::VPMACSDDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17858 { 13506 /* vpmacsdd */, X86::VPMACSDDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17858 { 13506 /* vpmacsdd */, X86::VPMACSDDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17859 { 13515 /* vpmacsdqh */, X86::VPMACSDQHrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17859 { 13515 /* vpmacsdqh */, X86::VPMACSDQHrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17859 { 13515 /* vpmacsdqh */, X86::VPMACSDQHrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17859 { 13515 /* vpmacsdqh */, X86::VPMACSDQHrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17860 { 13515 /* vpmacsdqh */, X86::VPMACSDQHrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17860 { 13515 /* vpmacsdqh */, X86::VPMACSDQHrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17860 { 13515 /* vpmacsdqh */, X86::VPMACSDQHrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17861 { 13525 /* vpmacsdql */, X86::VPMACSDQLrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17861 { 13525 /* vpmacsdql */, X86::VPMACSDQLrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17861 { 13525 /* vpmacsdql */, X86::VPMACSDQLrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17861 { 13525 /* vpmacsdql */, X86::VPMACSDQLrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17862 { 13525 /* vpmacsdql */, X86::VPMACSDQLrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17862 { 13525 /* vpmacsdql */, X86::VPMACSDQLrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17862 { 13525 /* vpmacsdql */, X86::VPMACSDQLrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17863 { 13535 /* vpmacssdd */, X86::VPMACSSDDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17863 { 13535 /* vpmacssdd */, X86::VPMACSSDDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17863 { 13535 /* vpmacssdd */, X86::VPMACSSDDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17863 { 13535 /* vpmacssdd */, X86::VPMACSSDDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17864 { 13535 /* vpmacssdd */, X86::VPMACSSDDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17864 { 13535 /* vpmacssdd */, X86::VPMACSSDDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17864 { 13535 /* vpmacssdd */, X86::VPMACSSDDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17865 { 13545 /* vpmacssdqh */, X86::VPMACSSDQHrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17865 { 13545 /* vpmacssdqh */, X86::VPMACSSDQHrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17865 { 13545 /* vpmacssdqh */, X86::VPMACSSDQHrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17865 { 13545 /* vpmacssdqh */, X86::VPMACSSDQHrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17866 { 13545 /* vpmacssdqh */, X86::VPMACSSDQHrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17866 { 13545 /* vpmacssdqh */, X86::VPMACSSDQHrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17866 { 13545 /* vpmacssdqh */, X86::VPMACSSDQHrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17867 { 13556 /* vpmacssdql */, X86::VPMACSSDQLrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17867 { 13556 /* vpmacssdql */, X86::VPMACSSDQLrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17867 { 13556 /* vpmacssdql */, X86::VPMACSSDQLrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17867 { 13556 /* vpmacssdql */, X86::VPMACSSDQLrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17868 { 13556 /* vpmacssdql */, X86::VPMACSSDQLrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17868 { 13556 /* vpmacssdql */, X86::VPMACSSDQLrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17868 { 13556 /* vpmacssdql */, X86::VPMACSSDQLrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17869 { 13567 /* vpmacsswd */, X86::VPMACSSWDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17869 { 13567 /* vpmacsswd */, X86::VPMACSSWDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17869 { 13567 /* vpmacsswd */, X86::VPMACSSWDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17869 { 13567 /* vpmacsswd */, X86::VPMACSSWDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17870 { 13567 /* vpmacsswd */, X86::VPMACSSWDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17870 { 13567 /* vpmacsswd */, X86::VPMACSSWDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17870 { 13567 /* vpmacsswd */, X86::VPMACSSWDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17871 { 13577 /* vpmacssww */, X86::VPMACSSWWrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17871 { 13577 /* vpmacssww */, X86::VPMACSSWWrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17871 { 13577 /* vpmacssww */, X86::VPMACSSWWrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17871 { 13577 /* vpmacssww */, X86::VPMACSSWWrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17872 { 13577 /* vpmacssww */, X86::VPMACSSWWrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17872 { 13577 /* vpmacssww */, X86::VPMACSSWWrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17872 { 13577 /* vpmacssww */, X86::VPMACSSWWrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17873 { 13587 /* vpmacswd */, X86::VPMACSWDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17873 { 13587 /* vpmacswd */, X86::VPMACSWDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17873 { 13587 /* vpmacswd */, X86::VPMACSWDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17873 { 13587 /* vpmacswd */, X86::VPMACSWDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17874 { 13587 /* vpmacswd */, X86::VPMACSWDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17874 { 13587 /* vpmacswd */, X86::VPMACSWDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17874 { 13587 /* vpmacswd */, X86::VPMACSWDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17875 { 13596 /* vpmacsww */, X86::VPMACSWWrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17875 { 13596 /* vpmacsww */, X86::VPMACSWWrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17875 { 13596 /* vpmacsww */, X86::VPMACSWWrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17875 { 13596 /* vpmacsww */, X86::VPMACSWWrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17876 { 13596 /* vpmacsww */, X86::VPMACSWWrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17876 { 13596 /* vpmacsww */, X86::VPMACSWWrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17876 { 13596 /* vpmacsww */, X86::VPMACSWWrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17877 { 13605 /* vpmadcsswd */, X86::VPMADCSSWDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17877 { 13605 /* vpmadcsswd */, X86::VPMADCSSWDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17877 { 13605 /* vpmadcsswd */, X86::VPMADCSSWDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17877 { 13605 /* vpmadcsswd */, X86::VPMADCSSWDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17878 { 13605 /* vpmadcsswd */, X86::VPMADCSSWDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17878 { 13605 /* vpmadcsswd */, X86::VPMADCSSWDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17878 { 13605 /* vpmadcsswd */, X86::VPMADCSSWDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17879 { 13616 /* vpmadcswd */, X86::VPMADCSWDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17879 { 13616 /* vpmadcswd */, X86::VPMADCSWDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17879 { 13616 /* vpmadcswd */, X86::VPMADCSWDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17879 { 13616 /* vpmadcswd */, X86::VPMADCSWDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17880 { 13616 /* vpmadcswd */, X86::VPMADCSWDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17880 { 13616 /* vpmadcswd */, X86::VPMADCSWDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17880 { 13616 /* vpmadcswd */, X86::VPMADCSWDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17935 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17935 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17935 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17940 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17940 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17957 { 13661 /* vpmaddwd */, X86::VPMADDWDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17957 { 13661 /* vpmaddwd */, X86::VPMADDWDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17957 { 13661 /* vpmaddwd */, X86::VPMADDWDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17962 { 13661 /* vpmaddwd */, X86::VPMADDWDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17962 { 13661 /* vpmaddwd */, X86::VPMADDWDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17979 { 13670 /* vpmaskmovd */, X86::VPMASKMOVDmr, Convert__Mem1285_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
17979 { 13670 /* vpmaskmovd */, X86::VPMASKMOVDmr, Convert__Mem1285_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
17981 { 13670 /* vpmaskmovd */, X86::VPMASKMOVDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17981 { 13670 /* vpmaskmovd */, X86::VPMASKMOVDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17983 { 13681 /* vpmaskmovq */, X86::VPMASKMOVQmr, Convert__Mem1285_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
17983 { 13681 /* vpmaskmovq */, X86::VPMASKMOVQmr, Convert__Mem1285_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
17985 { 13681 /* vpmaskmovq */, X86::VPMASKMOVQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17985 { 13681 /* vpmaskmovq */, X86::VPMASKMOVQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17987 { 13692 /* vpmaxsb */, X86::VPMAXSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17987 { 13692 /* vpmaxsb */, X86::VPMAXSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17987 { 13692 /* vpmaxsb */, X86::VPMAXSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17992 { 13692 /* vpmaxsb */, X86::VPMAXSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17992 { 13692 /* vpmaxsb */, X86::VPMAXSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18009 { 13700 /* vpmaxsd */, X86::VPMAXSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18009 { 13700 /* vpmaxsd */, X86::VPMAXSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18009 { 13700 /* vpmaxsd */, X86::VPMAXSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18014 { 13700 /* vpmaxsd */, X86::VPMAXSDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18014 { 13700 /* vpmaxsd */, X86::VPMAXSDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18067 { 13716 /* vpmaxsw */, X86::VPMAXSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18067 { 13716 /* vpmaxsw */, X86::VPMAXSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18067 { 13716 /* vpmaxsw */, X86::VPMAXSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18072 { 13716 /* vpmaxsw */, X86::VPMAXSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18072 { 13716 /* vpmaxsw */, X86::VPMAXSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18089 { 13724 /* vpmaxub */, X86::VPMAXUBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18089 { 13724 /* vpmaxub */, X86::VPMAXUBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18089 { 13724 /* vpmaxub */, X86::VPMAXUBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18094 { 13724 /* vpmaxub */, X86::VPMAXUBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18094 { 13724 /* vpmaxub */, X86::VPMAXUBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18111 { 13732 /* vpmaxud */, X86::VPMAXUDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18111 { 13732 /* vpmaxud */, X86::VPMAXUDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18111 { 13732 /* vpmaxud */, X86::VPMAXUDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18116 { 13732 /* vpmaxud */, X86::VPMAXUDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18116 { 13732 /* vpmaxud */, X86::VPMAXUDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18169 { 13748 /* vpmaxuw */, X86::VPMAXUWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18169 { 13748 /* vpmaxuw */, X86::VPMAXUWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18169 { 13748 /* vpmaxuw */, X86::VPMAXUWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18174 { 13748 /* vpmaxuw */, X86::VPMAXUWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18174 { 13748 /* vpmaxuw */, X86::VPMAXUWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18191 { 13756 /* vpminsb */, X86::VPMINSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18191 { 13756 /* vpminsb */, X86::VPMINSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18191 { 13756 /* vpminsb */, X86::VPMINSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18196 { 13756 /* vpminsb */, X86::VPMINSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18196 { 13756 /* vpminsb */, X86::VPMINSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18213 { 13764 /* vpminsd */, X86::VPMINSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18213 { 13764 /* vpminsd */, X86::VPMINSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18213 { 13764 /* vpminsd */, X86::VPMINSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18218 { 13764 /* vpminsd */, X86::VPMINSDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18218 { 13764 /* vpminsd */, X86::VPMINSDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18271 { 13780 /* vpminsw */, X86::VPMINSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18271 { 13780 /* vpminsw */, X86::VPMINSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18271 { 13780 /* vpminsw */, X86::VPMINSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18276 { 13780 /* vpminsw */, X86::VPMINSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18276 { 13780 /* vpminsw */, X86::VPMINSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18293 { 13788 /* vpminub */, X86::VPMINUBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18293 { 13788 /* vpminub */, X86::VPMINUBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18293 { 13788 /* vpminub */, X86::VPMINUBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18298 { 13788 /* vpminub */, X86::VPMINUBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18298 { 13788 /* vpminub */, X86::VPMINUBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18315 { 13796 /* vpminud */, X86::VPMINUDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18315 { 13796 /* vpminud */, X86::VPMINUDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18315 { 13796 /* vpminud */, X86::VPMINUDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18320 { 13796 /* vpminud */, X86::VPMINUDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18320 { 13796 /* vpminud */, X86::VPMINUDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18373 { 13812 /* vpminuw */, X86::VPMINUWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18373 { 13812 /* vpminuw */, X86::VPMINUWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18373 { 13812 /* vpminuw */, X86::VPMINUWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18378 { 13812 /* vpminuw */, X86::VPMINUWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18378 { 13812 /* vpminuw */, X86::VPMINUWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18443 { 13890 /* vpmovmskb */, X86::VPMOVMSKBrr, Convert__GR32orGR641_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_GR32orGR64 }, },
18583 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
18583 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
18584 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
18589 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
18605 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
18605 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
18606 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
18610 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQrm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_FR32 }, },
18627 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
18627 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
18628 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
18635 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
18649 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
18649 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
18650 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
18657 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
18671 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
18671 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
18672 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
18679 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
18693 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
18693 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
18694 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
18699 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
18823 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
18823 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
18824 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
18829 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
18845 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
18845 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
18846 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
18850 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQrm, Convert__Reg1_1__Mem165_0, AMFBS_None, { MCK_Mem16, MCK_FR32 }, },
18867 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
18867 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
18868 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
18875 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
18889 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
18889 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
18890 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
18897 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
18911 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
18911 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
18912 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
18919 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
18933 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
18933 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
18934 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQYrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
18939 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
18955 { 14184 /* vpmuldq */, X86::VPMULDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18955 { 14184 /* vpmuldq */, X86::VPMULDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18955 { 14184 /* vpmuldq */, X86::VPMULDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18960 { 14184 /* vpmuldq */, X86::VPMULDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18960 { 14184 /* vpmuldq */, X86::VPMULDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18986 { 14192 /* vpmulhrsw */, X86::VPMULHRSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18986 { 14192 /* vpmulhrsw */, X86::VPMULHRSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18986 { 14192 /* vpmulhrsw */, X86::VPMULHRSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18991 { 14192 /* vpmulhrsw */, X86::VPMULHRSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18991 { 14192 /* vpmulhrsw */, X86::VPMULHRSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19008 { 14202 /* vpmulhuw */, X86::VPMULHUWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19008 { 14202 /* vpmulhuw */, X86::VPMULHUWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19008 { 14202 /* vpmulhuw */, X86::VPMULHUWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19013 { 14202 /* vpmulhuw */, X86::VPMULHUWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19013 { 14202 /* vpmulhuw */, X86::VPMULHUWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19030 { 14211 /* vpmulhw */, X86::VPMULHWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19030 { 14211 /* vpmulhw */, X86::VPMULHWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19030 { 14211 /* vpmulhw */, X86::VPMULHWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19035 { 14211 /* vpmulhw */, X86::VPMULHWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19035 { 14211 /* vpmulhw */, X86::VPMULHWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19052 { 14219 /* vpmulld */, X86::VPMULLDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19052 { 14219 /* vpmulld */, X86::VPMULLDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19052 { 14219 /* vpmulld */, X86::VPMULLDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19057 { 14219 /* vpmulld */, X86::VPMULLDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19057 { 14219 /* vpmulld */, X86::VPMULLDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19110 { 14235 /* vpmullw */, X86::VPMULLWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19110 { 14235 /* vpmullw */, X86::VPMULLWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19110 { 14235 /* vpmullw */, X86::VPMULLWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19115 { 14235 /* vpmullw */, X86::VPMULLWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19115 { 14235 /* vpmullw */, X86::VPMULLWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19159 { 14258 /* vpmuludq */, X86::VPMULUDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19159 { 14258 /* vpmuludq */, X86::VPMULUDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19159 { 14258 /* vpmuludq */, X86::VPMULUDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19164 { 14258 /* vpmuludq */, X86::VPMULUDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19164 { 14258 /* vpmuludq */, X86::VPMULUDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19280 { 14303 /* vpor */, X86::VPORrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19280 { 14303 /* vpor */, X86::VPORrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19280 { 14303 /* vpor */, X86::VPORrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19282 { 14303 /* vpor */, X86::VPORrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19282 { 14303 /* vpor */, X86::VPORrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19338 { 14320 /* vpperm */, X86::VPPERMrrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
19338 { 14320 /* vpperm */, X86::VPPERMrrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
19338 { 14320 /* vpperm */, X86::VPPERMrrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
19338 { 14320 /* vpperm */, X86::VPPERMrrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
19339 { 14320 /* vpperm */, X86::VPPERMrmr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19339 { 14320 /* vpperm */, X86::VPPERMrmr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19339 { 14320 /* vpperm */, X86::VPPERMrmr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19340 { 14320 /* vpperm */, X86::VPPERMrrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
19340 { 14320 /* vpperm */, X86::VPPERMrrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
19340 { 14320 /* vpperm */, X86::VPPERMrrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
19557 { 14387 /* vprotb */, X86::VPROTBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19557 { 14387 /* vprotb */, X86::VPROTBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19557 { 14387 /* vprotb */, X86::VPROTBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19558 { 14387 /* vprotb */, X86::VPROTBmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
19558 { 14387 /* vprotb */, X86::VPROTBmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
19559 { 14387 /* vprotb */, X86::VPROTBri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19559 { 14387 /* vprotb */, X86::VPROTBri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19560 { 14387 /* vprotb */, X86::VPROTBmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
19561 { 14387 /* vprotb */, X86::VPROTBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19561 { 14387 /* vprotb */, X86::VPROTBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19562 { 14394 /* vprotd */, X86::VPROTDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19562 { 14394 /* vprotd */, X86::VPROTDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19562 { 14394 /* vprotd */, X86::VPROTDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19563 { 14394 /* vprotd */, X86::VPROTDmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
19563 { 14394 /* vprotd */, X86::VPROTDmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
19564 { 14394 /* vprotd */, X86::VPROTDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19564 { 14394 /* vprotd */, X86::VPROTDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19565 { 14394 /* vprotd */, X86::VPROTDmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
19566 { 14394 /* vprotd */, X86::VPROTDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19566 { 14394 /* vprotd */, X86::VPROTDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19567 { 14401 /* vprotq */, X86::VPROTQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19567 { 14401 /* vprotq */, X86::VPROTQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19567 { 14401 /* vprotq */, X86::VPROTQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19568 { 14401 /* vprotq */, X86::VPROTQmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
19568 { 14401 /* vprotq */, X86::VPROTQmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
19569 { 14401 /* vprotq */, X86::VPROTQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19569 { 14401 /* vprotq */, X86::VPROTQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19570 { 14401 /* vprotq */, X86::VPROTQmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
19571 { 14401 /* vprotq */, X86::VPROTQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19571 { 14401 /* vprotq */, X86::VPROTQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19572 { 14408 /* vprotw */, X86::VPROTWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19572 { 14408 /* vprotw */, X86::VPROTWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19572 { 14408 /* vprotw */, X86::VPROTWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19573 { 14408 /* vprotw */, X86::VPROTWmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
19573 { 14408 /* vprotw */, X86::VPROTWmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
19574 { 14408 /* vprotw */, X86::VPROTWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19574 { 14408 /* vprotw */, X86::VPROTWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19575 { 14408 /* vprotw */, X86::VPROTWmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
19576 { 14408 /* vprotw */, X86::VPROTWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19576 { 14408 /* vprotw */, X86::VPROTWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19577 { 14415 /* vpsadbw */, X86::VPSADBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19577 { 14415 /* vpsadbw */, X86::VPSADBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19577 { 14415 /* vpsadbw */, X86::VPSADBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19582 { 14415 /* vpsadbw */, X86::VPSADBWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19582 { 14415 /* vpsadbw */, X86::VPSADBWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19599 { 14471 /* vpshab */, X86::VPSHABrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19599 { 14471 /* vpshab */, X86::VPSHABrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19599 { 14471 /* vpshab */, X86::VPSHABrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19600 { 14471 /* vpshab */, X86::VPSHABmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
19600 { 14471 /* vpshab */, X86::VPSHABmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
19601 { 14471 /* vpshab */, X86::VPSHABrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19601 { 14471 /* vpshab */, X86::VPSHABrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19602 { 14478 /* vpshad */, X86::VPSHADrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19602 { 14478 /* vpshad */, X86::VPSHADrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19602 { 14478 /* vpshad */, X86::VPSHADrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19603 { 14478 /* vpshad */, X86::VPSHADmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
19603 { 14478 /* vpshad */, X86::VPSHADmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
19604 { 14478 /* vpshad */, X86::VPSHADrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19604 { 14478 /* vpshad */, X86::VPSHADrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19605 { 14485 /* vpshaq */, X86::VPSHAQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19605 { 14485 /* vpshaq */, X86::VPSHAQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19605 { 14485 /* vpshaq */, X86::VPSHAQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19606 { 14485 /* vpshaq */, X86::VPSHAQmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
19606 { 14485 /* vpshaq */, X86::VPSHAQmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
19607 { 14485 /* vpshaq */, X86::VPSHAQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19607 { 14485 /* vpshaq */, X86::VPSHAQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19608 { 14492 /* vpshaw */, X86::VPSHAWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19608 { 14492 /* vpshaw */, X86::VPSHAWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19608 { 14492 /* vpshaw */, X86::VPSHAWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19609 { 14492 /* vpshaw */, X86::VPSHAWmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
19609 { 14492 /* vpshaw */, X86::VPSHAWmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
19610 { 14492 /* vpshaw */, X86::VPSHAWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19610 { 14492 /* vpshaw */, X86::VPSHAWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19611 { 14499 /* vpshlb */, X86::VPSHLBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19611 { 14499 /* vpshlb */, X86::VPSHLBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19611 { 14499 /* vpshlb */, X86::VPSHLBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19612 { 14499 /* vpshlb */, X86::VPSHLBmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
19612 { 14499 /* vpshlb */, X86::VPSHLBmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
19613 { 14499 /* vpshlb */, X86::VPSHLBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19613 { 14499 /* vpshlb */, X86::VPSHLBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19614 { 14506 /* vpshld */, X86::VPSHLDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19614 { 14506 /* vpshld */, X86::VPSHLDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19614 { 14506 /* vpshld */, X86::VPSHLDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19615 { 14506 /* vpshld */, X86::VPSHLDmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
19615 { 14506 /* vpshld */, X86::VPSHLDmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
19616 { 14506 /* vpshld */, X86::VPSHLDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19616 { 14506 /* vpshld */, X86::VPSHLDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19761 { 14564 /* vpshlq */, X86::VPSHLQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19761 { 14564 /* vpshlq */, X86::VPSHLQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19761 { 14564 /* vpshlq */, X86::VPSHLQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19762 { 14564 /* vpshlq */, X86::VPSHLQmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
19762 { 14564 /* vpshlq */, X86::VPSHLQmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
19763 { 14564 /* vpshlq */, X86::VPSHLQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19763 { 14564 /* vpshlq */, X86::VPSHLQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19764 { 14571 /* vpshlw */, X86::VPSHLWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19764 { 14571 /* vpshlw */, X86::VPSHLWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19764 { 14571 /* vpshlw */, X86::VPSHLWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19765 { 14571 /* vpshlw */, X86::VPSHLWmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
19765 { 14571 /* vpshlw */, X86::VPSHLWmr, Convert__Reg1_2__Mem1285_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
19766 { 14571 /* vpshlw */, X86::VPSHLWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19766 { 14571 /* vpshlw */, X86::VPSHLWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19911 { 14629 /* vpshufb */, X86::VPSHUFBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19911 { 14629 /* vpshufb */, X86::VPSHUFBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19911 { 14629 /* vpshufb */, X86::VPSHUFBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19916 { 14629 /* vpshufb */, X86::VPSHUFBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19916 { 14629 /* vpshufb */, X86::VPSHUFBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19945 { 14650 /* vpshufd */, X86::VPSHUFDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19945 { 14650 /* vpshufd */, X86::VPSHUFDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19950 { 14650 /* vpshufd */, X86::VPSHUFDmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
19976 { 14658 /* vpshufhw */, X86::VPSHUFHWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19976 { 14658 /* vpshufhw */, X86::VPSHUFHWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19981 { 14658 /* vpshufhw */, X86::VPSHUFHWmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
19998 { 14667 /* vpshuflw */, X86::VPSHUFLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19998 { 14667 /* vpshuflw */, X86::VPSHUFLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20003 { 14667 /* vpshuflw */, X86::VPSHUFLWmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
20020 { 14676 /* vpsignb */, X86::VPSIGNBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20020 { 14676 /* vpsignb */, X86::VPSIGNBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20020 { 14676 /* vpsignb */, X86::VPSIGNBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20022 { 14676 /* vpsignb */, X86::VPSIGNBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20022 { 14676 /* vpsignb */, X86::VPSIGNBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20024 { 14684 /* vpsignd */, X86::VPSIGNDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20024 { 14684 /* vpsignd */, X86::VPSIGNDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20024 { 14684 /* vpsignd */, X86::VPSIGNDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20026 { 14684 /* vpsignd */, X86::VPSIGNDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20026 { 14684 /* vpsignd */, X86::VPSIGNDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20028 { 14692 /* vpsignw */, X86::VPSIGNWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20028 { 14692 /* vpsignw */, X86::VPSIGNWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20028 { 14692 /* vpsignw */, X86::VPSIGNWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20030 { 14692 /* vpsignw */, X86::VPSIGNWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20030 { 14692 /* vpsignw */, X86::VPSIGNWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20032 { 14700 /* vpslld */, X86::VPSLLDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20032 { 14700 /* vpslld */, X86::VPSLLDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20032 { 14700 /* vpslld */, X86::VPSLLDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20033 { 14700 /* vpslld */, X86::VPSLLDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
20037 { 14700 /* vpslld */, X86::VPSLLDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20037 { 14700 /* vpslld */, X86::VPSLLDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20045 { 14700 /* vpslld */, X86::VPSLLDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20045 { 14700 /* vpslld */, X86::VPSLLDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20083 { 14707 /* vpslldq */, X86::VPSLLDQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20083 { 14707 /* vpslldq */, X86::VPSLLDQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20091 { 14715 /* vpsllq */, X86::VPSLLQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20091 { 14715 /* vpsllq */, X86::VPSLLQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20091 { 14715 /* vpsllq */, X86::VPSLLQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20092 { 14715 /* vpsllq */, X86::VPSLLQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
20096 { 14715 /* vpsllq */, X86::VPSLLQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20096 { 14715 /* vpsllq */, X86::VPSLLQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20104 { 14715 /* vpsllq */, X86::VPSLLQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20104 { 14715 /* vpsllq */, X86::VPSLLQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20142 { 14722 /* vpsllvd */, X86::VPSLLVDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20142 { 14722 /* vpsllvd */, X86::VPSLLVDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20142 { 14722 /* vpsllvd */, X86::VPSLLVDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20147 { 14722 /* vpsllvd */, X86::VPSLLVDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20147 { 14722 /* vpsllvd */, X86::VPSLLVDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20173 { 14730 /* vpsllvq */, X86::VPSLLVQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20173 { 14730 /* vpsllvq */, X86::VPSLLVQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20173 { 14730 /* vpsllvq */, X86::VPSLLVQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20178 { 14730 /* vpsllvq */, X86::VPSLLVQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20178 { 14730 /* vpsllvq */, X86::VPSLLVQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20222 { 14746 /* vpsllw */, X86::VPSLLWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20222 { 14746 /* vpsllw */, X86::VPSLLWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20222 { 14746 /* vpsllw */, X86::VPSLLWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20223 { 14746 /* vpsllw */, X86::VPSLLWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
20227 { 14746 /* vpsllw */, X86::VPSLLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20227 { 14746 /* vpsllw */, X86::VPSLLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20235 { 14746 /* vpsllw */, X86::VPSLLWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20235 { 14746 /* vpsllw */, X86::VPSLLWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20264 { 14753 /* vpsrad */, X86::VPSRADrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20264 { 14753 /* vpsrad */, X86::VPSRADrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20264 { 14753 /* vpsrad */, X86::VPSRADrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20265 { 14753 /* vpsrad */, X86::VPSRADYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
20269 { 14753 /* vpsrad */, X86::VPSRADri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20269 { 14753 /* vpsrad */, X86::VPSRADri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20277 { 14753 /* vpsrad */, X86::VPSRADrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20277 { 14753 /* vpsrad */, X86::VPSRADrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20360 { 14767 /* vpsravd */, X86::VPSRAVDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20360 { 14767 /* vpsravd */, X86::VPSRAVDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20360 { 14767 /* vpsravd */, X86::VPSRAVDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20365 { 14767 /* vpsravd */, X86::VPSRAVDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20365 { 14767 /* vpsravd */, X86::VPSRAVDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20436 { 14791 /* vpsraw */, X86::VPSRAWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20436 { 14791 /* vpsraw */, X86::VPSRAWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20436 { 14791 /* vpsraw */, X86::VPSRAWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20437 { 14791 /* vpsraw */, X86::VPSRAWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
20441 { 14791 /* vpsraw */, X86::VPSRAWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20441 { 14791 /* vpsraw */, X86::VPSRAWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20449 { 14791 /* vpsraw */, X86::VPSRAWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20449 { 14791 /* vpsraw */, X86::VPSRAWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20478 { 14798 /* vpsrld */, X86::VPSRLDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20478 { 14798 /* vpsrld */, X86::VPSRLDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20478 { 14798 /* vpsrld */, X86::VPSRLDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20479 { 14798 /* vpsrld */, X86::VPSRLDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
20483 { 14798 /* vpsrld */, X86::VPSRLDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20483 { 14798 /* vpsrld */, X86::VPSRLDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20491 { 14798 /* vpsrld */, X86::VPSRLDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20491 { 14798 /* vpsrld */, X86::VPSRLDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20529 { 14805 /* vpsrldq */, X86::VPSRLDQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20529 { 14805 /* vpsrldq */, X86::VPSRLDQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20537 { 14813 /* vpsrlq */, X86::VPSRLQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20537 { 14813 /* vpsrlq */, X86::VPSRLQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20537 { 14813 /* vpsrlq */, X86::VPSRLQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20538 { 14813 /* vpsrlq */, X86::VPSRLQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
20542 { 14813 /* vpsrlq */, X86::VPSRLQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20542 { 14813 /* vpsrlq */, X86::VPSRLQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20550 { 14813 /* vpsrlq */, X86::VPSRLQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20550 { 14813 /* vpsrlq */, X86::VPSRLQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20588 { 14820 /* vpsrlvd */, X86::VPSRLVDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20588 { 14820 /* vpsrlvd */, X86::VPSRLVDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20588 { 14820 /* vpsrlvd */, X86::VPSRLVDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20593 { 14820 /* vpsrlvd */, X86::VPSRLVDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20593 { 14820 /* vpsrlvd */, X86::VPSRLVDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20619 { 14828 /* vpsrlvq */, X86::VPSRLVQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20619 { 14828 /* vpsrlvq */, X86::VPSRLVQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20619 { 14828 /* vpsrlvq */, X86::VPSRLVQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20624 { 14828 /* vpsrlvq */, X86::VPSRLVQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20624 { 14828 /* vpsrlvq */, X86::VPSRLVQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20668 { 14844 /* vpsrlw */, X86::VPSRLWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20668 { 14844 /* vpsrlw */, X86::VPSRLWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20668 { 14844 /* vpsrlw */, X86::VPSRLWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20669 { 14844 /* vpsrlw */, X86::VPSRLWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
20673 { 14844 /* vpsrlw */, X86::VPSRLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20673 { 14844 /* vpsrlw */, X86::VPSRLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20681 { 14844 /* vpsrlw */, X86::VPSRLWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20681 { 14844 /* vpsrlw */, X86::VPSRLWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20710 { 14851 /* vpsubb */, X86::VPSUBBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20710 { 14851 /* vpsubb */, X86::VPSUBBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20710 { 14851 /* vpsubb */, X86::VPSUBBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20715 { 14851 /* vpsubb */, X86::VPSUBBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20715 { 14851 /* vpsubb */, X86::VPSUBBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20732 { 14858 /* vpsubd */, X86::VPSUBDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20732 { 14858 /* vpsubd */, X86::VPSUBDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20732 { 14858 /* vpsubd */, X86::VPSUBDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20737 { 14858 /* vpsubd */, X86::VPSUBDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20737 { 14858 /* vpsubd */, X86::VPSUBDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20763 { 14865 /* vpsubq */, X86::VPSUBQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20763 { 14865 /* vpsubq */, X86::VPSUBQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20763 { 14865 /* vpsubq */, X86::VPSUBQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20768 { 14865 /* vpsubq */, X86::VPSUBQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20768 { 14865 /* vpsubq */, X86::VPSUBQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20794 { 14872 /* vpsubsb */, X86::VPSUBSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20794 { 14872 /* vpsubsb */, X86::VPSUBSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20794 { 14872 /* vpsubsb */, X86::VPSUBSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20799 { 14872 /* vpsubsb */, X86::VPSUBSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20799 { 14872 /* vpsubsb */, X86::VPSUBSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20816 { 14880 /* vpsubsw */, X86::VPSUBSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20816 { 14880 /* vpsubsw */, X86::VPSUBSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20816 { 14880 /* vpsubsw */, X86::VPSUBSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20821 { 14880 /* vpsubsw */, X86::VPSUBSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20821 { 14880 /* vpsubsw */, X86::VPSUBSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20838 { 14888 /* vpsubusb */, X86::VPSUBUSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20838 { 14888 /* vpsubusb */, X86::VPSUBUSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20838 { 14888 /* vpsubusb */, X86::VPSUBUSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20843 { 14888 /* vpsubusb */, X86::VPSUBUSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20843 { 14888 /* vpsubusb */, X86::VPSUBUSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20860 { 14897 /* vpsubusw */, X86::VPSUBUSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20860 { 14897 /* vpsubusw */, X86::VPSUBUSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20860 { 14897 /* vpsubusw */, X86::VPSUBUSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20865 { 14897 /* vpsubusw */, X86::VPSUBUSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20865 { 14897 /* vpsubusw */, X86::VPSUBUSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20882 { 14906 /* vpsubw */, X86::VPSUBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20882 { 14906 /* vpsubw */, X86::VPSUBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20882 { 14906 /* vpsubw */, X86::VPSUBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20887 { 14906 /* vpsubw */, X86::VPSUBWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20887 { 14906 /* vpsubw */, X86::VPSUBWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20958 { 14935 /* vptest */, X86::VPTESTrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
20958 { 14935 /* vptest */, X86::VPTESTrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
20960 { 14935 /* vptest */, X86::VPTESTrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
21082 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21082 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21082 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21087 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21087 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21104 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21104 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21104 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21109 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21109 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21135 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21135 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21135 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21140 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21140 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21166 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21166 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21166 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21171 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21171 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21188 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21188 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21188 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21193 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21193 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21210 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21210 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21210 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21215 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21215 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21241 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21241 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21241 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21246 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21246 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21272 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21272 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21272 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21277 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21277 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21294 { 15108 /* vpxor */, X86::VPXORrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21294 { 15108 /* vpxor */, X86::VPXORrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21294 { 15108 /* vpxor */, X86::VPXORrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21296 { 15108 /* vpxor */, X86::VPXORrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21296 { 15108 /* vpxor */, X86::VPXORrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21538 { 15236 /* vrcpps */, X86::VRCPPSr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
21538 { 15236 /* vrcpps */, X86::VRCPPSr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
21540 { 15236 /* vrcpps */, X86::VRCPPSm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
21542 { 15243 /* vrcpss */, X86::VRCPSSr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21542 { 15243 /* vrcpss */, X86::VRCPSSr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21542 { 15243 /* vrcpss */, X86::VRCPSSr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21543 { 15243 /* vrcpss */, X86::VRCPSSm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
21543 { 15243 /* vrcpss */, X86::VRCPSSm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
21700 { 15338 /* vroundpd */, X86::VROUNDPDr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
21700 { 15338 /* vroundpd */, X86::VROUNDPDr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
21702 { 15338 /* vroundpd */, X86::VROUNDPDm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
21704 { 15347 /* vroundps */, X86::VROUNDPSr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
21704 { 15347 /* vroundps */, X86::VROUNDPSr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
21706 { 15347 /* vroundps */, X86::VROUNDPSm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
21708 { 15356 /* vroundsd */, X86::VROUNDSDr_Int, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
21708 { 15356 /* vroundsd */, X86::VROUNDSDr_Int, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
21708 { 15356 /* vroundsd */, X86::VROUNDSDr_Int, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
21709 { 15356 /* vroundsd */, X86::VROUNDSDm_Int, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
21709 { 15356 /* vroundsd */, X86::VROUNDSDm_Int, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
21710 { 15365 /* vroundss */, X86::VROUNDSSr_Int, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
21710 { 15365 /* vroundss */, X86::VROUNDSSr_Int, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
21710 { 15365 /* vroundss */, X86::VROUNDSSr_Int, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
21711 { 15365 /* vroundss */, X86::VROUNDSSm_Int, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
21711 { 15365 /* vroundss */, X86::VROUNDSSm_Int, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
21820 { 15462 /* vrsqrtps */, X86::VRSQRTPSr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
21820 { 15462 /* vrsqrtps */, X86::VRSQRTPSr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
21822 { 15462 /* vrsqrtps */, X86::VRSQRTPSm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
21824 { 15471 /* vrsqrtss */, X86::VRSQRTSSr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21824 { 15471 /* vrsqrtss */, X86::VRSQRTSSr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21824 { 15471 /* vrsqrtss */, X86::VRSQRTSSr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21825 { 15471 /* vrsqrtss */, X86::VRSQRTSSm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
21825 { 15471 /* vrsqrtss */, X86::VRSQRTSSm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
21996 { 15732 /* vshufpd */, X86::VSHUFPDrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
21996 { 15732 /* vshufpd */, X86::VSHUFPDrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
21996 { 15732 /* vshufpd */, X86::VSHUFPDrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
22001 { 15732 /* vshufpd */, X86::VSHUFPDrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
22001 { 15732 /* vshufpd */, X86::VSHUFPDrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
22027 { 15740 /* vshufps */, X86::VSHUFPSrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
22027 { 15740 /* vshufps */, X86::VSHUFPSrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
22027 { 15740 /* vshufps */, X86::VSHUFPSrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
22032 { 15740 /* vshufps */, X86::VSHUFPSrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
22032 { 15740 /* vshufps */, X86::VSHUFPSrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
22058 { 15748 /* vsqrtpd */, X86::VSQRTPDr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22058 { 15748 /* vsqrtpd */, X86::VSQRTPDr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22063 { 15748 /* vsqrtpd */, X86::VSQRTPDm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
22092 { 15756 /* vsqrtps */, X86::VSQRTPSr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22092 { 15756 /* vsqrtps */, X86::VSQRTPSr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22097 { 15756 /* vsqrtps */, X86::VSQRTPSm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
22126 { 15764 /* vsqrtsd */, X86::VSQRTSDr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22126 { 15764 /* vsqrtsd */, X86::VSQRTSDr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22126 { 15764 /* vsqrtsd */, X86::VSQRTSDr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22128 { 15764 /* vsqrtsd */, X86::VSQRTSDm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
22128 { 15764 /* vsqrtsd */, X86::VSQRTSDm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
22137 { 15772 /* vsqrtss */, X86::VSQRTSSr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22137 { 15772 /* vsqrtss */, X86::VSQRTSSr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22137 { 15772 /* vsqrtss */, X86::VSQRTSSr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22139 { 15772 /* vsqrtss */, X86::VSQRTSSm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
22139 { 15772 /* vsqrtss */, X86::VSQRTSSm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
22149 { 15789 /* vsubpd */, X86::VSUBPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22149 { 15789 /* vsubpd */, X86::VSUBPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22149 { 15789 /* vsubpd */, X86::VSUBPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22154 { 15789 /* vsubpd */, X86::VSUBPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
22154 { 15789 /* vsubpd */, X86::VSUBPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
22183 { 15796 /* vsubps */, X86::VSUBPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22183 { 15796 /* vsubps */, X86::VSUBPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22183 { 15796 /* vsubps */, X86::VSUBPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22188 { 15796 /* vsubps */, X86::VSUBPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
22188 { 15796 /* vsubps */, X86::VSUBPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
22217 { 15803 /* vsubsd */, X86::VSUBSDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22217 { 15803 /* vsubsd */, X86::VSUBSDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22217 { 15803 /* vsubsd */, X86::VSUBSDrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22219 { 15803 /* vsubsd */, X86::VSUBSDrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
22219 { 15803 /* vsubsd */, X86::VSUBSDrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
22228 { 15810 /* vsubss */, X86::VSUBSSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22228 { 15810 /* vsubss */, X86::VSUBSSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22228 { 15810 /* vsubss */, X86::VSUBSSrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22230 { 15810 /* vsubss */, X86::VSUBSSrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
22230 { 15810 /* vsubss */, X86::VSUBSSrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
22239 { 15817 /* vtestpd */, X86::VTESTPDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22239 { 15817 /* vtestpd */, X86::VTESTPDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22241 { 15817 /* vtestpd */, X86::VTESTPDrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
22243 { 15825 /* vtestps */, X86::VTESTPSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22243 { 15825 /* vtestps */, X86::VTESTPSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22245 { 15825 /* vtestps */, X86::VTESTPSrm, Convert__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
22247 { 15833 /* vucomisd */, X86::VUCOMISDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22247 { 15833 /* vucomisd */, X86::VUCOMISDrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22249 { 15833 /* vucomisd */, X86::VUCOMISDrm, Convert__Reg1_1__Mem645_0, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
22252 { 15842 /* vucomiss */, X86::VUCOMISSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22252 { 15842 /* vucomiss */, X86::VUCOMISSrr, Convert__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22254 { 15842 /* vucomiss */, X86::VUCOMISSrm, Convert__Reg1_1__Mem325_0, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
22257 { 15851 /* vunpckhpd */, X86::VUNPCKHPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22257 { 15851 /* vunpckhpd */, X86::VUNPCKHPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22257 { 15851 /* vunpckhpd */, X86::VUNPCKHPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22262 { 15851 /* vunpckhpd */, X86::VUNPCKHPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
22262 { 15851 /* vunpckhpd */, X86::VUNPCKHPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
22288 { 15861 /* vunpckhps */, X86::VUNPCKHPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22288 { 15861 /* vunpckhps */, X86::VUNPCKHPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22288 { 15861 /* vunpckhps */, X86::VUNPCKHPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22293 { 15861 /* vunpckhps */, X86::VUNPCKHPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
22293 { 15861 /* vunpckhps */, X86::VUNPCKHPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
22319 { 15871 /* vunpcklpd */, X86::VUNPCKLPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22319 { 15871 /* vunpcklpd */, X86::VUNPCKLPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22319 { 15871 /* vunpcklpd */, X86::VUNPCKLPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22324 { 15871 /* vunpcklpd */, X86::VUNPCKLPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
22324 { 15871 /* vunpcklpd */, X86::VUNPCKLPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
22350 { 15881 /* vunpcklps */, X86::VUNPCKLPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22350 { 15881 /* vunpcklps */, X86::VUNPCKLPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22350 { 15881 /* vunpcklps */, X86::VUNPCKLPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22355 { 15881 /* vunpcklps */, X86::VUNPCKLPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
22355 { 15881 /* vunpcklps */, X86::VUNPCKLPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
22381 { 15891 /* vxorpd */, X86::VXORPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22381 { 15891 /* vxorpd */, X86::VXORPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22381 { 15891 /* vxorpd */, X86::VXORPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22386 { 15891 /* vxorpd */, X86::VXORPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
22386 { 15891 /* vxorpd */, X86::VXORPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
22412 { 15898 /* vxorps */, X86::VXORPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22412 { 15898 /* vxorps */, X86::VXORPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22412 { 15898 /* vxorps */, X86::VXORPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
22417 { 15898 /* vxorps */, X86::VXORPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
22417 { 15898 /* vxorps */, X86::VXORPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
22513 { 16206 /* xorpd */, X86::XORPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22513 { 16206 /* xorpd */, X86::XORPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22514 { 16206 /* xorpd */, X86::XORPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
22515 { 16212 /* xorps */, X86::XORPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22515 { 16212 /* xorps */, X86::XORPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22516 { 16212 /* xorps */, X86::XORPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
22633 { 71 /* addpd */, X86::ADDPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22633 { 71 /* addpd */, X86::ADDPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22634 { 71 /* addpd */, X86::ADDPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
22635 { 77 /* addps */, X86::ADDPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22635 { 77 /* addps */, X86::ADDPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22636 { 77 /* addps */, X86::ADDPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
22637 { 88 /* addsd */, X86::ADDSDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22637 { 88 /* addsd */, X86::ADDSDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22638 { 88 /* addsd */, X86::ADDSDrm_Int, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
22639 { 94 /* addss */, X86::ADDSSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22639 { 94 /* addss */, X86::ADDSSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22640 { 94 /* addss */, X86::ADDSSrm_Int, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
22641 { 100 /* addsubpd */, X86::ADDSUBPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22641 { 100 /* addsubpd */, X86::ADDSUBPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22642 { 100 /* addsubpd */, X86::ADDSUBPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
22643 { 109 /* addsubps */, X86::ADDSUBPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22643 { 109 /* addsubps */, X86::ADDSUBPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22644 { 109 /* addsubps */, X86::ADDSUBPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
22649 { 140 /* aesdec */, X86::AESDECrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22649 { 140 /* aesdec */, X86::AESDECrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22650 { 140 /* aesdec */, X86::AESDECrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
22651 { 147 /* aesdeclast */, X86::AESDECLASTrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22651 { 147 /* aesdeclast */, X86::AESDECLASTrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22652 { 147 /* aesdeclast */, X86::AESDECLASTrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
22653 { 158 /* aesenc */, X86::AESENCrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22653 { 158 /* aesenc */, X86::AESENCrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22654 { 158 /* aesenc */, X86::AESENCrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
22655 { 165 /* aesenclast */, X86::AESENCLASTrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22655 { 165 /* aesenclast */, X86::AESENCLASTrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22656 { 165 /* aesenclast */, X86::AESENCLASTrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
22657 { 176 /* aesimc */, X86::AESIMCrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22657 { 176 /* aesimc */, X86::AESIMCrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22658 { 176 /* aesimc */, X86::AESIMCrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
22659 { 183 /* aeskeygenassist */, X86::AESKEYGENASSIST128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
22659 { 183 /* aeskeygenassist */, X86::AESKEYGENASSIST128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
22660 { 183 /* aeskeygenassist */, X86::AESKEYGENASSIST128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
22698 { 224 /* andnpd */, X86::ANDNPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22698 { 224 /* andnpd */, X86::ANDNPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22699 { 224 /* andnpd */, X86::ANDNPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
22700 { 231 /* andnps */, X86::ANDNPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22700 { 231 /* andnps */, X86::ANDNPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22701 { 231 /* andnps */, X86::ANDNPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
22702 { 244 /* andpd */, X86::ANDPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22702 { 244 /* andpd */, X86::ANDPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22703 { 244 /* andpd */, X86::ANDPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
22704 { 250 /* andps */, X86::ANDPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22704 { 250 /* andps */, X86::ANDPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22705 { 250 /* andps */, X86::ANDPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
22736 { 394 /* blendpd */, X86::BLENDPDrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
22736 { 394 /* blendpd */, X86::BLENDPDrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
22737 { 394 /* blendpd */, X86::BLENDPDrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
22738 { 402 /* blendps */, X86::BLENDPSrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
22738 { 402 /* blendps */, X86::BLENDPSrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
22739 { 402 /* blendps */, X86::BLENDPSrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
22740 { 410 /* blendvpd */, X86::BLENDVPDrr0, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22740 { 410 /* blendvpd */, X86::BLENDVPDrr0, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22741 { 410 /* blendvpd */, X86::BLENDVPDrm0, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
22742 { 410 /* blendvpd */, X86::BLENDVPDrr0, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_XMM0 }, },
22742 { 410 /* blendvpd */, X86::BLENDVPDrr0, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_XMM0 }, },
22743 { 410 /* blendvpd */, X86::BLENDVPDrm0, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_XMM0 }, },
22744 { 419 /* blendvps */, X86::BLENDVPSrr0, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22744 { 419 /* blendvps */, X86::BLENDVPSrr0, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
22745 { 419 /* blendvps */, X86::BLENDVPSrm0, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
22746 { 419 /* blendvps */, X86::BLENDVPSrr0, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_XMM0 }, },
22746 { 419 /* blendvps */, X86::BLENDVPSrr0, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_XMM0 }, },
22747 { 419 /* blendvps */, X86::BLENDVPSrm0, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_XMM0 }, },
23023 { 1362 /* cmppd */, X86::CMPPDrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23023 { 1362 /* cmppd */, X86::CMPPDrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23024 { 1362 /* cmppd */, X86::CMPPDrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23025 { 1368 /* cmpps */, X86::CMPPSrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23025 { 1368 /* cmpps */, X86::CMPPSrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23026 { 1368 /* cmpps */, X86::CMPPSrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23033 { 1390 /* cmpsd */, X86::CMPSDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23033 { 1390 /* cmpsd */, X86::CMPSDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23034 { 1390 /* cmpsd */, X86::CMPSDrm_Int, Convert__Reg1_0__Tie0_1_1__Mem645_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, },
23036 { 1408 /* cmpss */, X86::CMPSSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23036 { 1408 /* cmpss */, X86::CMPSSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23037 { 1408 /* cmpss */, X86::CMPSSrm_Int, Convert__Reg1_0__Tie0_1_1__Mem325_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
23049 { 1490 /* comisd */, X86::COMISDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23049 { 1490 /* comisd */, X86::COMISDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23050 { 1490 /* comisd */, X86::COMISDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
23051 { 1497 /* comiss */, X86::COMISSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23051 { 1497 /* comiss */, X86::COMISSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23052 { 1497 /* comiss */, X86::COMISSrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
23066 { 1556 /* cvtdq2pd */, X86::CVTDQ2PDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23066 { 1556 /* cvtdq2pd */, X86::CVTDQ2PDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23067 { 1556 /* cvtdq2pd */, X86::CVTDQ2PDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
23068 { 1565 /* cvtdq2ps */, X86::CVTDQ2PSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23068 { 1565 /* cvtdq2ps */, X86::CVTDQ2PSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23069 { 1565 /* cvtdq2ps */, X86::CVTDQ2PSrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23070 { 1574 /* cvtpd2dq */, X86::CVTPD2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23070 { 1574 /* cvtpd2dq */, X86::CVTPD2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23071 { 1574 /* cvtpd2dq */, X86::CVTPD2DQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23072 { 1583 /* cvtpd2pi */, X86::MMX_CVTPD2PIirr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_FR32 }, },
23074 { 1592 /* cvtpd2ps */, X86::CVTPD2PSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23074 { 1592 /* cvtpd2ps */, X86::CVTPD2PSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23075 { 1592 /* cvtpd2ps */, X86::CVTPD2PSrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23076 { 1601 /* cvtpi2pd */, X86::MMX_CVTPI2PDirr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_VR64 }, },
23077 { 1601 /* cvtpi2pd */, X86::MMX_CVTPI2PDirm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
23078 { 1610 /* cvtpi2ps */, X86::MMX_CVTPI2PSirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_VR64 }, },
23079 { 1610 /* cvtpi2ps */, X86::MMX_CVTPI2PSirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
23080 { 1619 /* cvtps2dq */, X86::CVTPS2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23080 { 1619 /* cvtps2dq */, X86::CVTPS2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23081 { 1619 /* cvtps2dq */, X86::CVTPS2DQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23082 { 1628 /* cvtps2pd */, X86::CVTPS2PDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23082 { 1628 /* cvtps2pd */, X86::CVTPS2PDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23083 { 1628 /* cvtps2pd */, X86::CVTPS2PDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
23084 { 1637 /* cvtps2pi */, X86::MMX_CVTPS2PIirr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_FR32 }, },
23086 { 1646 /* cvtsd2si */, X86::CVTSD2SIrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
23088 { 1646 /* cvtsd2si */, X86::CVTSD2SI64rr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
23090 { 1675 /* cvtsd2ss */, X86::CVTSD2SSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23090 { 1675 /* cvtsd2ss */, X86::CVTSD2SSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23091 { 1675 /* cvtsd2ss */, X86::CVTSD2SSrm_Int, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
23092 { 1684 /* cvtsi2sd */, X86::CVTSI2SDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
23093 { 1684 /* cvtsi2sd */, X86::CVTSI642SDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
23094 { 1684 /* cvtsi2sd */, X86::CVTSI2SDrm_Int, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
23095 { 1684 /* cvtsi2sd */, X86::CVTSI642SDrm_Int, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
23096 { 1713 /* cvtsi2ss */, X86::CVTSI2SSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
23097 { 1713 /* cvtsi2ss */, X86::CVTSI642SSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
23098 { 1713 /* cvtsi2ss */, X86::CVTSI2SSrm_Int, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
23099 { 1713 /* cvtsi2ss */, X86::CVTSI642SSrm_Int, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
23100 { 1742 /* cvtss2sd */, X86::CVTSS2SDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23100 { 1742 /* cvtss2sd */, X86::CVTSS2SDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23101 { 1742 /* cvtss2sd */, X86::CVTSS2SDrm_Int, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
23102 { 1751 /* cvtss2si */, X86::CVTSS2SIrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
23104 { 1751 /* cvtss2si */, X86::CVTSS2SI64rr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
23106 { 1780 /* cvttpd2dq */, X86::CVTTPD2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23106 { 1780 /* cvttpd2dq */, X86::CVTTPD2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23107 { 1780 /* cvttpd2dq */, X86::CVTTPD2DQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23108 { 1790 /* cvttpd2pi */, X86::MMX_CVTTPD2PIirr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_FR32 }, },
23110 { 1800 /* cvttps2dq */, X86::CVTTPS2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23110 { 1800 /* cvttps2dq */, X86::CVTTPS2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23111 { 1800 /* cvttps2dq */, X86::CVTTPS2DQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23112 { 1810 /* cvttps2pi */, X86::MMX_CVTTPS2PIirr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_FR32 }, },
23114 { 1820 /* cvttsd2si */, X86::CVTTSD2SIrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
23116 { 1820 /* cvttsd2si */, X86::CVTTSD2SI64rr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
23118 { 1852 /* cvttss2si */, X86::CVTTSS2SIrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
23120 { 1852 /* cvttss2si */, X86::CVTTSS2SI64rr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
23153 { 1956 /* divpd */, X86::DIVPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23153 { 1956 /* divpd */, X86::DIVPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23154 { 1956 /* divpd */, X86::DIVPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23155 { 1962 /* divps */, X86::DIVPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23155 { 1962 /* divps */, X86::DIVPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23156 { 1962 /* divps */, X86::DIVPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23157 { 1973 /* divsd */, X86::DIVSDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23157 { 1973 /* divsd */, X86::DIVSDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23158 { 1973 /* divsd */, X86::DIVSDrm_Int, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
23159 { 1979 /* divss */, X86::DIVSSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23159 { 1979 /* divss */, X86::DIVSSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23160 { 1979 /* divss */, X86::DIVSSrm_Int, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
23161 { 1990 /* dppd */, X86::DPPDrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23161 { 1990 /* dppd */, X86::DPPDrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23162 { 1990 /* dppd */, X86::DPPDrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23163 { 1995 /* dpps */, X86::DPPSrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23163 { 1995 /* dpps */, X86::DPPSrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23164 { 1995 /* dpps */, X86::DPPSrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23180 { 2066 /* extractps */, X86::EXTRACTPSrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
23181 { 2066 /* extractps */, X86::EXTRACTPSmr, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23182 { 2076 /* extrq */, X86::EXTRQ, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23182 { 2076 /* extrq */, X86::EXTRQ, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23183 { 2076 /* extrq */, X86::EXTRQI, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_ImmUnsignedi8, MCK_ImmUnsignedi8 }, },
23380 { 3029 /* gf2p8affineinvqb */, X86::GF2P8AFFINEINVQBrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23380 { 3029 /* gf2p8affineinvqb */, X86::GF2P8AFFINEINVQBrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23381 { 3029 /* gf2p8affineinvqb */, X86::GF2P8AFFINEINVQBrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23382 { 3046 /* gf2p8affineqb */, X86::GF2P8AFFINEQBrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23382 { 3046 /* gf2p8affineqb */, X86::GF2P8AFFINEQBrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23383 { 3046 /* gf2p8affineqb */, X86::GF2P8AFFINEQBrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23384 { 3060 /* gf2p8mulb */, X86::GF2P8MULBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23384 { 3060 /* gf2p8mulb */, X86::GF2P8MULBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23385 { 3060 /* gf2p8mulb */, X86::GF2P8MULBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23387 { 3073 /* haddpd */, X86::HADDPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23387 { 3073 /* haddpd */, X86::HADDPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23388 { 3073 /* haddpd */, X86::HADDPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23389 { 3080 /* haddps */, X86::HADDPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23389 { 3080 /* haddps */, X86::HADDPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23390 { 3080 /* haddps */, X86::HADDPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23392 { 3091 /* hsubpd */, X86::HSUBPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23392 { 3091 /* hsubpd */, X86::HSUBPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23393 { 3091 /* hsubpd */, X86::HSUBPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23394 { 3098 /* hsubps */, X86::HSUBPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23394 { 3098 /* hsubps */, X86::HSUBPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23395 { 3098 /* hsubps */, X86::HSUBPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23471 { 3228 /* insertps */, X86::INSERTPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23471 { 3228 /* insertps */, X86::INSERTPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23472 { 3228 /* insertps */, X86::INSERTPSrm, Convert__Reg1_0__Tie0_1_1__Mem325_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
23473 { 3237 /* insertq */, X86::INSERTQ, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23473 { 3237 /* insertq */, X86::INSERTQ, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23474 { 3237 /* insertq */, X86::INSERTQI, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8, MCK_ImmUnsignedi8 }, },
23474 { 3237 /* insertq */, X86::INSERTQI, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8, MCK_ImmUnsignedi8 }, },
23605 { 3847 /* lddqu */, X86::LDDQUrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23686 { 4233 /* maskmovdqu */, X86::MASKMOVDQU, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_FR32, MCK_FR32 }, },
23686 { 4233 /* maskmovdqu */, X86::MASKMOVDQU, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_FR32, MCK_FR32 }, },
23687 { 4233 /* maskmovdqu */, X86::MASKMOVDQU64, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_FR32, MCK_FR32 }, },
23687 { 4233 /* maskmovdqu */, X86::MASKMOVDQU64, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_FR32, MCK_FR32 }, },
23690 { 4253 /* maxpd */, X86::MAXPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23690 { 4253 /* maxpd */, X86::MAXPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23691 { 4253 /* maxpd */, X86::MAXPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23692 { 4259 /* maxps */, X86::MAXPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23692 { 4259 /* maxps */, X86::MAXPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23693 { 4259 /* maxps */, X86::MAXPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23694 { 4265 /* maxsd */, X86::MAXSDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23694 { 4265 /* maxsd */, X86::MAXSDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23695 { 4265 /* maxsd */, X86::MAXSDrm_Int, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
23696 { 4271 /* maxss */, X86::MAXSSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23696 { 4271 /* maxss */, X86::MAXSSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23697 { 4271 /* maxss */, X86::MAXSSrm_Int, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
23699 { 4284 /* minpd */, X86::MINPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23699 { 4284 /* minpd */, X86::MINPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23700 { 4284 /* minpd */, X86::MINPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23701 { 4290 /* minps */, X86::MINPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23701 { 4290 /* minps */, X86::MINPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23702 { 4290 /* minps */, X86::MINPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23703 { 4296 /* minsd */, X86::MINSDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23703 { 4296 /* minsd */, X86::MINSDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23704 { 4296 /* minsd */, X86::MINSDrm_Int, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
23705 { 4302 /* minss */, X86::MINSSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23705 { 4302 /* minss */, X86::MINSSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23706 { 4302 /* minss */, X86::MINSSrm_Int, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
23780 { 4382 /* movapd */, X86::MOVAPDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23780 { 4382 /* movapd */, X86::MOVAPDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23781 { 4382 /* movapd */, X86::MOVAPDrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23782 { 4382 /* movapd */, X86::MOVAPDmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
23783 { 4389 /* movapd.s */, X86::MOVAPDrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23783 { 4389 /* movapd.s */, X86::MOVAPDrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23784 { 4398 /* movaps */, X86::MOVAPSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23784 { 4398 /* movaps */, X86::MOVAPSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23785 { 4398 /* movaps */, X86::MOVAPSrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23786 { 4398 /* movaps */, X86::MOVAPSmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
23787 { 4405 /* movaps.s */, X86::MOVAPSrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23787 { 4405 /* movaps.s */, X86::MOVAPSrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23797 { 4453 /* movd */, X86::MOVDI2PDIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
23798 { 4453 /* movd */, X86::MOV64toPQIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
23799 { 4453 /* movd */, X86::MOVDI2PDIrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
23801 { 4453 /* movd */, X86::MOVPDI2DIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
23803 { 4453 /* movd */, X86::MOVPQIto64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
23805 { 4453 /* movd */, X86::MOVPDI2DImr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
23806 { 4458 /* movddup */, X86::MOVDDUPrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23806 { 4458 /* movddup */, X86::MOVDDUPrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23807 { 4458 /* movddup */, X86::MOVDDUPrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
23813 { 4484 /* movdq2q */, X86::MMX_MOVDQ2Qrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR64, MCK_FR32 }, },
23814 { 4492 /* movdqa */, X86::MOVDQArr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23814 { 4492 /* movdqa */, X86::MOVDQArr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23815 { 4492 /* movdqa */, X86::MOVDQArm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23816 { 4492 /* movdqa */, X86::MOVDQAmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
23817 { 4499 /* movdqa.s */, X86::MOVDQArr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23817 { 4499 /* movdqa.s */, X86::MOVDQArr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23818 { 4508 /* movdqu */, X86::MOVDQUrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23818 { 4508 /* movdqu */, X86::MOVDQUrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23819 { 4508 /* movdqu */, X86::MOVDQUrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23820 { 4508 /* movdqu */, X86::MOVDQUmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
23821 { 4515 /* movdqu.s */, X86::MOVDQUrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23821 { 4515 /* movdqu.s */, X86::MOVDQUrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23822 { 4524 /* movhlps */, X86::MOVHLPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23822 { 4524 /* movhlps */, X86::MOVHLPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23823 { 4532 /* movhpd */, X86::MOVHPDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
23824 { 4532 /* movhpd */, X86::MOVHPDmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
23825 { 4539 /* movhps */, X86::MOVHPSrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
23826 { 4539 /* movhps */, X86::MOVHPSmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
23827 { 4558 /* movlhps */, X86::MOVLHPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23827 { 4558 /* movlhps */, X86::MOVLHPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23828 { 4566 /* movlpd */, X86::MOVLPDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
23829 { 4566 /* movlpd */, X86::MOVLPDmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
23830 { 4573 /* movlps */, X86::MOVLPSrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
23831 { 4573 /* movlps */, X86::MOVLPSmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
23832 { 4580 /* movmskpd */, X86::MOVMSKPDrr, Convert__GR32orGR641_0__Reg1_1, AMFBS_None, { MCK_GR32orGR64, MCK_FR32 }, },
23833 { 4589 /* movmskps */, X86::MOVMSKPSrr, Convert__GR32orGR641_0__Reg1_1, AMFBS_None, { MCK_GR32orGR64, MCK_FR32 }, },
23834 { 4598 /* movntdq */, X86::MOVNTDQmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
23835 { 4606 /* movntdqa */, X86::MOVNTDQArm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23838 { 4638 /* movntpd */, X86::MOVNTPDmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
23839 { 4646 /* movntps */, X86::MOVNTPSmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
23841 { 4661 /* movntsd */, X86::MOVNTSD, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
23842 { 4669 /* movntss */, X86::MOVNTSS, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
23846 { 4677 /* movq */, X86::MOVZPQILo2PQIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23846 { 4677 /* movq */, X86::MOVZPQILo2PQIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23847 { 4677 /* movq */, X86::MOV64toPQIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
23848 { 4677 /* movq */, X86::MOVQI2PQIrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
23850 { 4677 /* movq */, X86::MOVPQIto64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
23852 { 4677 /* movq */, X86::MOVPQI2QImr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
23854 { 4682 /* movq.s */, X86::MOVPQI2QIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23854 { 4682 /* movq.s */, X86::MOVPQI2QIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23855 { 4689 /* movq2dq */, X86::MMX_MOVQ2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_VR64 }, },
23861 { 4729 /* movsd */, X86::MOVSDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23861 { 4729 /* movsd */, X86::MOVSDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23862 { 4729 /* movsd */, X86::MOVSDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
23864 { 4729 /* movsd */, X86::MOVSDmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
23865 { 4735 /* movsd.s */, X86::MOVSDrr_REV, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23865 { 4735 /* movsd.s */, X86::MOVSDrr_REV, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23866 { 4743 /* movshdup */, X86::MOVSHDUPrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23866 { 4743 /* movshdup */, X86::MOVSHDUPrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23867 { 4743 /* movshdup */, X86::MOVSHDUPrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23868 { 4758 /* movsldup */, X86::MOVSLDUPrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23868 { 4758 /* movsldup */, X86::MOVSLDUPrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23869 { 4758 /* movsldup */, X86::MOVSLDUPrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23871 { 4780 /* movss */, X86::MOVSSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23871 { 4780 /* movss */, X86::MOVSSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23872 { 4780 /* movss */, X86::MOVSSrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
23873 { 4780 /* movss */, X86::MOVSSmr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
23874 { 4786 /* movss.s */, X86::MOVSSrr_REV, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23874 { 4786 /* movss.s */, X86::MOVSSrr_REV, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23888 { 4827 /* movupd */, X86::MOVUPDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23888 { 4827 /* movupd */, X86::MOVUPDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23889 { 4827 /* movupd */, X86::MOVUPDrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23890 { 4827 /* movupd */, X86::MOVUPDmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
23891 { 4834 /* movupd.s */, X86::MOVUPDrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23891 { 4834 /* movupd.s */, X86::MOVUPDrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23892 { 4843 /* movups */, X86::MOVUPSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23892 { 4843 /* movups */, X86::MOVUPSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23893 { 4843 /* movups */, X86::MOVUPSrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23894 { 4843 /* movups */, X86::MOVUPSmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
23895 { 4850 /* movups.s */, X86::MOVUPSrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23895 { 4850 /* movups.s */, X86::MOVUPSrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23906 { 4912 /* mpsadbw */, X86::MPSADBWrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23906 { 4912 /* mpsadbw */, X86::MPSADBWrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23907 { 4912 /* mpsadbw */, X86::MPSADBWrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23916 { 4934 /* mulpd */, X86::MULPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23916 { 4934 /* mulpd */, X86::MULPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23917 { 4934 /* mulpd */, X86::MULPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23918 { 4940 /* mulps */, X86::MULPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23918 { 4940 /* mulps */, X86::MULPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23919 { 4940 /* mulps */, X86::MULPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23920 { 4951 /* mulsd */, X86::MULSDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23920 { 4951 /* mulsd */, X86::MULSDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23921 { 4951 /* mulsd */, X86::MULSDrm_Int, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
23922 { 4957 /* mulss */, X86::MULSSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23922 { 4957 /* mulss */, X86::MULSSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23923 { 4957 /* mulss */, X86::MULSSrm_Int, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
23990 { 5076 /* orpd */, X86::ORPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23990 { 5076 /* orpd */, X86::ORPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23991 { 5076 /* orpd */, X86::ORPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
23992 { 5081 /* orps */, X86::ORPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23992 { 5081 /* orps */, X86::ORPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
23993 { 5081 /* orps */, X86::ORPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24014 { 5142 /* pabsb */, X86::PABSBrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24014 { 5142 /* pabsb */, X86::PABSBrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24015 { 5142 /* pabsb */, X86::PABSBrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24018 { 5148 /* pabsd */, X86::PABSDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24018 { 5148 /* pabsd */, X86::PABSDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24019 { 5148 /* pabsd */, X86::PABSDrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24022 { 5154 /* pabsw */, X86::PABSWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24022 { 5154 /* pabsw */, X86::PABSWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24023 { 5154 /* pabsw */, X86::PABSWrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24026 { 5160 /* packssdw */, X86::PACKSSDWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24026 { 5160 /* packssdw */, X86::PACKSSDWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24027 { 5160 /* packssdw */, X86::PACKSSDWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24030 { 5169 /* packsswb */, X86::PACKSSWBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24030 { 5169 /* packsswb */, X86::PACKSSWBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24031 { 5169 /* packsswb */, X86::PACKSSWBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24032 { 5178 /* packusdw */, X86::PACKUSDWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24032 { 5178 /* packusdw */, X86::PACKUSDWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24033 { 5178 /* packusdw */, X86::PACKUSDWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24036 { 5187 /* packuswb */, X86::PACKUSWBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24036 { 5187 /* packuswb */, X86::PACKUSWBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24037 { 5187 /* packuswb */, X86::PACKUSWBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24040 { 5196 /* paddb */, X86::PADDBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24040 { 5196 /* paddb */, X86::PADDBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24041 { 5196 /* paddb */, X86::PADDBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24044 { 5202 /* paddd */, X86::PADDDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24044 { 5202 /* paddd */, X86::PADDDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24045 { 5202 /* paddd */, X86::PADDDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24048 { 5208 /* paddq */, X86::PADDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24048 { 5208 /* paddq */, X86::PADDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24049 { 5208 /* paddq */, X86::PADDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24052 { 5214 /* paddsb */, X86::PADDSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24052 { 5214 /* paddsb */, X86::PADDSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24053 { 5214 /* paddsb */, X86::PADDSBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24056 { 5221 /* paddsw */, X86::PADDSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24056 { 5221 /* paddsw */, X86::PADDSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24057 { 5221 /* paddsw */, X86::PADDSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24060 { 5228 /* paddusb */, X86::PADDUSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24060 { 5228 /* paddusb */, X86::PADDUSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24061 { 5228 /* paddusb */, X86::PADDUSBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24064 { 5236 /* paddusw */, X86::PADDUSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24064 { 5236 /* paddusw */, X86::PADDUSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24065 { 5236 /* paddusw */, X86::PADDUSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24068 { 5244 /* paddw */, X86::PADDWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24068 { 5244 /* paddw */, X86::PADDWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24069 { 5244 /* paddw */, X86::PADDWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24072 { 5250 /* palignr */, X86::PALIGNRrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24072 { 5250 /* palignr */, X86::PALIGNRrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24073 { 5250 /* palignr */, X86::PALIGNRrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24076 { 5258 /* pand */, X86::PANDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24076 { 5258 /* pand */, X86::PANDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24077 { 5258 /* pand */, X86::PANDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24080 { 5263 /* pandn */, X86::PANDNrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24080 { 5263 /* pandn */, X86::PANDNrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24081 { 5263 /* pandn */, X86::PANDNrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24085 { 5275 /* pavgb */, X86::PAVGBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24085 { 5275 /* pavgb */, X86::PAVGBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24086 { 5275 /* pavgb */, X86::PAVGBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24091 { 5289 /* pavgw */, X86::PAVGWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24091 { 5289 /* pavgw */, X86::PAVGWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24092 { 5289 /* pavgw */, X86::PAVGWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24093 { 5295 /* pblendvb */, X86::PBLENDVBrr0, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24093 { 5295 /* pblendvb */, X86::PBLENDVBrr0, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24094 { 5295 /* pblendvb */, X86::PBLENDVBrm0, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24095 { 5295 /* pblendvb */, X86::PBLENDVBrr0, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_XMM0 }, },
24095 { 5295 /* pblendvb */, X86::PBLENDVBrr0, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_XMM0 }, },
24096 { 5295 /* pblendvb */, X86::PBLENDVBrm0, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_XMM0 }, },
24097 { 5304 /* pblendw */, X86::PBLENDWrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24097 { 5304 /* pblendw */, X86::PBLENDWrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24098 { 5304 /* pblendw */, X86::PBLENDWrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24099 { 5312 /* pclmulhqhqdq */, X86::PCLMULQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_17, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24099 { 5312 /* pclmulhqhqdq */, X86::PCLMULQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_17, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24100 { 5312 /* pclmulhqhqdq */, X86::PCLMULQDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_17, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24101 { 5325 /* pclmulhqlqdq */, X86::PCLMULQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24101 { 5325 /* pclmulhqlqdq */, X86::PCLMULQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24102 { 5325 /* pclmulhqlqdq */, X86::PCLMULQDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24103 { 5338 /* pclmullqhqdq */, X86::PCLMULQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_16, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24103 { 5338 /* pclmullqhqdq */, X86::PCLMULQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_16, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24104 { 5338 /* pclmullqhqdq */, X86::PCLMULQDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_16, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24105 { 5351 /* pclmullqlqdq */, X86::PCLMULQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24105 { 5351 /* pclmullqlqdq */, X86::PCLMULQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_0, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24106 { 5351 /* pclmullqlqdq */, X86::PCLMULQDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_0, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24107 { 5364 /* pclmulqdq */, X86::PCLMULQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24107 { 5364 /* pclmulqdq */, X86::PCLMULQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24108 { 5364 /* pclmulqdq */, X86::PCLMULQDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24111 { 5374 /* pcmpeqb */, X86::PCMPEQBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24111 { 5374 /* pcmpeqb */, X86::PCMPEQBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24112 { 5374 /* pcmpeqb */, X86::PCMPEQBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24115 { 5382 /* pcmpeqd */, X86::PCMPEQDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24115 { 5382 /* pcmpeqd */, X86::PCMPEQDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24116 { 5382 /* pcmpeqd */, X86::PCMPEQDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24117 { 5390 /* pcmpeqq */, X86::PCMPEQQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24117 { 5390 /* pcmpeqq */, X86::PCMPEQQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24118 { 5390 /* pcmpeqq */, X86::PCMPEQQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24121 { 5398 /* pcmpeqw */, X86::PCMPEQWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24121 { 5398 /* pcmpeqw */, X86::PCMPEQWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24122 { 5398 /* pcmpeqw */, X86::PCMPEQWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24123 { 5406 /* pcmpestri */, X86::PCMPESTRIrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24123 { 5406 /* pcmpestri */, X86::PCMPESTRIrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24124 { 5406 /* pcmpestri */, X86::PCMPESTRIrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24125 { 5416 /* pcmpestrm */, X86::PCMPESTRMrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24125 { 5416 /* pcmpestrm */, X86::PCMPESTRMrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24126 { 5416 /* pcmpestrm */, X86::PCMPESTRMrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24129 { 5426 /* pcmpgtb */, X86::PCMPGTBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24129 { 5426 /* pcmpgtb */, X86::PCMPGTBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24130 { 5426 /* pcmpgtb */, X86::PCMPGTBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24133 { 5434 /* pcmpgtd */, X86::PCMPGTDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24133 { 5434 /* pcmpgtd */, X86::PCMPGTDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24134 { 5434 /* pcmpgtd */, X86::PCMPGTDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24135 { 5442 /* pcmpgtq */, X86::PCMPGTQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24135 { 5442 /* pcmpgtq */, X86::PCMPGTQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24136 { 5442 /* pcmpgtq */, X86::PCMPGTQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24139 { 5450 /* pcmpgtw */, X86::PCMPGTWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24139 { 5450 /* pcmpgtw */, X86::PCMPGTWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24140 { 5450 /* pcmpgtw */, X86::PCMPGTWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24141 { 5458 /* pcmpistri */, X86::PCMPISTRIrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24141 { 5458 /* pcmpistri */, X86::PCMPISTRIrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24142 { 5458 /* pcmpistri */, X86::PCMPISTRIrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24143 { 5468 /* pcmpistrm */, X86::PCMPISTRMrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24143 { 5468 /* pcmpistrm */, X86::PCMPISTRMrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24144 { 5468 /* pcmpistrm */, X86::PCMPISTRMrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24154 { 5520 /* pextrb */, X86::PEXTRBrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
24155 { 5520 /* pextrb */, X86::PEXTRBmr, Convert__Mem85_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem8, MCK_FR32, MCK_ImmUnsignedi8 }, },
24156 { 5527 /* pextrd */, X86::PEXTRDrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24157 { 5527 /* pextrd */, X86::PEXTRDmr, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24158 { 5534 /* pextrq */, X86::PEXTRQrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
24159 { 5534 /* pextrq */, X86::PEXTRQmr, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_ImmUnsignedi8 }, },
24161 { 5541 /* pextrw */, X86::PEXTRWrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
24162 { 5541 /* pextrw */, X86::PEXTRWmr, Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem16, MCK_FR32, MCK_ImmUnsignedi8 }, },
24203 { 5683 /* phaddd */, X86::PHADDDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24203 { 5683 /* phaddd */, X86::PHADDDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24204 { 5683 /* phaddd */, X86::PHADDDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24207 { 5690 /* phaddsw */, X86::PHADDSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24207 { 5690 /* phaddsw */, X86::PHADDSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24208 { 5690 /* phaddsw */, X86::PHADDSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24211 { 5698 /* phaddw */, X86::PHADDWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24211 { 5698 /* phaddw */, X86::PHADDWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24212 { 5698 /* phaddw */, X86::PHADDWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24213 { 5705 /* phminposuw */, X86::PHMINPOSUWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24213 { 5705 /* phminposuw */, X86::PHMINPOSUWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24214 { 5705 /* phminposuw */, X86::PHMINPOSUWrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24217 { 5716 /* phsubd */, X86::PHSUBDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24217 { 5716 /* phsubd */, X86::PHSUBDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24218 { 5716 /* phsubd */, X86::PHSUBDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24221 { 5723 /* phsubsw */, X86::PHSUBSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24221 { 5723 /* phsubsw */, X86::PHSUBSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24222 { 5723 /* phsubsw */, X86::PHSUBSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24225 { 5731 /* phsubw */, X86::PHSUBWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24225 { 5731 /* phsubw */, X86::PHSUBWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24226 { 5731 /* phsubw */, X86::PHSUBWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24231 { 5750 /* pinsrb */, X86::PINSRBrr, Convert__Reg1_0__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
24232 { 5750 /* pinsrb */, X86::PINSRBrm, Convert__Reg1_0__Tie0_1_1__Mem85_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem8, MCK_ImmUnsignedi8 }, },
24233 { 5757 /* pinsrd */, X86::PINSRDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_GR32, MCK_ImmUnsignedi8 }, },
24234 { 5757 /* pinsrd */, X86::PINSRDrm, Convert__Reg1_0__Tie0_1_1__Mem325_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
24235 { 5764 /* pinsrq */, X86::PINSRQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_GR64, MCK_ImmUnsignedi8 }, },
24236 { 5764 /* pinsrq */, X86::PINSRQrm, Convert__Reg1_0__Tie0_1_1__Mem645_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, },
24239 { 5771 /* pinsrw */, X86::PINSRWrr, Convert__Reg1_0__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
24240 { 5771 /* pinsrw */, X86::PINSRWrm, Convert__Reg1_0__Tie0_1_1__Mem165_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem16, MCK_ImmUnsignedi8 }, },
24243 { 5778 /* pmaddubsw */, X86::PMADDUBSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24243 { 5778 /* pmaddubsw */, X86::PMADDUBSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24244 { 5778 /* pmaddubsw */, X86::PMADDUBSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24247 { 5788 /* pmaddwd */, X86::PMADDWDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24247 { 5788 /* pmaddwd */, X86::PMADDWDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24248 { 5788 /* pmaddwd */, X86::PMADDWDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24249 { 5796 /* pmaxsb */, X86::PMAXSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24249 { 5796 /* pmaxsb */, X86::PMAXSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24250 { 5796 /* pmaxsb */, X86::PMAXSBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24251 { 5803 /* pmaxsd */, X86::PMAXSDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24251 { 5803 /* pmaxsd */, X86::PMAXSDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24252 { 5803 /* pmaxsd */, X86::PMAXSDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24255 { 5810 /* pmaxsw */, X86::PMAXSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24255 { 5810 /* pmaxsw */, X86::PMAXSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24256 { 5810 /* pmaxsw */, X86::PMAXSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24259 { 5817 /* pmaxub */, X86::PMAXUBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24259 { 5817 /* pmaxub */, X86::PMAXUBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24260 { 5817 /* pmaxub */, X86::PMAXUBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24261 { 5824 /* pmaxud */, X86::PMAXUDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24261 { 5824 /* pmaxud */, X86::PMAXUDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24262 { 5824 /* pmaxud */, X86::PMAXUDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24263 { 5831 /* pmaxuw */, X86::PMAXUWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24263 { 5831 /* pmaxuw */, X86::PMAXUWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24264 { 5831 /* pmaxuw */, X86::PMAXUWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24265 { 5838 /* pminsb */, X86::PMINSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24265 { 5838 /* pminsb */, X86::PMINSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24266 { 5838 /* pminsb */, X86::PMINSBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24267 { 5845 /* pminsd */, X86::PMINSDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24267 { 5845 /* pminsd */, X86::PMINSDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24268 { 5845 /* pminsd */, X86::PMINSDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24271 { 5852 /* pminsw */, X86::PMINSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24271 { 5852 /* pminsw */, X86::PMINSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24272 { 5852 /* pminsw */, X86::PMINSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24275 { 5859 /* pminub */, X86::PMINUBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24275 { 5859 /* pminub */, X86::PMINUBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24276 { 5859 /* pminub */, X86::PMINUBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24277 { 5866 /* pminud */, X86::PMINUDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24277 { 5866 /* pminud */, X86::PMINUDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24278 { 5866 /* pminud */, X86::PMINUDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24279 { 5873 /* pminuw */, X86::PMINUWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24279 { 5873 /* pminuw */, X86::PMINUWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24280 { 5873 /* pminuw */, X86::PMINUWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24282 { 5880 /* pmovmskb */, X86::PMOVMSKBrr, Convert__GR32orGR641_0__Reg1_1, AMFBS_None, { MCK_GR32orGR64, MCK_FR32 }, },
24283 { 5889 /* pmovsxbd */, X86::PMOVSXBDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24283 { 5889 /* pmovsxbd */, X86::PMOVSXBDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24284 { 5889 /* pmovsxbd */, X86::PMOVSXBDrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
24285 { 5898 /* pmovsxbq */, X86::PMOVSXBQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24285 { 5898 /* pmovsxbq */, X86::PMOVSXBQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24286 { 5898 /* pmovsxbq */, X86::PMOVSXBQrm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_FR32, MCK_Mem16 }, },
24287 { 5907 /* pmovsxbw */, X86::PMOVSXBWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24287 { 5907 /* pmovsxbw */, X86::PMOVSXBWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24288 { 5907 /* pmovsxbw */, X86::PMOVSXBWrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
24289 { 5916 /* pmovsxdq */, X86::PMOVSXDQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24289 { 5916 /* pmovsxdq */, X86::PMOVSXDQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24290 { 5916 /* pmovsxdq */, X86::PMOVSXDQrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
24291 { 5925 /* pmovsxwd */, X86::PMOVSXWDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24291 { 5925 /* pmovsxwd */, X86::PMOVSXWDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24292 { 5925 /* pmovsxwd */, X86::PMOVSXWDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
24293 { 5934 /* pmovsxwq */, X86::PMOVSXWQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24293 { 5934 /* pmovsxwq */, X86::PMOVSXWQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24294 { 5934 /* pmovsxwq */, X86::PMOVSXWQrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
24295 { 5943 /* pmovzxbd */, X86::PMOVZXBDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24295 { 5943 /* pmovzxbd */, X86::PMOVZXBDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24296 { 5943 /* pmovzxbd */, X86::PMOVZXBDrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
24297 { 5952 /* pmovzxbq */, X86::PMOVZXBQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24297 { 5952 /* pmovzxbq */, X86::PMOVZXBQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24298 { 5952 /* pmovzxbq */, X86::PMOVZXBQrm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_FR32, MCK_Mem16 }, },
24299 { 5961 /* pmovzxbw */, X86::PMOVZXBWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24299 { 5961 /* pmovzxbw */, X86::PMOVZXBWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24300 { 5961 /* pmovzxbw */, X86::PMOVZXBWrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
24301 { 5970 /* pmovzxdq */, X86::PMOVZXDQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24301 { 5970 /* pmovzxdq */, X86::PMOVZXDQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24302 { 5970 /* pmovzxdq */, X86::PMOVZXDQrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
24303 { 5979 /* pmovzxwd */, X86::PMOVZXWDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24303 { 5979 /* pmovzxwd */, X86::PMOVZXWDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24304 { 5979 /* pmovzxwd */, X86::PMOVZXWDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
24305 { 5988 /* pmovzxwq */, X86::PMOVZXWQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24305 { 5988 /* pmovzxwq */, X86::PMOVZXWQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24306 { 5988 /* pmovzxwq */, X86::PMOVZXWQrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
24307 { 5997 /* pmuldq */, X86::PMULDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24307 { 5997 /* pmuldq */, X86::PMULDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24308 { 5997 /* pmuldq */, X86::PMULDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24311 { 6004 /* pmulhrsw */, X86::PMULHRSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24311 { 6004 /* pmulhrsw */, X86::PMULHRSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24312 { 6004 /* pmulhrsw */, X86::PMULHRSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24317 { 6021 /* pmulhuw */, X86::PMULHUWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24317 { 6021 /* pmulhuw */, X86::PMULHUWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24318 { 6021 /* pmulhuw */, X86::PMULHUWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24321 { 6029 /* pmulhw */, X86::PMULHWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24321 { 6029 /* pmulhw */, X86::PMULHWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24322 { 6029 /* pmulhw */, X86::PMULHWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24323 { 6036 /* pmulld */, X86::PMULLDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24323 { 6036 /* pmulld */, X86::PMULLDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24324 { 6036 /* pmulld */, X86::PMULLDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24327 { 6043 /* pmullw */, X86::PMULLWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24327 { 6043 /* pmullw */, X86::PMULLWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24328 { 6043 /* pmullw */, X86::PMULLWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24331 { 6050 /* pmuludq */, X86::PMULUDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24331 { 6050 /* pmuludq */, X86::PMULUDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24332 { 6050 /* pmuludq */, X86::PMULUDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24364 { 6149 /* por */, X86::PORrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24364 { 6149 /* por */, X86::PORrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24365 { 6149 /* por */, X86::PORrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24375 { 6229 /* psadbw */, X86::PSADBWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24375 { 6229 /* psadbw */, X86::PSADBWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24376 { 6229 /* psadbw */, X86::PSADBWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24379 { 6236 /* pshufb */, X86::PSHUFBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24379 { 6236 /* pshufb */, X86::PSHUFBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24380 { 6236 /* pshufb */, X86::PSHUFBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24381 { 6243 /* pshufd */, X86::PSHUFDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24381 { 6243 /* pshufd */, X86::PSHUFDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24382 { 6243 /* pshufd */, X86::PSHUFDmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24383 { 6250 /* pshufhw */, X86::PSHUFHWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24383 { 6250 /* pshufhw */, X86::PSHUFHWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24384 { 6250 /* pshufhw */, X86::PSHUFHWmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24385 { 6258 /* pshuflw */, X86::PSHUFLWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24385 { 6258 /* pshuflw */, X86::PSHUFLWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24386 { 6258 /* pshuflw */, X86::PSHUFLWmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24391 { 6273 /* psignb */, X86::PSIGNBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24391 { 6273 /* psignb */, X86::PSIGNBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24392 { 6273 /* psignb */, X86::PSIGNBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24395 { 6280 /* psignd */, X86::PSIGNDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24395 { 6280 /* psignd */, X86::PSIGNDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24396 { 6280 /* psignd */, X86::PSIGNDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24399 { 6287 /* psignw */, X86::PSIGNWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24399 { 6287 /* psignw */, X86::PSIGNWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24400 { 6287 /* psignw */, X86::PSIGNWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24404 { 6294 /* pslld */, X86::PSLLDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24404 { 6294 /* pslld */, X86::PSLLDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24405 { 6294 /* pslld */, X86::PSLLDri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_FR32, MCK_ImmUnsignedi8 }, },
24406 { 6294 /* pslld */, X86::PSLLDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24407 { 6300 /* pslldq */, X86::PSLLDQri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_FR32, MCK_ImmUnsignedi8 }, },
24411 { 6307 /* psllq */, X86::PSLLQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24411 { 6307 /* psllq */, X86::PSLLQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24412 { 6307 /* psllq */, X86::PSLLQri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_FR32, MCK_ImmUnsignedi8 }, },
24413 { 6307 /* psllq */, X86::PSLLQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24417 { 6313 /* psllw */, X86::PSLLWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24417 { 6313 /* psllw */, X86::PSLLWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24418 { 6313 /* psllw */, X86::PSLLWri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_FR32, MCK_ImmUnsignedi8 }, },
24419 { 6313 /* psllw */, X86::PSLLWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24423 { 6319 /* psrad */, X86::PSRADrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24423 { 6319 /* psrad */, X86::PSRADrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24424 { 6319 /* psrad */, X86::PSRADri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_FR32, MCK_ImmUnsignedi8 }, },
24425 { 6319 /* psrad */, X86::PSRADrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24429 { 6325 /* psraw */, X86::PSRAWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24429 { 6325 /* psraw */, X86::PSRAWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24430 { 6325 /* psraw */, X86::PSRAWri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_FR32, MCK_ImmUnsignedi8 }, },
24431 { 6325 /* psraw */, X86::PSRAWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24435 { 6331 /* psrld */, X86::PSRLDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24435 { 6331 /* psrld */, X86::PSRLDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24436 { 6331 /* psrld */, X86::PSRLDri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_FR32, MCK_ImmUnsignedi8 }, },
24437 { 6331 /* psrld */, X86::PSRLDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24438 { 6337 /* psrldq */, X86::PSRLDQri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_FR32, MCK_ImmUnsignedi8 }, },
24442 { 6344 /* psrlq */, X86::PSRLQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24442 { 6344 /* psrlq */, X86::PSRLQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24443 { 6344 /* psrlq */, X86::PSRLQri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_FR32, MCK_ImmUnsignedi8 }, },
24444 { 6344 /* psrlq */, X86::PSRLQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24448 { 6350 /* psrlw */, X86::PSRLWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24448 { 6350 /* psrlw */, X86::PSRLWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24449 { 6350 /* psrlw */, X86::PSRLWri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, AMFBS_None, { MCK_FR32, MCK_ImmUnsignedi8 }, },
24450 { 6350 /* psrlw */, X86::PSRLWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24453 { 6356 /* psubb */, X86::PSUBBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24453 { 6356 /* psubb */, X86::PSUBBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24454 { 6356 /* psubb */, X86::PSUBBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24457 { 6362 /* psubd */, X86::PSUBDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24457 { 6362 /* psubd */, X86::PSUBDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24458 { 6362 /* psubd */, X86::PSUBDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24461 { 6368 /* psubq */, X86::PSUBQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24461 { 6368 /* psubq */, X86::PSUBQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24462 { 6368 /* psubq */, X86::PSUBQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24465 { 6374 /* psubsb */, X86::PSUBSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24465 { 6374 /* psubsb */, X86::PSUBSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24466 { 6374 /* psubsb */, X86::PSUBSBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24469 { 6381 /* psubsw */, X86::PSUBSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24469 { 6381 /* psubsw */, X86::PSUBSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24470 { 6381 /* psubsw */, X86::PSUBSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24473 { 6388 /* psubusb */, X86::PSUBUSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24473 { 6388 /* psubusb */, X86::PSUBUSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24474 { 6388 /* psubusb */, X86::PSUBUSBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24477 { 6396 /* psubusw */, X86::PSUBUSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24477 { 6396 /* psubusw */, X86::PSUBUSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24478 { 6396 /* psubusw */, X86::PSUBUSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24481 { 6404 /* psubw */, X86::PSUBWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24481 { 6404 /* psubw */, X86::PSUBWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24482 { 6404 /* psubw */, X86::PSUBWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24485 { 6417 /* ptest */, X86::PTESTrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24485 { 6417 /* ptest */, X86::PTESTrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24486 { 6417 /* ptest */, X86::PTESTrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24493 { 6449 /* punpckhbw */, X86::PUNPCKHBWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24493 { 6449 /* punpckhbw */, X86::PUNPCKHBWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24494 { 6449 /* punpckhbw */, X86::PUNPCKHBWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24497 { 6459 /* punpckhdq */, X86::PUNPCKHDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24497 { 6459 /* punpckhdq */, X86::PUNPCKHDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24498 { 6459 /* punpckhdq */, X86::PUNPCKHDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24499 { 6469 /* punpckhqdq */, X86::PUNPCKHQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24499 { 6469 /* punpckhqdq */, X86::PUNPCKHQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24500 { 6469 /* punpckhqdq */, X86::PUNPCKHQDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24503 { 6480 /* punpckhwd */, X86::PUNPCKHWDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24503 { 6480 /* punpckhwd */, X86::PUNPCKHWDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24504 { 6480 /* punpckhwd */, X86::PUNPCKHWDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24507 { 6490 /* punpcklbw */, X86::PUNPCKLBWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24507 { 6490 /* punpcklbw */, X86::PUNPCKLBWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24508 { 6490 /* punpcklbw */, X86::PUNPCKLBWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24511 { 6500 /* punpckldq */, X86::PUNPCKLDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24511 { 6500 /* punpckldq */, X86::PUNPCKLDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24512 { 6500 /* punpckldq */, X86::PUNPCKLDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24513 { 6510 /* punpcklqdq */, X86::PUNPCKLQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24513 { 6510 /* punpcklqdq */, X86::PUNPCKLQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24514 { 6510 /* punpcklqdq */, X86::PUNPCKLQDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24517 { 6521 /* punpcklwd */, X86::PUNPCKLWDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24517 { 6521 /* punpcklwd */, X86::PUNPCKLWDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24518 { 6521 /* punpcklwd */, X86::PUNPCKLWDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24552 { 6602 /* pxor */, X86::PXORrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24552 { 6602 /* pxor */, X86::PXORrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24553 { 6602 /* pxor */, X86::PXORrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24578 { 6631 /* rcpps */, X86::RCPPSr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24578 { 6631 /* rcpps */, X86::RCPPSr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24579 { 6631 /* rcpps */, X86::RCPPSm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24580 { 6637 /* rcpss */, X86::RCPSSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24580 { 6637 /* rcpss */, X86::RCPSSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24581 { 6637 /* rcpss */, X86::RCPSSm_Int, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
24692 { 6950 /* roundpd */, X86::ROUNDPDr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24692 { 6950 /* roundpd */, X86::ROUNDPDr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24693 { 6950 /* roundpd */, X86::ROUNDPDm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24694 { 6958 /* roundps */, X86::ROUNDPSr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24694 { 6958 /* roundps */, X86::ROUNDPSr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24695 { 6958 /* roundps */, X86::ROUNDPSm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24696 { 6966 /* roundsd */, X86::ROUNDSDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24696 { 6966 /* roundsd */, X86::ROUNDSDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24697 { 6966 /* roundsd */, X86::ROUNDSDm_Int, Convert__Reg1_0__Tie0_1_1__Mem645_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, },
24698 { 6974 /* roundss */, X86::ROUNDSSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24698 { 6974 /* roundss */, X86::ROUNDSSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24699 { 6974 /* roundss */, X86::ROUNDSSm_Int, Convert__Reg1_0__Tie0_1_1__Mem325_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
24701 { 6986 /* rsqrtps */, X86::RSQRTPSr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24701 { 6986 /* rsqrtps */, X86::RSQRTPSr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24702 { 6986 /* rsqrtps */, X86::RSQRTPSm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24703 { 6994 /* rsqrtss */, X86::RSQRTSSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24703 { 6994 /* rsqrtss */, X86::RSQRTSSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24704 { 6994 /* rsqrtss */, X86::RSQRTSSm_Int, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
24823 { 7266 /* sha1msg1 */, X86::SHA1MSG1rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24823 { 7266 /* sha1msg1 */, X86::SHA1MSG1rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24824 { 7266 /* sha1msg1 */, X86::SHA1MSG1rm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24825 { 7275 /* sha1msg2 */, X86::SHA1MSG2rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24825 { 7275 /* sha1msg2 */, X86::SHA1MSG2rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24826 { 7275 /* sha1msg2 */, X86::SHA1MSG2rm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24827 { 7284 /* sha1nexte */, X86::SHA1NEXTErr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24827 { 7284 /* sha1nexte */, X86::SHA1NEXTErr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24828 { 7284 /* sha1nexte */, X86::SHA1NEXTErm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24829 { 7294 /* sha1rnds4 */, X86::SHA1RNDS4rri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24829 { 7294 /* sha1rnds4 */, X86::SHA1RNDS4rri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24830 { 7294 /* sha1rnds4 */, X86::SHA1RNDS4rmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24831 { 7304 /* sha256msg1 */, X86::SHA256MSG1rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24831 { 7304 /* sha256msg1 */, X86::SHA256MSG1rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24832 { 7304 /* sha256msg1 */, X86::SHA256MSG1rm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24833 { 7315 /* sha256msg2 */, X86::SHA256MSG2rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24833 { 7315 /* sha256msg2 */, X86::SHA256MSG2rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24834 { 7315 /* sha256msg2 */, X86::SHA256MSG2rm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24835 { 7326 /* sha256rnds2 */, X86::SHA256RNDS2rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24835 { 7326 /* sha256rnds2 */, X86::SHA256RNDS2rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24836 { 7326 /* sha256rnds2 */, X86::SHA256RNDS2rm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24837 { 7326 /* sha256rnds2 */, X86::SHA256RNDS2rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_XMM0 }, },
24837 { 7326 /* sha256rnds2 */, X86::SHA256RNDS2rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_XMM0 }, },
24838 { 7326 /* sha256rnds2 */, X86::SHA256RNDS2rm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_XMM0 }, },
24931 { 7466 /* shufpd */, X86::SHUFPDrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24931 { 7466 /* shufpd */, X86::SHUFPDrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24932 { 7466 /* shufpd */, X86::SHUFPDrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24933 { 7473 /* shufps */, X86::SHUFPSrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24933 { 7473 /* shufps */, X86::SHUFPSrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24934 { 7473 /* shufps */, X86::SHUFPSrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24950 { 7569 /* sqrtpd */, X86::SQRTPDr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24950 { 7569 /* sqrtpd */, X86::SQRTPDr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24951 { 7569 /* sqrtpd */, X86::SQRTPDm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24952 { 7576 /* sqrtps */, X86::SQRTPSr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24952 { 7576 /* sqrtps */, X86::SQRTPSr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24953 { 7576 /* sqrtps */, X86::SQRTPSm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
24954 { 7583 /* sqrtsd */, X86::SQRTSDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24954 { 7583 /* sqrtsd */, X86::SQRTSDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24955 { 7583 /* sqrtsd */, X86::SQRTSDm_Int, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
24956 { 7590 /* sqrtss */, X86::SQRTSSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24956 { 7590 /* sqrtss */, X86::SQRTSSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
24957 { 7590 /* sqrtss */, X86::SQRTSSm_Int, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
25018 { 7698 /* subpd */, X86::SUBPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25018 { 7698 /* subpd */, X86::SUBPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25019 { 7698 /* subpd */, X86::SUBPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
25020 { 7704 /* subps */, X86::SUBPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25020 { 7704 /* subps */, X86::SUBPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25021 { 7704 /* subps */, X86::SUBPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
25022 { 7715 /* subsd */, X86::SUBSDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25022 { 7715 /* subsd */, X86::SUBSDrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25023 { 7715 /* subsd */, X86::SUBSDrm_Int, Convert__Reg1_0__Tie0_1_1__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
25024 { 7721 /* subss */, X86::SUBSSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25024 { 7721 /* subss */, X86::SUBSSrr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25025 { 7721 /* subss */, X86::SUBSSrm_Int, Convert__Reg1_0__Tie0_1_1__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
25072 { 7911 /* ucomisd */, X86::UCOMISDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25072 { 7911 /* ucomisd */, X86::UCOMISDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25073 { 7911 /* ucomisd */, X86::UCOMISDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
25074 { 7919 /* ucomiss */, X86::UCOMISSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25074 { 7919 /* ucomiss */, X86::UCOMISSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25075 { 7919 /* ucomiss */, X86::UCOMISSrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
25082 { 7952 /* unpckhpd */, X86::UNPCKHPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25082 { 7952 /* unpckhpd */, X86::UNPCKHPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25083 { 7952 /* unpckhpd */, X86::UNPCKHPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
25084 { 7961 /* unpckhps */, X86::UNPCKHPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25084 { 7961 /* unpckhps */, X86::UNPCKHPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25085 { 7961 /* unpckhps */, X86::UNPCKHPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
25086 { 7970 /* unpcklpd */, X86::UNPCKLPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25086 { 7970 /* unpcklpd */, X86::UNPCKLPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25087 { 7970 /* unpcklpd */, X86::UNPCKLPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
25088 { 7979 /* unpcklps */, X86::UNPCKLPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25088 { 7979 /* unpcklps */, X86::UNPCKLPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25089 { 7979 /* unpcklps */, X86::UNPCKLPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
25102 { 8030 /* vaddpd */, X86::VADDPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25102 { 8030 /* vaddpd */, X86::VADDPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25102 { 8030 /* vaddpd */, X86::VADDPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25103 { 8030 /* vaddpd */, X86::VADDPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25103 { 8030 /* vaddpd */, X86::VADDPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25136 { 8037 /* vaddps */, X86::VADDPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25136 { 8037 /* vaddps */, X86::VADDPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25136 { 8037 /* vaddps */, X86::VADDPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25137 { 8037 /* vaddps */, X86::VADDPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25137 { 8037 /* vaddps */, X86::VADDPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25170 { 8044 /* vaddsd */, X86::VADDSDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25170 { 8044 /* vaddsd */, X86::VADDSDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25170 { 8044 /* vaddsd */, X86::VADDSDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25171 { 8044 /* vaddsd */, X86::VADDSDrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
25171 { 8044 /* vaddsd */, X86::VADDSDrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
25181 { 8051 /* vaddss */, X86::VADDSSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25181 { 8051 /* vaddss */, X86::VADDSSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25181 { 8051 /* vaddss */, X86::VADDSSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25182 { 8051 /* vaddss */, X86::VADDSSrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
25182 { 8051 /* vaddss */, X86::VADDSSrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
25192 { 8058 /* vaddsubpd */, X86::VADDSUBPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25192 { 8058 /* vaddsubpd */, X86::VADDSUBPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25192 { 8058 /* vaddsubpd */, X86::VADDSUBPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25193 { 8058 /* vaddsubpd */, X86::VADDSUBPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25193 { 8058 /* vaddsubpd */, X86::VADDSUBPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25196 { 8068 /* vaddsubps */, X86::VADDSUBPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25196 { 8068 /* vaddsubps */, X86::VADDSUBPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25196 { 8068 /* vaddsubps */, X86::VADDSUBPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25197 { 8068 /* vaddsubps */, X86::VADDSUBPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25197 { 8068 /* vaddsubps */, X86::VADDSUBPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25200 { 8078 /* vaesdec */, X86::VAESDECrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25200 { 8078 /* vaesdec */, X86::VAESDECrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25200 { 8078 /* vaesdec */, X86::VAESDECrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25201 { 8078 /* vaesdec */, X86::VAESDECrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25201 { 8078 /* vaesdec */, X86::VAESDECrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25210 { 8086 /* vaesdeclast */, X86::VAESDECLASTrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25210 { 8086 /* vaesdeclast */, X86::VAESDECLASTrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25210 { 8086 /* vaesdeclast */, X86::VAESDECLASTrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25211 { 8086 /* vaesdeclast */, X86::VAESDECLASTrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25211 { 8086 /* vaesdeclast */, X86::VAESDECLASTrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25220 { 8098 /* vaesenc */, X86::VAESENCrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25220 { 8098 /* vaesenc */, X86::VAESENCrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25220 { 8098 /* vaesenc */, X86::VAESENCrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25221 { 8098 /* vaesenc */, X86::VAESENCrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25221 { 8098 /* vaesenc */, X86::VAESENCrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25230 { 8106 /* vaesenclast */, X86::VAESENCLASTrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25230 { 8106 /* vaesenclast */, X86::VAESENCLASTrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25230 { 8106 /* vaesenclast */, X86::VAESENCLASTrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25231 { 8106 /* vaesenclast */, X86::VAESENCLASTrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25231 { 8106 /* vaesenclast */, X86::VAESENCLASTrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25240 { 8118 /* vaesimc */, X86::VAESIMCrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25240 { 8118 /* vaesimc */, X86::VAESIMCrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25241 { 8118 /* vaesimc */, X86::VAESIMCrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
25242 { 8126 /* vaeskeygenassist */, X86::VAESKEYGENASSIST128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
25242 { 8126 /* vaeskeygenassist */, X86::VAESKEYGENASSIST128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
25243 { 8126 /* vaeskeygenassist */, X86::VAESKEYGENASSIST128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25298 { 8159 /* vandnpd */, X86::VANDNPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25298 { 8159 /* vandnpd */, X86::VANDNPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25298 { 8159 /* vandnpd */, X86::VANDNPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25299 { 8159 /* vandnpd */, X86::VANDNPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25299 { 8159 /* vandnpd */, X86::VANDNPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25329 { 8167 /* vandnps */, X86::VANDNPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25329 { 8167 /* vandnps */, X86::VANDNPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25329 { 8167 /* vandnps */, X86::VANDNPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25330 { 8167 /* vandnps */, X86::VANDNPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25330 { 8167 /* vandnps */, X86::VANDNPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25360 { 8175 /* vandpd */, X86::VANDPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25360 { 8175 /* vandpd */, X86::VANDPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25360 { 8175 /* vandpd */, X86::VANDPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25361 { 8175 /* vandpd */, X86::VANDPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25361 { 8175 /* vandpd */, X86::VANDPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25391 { 8182 /* vandps */, X86::VANDPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25391 { 8182 /* vandps */, X86::VANDPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25391 { 8182 /* vandps */, X86::VANDPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25392 { 8182 /* vandps */, X86::VANDPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25392 { 8182 /* vandps */, X86::VANDPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25476 { 8209 /* vblendpd */, X86::VBLENDPDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
25476 { 8209 /* vblendpd */, X86::VBLENDPDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
25476 { 8209 /* vblendpd */, X86::VBLENDPDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
25477 { 8209 /* vblendpd */, X86::VBLENDPDrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25477 { 8209 /* vblendpd */, X86::VBLENDPDrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25480 { 8218 /* vblendps */, X86::VBLENDPSrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
25480 { 8218 /* vblendps */, X86::VBLENDPSrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
25480 { 8218 /* vblendps */, X86::VBLENDPSrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
25481 { 8218 /* vblendps */, X86::VBLENDPSrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25481 { 8218 /* vblendps */, X86::VBLENDPSrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25484 { 8227 /* vblendvpd */, X86::VBLENDVPDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
25484 { 8227 /* vblendvpd */, X86::VBLENDVPDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
25484 { 8227 /* vblendvpd */, X86::VBLENDVPDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
25484 { 8227 /* vblendvpd */, X86::VBLENDVPDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
25485 { 8227 /* vblendvpd */, X86::VBLENDVPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
25485 { 8227 /* vblendvpd */, X86::VBLENDVPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
25485 { 8227 /* vblendvpd */, X86::VBLENDVPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
25488 { 8237 /* vblendvps */, X86::VBLENDVPSrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
25488 { 8237 /* vblendvps */, X86::VBLENDVPSrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
25488 { 8237 /* vblendvps */, X86::VBLENDVPSrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
25488 { 8237 /* vblendvps */, X86::VBLENDVPSrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
25489 { 8237 /* vblendvps */, X86::VBLENDVPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
25489 { 8237 /* vblendvps */, X86::VBLENDVPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
25489 { 8237 /* vblendvps */, X86::VBLENDVPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
25560 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
25574 { 8450 /* vbroadcastss */, X86::VBROADCASTSSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25574 { 8450 /* vbroadcastss */, X86::VBROADCASTSSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25575 { 8450 /* vbroadcastss */, X86::VBROADCASTSSrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
25576 { 8450 /* vbroadcastss */, X86::VBROADCASTSSYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
25602 { 8463 /* vcmppd */, X86::VCMPPDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
25602 { 8463 /* vcmppd */, X86::VCMPPDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
25602 { 8463 /* vcmppd */, X86::VCMPPDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
25603 { 8463 /* vcmppd */, X86::VCMPPDrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25603 { 8463 /* vcmppd */, X86::VCMPPDrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25626 { 8470 /* vcmpps */, X86::VCMPPSrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
25626 { 8470 /* vcmpps */, X86::VCMPPSrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
25626 { 8470 /* vcmpps */, X86::VCMPPSrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
25627 { 8470 /* vcmpps */, X86::VCMPPSrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25627 { 8470 /* vcmpps */, X86::VCMPPSrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25646 { 8477 /* vcmpsd */, X86::VCMPSDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
25646 { 8477 /* vcmpsd */, X86::VCMPSDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
25646 { 8477 /* vcmpsd */, X86::VCMPSDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
25647 { 8477 /* vcmpsd */, X86::VCMPSDrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, },
25647 { 8477 /* vcmpsd */, X86::VCMPSDrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, },
25654 { 8484 /* vcmpss */, X86::VCMPSSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
25654 { 8484 /* vcmpss */, X86::VCMPSSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
25654 { 8484 /* vcmpss */, X86::VCMPSSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
25655 { 8484 /* vcmpss */, X86::VCMPSSrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
25655 { 8484 /* vcmpss */, X86::VCMPSSrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
25660 { 8491 /* vcomisd */, X86::VCOMISDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25660 { 8491 /* vcomisd */, X86::VCOMISDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25661 { 8491 /* vcomisd */, X86::VCOMISDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
25665 { 8499 /* vcomiss */, X86::VCOMISSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25665 { 8499 /* vcomiss */, X86::VCOMISSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25666 { 8499 /* vcomiss */, X86::VCOMISSrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
25700 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25700 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25701 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
25702 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
25731 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25731 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25732 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
25823 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25823 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25824 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
25825 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
25826 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_FR32, MCK_Mem256 }, },
25857 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25857 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25858 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
25859 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
25860 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_FR32, MCK_Mem256 }, },
25981 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25981 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
25982 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
25983 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
26006 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
26006 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
26007 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
26040 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
26040 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
26041 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
26042 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
26074 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
26074 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
26075 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHYrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_VR256, MCK_ImmUnsignedi8 }, },
26082 { 8760 /* vcvtps2ph */, X86::VCVTPS2PHmr, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_ImmUnsignedi8 }, },
26246 { 8844 /* vcvtsd2si */, X86::VCVTSD2SIrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
26250 { 8844 /* vcvtsd2si */, X86::VCVTSD2SI64rr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
26256 { 8876 /* vcvtsd2ss */, X86::VCVTSD2SSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26256 { 8876 /* vcvtsd2ss */, X86::VCVTSD2SSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26256 { 8876 /* vcvtsd2ss */, X86::VCVTSD2SSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26257 { 8876 /* vcvtsd2ss */, X86::VCVTSD2SSrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
26257 { 8876 /* vcvtsd2ss */, X86::VCVTSD2SSrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
26273 { 8921 /* vcvtsi2sd */, X86::VCVTSI2SDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_GR32 }, },
26273 { 8921 /* vcvtsi2sd */, X86::VCVTSI2SDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_GR32 }, },
26274 { 8921 /* vcvtsi2sd */, X86::VCVTSI642SDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_GR64 }, },
26274 { 8921 /* vcvtsi2sd */, X86::VCVTSI642SDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_GR64 }, },
26275 { 8921 /* vcvtsi2sd */, X86::VCVTSI2SDrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
26275 { 8921 /* vcvtsi2sd */, X86::VCVTSI2SDrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
26276 { 8921 /* vcvtsi2sd */, X86::VCVTSI642SDrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
26276 { 8921 /* vcvtsi2sd */, X86::VCVTSI642SDrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
26282 { 8953 /* vcvtsi2ss */, X86::VCVTSI2SSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_GR32 }, },
26282 { 8953 /* vcvtsi2ss */, X86::VCVTSI2SSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_GR32 }, },
26283 { 8953 /* vcvtsi2ss */, X86::VCVTSI642SSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_GR64 }, },
26283 { 8953 /* vcvtsi2ss */, X86::VCVTSI642SSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_GR64 }, },
26284 { 8953 /* vcvtsi2ss */, X86::VCVTSI2SSrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
26284 { 8953 /* vcvtsi2ss */, X86::VCVTSI2SSrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
26285 { 8953 /* vcvtsi2ss */, X86::VCVTSI642SSrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
26285 { 8953 /* vcvtsi2ss */, X86::VCVTSI642SSrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
26292 { 8985 /* vcvtss2sd */, X86::VCVTSS2SDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26292 { 8985 /* vcvtss2sd */, X86::VCVTSS2SDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26292 { 8985 /* vcvtss2sd */, X86::VCVTSS2SDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26293 { 8985 /* vcvtss2sd */, X86::VCVTSS2SDrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
26293 { 8985 /* vcvtss2sd */, X86::VCVTSS2SDrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
26303 { 8995 /* vcvtss2si */, X86::VCVTSS2SIrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
26307 { 8995 /* vcvtss2si */, X86::VCVTSS2SI64rr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
26319 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
26319 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
26320 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_VR256 }, },
26321 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
26322 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQYrm, Convert__Reg1_0__Mem2565_1, AMFBS_None, { MCK_FR32, MCK_Mem256 }, },
26443 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
26443 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
26444 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
26567 { 9204 /* vcvttsd2si */, X86::VCVTTSD2SIrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
26571 { 9204 /* vcvttsd2si */, X86::VCVTTSD2SI64rr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
26583 { 9277 /* vcvttss2si */, X86::VCVTTSS2SIrr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
26587 { 9277 /* vcvttss2si */, X86::VCVTTSS2SI64rr_Int, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
26745 { 9498 /* vdivpd */, X86::VDIVPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26745 { 9498 /* vdivpd */, X86::VDIVPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26745 { 9498 /* vdivpd */, X86::VDIVPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26746 { 9498 /* vdivpd */, X86::VDIVPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26746 { 9498 /* vdivpd */, X86::VDIVPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26779 { 9505 /* vdivps */, X86::VDIVPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26779 { 9505 /* vdivps */, X86::VDIVPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26779 { 9505 /* vdivps */, X86::VDIVPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26780 { 9505 /* vdivps */, X86::VDIVPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26780 { 9505 /* vdivps */, X86::VDIVPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26813 { 9512 /* vdivsd */, X86::VDIVSDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26813 { 9512 /* vdivsd */, X86::VDIVSDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26813 { 9512 /* vdivsd */, X86::VDIVSDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26814 { 9512 /* vdivsd */, X86::VDIVSDrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
26814 { 9512 /* vdivsd */, X86::VDIVSDrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
26824 { 9519 /* vdivss */, X86::VDIVSSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26824 { 9519 /* vdivss */, X86::VDIVSSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26824 { 9519 /* vdivss */, X86::VDIVSSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26825 { 9519 /* vdivss */, X86::VDIVSSrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
26825 { 9519 /* vdivss */, X86::VDIVSSrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
26862 { 9536 /* vdppd */, X86::VDPPDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
26862 { 9536 /* vdppd */, X86::VDPPDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
26862 { 9536 /* vdppd */, X86::VDPPDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
26863 { 9536 /* vdppd */, X86::VDPPDrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
26863 { 9536 /* vdppd */, X86::VDPPDrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
26864 { 9542 /* vdpps */, X86::VDPPSrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
26864 { 9542 /* vdpps */, X86::VDPPSrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
26864 { 9542 /* vdpps */, X86::VDPPSrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
26865 { 9542 /* vdpps */, X86::VDPPSrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
26865 { 9542 /* vdpps */, X86::VDPPSrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
26932 { 9594 /* vextractf128 */, X86::VEXTRACTF128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_VR256, MCK_ImmUnsignedi8 }, },
26964 { 9663 /* vextracti128 */, X86::VEXTRACTI128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_VR256, MCK_ImmUnsignedi8 }, },
26997 { 9732 /* vextractps */, X86::VEXTRACTPSrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
26998 { 9732 /* vextractps */, X86::VEXTRACTPSmr, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_ImmUnsignedi8 }, },
27078 { 9791 /* vfmadd132pd */, X86::VFMADD132PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27078 { 9791 /* vfmadd132pd */, X86::VFMADD132PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27078 { 9791 /* vfmadd132pd */, X86::VFMADD132PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27079 { 9791 /* vfmadd132pd */, X86::VFMADD132PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27079 { 9791 /* vfmadd132pd */, X86::VFMADD132PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27112 { 9803 /* vfmadd132ps */, X86::VFMADD132PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27112 { 9803 /* vfmadd132ps */, X86::VFMADD132PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27112 { 9803 /* vfmadd132ps */, X86::VFMADD132PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27113 { 9803 /* vfmadd132ps */, X86::VFMADD132PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27113 { 9803 /* vfmadd132ps */, X86::VFMADD132PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27146 { 9815 /* vfmadd132sd */, X86::VFMADD132SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27146 { 9815 /* vfmadd132sd */, X86::VFMADD132SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27146 { 9815 /* vfmadd132sd */, X86::VFMADD132SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27147 { 9815 /* vfmadd132sd */, X86::VFMADD132SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27147 { 9815 /* vfmadd132sd */, X86::VFMADD132SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27157 { 9827 /* vfmadd132ss */, X86::VFMADD132SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27157 { 9827 /* vfmadd132ss */, X86::VFMADD132SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27157 { 9827 /* vfmadd132ss */, X86::VFMADD132SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27158 { 9827 /* vfmadd132ss */, X86::VFMADD132SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27158 { 9827 /* vfmadd132ss */, X86::VFMADD132SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27168 { 9839 /* vfmadd213pd */, X86::VFMADD213PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27168 { 9839 /* vfmadd213pd */, X86::VFMADD213PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27168 { 9839 /* vfmadd213pd */, X86::VFMADD213PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27169 { 9839 /* vfmadd213pd */, X86::VFMADD213PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27169 { 9839 /* vfmadd213pd */, X86::VFMADD213PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27202 { 9851 /* vfmadd213ps */, X86::VFMADD213PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27202 { 9851 /* vfmadd213ps */, X86::VFMADD213PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27202 { 9851 /* vfmadd213ps */, X86::VFMADD213PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27203 { 9851 /* vfmadd213ps */, X86::VFMADD213PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27203 { 9851 /* vfmadd213ps */, X86::VFMADD213PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27236 { 9863 /* vfmadd213sd */, X86::VFMADD213SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27236 { 9863 /* vfmadd213sd */, X86::VFMADD213SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27236 { 9863 /* vfmadd213sd */, X86::VFMADD213SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27237 { 9863 /* vfmadd213sd */, X86::VFMADD213SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27237 { 9863 /* vfmadd213sd */, X86::VFMADD213SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27247 { 9875 /* vfmadd213ss */, X86::VFMADD213SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27247 { 9875 /* vfmadd213ss */, X86::VFMADD213SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27247 { 9875 /* vfmadd213ss */, X86::VFMADD213SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27248 { 9875 /* vfmadd213ss */, X86::VFMADD213SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27248 { 9875 /* vfmadd213ss */, X86::VFMADD213SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27258 { 9887 /* vfmadd231pd */, X86::VFMADD231PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27258 { 9887 /* vfmadd231pd */, X86::VFMADD231PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27258 { 9887 /* vfmadd231pd */, X86::VFMADD231PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27259 { 9887 /* vfmadd231pd */, X86::VFMADD231PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27259 { 9887 /* vfmadd231pd */, X86::VFMADD231PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27292 { 9899 /* vfmadd231ps */, X86::VFMADD231PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27292 { 9899 /* vfmadd231ps */, X86::VFMADD231PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27292 { 9899 /* vfmadd231ps */, X86::VFMADD231PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27293 { 9899 /* vfmadd231ps */, X86::VFMADD231PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27293 { 9899 /* vfmadd231ps */, X86::VFMADD231PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27326 { 9911 /* vfmadd231sd */, X86::VFMADD231SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27326 { 9911 /* vfmadd231sd */, X86::VFMADD231SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27326 { 9911 /* vfmadd231sd */, X86::VFMADD231SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27327 { 9911 /* vfmadd231sd */, X86::VFMADD231SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27327 { 9911 /* vfmadd231sd */, X86::VFMADD231SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27337 { 9923 /* vfmadd231ss */, X86::VFMADD231SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27337 { 9923 /* vfmadd231ss */, X86::VFMADD231SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27337 { 9923 /* vfmadd231ss */, X86::VFMADD231SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27338 { 9923 /* vfmadd231ss */, X86::VFMADD231SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27338 { 9923 /* vfmadd231ss */, X86::VFMADD231SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27348 { 9935 /* vfmaddpd */, X86::VFMADDPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27348 { 9935 /* vfmaddpd */, X86::VFMADDPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27348 { 9935 /* vfmaddpd */, X86::VFMADDPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27348 { 9935 /* vfmaddpd */, X86::VFMADDPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27349 { 9935 /* vfmaddpd */, X86::VFMADDPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27349 { 9935 /* vfmaddpd */, X86::VFMADDPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27349 { 9935 /* vfmaddpd */, X86::VFMADDPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27350 { 9935 /* vfmaddpd */, X86::VFMADDPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
27350 { 9935 /* vfmaddpd */, X86::VFMADDPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
27350 { 9935 /* vfmaddpd */, X86::VFMADDPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
27354 { 9944 /* vfmaddps */, X86::VFMADDPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27354 { 9944 /* vfmaddps */, X86::VFMADDPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27354 { 9944 /* vfmaddps */, X86::VFMADDPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27354 { 9944 /* vfmaddps */, X86::VFMADDPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27355 { 9944 /* vfmaddps */, X86::VFMADDPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27355 { 9944 /* vfmaddps */, X86::VFMADDPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27355 { 9944 /* vfmaddps */, X86::VFMADDPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27356 { 9944 /* vfmaddps */, X86::VFMADDPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
27356 { 9944 /* vfmaddps */, X86::VFMADDPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
27356 { 9944 /* vfmaddps */, X86::VFMADDPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
27360 { 9953 /* vfmaddsd */, X86::VFMADDSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27360 { 9953 /* vfmaddsd */, X86::VFMADDSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27360 { 9953 /* vfmaddsd */, X86::VFMADDSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27360 { 9953 /* vfmaddsd */, X86::VFMADDSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27361 { 9953 /* vfmaddsd */, X86::VFMADDSD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27361 { 9953 /* vfmaddsd */, X86::VFMADDSD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27361 { 9953 /* vfmaddsd */, X86::VFMADDSD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27362 { 9953 /* vfmaddsd */, X86::VFMADDSD4mr, Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_FR32 }, },
27362 { 9953 /* vfmaddsd */, X86::VFMADDSD4mr, Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_FR32 }, },
27362 { 9953 /* vfmaddsd */, X86::VFMADDSD4mr, Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_FR32 }, },
27363 { 9962 /* vfmaddss */, X86::VFMADDSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27363 { 9962 /* vfmaddss */, X86::VFMADDSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27363 { 9962 /* vfmaddss */, X86::VFMADDSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27363 { 9962 /* vfmaddss */, X86::VFMADDSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27364 { 9962 /* vfmaddss */, X86::VFMADDSS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27364 { 9962 /* vfmaddss */, X86::VFMADDSS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27364 { 9962 /* vfmaddss */, X86::VFMADDSS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27365 { 9962 /* vfmaddss */, X86::VFMADDSS4mr, Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_FR32 }, },
27365 { 9962 /* vfmaddss */, X86::VFMADDSS4mr, Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_FR32 }, },
27365 { 9962 /* vfmaddss */, X86::VFMADDSS4mr, Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_FR32 }, },
27366 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27366 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27366 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27367 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27367 { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27400 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27400 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27400 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27401 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27401 { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27434 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27434 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27434 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27435 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27435 { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27468 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27468 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27468 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27469 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27469 { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27502 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27502 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27502 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27503 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27503 { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27536 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27536 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27536 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27537 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27537 { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27570 { 10061 /* vfmaddsubpd */, X86::VFMADDSUBPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27570 { 10061 /* vfmaddsubpd */, X86::VFMADDSUBPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27570 { 10061 /* vfmaddsubpd */, X86::VFMADDSUBPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27570 { 10061 /* vfmaddsubpd */, X86::VFMADDSUBPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27571 { 10061 /* vfmaddsubpd */, X86::VFMADDSUBPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27571 { 10061 /* vfmaddsubpd */, X86::VFMADDSUBPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27571 { 10061 /* vfmaddsubpd */, X86::VFMADDSUBPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27572 { 10061 /* vfmaddsubpd */, X86::VFMADDSUBPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
27572 { 10061 /* vfmaddsubpd */, X86::VFMADDSUBPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
27572 { 10061 /* vfmaddsubpd */, X86::VFMADDSUBPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
27576 { 10073 /* vfmaddsubps */, X86::VFMADDSUBPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27576 { 10073 /* vfmaddsubps */, X86::VFMADDSUBPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27576 { 10073 /* vfmaddsubps */, X86::VFMADDSUBPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27576 { 10073 /* vfmaddsubps */, X86::VFMADDSUBPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27577 { 10073 /* vfmaddsubps */, X86::VFMADDSUBPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27577 { 10073 /* vfmaddsubps */, X86::VFMADDSUBPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27577 { 10073 /* vfmaddsubps */, X86::VFMADDSUBPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27578 { 10073 /* vfmaddsubps */, X86::VFMADDSUBPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
27578 { 10073 /* vfmaddsubps */, X86::VFMADDSUBPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
27578 { 10073 /* vfmaddsubps */, X86::VFMADDSUBPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
27582 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27582 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27582 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27583 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27583 { 10085 /* vfmsub132pd */, X86::VFMSUB132PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27616 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27616 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27616 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27617 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27617 { 10097 /* vfmsub132ps */, X86::VFMSUB132PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27650 { 10109 /* vfmsub132sd */, X86::VFMSUB132SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27650 { 10109 /* vfmsub132sd */, X86::VFMSUB132SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27650 { 10109 /* vfmsub132sd */, X86::VFMSUB132SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27651 { 10109 /* vfmsub132sd */, X86::VFMSUB132SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27651 { 10109 /* vfmsub132sd */, X86::VFMSUB132SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27661 { 10121 /* vfmsub132ss */, X86::VFMSUB132SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27661 { 10121 /* vfmsub132ss */, X86::VFMSUB132SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27661 { 10121 /* vfmsub132ss */, X86::VFMSUB132SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27662 { 10121 /* vfmsub132ss */, X86::VFMSUB132SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27662 { 10121 /* vfmsub132ss */, X86::VFMSUB132SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27672 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27672 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27672 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27673 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27673 { 10133 /* vfmsub213pd */, X86::VFMSUB213PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27706 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27706 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27706 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27707 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27707 { 10145 /* vfmsub213ps */, X86::VFMSUB213PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27740 { 10157 /* vfmsub213sd */, X86::VFMSUB213SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27740 { 10157 /* vfmsub213sd */, X86::VFMSUB213SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27740 { 10157 /* vfmsub213sd */, X86::VFMSUB213SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27741 { 10157 /* vfmsub213sd */, X86::VFMSUB213SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27741 { 10157 /* vfmsub213sd */, X86::VFMSUB213SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27751 { 10169 /* vfmsub213ss */, X86::VFMSUB213SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27751 { 10169 /* vfmsub213ss */, X86::VFMSUB213SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27751 { 10169 /* vfmsub213ss */, X86::VFMSUB213SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27752 { 10169 /* vfmsub213ss */, X86::VFMSUB213SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27752 { 10169 /* vfmsub213ss */, X86::VFMSUB213SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27762 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27762 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27762 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27763 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27763 { 10181 /* vfmsub231pd */, X86::VFMSUB231PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27796 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27796 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27796 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27797 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27797 { 10193 /* vfmsub231ps */, X86::VFMSUB231PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27830 { 10205 /* vfmsub231sd */, X86::VFMSUB231SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27830 { 10205 /* vfmsub231sd */, X86::VFMSUB231SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27830 { 10205 /* vfmsub231sd */, X86::VFMSUB231SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27831 { 10205 /* vfmsub231sd */, X86::VFMSUB231SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27831 { 10205 /* vfmsub231sd */, X86::VFMSUB231SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27841 { 10217 /* vfmsub231ss */, X86::VFMSUB231SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27841 { 10217 /* vfmsub231ss */, X86::VFMSUB231SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27841 { 10217 /* vfmsub231ss */, X86::VFMSUB231SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27842 { 10217 /* vfmsub231ss */, X86::VFMSUB231SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27842 { 10217 /* vfmsub231ss */, X86::VFMSUB231SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27852 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27852 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27852 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27853 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27853 { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27886 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27886 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27886 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27887 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27887 { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27920 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27920 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27920 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27921 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27921 { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27954 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27954 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27954 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27955 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27955 { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27988 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27988 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27988 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27989 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27989 { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28022 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28022 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28022 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28023 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28023 { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28056 { 10319 /* vfmsubaddpd */, X86::VFMSUBADDPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28056 { 10319 /* vfmsubaddpd */, X86::VFMSUBADDPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28056 { 10319 /* vfmsubaddpd */, X86::VFMSUBADDPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28056 { 10319 /* vfmsubaddpd */, X86::VFMSUBADDPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28057 { 10319 /* vfmsubaddpd */, X86::VFMSUBADDPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28057 { 10319 /* vfmsubaddpd */, X86::VFMSUBADDPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28057 { 10319 /* vfmsubaddpd */, X86::VFMSUBADDPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28058 { 10319 /* vfmsubaddpd */, X86::VFMSUBADDPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
28058 { 10319 /* vfmsubaddpd */, X86::VFMSUBADDPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
28058 { 10319 /* vfmsubaddpd */, X86::VFMSUBADDPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
28062 { 10331 /* vfmsubaddps */, X86::VFMSUBADDPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28062 { 10331 /* vfmsubaddps */, X86::VFMSUBADDPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28062 { 10331 /* vfmsubaddps */, X86::VFMSUBADDPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28062 { 10331 /* vfmsubaddps */, X86::VFMSUBADDPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28063 { 10331 /* vfmsubaddps */, X86::VFMSUBADDPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28063 { 10331 /* vfmsubaddps */, X86::VFMSUBADDPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28063 { 10331 /* vfmsubaddps */, X86::VFMSUBADDPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28064 { 10331 /* vfmsubaddps */, X86::VFMSUBADDPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
28064 { 10331 /* vfmsubaddps */, X86::VFMSUBADDPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
28064 { 10331 /* vfmsubaddps */, X86::VFMSUBADDPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
28068 { 10343 /* vfmsubpd */, X86::VFMSUBPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28068 { 10343 /* vfmsubpd */, X86::VFMSUBPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28068 { 10343 /* vfmsubpd */, X86::VFMSUBPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28068 { 10343 /* vfmsubpd */, X86::VFMSUBPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28069 { 10343 /* vfmsubpd */, X86::VFMSUBPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28069 { 10343 /* vfmsubpd */, X86::VFMSUBPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28069 { 10343 /* vfmsubpd */, X86::VFMSUBPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28070 { 10343 /* vfmsubpd */, X86::VFMSUBPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
28070 { 10343 /* vfmsubpd */, X86::VFMSUBPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
28070 { 10343 /* vfmsubpd */, X86::VFMSUBPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
28074 { 10352 /* vfmsubps */, X86::VFMSUBPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28074 { 10352 /* vfmsubps */, X86::VFMSUBPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28074 { 10352 /* vfmsubps */, X86::VFMSUBPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28074 { 10352 /* vfmsubps */, X86::VFMSUBPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28075 { 10352 /* vfmsubps */, X86::VFMSUBPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28075 { 10352 /* vfmsubps */, X86::VFMSUBPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28075 { 10352 /* vfmsubps */, X86::VFMSUBPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28076 { 10352 /* vfmsubps */, X86::VFMSUBPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
28076 { 10352 /* vfmsubps */, X86::VFMSUBPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
28076 { 10352 /* vfmsubps */, X86::VFMSUBPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
28080 { 10361 /* vfmsubsd */, X86::VFMSUBSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28080 { 10361 /* vfmsubsd */, X86::VFMSUBSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28080 { 10361 /* vfmsubsd */, X86::VFMSUBSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28080 { 10361 /* vfmsubsd */, X86::VFMSUBSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28081 { 10361 /* vfmsubsd */, X86::VFMSUBSD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28081 { 10361 /* vfmsubsd */, X86::VFMSUBSD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28081 { 10361 /* vfmsubsd */, X86::VFMSUBSD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28082 { 10361 /* vfmsubsd */, X86::VFMSUBSD4mr, Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_FR32 }, },
28082 { 10361 /* vfmsubsd */, X86::VFMSUBSD4mr, Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_FR32 }, },
28082 { 10361 /* vfmsubsd */, X86::VFMSUBSD4mr, Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_FR32 }, },
28083 { 10370 /* vfmsubss */, X86::VFMSUBSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28083 { 10370 /* vfmsubss */, X86::VFMSUBSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28083 { 10370 /* vfmsubss */, X86::VFMSUBSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28083 { 10370 /* vfmsubss */, X86::VFMSUBSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28084 { 10370 /* vfmsubss */, X86::VFMSUBSS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem32 }, },
28084 { 10370 /* vfmsubss */, X86::VFMSUBSS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem32 }, },
28084 { 10370 /* vfmsubss */, X86::VFMSUBSS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem32 }, },
28085 { 10370 /* vfmsubss */, X86::VFMSUBSS4mr, Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_FR32 }, },
28085 { 10370 /* vfmsubss */, X86::VFMSUBSS4mr, Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_FR32 }, },
28085 { 10370 /* vfmsubss */, X86::VFMSUBSS4mr, Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_FR32 }, },
28086 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28086 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28086 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28087 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28087 { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28120 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28120 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28120 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28121 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28121 { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28154 { 10405 /* vfnmadd132sd */, X86::VFNMADD132SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28154 { 10405 /* vfnmadd132sd */, X86::VFNMADD132SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28154 { 10405 /* vfnmadd132sd */, X86::VFNMADD132SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28155 { 10405 /* vfnmadd132sd */, X86::VFNMADD132SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28155 { 10405 /* vfnmadd132sd */, X86::VFNMADD132SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28165 { 10418 /* vfnmadd132ss */, X86::VFNMADD132SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28165 { 10418 /* vfnmadd132ss */, X86::VFNMADD132SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28165 { 10418 /* vfnmadd132ss */, X86::VFNMADD132SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28166 { 10418 /* vfnmadd132ss */, X86::VFNMADD132SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
28166 { 10418 /* vfnmadd132ss */, X86::VFNMADD132SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
28176 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28176 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28176 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28177 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28177 { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28210 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28210 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28210 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28211 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28211 { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28244 { 10457 /* vfnmadd213sd */, X86::VFNMADD213SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28244 { 10457 /* vfnmadd213sd */, X86::VFNMADD213SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28244 { 10457 /* vfnmadd213sd */, X86::VFNMADD213SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28245 { 10457 /* vfnmadd213sd */, X86::VFNMADD213SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28245 { 10457 /* vfnmadd213sd */, X86::VFNMADD213SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28255 { 10470 /* vfnmadd213ss */, X86::VFNMADD213SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28255 { 10470 /* vfnmadd213ss */, X86::VFNMADD213SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28255 { 10470 /* vfnmadd213ss */, X86::VFNMADD213SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28256 { 10470 /* vfnmadd213ss */, X86::VFNMADD213SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
28256 { 10470 /* vfnmadd213ss */, X86::VFNMADD213SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
28266 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28266 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28266 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28267 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28267 { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28300 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28300 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28300 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28301 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28301 { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28334 { 10509 /* vfnmadd231sd */, X86::VFNMADD231SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28334 { 10509 /* vfnmadd231sd */, X86::VFNMADD231SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28334 { 10509 /* vfnmadd231sd */, X86::VFNMADD231SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28335 { 10509 /* vfnmadd231sd */, X86::VFNMADD231SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28335 { 10509 /* vfnmadd231sd */, X86::VFNMADD231SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28345 { 10522 /* vfnmadd231ss */, X86::VFNMADD231SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28345 { 10522 /* vfnmadd231ss */, X86::VFNMADD231SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28345 { 10522 /* vfnmadd231ss */, X86::VFNMADD231SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28346 { 10522 /* vfnmadd231ss */, X86::VFNMADD231SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
28346 { 10522 /* vfnmadd231ss */, X86::VFNMADD231SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
28356 { 10535 /* vfnmaddpd */, X86::VFNMADDPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28356 { 10535 /* vfnmaddpd */, X86::VFNMADDPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28356 { 10535 /* vfnmaddpd */, X86::VFNMADDPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28356 { 10535 /* vfnmaddpd */, X86::VFNMADDPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28357 { 10535 /* vfnmaddpd */, X86::VFNMADDPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28357 { 10535 /* vfnmaddpd */, X86::VFNMADDPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28357 { 10535 /* vfnmaddpd */, X86::VFNMADDPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28358 { 10535 /* vfnmaddpd */, X86::VFNMADDPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
28358 { 10535 /* vfnmaddpd */, X86::VFNMADDPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
28358 { 10535 /* vfnmaddpd */, X86::VFNMADDPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
28362 { 10545 /* vfnmaddps */, X86::VFNMADDPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28362 { 10545 /* vfnmaddps */, X86::VFNMADDPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28362 { 10545 /* vfnmaddps */, X86::VFNMADDPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28362 { 10545 /* vfnmaddps */, X86::VFNMADDPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28363 { 10545 /* vfnmaddps */, X86::VFNMADDPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28363 { 10545 /* vfnmaddps */, X86::VFNMADDPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28363 { 10545 /* vfnmaddps */, X86::VFNMADDPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28364 { 10545 /* vfnmaddps */, X86::VFNMADDPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
28364 { 10545 /* vfnmaddps */, X86::VFNMADDPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
28364 { 10545 /* vfnmaddps */, X86::VFNMADDPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
28368 { 10555 /* vfnmaddsd */, X86::VFNMADDSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28368 { 10555 /* vfnmaddsd */, X86::VFNMADDSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28368 { 10555 /* vfnmaddsd */, X86::VFNMADDSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28368 { 10555 /* vfnmaddsd */, X86::VFNMADDSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28369 { 10555 /* vfnmaddsd */, X86::VFNMADDSD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28369 { 10555 /* vfnmaddsd */, X86::VFNMADDSD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28369 { 10555 /* vfnmaddsd */, X86::VFNMADDSD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28370 { 10555 /* vfnmaddsd */, X86::VFNMADDSD4mr, Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_FR32 }, },
28370 { 10555 /* vfnmaddsd */, X86::VFNMADDSD4mr, Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_FR32 }, },
28370 { 10555 /* vfnmaddsd */, X86::VFNMADDSD4mr, Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_FR32 }, },
28371 { 10565 /* vfnmaddss */, X86::VFNMADDSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28371 { 10565 /* vfnmaddss */, X86::VFNMADDSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28371 { 10565 /* vfnmaddss */, X86::VFNMADDSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28371 { 10565 /* vfnmaddss */, X86::VFNMADDSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28372 { 10565 /* vfnmaddss */, X86::VFNMADDSS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem32 }, },
28372 { 10565 /* vfnmaddss */, X86::VFNMADDSS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem32 }, },
28372 { 10565 /* vfnmaddss */, X86::VFNMADDSS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem32 }, },
28373 { 10565 /* vfnmaddss */, X86::VFNMADDSS4mr, Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_FR32 }, },
28373 { 10565 /* vfnmaddss */, X86::VFNMADDSS4mr, Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_FR32 }, },
28373 { 10565 /* vfnmaddss */, X86::VFNMADDSS4mr, Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_FR32 }, },
28374 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28374 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28374 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28375 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28375 { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28408 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28408 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28408 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28409 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28409 { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28442 { 10601 /* vfnmsub132sd */, X86::VFNMSUB132SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28442 { 10601 /* vfnmsub132sd */, X86::VFNMSUB132SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28442 { 10601 /* vfnmsub132sd */, X86::VFNMSUB132SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28443 { 10601 /* vfnmsub132sd */, X86::VFNMSUB132SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28443 { 10601 /* vfnmsub132sd */, X86::VFNMSUB132SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28453 { 10614 /* vfnmsub132ss */, X86::VFNMSUB132SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28453 { 10614 /* vfnmsub132ss */, X86::VFNMSUB132SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28453 { 10614 /* vfnmsub132ss */, X86::VFNMSUB132SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28454 { 10614 /* vfnmsub132ss */, X86::VFNMSUB132SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
28454 { 10614 /* vfnmsub132ss */, X86::VFNMSUB132SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
28464 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28464 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28464 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28465 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28465 { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28498 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28498 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28498 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28499 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28499 { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28532 { 10653 /* vfnmsub213sd */, X86::VFNMSUB213SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28532 { 10653 /* vfnmsub213sd */, X86::VFNMSUB213SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28532 { 10653 /* vfnmsub213sd */, X86::VFNMSUB213SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28533 { 10653 /* vfnmsub213sd */, X86::VFNMSUB213SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28533 { 10653 /* vfnmsub213sd */, X86::VFNMSUB213SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28543 { 10666 /* vfnmsub213ss */, X86::VFNMSUB213SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28543 { 10666 /* vfnmsub213ss */, X86::VFNMSUB213SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28543 { 10666 /* vfnmsub213ss */, X86::VFNMSUB213SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28544 { 10666 /* vfnmsub213ss */, X86::VFNMSUB213SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
28544 { 10666 /* vfnmsub213ss */, X86::VFNMSUB213SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
28554 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28554 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28554 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28555 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28555 { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28588 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28588 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28588 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28589 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28589 { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28622 { 10705 /* vfnmsub231sd */, X86::VFNMSUB231SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28622 { 10705 /* vfnmsub231sd */, X86::VFNMSUB231SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28622 { 10705 /* vfnmsub231sd */, X86::VFNMSUB231SDr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28623 { 10705 /* vfnmsub231sd */, X86::VFNMSUB231SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28623 { 10705 /* vfnmsub231sd */, X86::VFNMSUB231SDm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28633 { 10718 /* vfnmsub231ss */, X86::VFNMSUB231SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28633 { 10718 /* vfnmsub231ss */, X86::VFNMSUB231SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28633 { 10718 /* vfnmsub231ss */, X86::VFNMSUB231SSr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28634 { 10718 /* vfnmsub231ss */, X86::VFNMSUB231SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
28634 { 10718 /* vfnmsub231ss */, X86::VFNMSUB231SSm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
28644 { 10731 /* vfnmsubpd */, X86::VFNMSUBPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28644 { 10731 /* vfnmsubpd */, X86::VFNMSUBPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28644 { 10731 /* vfnmsubpd */, X86::VFNMSUBPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28644 { 10731 /* vfnmsubpd */, X86::VFNMSUBPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28645 { 10731 /* vfnmsubpd */, X86::VFNMSUBPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28645 { 10731 /* vfnmsubpd */, X86::VFNMSUBPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28645 { 10731 /* vfnmsubpd */, X86::VFNMSUBPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28646 { 10731 /* vfnmsubpd */, X86::VFNMSUBPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
28646 { 10731 /* vfnmsubpd */, X86::VFNMSUBPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
28646 { 10731 /* vfnmsubpd */, X86::VFNMSUBPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
28650 { 10741 /* vfnmsubps */, X86::VFNMSUBPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28650 { 10741 /* vfnmsubps */, X86::VFNMSUBPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28650 { 10741 /* vfnmsubps */, X86::VFNMSUBPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28650 { 10741 /* vfnmsubps */, X86::VFNMSUBPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28651 { 10741 /* vfnmsubps */, X86::VFNMSUBPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28651 { 10741 /* vfnmsubps */, X86::VFNMSUBPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28651 { 10741 /* vfnmsubps */, X86::VFNMSUBPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28652 { 10741 /* vfnmsubps */, X86::VFNMSUBPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
28652 { 10741 /* vfnmsubps */, X86::VFNMSUBPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
28652 { 10741 /* vfnmsubps */, X86::VFNMSUBPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
28656 { 10751 /* vfnmsubsd */, X86::VFNMSUBSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28656 { 10751 /* vfnmsubsd */, X86::VFNMSUBSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28656 { 10751 /* vfnmsubsd */, X86::VFNMSUBSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28656 { 10751 /* vfnmsubsd */, X86::VFNMSUBSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28657 { 10751 /* vfnmsubsd */, X86::VFNMSUBSD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28657 { 10751 /* vfnmsubsd */, X86::VFNMSUBSD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28657 { 10751 /* vfnmsubsd */, X86::VFNMSUBSD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28658 { 10751 /* vfnmsubsd */, X86::VFNMSUBSD4mr, Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_FR32 }, },
28658 { 10751 /* vfnmsubsd */, X86::VFNMSUBSD4mr, Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_FR32 }, },
28658 { 10751 /* vfnmsubsd */, X86::VFNMSUBSD4mr, Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_FR32 }, },
28659 { 10761 /* vfnmsubss */, X86::VFNMSUBSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28659 { 10761 /* vfnmsubss */, X86::VFNMSUBSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28659 { 10761 /* vfnmsubss */, X86::VFNMSUBSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28659 { 10761 /* vfnmsubss */, X86::VFNMSUBSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
28660 { 10761 /* vfnmsubss */, X86::VFNMSUBSS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem32 }, },
28660 { 10761 /* vfnmsubss */, X86::VFNMSUBSS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem32 }, },
28660 { 10761 /* vfnmsubss */, X86::VFNMSUBSS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem32 }, },
28661 { 10761 /* vfnmsubss */, X86::VFNMSUBSS4mr, Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_FR32 }, },
28661 { 10761 /* vfnmsubss */, X86::VFNMSUBSS4mr, Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_FR32 }, },
28661 { 10761 /* vfnmsubss */, X86::VFNMSUBSS4mr, Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_FR32 }, },
28706 { 10887 /* vfrczpd */, X86::VFRCZPDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
28706 { 10887 /* vfrczpd */, X86::VFRCZPDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
28707 { 10887 /* vfrczpd */, X86::VFRCZPDrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
28710 { 10895 /* vfrczps */, X86::VFRCZPSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
28710 { 10895 /* vfrczps */, X86::VFRCZPSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
28711 { 10895 /* vfrczps */, X86::VFRCZPSrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
28714 { 10903 /* vfrczsd */, X86::VFRCZSDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
28714 { 10903 /* vfrczsd */, X86::VFRCZSDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
28715 { 10903 /* vfrczsd */, X86::VFRCZSDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
28716 { 10911 /* vfrczss */, X86::VFRCZSSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
28716 { 10911 /* vfrczss */, X86::VFRCZSSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
28717 { 10911 /* vfrczss */, X86::VFRCZSSrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
28718 { 10919 /* vgatherdpd */, X86::VGATHERDPDrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
28718 { 10919 /* vgatherdpd */, X86::VGATHERDPDrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
28723 { 10930 /* vgatherdps */, X86::VGATHERDPSrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
28723 { 10930 /* vgatherdps */, X86::VGATHERDPSrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
28736 { 11053 /* vgatherqpd */, X86::VGATHERQPDrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
28736 { 11053 /* vgatherqpd */, X86::VGATHERQPDrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
28741 { 11064 /* vgatherqps */, X86::VGATHERQPSYrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC2565_1__Tie1_3_3, AMFBS_None, { MCK_FR32, MCK_Mem128_RC256, MCK_FR32 }, },
28741 { 11064 /* vgatherqps */, X86::VGATHERQPSYrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC2565_1__Tie1_3_3, AMFBS_None, { MCK_FR32, MCK_Mem128_RC256, MCK_FR32 }, },
28742 { 11064 /* vgatherqps */, X86::VGATHERQPSrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem64_RC1285_1__Tie1_3_3, AMFBS_None, { MCK_FR32, MCK_Mem64_RC128, MCK_FR32 }, },
28742 { 11064 /* vgatherqps */, X86::VGATHERQPSrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem64_RC1285_1__Tie1_3_3, AMFBS_None, { MCK_FR32, MCK_Mem64_RC128, MCK_FR32 }, },
28902 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
28902 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
28902 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
28903 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28903 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28933 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
28933 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
28933 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
28934 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28934 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28964 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28964 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28964 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28965 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28965 { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28986 { 11203 /* vhaddpd */, X86::VHADDPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28986 { 11203 /* vhaddpd */, X86::VHADDPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28986 { 11203 /* vhaddpd */, X86::VHADDPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28987 { 11203 /* vhaddpd */, X86::VHADDPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28987 { 11203 /* vhaddpd */, X86::VHADDPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28990 { 11211 /* vhaddps */, X86::VHADDPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28990 { 11211 /* vhaddps */, X86::VHADDPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28990 { 11211 /* vhaddps */, X86::VHADDPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28991 { 11211 /* vhaddps */, X86::VHADDPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28991 { 11211 /* vhaddps */, X86::VHADDPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28994 { 11219 /* vhsubpd */, X86::VHSUBPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28994 { 11219 /* vhsubpd */, X86::VHSUBPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28994 { 11219 /* vhsubpd */, X86::VHSUBPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28995 { 11219 /* vhsubpd */, X86::VHSUBPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28995 { 11219 /* vhsubpd */, X86::VHSUBPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28998 { 11227 /* vhsubps */, X86::VHSUBPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28998 { 11227 /* vhsubps */, X86::VHSUBPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28998 { 11227 /* vhsubps */, X86::VHSUBPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28999 { 11227 /* vhsubps */, X86::VHSUBPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28999 { 11227 /* vhsubps */, X86::VHSUBPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29002 { 11235 /* vinsertf128 */, X86::VINSERTF128rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_FR32, MCK_ImmUnsignedi8 }, },
29040 { 11299 /* vinserti128 */, X86::VINSERTI128rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_FR32, MCK_ImmUnsignedi8 }, },
29078 { 11363 /* vinsertps */, X86::VINSERTPSrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
29078 { 11363 /* vinsertps */, X86::VINSERTPSrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
29078 { 11363 /* vinsertps */, X86::VINSERTPSrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
29079 { 11363 /* vinsertps */, X86::VINSERTPSrm, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
29079 { 11363 /* vinsertps */, X86::VINSERTPSrm, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
29082 { 11373 /* vlddqu */, X86::VLDDQUrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
29085 { 11389 /* vmaskmovdqu */, X86::VMASKMOVDQU, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_FR32, MCK_FR32 }, },
29085 { 11389 /* vmaskmovdqu */, X86::VMASKMOVDQU, Convert__Reg1_0__Reg1_1, AMFBS_Not64BitMode, { MCK_FR32, MCK_FR32 }, },
29086 { 11389 /* vmaskmovdqu */, X86::VMASKMOVDQU64, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_FR32, MCK_FR32 }, },
29086 { 11389 /* vmaskmovdqu */, X86::VMASKMOVDQU64, Convert__Reg1_0__Reg1_1, AMFBS_In64BitMode, { MCK_FR32, MCK_FR32 }, },
29087 { 11401 /* vmaskmovpd */, X86::VMASKMOVPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29087 { 11401 /* vmaskmovpd */, X86::VMASKMOVPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29089 { 11401 /* vmaskmovpd */, X86::VMASKMOVPDmr, Convert__Mem1285_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
29089 { 11401 /* vmaskmovpd */, X86::VMASKMOVPDmr, Convert__Mem1285_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
29091 { 11412 /* vmaskmovps */, X86::VMASKMOVPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29091 { 11412 /* vmaskmovps */, X86::VMASKMOVPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29093 { 11412 /* vmaskmovps */, X86::VMASKMOVPSmr, Convert__Mem1285_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
29093 { 11412 /* vmaskmovps */, X86::VMASKMOVPSmr, Convert__Mem1285_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
29095 { 11423 /* vmaxpd */, X86::VMAXPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29095 { 11423 /* vmaxpd */, X86::VMAXPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29095 { 11423 /* vmaxpd */, X86::VMAXPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29096 { 11423 /* vmaxpd */, X86::VMAXPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29096 { 11423 /* vmaxpd */, X86::VMAXPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29129 { 11430 /* vmaxps */, X86::VMAXPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29129 { 11430 /* vmaxps */, X86::VMAXPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29129 { 11430 /* vmaxps */, X86::VMAXPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29130 { 11430 /* vmaxps */, X86::VMAXPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29130 { 11430 /* vmaxps */, X86::VMAXPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29163 { 11437 /* vmaxsd */, X86::VMAXSDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29163 { 11437 /* vmaxsd */, X86::VMAXSDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29163 { 11437 /* vmaxsd */, X86::VMAXSDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29164 { 11437 /* vmaxsd */, X86::VMAXSDrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
29164 { 11437 /* vmaxsd */, X86::VMAXSDrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
29174 { 11444 /* vmaxss */, X86::VMAXSSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29174 { 11444 /* vmaxss */, X86::VMAXSSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29174 { 11444 /* vmaxss */, X86::VMAXSSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29175 { 11444 /* vmaxss */, X86::VMAXSSrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
29175 { 11444 /* vmaxss */, X86::VMAXSSrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
29188 { 11473 /* vminpd */, X86::VMINPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29188 { 11473 /* vminpd */, X86::VMINPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29188 { 11473 /* vminpd */, X86::VMINPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29189 { 11473 /* vminpd */, X86::VMINPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29189 { 11473 /* vminpd */, X86::VMINPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29222 { 11480 /* vminps */, X86::VMINPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29222 { 11480 /* vminps */, X86::VMINPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29222 { 11480 /* vminps */, X86::VMINPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29223 { 11480 /* vminps */, X86::VMINPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29223 { 11480 /* vminps */, X86::VMINPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29256 { 11487 /* vminsd */, X86::VMINSDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29256 { 11487 /* vminsd */, X86::VMINSDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29256 { 11487 /* vminsd */, X86::VMINSDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29257 { 11487 /* vminsd */, X86::VMINSDrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
29257 { 11487 /* vminsd */, X86::VMINSDrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
29267 { 11494 /* vminss */, X86::VMINSSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29267 { 11494 /* vminss */, X86::VMINSSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29267 { 11494 /* vminss */, X86::VMINSSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29268 { 11494 /* vminss */, X86::VMINSSrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
29268 { 11494 /* vminss */, X86::VMINSSrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
29282 { 11525 /* vmovapd */, X86::VMOVAPDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29282 { 11525 /* vmovapd */, X86::VMOVAPDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29283 { 11525 /* vmovapd */, X86::VMOVAPDrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
29292 { 11525 /* vmovapd */, X86::VMOVAPDmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
29312 { 11533 /* vmovapd.s */, X86::VMOVAPDrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29312 { 11533 /* vmovapd.s */, X86::VMOVAPDrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29323 { 11543 /* vmovaps */, X86::VMOVAPSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29323 { 11543 /* vmovaps */, X86::VMOVAPSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29324 { 11543 /* vmovaps */, X86::VMOVAPSrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
29333 { 11543 /* vmovaps */, X86::VMOVAPSmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
29353 { 11551 /* vmovaps.s */, X86::VMOVAPSrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29353 { 11551 /* vmovaps.s */, X86::VMOVAPSrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29364 { 11561 /* vmovd */, X86::VMOVDI2PDIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR32 }, },
29365 { 11561 /* vmovd */, X86::VMOV64toPQIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
29366 { 11561 /* vmovd */, X86::VMOVDI2PDIrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
29367 { 11561 /* vmovd */, X86::VMOVPDI2DIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR32, MCK_FR32 }, },
29369 { 11561 /* vmovd */, X86::VMOVPQIto64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
29374 { 11561 /* vmovd */, X86::VMOVPDI2DImr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
29376 { 11567 /* vmovddup */, X86::VMOVDDUPrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29376 { 11567 /* vmovddup */, X86::VMOVDDUPrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29377 { 11567 /* vmovddup */, X86::VMOVDDUPrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
29398 { 11576 /* vmovdqa */, X86::VMOVDQArr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29398 { 11576 /* vmovdqa */, X86::VMOVDQArr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29399 { 11576 /* vmovdqa */, X86::VMOVDQArm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
29402 { 11576 /* vmovdqa */, X86::VMOVDQAmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
29404 { 11584 /* vmovdqa.s */, X86::VMOVDQArr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29404 { 11584 /* vmovdqa.s */, X86::VMOVDQArr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29472 { 11638 /* vmovdqu */, X86::VMOVDQUrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29472 { 11638 /* vmovdqu */, X86::VMOVDQUrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29473 { 11638 /* vmovdqu */, X86::VMOVDQUrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
29476 { 11638 /* vmovdqu */, X86::VMOVDQUmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
29478 { 11646 /* vmovdqu.s */, X86::VMOVDQUrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29478 { 11646 /* vmovdqu.s */, X86::VMOVDQUrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29612 { 11742 /* vmovhlps */, X86::VMOVHLPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29612 { 11742 /* vmovhlps */, X86::VMOVHLPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29612 { 11742 /* vmovhlps */, X86::VMOVHLPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29614 { 11751 /* vmovhpd */, X86::VMOVHPDmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
29616 { 11751 /* vmovhpd */, X86::VMOVHPDrm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
29616 { 11751 /* vmovhpd */, X86::VMOVHPDrm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
29618 { 11759 /* vmovhps */, X86::VMOVHPSmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
29620 { 11759 /* vmovhps */, X86::VMOVHPSrm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
29620 { 11759 /* vmovhps */, X86::VMOVHPSrm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
29622 { 11767 /* vmovlhps */, X86::VMOVLHPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29622 { 11767 /* vmovlhps */, X86::VMOVLHPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29622 { 11767 /* vmovlhps */, X86::VMOVLHPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29624 { 11776 /* vmovlpd */, X86::VMOVLPDmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
29626 { 11776 /* vmovlpd */, X86::VMOVLPDrm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
29626 { 11776 /* vmovlpd */, X86::VMOVLPDrm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
29628 { 11784 /* vmovlps */, X86::VMOVLPSmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
29630 { 11784 /* vmovlps */, X86::VMOVLPSrm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
29630 { 11784 /* vmovlps */, X86::VMOVLPSrm, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
29632 { 11792 /* vmovmskpd */, X86::VMOVMSKPDrr, Convert__GR32orGR641_0__Reg1_1, AMFBS_None, { MCK_GR32orGR64, MCK_FR32 }, },
29634 { 11802 /* vmovmskps */, X86::VMOVMSKPSrr, Convert__GR32orGR641_0__Reg1_1, AMFBS_None, { MCK_GR32orGR64, MCK_FR32 }, },
29636 { 11812 /* vmovntdq */, X86::VMOVNTDQmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
29641 { 11821 /* vmovntdqa */, X86::VMOVNTDQArm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
29646 { 11831 /* vmovntpd */, X86::VMOVNTPDmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
29651 { 11840 /* vmovntps */, X86::VMOVNTPSmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
29656 { 11849 /* vmovq */, X86::VMOVZPQILo2PQIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29656 { 11849 /* vmovq */, X86::VMOVZPQILo2PQIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29657 { 11849 /* vmovq */, X86::VMOV64toPQIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_GR64 }, },
29658 { 11849 /* vmovq */, X86::VMOVQI2PQIrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
29659 { 11849 /* vmovq */, X86::VMOVPQIto64rr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_GR64, MCK_FR32 }, },
29664 { 11849 /* vmovq */, X86::VMOVPQI2QImr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
29666 { 11855 /* vmovq.s */, X86::VMOVPQI2QIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29666 { 11855 /* vmovq.s */, X86::VMOVPQI2QIrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29668 { 11863 /* vmovsd */, X86::VMOVSDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
29670 { 11863 /* vmovsd */, X86::VMOVSDmr, Convert__Mem645_0__Reg1_1, AMFBS_None, { MCK_Mem64, MCK_FR32 }, },
29672 { 11863 /* vmovsd */, X86::VMOVSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29672 { 11863 /* vmovsd */, X86::VMOVSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29672 { 11863 /* vmovsd */, X86::VMOVSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29679 { 11870 /* vmovsd.s */, X86::VMOVSDrr_REV, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29679 { 11870 /* vmovsd.s */, X86::VMOVSDrr_REV, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29679 { 11870 /* vmovsd.s */, X86::VMOVSDrr_REV, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29683 { 11879 /* vmovshdup */, X86::VMOVSHDUPrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29683 { 11879 /* vmovshdup */, X86::VMOVSHDUPrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29684 { 11879 /* vmovshdup */, X86::VMOVSHDUPrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
29705 { 11889 /* vmovsldup */, X86::VMOVSLDUPrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29705 { 11889 /* vmovsldup */, X86::VMOVSLDUPrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29706 { 11889 /* vmovsldup */, X86::VMOVSLDUPrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
29727 { 11899 /* vmovss */, X86::VMOVSSrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
29729 { 11899 /* vmovss */, X86::VMOVSSmr, Convert__Mem325_0__Reg1_1, AMFBS_None, { MCK_Mem32, MCK_FR32 }, },
29731 { 11899 /* vmovss */, X86::VMOVSSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29731 { 11899 /* vmovss */, X86::VMOVSSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29731 { 11899 /* vmovss */, X86::VMOVSSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29738 { 11906 /* vmovss.s */, X86::VMOVSSrr_REV, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29738 { 11906 /* vmovss.s */, X86::VMOVSSrr_REV, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29738 { 11906 /* vmovss.s */, X86::VMOVSSrr_REV, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29742 { 11915 /* vmovupd */, X86::VMOVUPDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29742 { 11915 /* vmovupd */, X86::VMOVUPDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29743 { 11915 /* vmovupd */, X86::VMOVUPDrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
29752 { 11915 /* vmovupd */, X86::VMOVUPDmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
29772 { 11923 /* vmovupd.s */, X86::VMOVUPDrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29772 { 11923 /* vmovupd.s */, X86::VMOVUPDrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29783 { 11933 /* vmovups */, X86::VMOVUPSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29783 { 11933 /* vmovups */, X86::VMOVUPSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29784 { 11933 /* vmovups */, X86::VMOVUPSrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
29793 { 11933 /* vmovups */, X86::VMOVUPSmr, Convert__Mem1285_0__Reg1_1, AMFBS_None, { MCK_Mem128, MCK_FR32 }, },
29813 { 11941 /* vmovups.s */, X86::VMOVUPSrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29813 { 11941 /* vmovups.s */, X86::VMOVUPSrr_REV, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
29824 { 11951 /* vmpsadbw */, X86::VMPSADBWrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
29824 { 11951 /* vmpsadbw */, X86::VMPSADBWrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
29824 { 11951 /* vmpsadbw */, X86::VMPSADBWrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
29825 { 11951 /* vmpsadbw */, X86::VMPSADBWrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29825 { 11951 /* vmpsadbw */, X86::VMPSADBWrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29839 { 12021 /* vmulpd */, X86::VMULPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29839 { 12021 /* vmulpd */, X86::VMULPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29839 { 12021 /* vmulpd */, X86::VMULPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29840 { 12021 /* vmulpd */, X86::VMULPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29840 { 12021 /* vmulpd */, X86::VMULPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29873 { 12028 /* vmulps */, X86::VMULPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29873 { 12028 /* vmulps */, X86::VMULPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29873 { 12028 /* vmulps */, X86::VMULPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29874 { 12028 /* vmulps */, X86::VMULPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29874 { 12028 /* vmulps */, X86::VMULPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29907 { 12035 /* vmulsd */, X86::VMULSDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29907 { 12035 /* vmulsd */, X86::VMULSDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29907 { 12035 /* vmulsd */, X86::VMULSDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29908 { 12035 /* vmulsd */, X86::VMULSDrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
29908 { 12035 /* vmulsd */, X86::VMULSDrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
29918 { 12042 /* vmulss */, X86::VMULSSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29918 { 12042 /* vmulss */, X86::VMULSSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29918 { 12042 /* vmulss */, X86::VMULSSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29919 { 12042 /* vmulss */, X86::VMULSSrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
29919 { 12042 /* vmulss */, X86::VMULSSrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
29935 { 12088 /* vorpd */, X86::VORPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29935 { 12088 /* vorpd */, X86::VORPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29935 { 12088 /* vorpd */, X86::VORPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29936 { 12088 /* vorpd */, X86::VORPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29936 { 12088 /* vorpd */, X86::VORPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29966 { 12094 /* vorps */, X86::VORPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29966 { 12094 /* vorps */, X86::VORPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29966 { 12094 /* vorps */, X86::VORPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29967 { 12094 /* vorps */, X86::VORPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29967 { 12094 /* vorps */, X86::VORPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30021 { 12149 /* vpabsb */, X86::VPABSBrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
30021 { 12149 /* vpabsb */, X86::VPABSBrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
30022 { 12149 /* vpabsb */, X86::VPABSBrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
30043 { 12156 /* vpabsd */, X86::VPABSDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
30043 { 12156 /* vpabsd */, X86::VPABSDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
30044 { 12156 /* vpabsd */, X86::VPABSDrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
30101 { 12170 /* vpabsw */, X86::VPABSWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
30101 { 12170 /* vpabsw */, X86::VPABSWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
30102 { 12170 /* vpabsw */, X86::VPABSWrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
30123 { 12177 /* vpackssdw */, X86::VPACKSSDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30123 { 12177 /* vpackssdw */, X86::VPACKSSDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30123 { 12177 /* vpackssdw */, X86::VPACKSSDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30124 { 12177 /* vpackssdw */, X86::VPACKSSDWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30124 { 12177 /* vpackssdw */, X86::VPACKSSDWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30154 { 12187 /* vpacksswb */, X86::VPACKSSWBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30154 { 12187 /* vpacksswb */, X86::VPACKSSWBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30154 { 12187 /* vpacksswb */, X86::VPACKSSWBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30155 { 12187 /* vpacksswb */, X86::VPACKSSWBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30155 { 12187 /* vpacksswb */, X86::VPACKSSWBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30176 { 12197 /* vpackusdw */, X86::VPACKUSDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30176 { 12197 /* vpackusdw */, X86::VPACKUSDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30176 { 12197 /* vpackusdw */, X86::VPACKUSDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30177 { 12197 /* vpackusdw */, X86::VPACKUSDWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30177 { 12197 /* vpackusdw */, X86::VPACKUSDWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30207 { 12207 /* vpackuswb */, X86::VPACKUSWBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30207 { 12207 /* vpackuswb */, X86::VPACKUSWBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30207 { 12207 /* vpackuswb */, X86::VPACKUSWBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30208 { 12207 /* vpackuswb */, X86::VPACKUSWBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30208 { 12207 /* vpackuswb */, X86::VPACKUSWBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30229 { 12217 /* vpaddb */, X86::VPADDBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30229 { 12217 /* vpaddb */, X86::VPADDBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30229 { 12217 /* vpaddb */, X86::VPADDBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30230 { 12217 /* vpaddb */, X86::VPADDBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30230 { 12217 /* vpaddb */, X86::VPADDBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30251 { 12224 /* vpaddd */, X86::VPADDDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30251 { 12224 /* vpaddd */, X86::VPADDDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30251 { 12224 /* vpaddd */, X86::VPADDDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30252 { 12224 /* vpaddd */, X86::VPADDDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30252 { 12224 /* vpaddd */, X86::VPADDDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30282 { 12231 /* vpaddq */, X86::VPADDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30282 { 12231 /* vpaddq */, X86::VPADDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30282 { 12231 /* vpaddq */, X86::VPADDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30283 { 12231 /* vpaddq */, X86::VPADDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30283 { 12231 /* vpaddq */, X86::VPADDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30313 { 12238 /* vpaddsb */, X86::VPADDSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30313 { 12238 /* vpaddsb */, X86::VPADDSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30313 { 12238 /* vpaddsb */, X86::VPADDSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30314 { 12238 /* vpaddsb */, X86::VPADDSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30314 { 12238 /* vpaddsb */, X86::VPADDSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30335 { 12246 /* vpaddsw */, X86::VPADDSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30335 { 12246 /* vpaddsw */, X86::VPADDSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30335 { 12246 /* vpaddsw */, X86::VPADDSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30336 { 12246 /* vpaddsw */, X86::VPADDSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30336 { 12246 /* vpaddsw */, X86::VPADDSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30357 { 12254 /* vpaddusb */, X86::VPADDUSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30357 { 12254 /* vpaddusb */, X86::VPADDUSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30357 { 12254 /* vpaddusb */, X86::VPADDUSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30358 { 12254 /* vpaddusb */, X86::VPADDUSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30358 { 12254 /* vpaddusb */, X86::VPADDUSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30379 { 12263 /* vpaddusw */, X86::VPADDUSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30379 { 12263 /* vpaddusw */, X86::VPADDUSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30379 { 12263 /* vpaddusw */, X86::VPADDUSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30380 { 12263 /* vpaddusw */, X86::VPADDUSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30380 { 12263 /* vpaddusw */, X86::VPADDUSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30401 { 12272 /* vpaddw */, X86::VPADDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30401 { 12272 /* vpaddw */, X86::VPADDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30401 { 12272 /* vpaddw */, X86::VPADDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30402 { 12272 /* vpaddw */, X86::VPADDWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30402 { 12272 /* vpaddw */, X86::VPADDWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30423 { 12279 /* vpalignr */, X86::VPALIGNRrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30423 { 12279 /* vpalignr */, X86::VPALIGNRrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30423 { 12279 /* vpalignr */, X86::VPALIGNRrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30424 { 12279 /* vpalignr */, X86::VPALIGNRrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30424 { 12279 /* vpalignr */, X86::VPALIGNRrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30445 { 12288 /* vpand */, X86::VPANDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30445 { 12288 /* vpand */, X86::VPANDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30445 { 12288 /* vpand */, X86::VPANDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30446 { 12288 /* vpand */, X86::VPANDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30446 { 12288 /* vpand */, X86::VPANDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30476 { 12301 /* vpandn */, X86::VPANDNrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30476 { 12301 /* vpandn */, X86::VPANDNrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30476 { 12301 /* vpandn */, X86::VPANDNrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30477 { 12301 /* vpandn */, X86::VPANDNrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30477 { 12301 /* vpandn */, X86::VPANDNrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30561 { 12331 /* vpavgb */, X86::VPAVGBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30561 { 12331 /* vpavgb */, X86::VPAVGBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30561 { 12331 /* vpavgb */, X86::VPAVGBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30562 { 12331 /* vpavgb */, X86::VPAVGBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30562 { 12331 /* vpavgb */, X86::VPAVGBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30583 { 12338 /* vpavgw */, X86::VPAVGWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30583 { 12338 /* vpavgw */, X86::VPAVGWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30583 { 12338 /* vpavgw */, X86::VPAVGWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30584 { 12338 /* vpavgw */, X86::VPAVGWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30584 { 12338 /* vpavgw */, X86::VPAVGWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30605 { 12345 /* vpblendd */, X86::VPBLENDDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30605 { 12345 /* vpblendd */, X86::VPBLENDDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30605 { 12345 /* vpblendd */, X86::VPBLENDDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30606 { 12345 /* vpblendd */, X86::VPBLENDDrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30606 { 12345 /* vpblendd */, X86::VPBLENDDrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30699 { 12394 /* vpblendvb */, X86::VPBLENDVBrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
30699 { 12394 /* vpblendvb */, X86::VPBLENDVBrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
30699 { 12394 /* vpblendvb */, X86::VPBLENDVBrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
30699 { 12394 /* vpblendvb */, X86::VPBLENDVBrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
30700 { 12394 /* vpblendvb */, X86::VPBLENDVBrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
30700 { 12394 /* vpblendvb */, X86::VPBLENDVBrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
30700 { 12394 /* vpblendvb */, X86::VPBLENDVBrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
30703 { 12404 /* vpblendw */, X86::VPBLENDWrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30703 { 12404 /* vpblendw */, X86::VPBLENDWrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30703 { 12404 /* vpblendw */, X86::VPBLENDWrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30704 { 12404 /* vpblendw */, X86::VPBLENDWrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30704 { 12404 /* vpblendw */, X86::VPBLENDWrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30707 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
30707 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
30708 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrm, Convert__Reg1_0__Mem85_1, AMFBS_None, { MCK_FR32, MCK_Mem8 }, },
30709 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
30738 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
30738 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
30739 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
30740 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
30775 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
30775 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
30776 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
30777 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
30806 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
30806 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
30807 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_FR32, MCK_Mem16 }, },
30808 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
30837 { 12497 /* vpclmulhqhqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30837 { 12497 /* vpclmulhqhqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30837 { 12497 /* vpclmulhqhqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30838 { 12497 /* vpclmulhqhqdq */, X86::VPCLMULQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_17, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30838 { 12497 /* vpclmulhqhqdq */, X86::VPCLMULQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_17, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30847 { 12511 /* vpclmulhqlqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30847 { 12511 /* vpclmulhqlqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30847 { 12511 /* vpclmulhqlqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30848 { 12511 /* vpclmulhqlqdq */, X86::VPCLMULQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_1, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30848 { 12511 /* vpclmulhqlqdq */, X86::VPCLMULQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_1, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30857 { 12525 /* vpclmullqhqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30857 { 12525 /* vpclmullqhqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30857 { 12525 /* vpclmullqhqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30858 { 12525 /* vpclmullqhqdq */, X86::VPCLMULQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_16, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30858 { 12525 /* vpclmullqhqdq */, X86::VPCLMULQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_16, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30867 { 12539 /* vpclmullqlqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30867 { 12539 /* vpclmullqlqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30867 { 12539 /* vpclmullqlqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30868 { 12539 /* vpclmullqlqdq */, X86::VPCLMULQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30868 { 12539 /* vpclmullqlqdq */, X86::VPCLMULQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_0, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30877 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30877 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30877 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30878 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30878 { 12553 /* vpclmulqdq */, X86::VPCLMULQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30887 { 12564 /* vpcmov */, X86::VPCMOVrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
30887 { 12564 /* vpcmov */, X86::VPCMOVrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
30887 { 12564 /* vpcmov */, X86::VPCMOVrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
30887 { 12564 /* vpcmov */, X86::VPCMOVrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
30888 { 12564 /* vpcmov */, X86::VPCMOVrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30888 { 12564 /* vpcmov */, X86::VPCMOVrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30888 { 12564 /* vpcmov */, X86::VPCMOVrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30889 { 12564 /* vpcmov */, X86::VPCMOVrmr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
30889 { 12564 /* vpcmov */, X86::VPCMOVrmr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
30889 { 12564 /* vpcmov */, X86::VPCMOVrmr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
30929 { 12585 /* vpcmpeqb */, X86::VPCMPEQBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30929 { 12585 /* vpcmpeqb */, X86::VPCMPEQBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30929 { 12585 /* vpcmpeqb */, X86::VPCMPEQBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30930 { 12585 /* vpcmpeqb */, X86::VPCMPEQBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30930 { 12585 /* vpcmpeqb */, X86::VPCMPEQBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30945 { 12594 /* vpcmpeqd */, X86::VPCMPEQDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30945 { 12594 /* vpcmpeqd */, X86::VPCMPEQDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30945 { 12594 /* vpcmpeqd */, X86::VPCMPEQDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30946 { 12594 /* vpcmpeqd */, X86::VPCMPEQDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30946 { 12594 /* vpcmpeqd */, X86::VPCMPEQDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30967 { 12603 /* vpcmpeqq */, X86::VPCMPEQQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30967 { 12603 /* vpcmpeqq */, X86::VPCMPEQQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30967 { 12603 /* vpcmpeqq */, X86::VPCMPEQQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30968 { 12603 /* vpcmpeqq */, X86::VPCMPEQQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30968 { 12603 /* vpcmpeqq */, X86::VPCMPEQQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30989 { 12612 /* vpcmpeqw */, X86::VPCMPEQWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30989 { 12612 /* vpcmpeqw */, X86::VPCMPEQWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30989 { 12612 /* vpcmpeqw */, X86::VPCMPEQWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30990 { 12612 /* vpcmpeqw */, X86::VPCMPEQWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30990 { 12612 /* vpcmpeqw */, X86::VPCMPEQWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30999 { 12621 /* vpcmpestri */, X86::VPCMPESTRIrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30999 { 12621 /* vpcmpestri */, X86::VPCMPESTRIrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31000 { 12621 /* vpcmpestri */, X86::VPCMPESTRIrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31001 { 12632 /* vpcmpestrm */, X86::VPCMPESTRMrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31001 { 12632 /* vpcmpestrm */, X86::VPCMPESTRMrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31002 { 12632 /* vpcmpestrm */, X86::VPCMPESTRMrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31009 { 12643 /* vpcmpgtb */, X86::VPCMPGTBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31009 { 12643 /* vpcmpgtb */, X86::VPCMPGTBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31009 { 12643 /* vpcmpgtb */, X86::VPCMPGTBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31010 { 12643 /* vpcmpgtb */, X86::VPCMPGTBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31010 { 12643 /* vpcmpgtb */, X86::VPCMPGTBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31025 { 12652 /* vpcmpgtd */, X86::VPCMPGTDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31025 { 12652 /* vpcmpgtd */, X86::VPCMPGTDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31025 { 12652 /* vpcmpgtd */, X86::VPCMPGTDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31026 { 12652 /* vpcmpgtd */, X86::VPCMPGTDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31026 { 12652 /* vpcmpgtd */, X86::VPCMPGTDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31047 { 12661 /* vpcmpgtq */, X86::VPCMPGTQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31047 { 12661 /* vpcmpgtq */, X86::VPCMPGTQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31047 { 12661 /* vpcmpgtq */, X86::VPCMPGTQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31048 { 12661 /* vpcmpgtq */, X86::VPCMPGTQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31048 { 12661 /* vpcmpgtq */, X86::VPCMPGTQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31069 { 12670 /* vpcmpgtw */, X86::VPCMPGTWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31069 { 12670 /* vpcmpgtw */, X86::VPCMPGTWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31069 { 12670 /* vpcmpgtw */, X86::VPCMPGTWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31070 { 12670 /* vpcmpgtw */, X86::VPCMPGTWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31070 { 12670 /* vpcmpgtw */, X86::VPCMPGTWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31079 { 12679 /* vpcmpistri */, X86::VPCMPISTRIrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31079 { 12679 /* vpcmpistri */, X86::VPCMPISTRIrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31080 { 12679 /* vpcmpistri */, X86::VPCMPISTRIrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31081 { 12690 /* vpcmpistrm */, X86::VPCMPISTRMrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31081 { 12690 /* vpcmpistrm */, X86::VPCMPISTRMrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31082 { 12690 /* vpcmpistrm */, X86::VPCMPISTRMrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31173 { 12747 /* vpcomb */, X86::VPCOMBri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31173 { 12747 /* vpcomb */, X86::VPCOMBri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31173 { 12747 /* vpcomb */, X86::VPCOMBri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31174 { 12747 /* vpcomb */, X86::VPCOMBmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31174 { 12747 /* vpcomb */, X86::VPCOMBmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31175 { 12754 /* vpcomd */, X86::VPCOMDri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31175 { 12754 /* vpcomd */, X86::VPCOMDri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31175 { 12754 /* vpcomd */, X86::VPCOMDri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31176 { 12754 /* vpcomd */, X86::VPCOMDmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31176 { 12754 /* vpcomd */, X86::VPCOMDmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31237 { 12809 /* vpcomq */, X86::VPCOMQri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31237 { 12809 /* vpcomq */, X86::VPCOMQri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31237 { 12809 /* vpcomq */, X86::VPCOMQri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31238 { 12809 /* vpcomq */, X86::VPCOMQmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31238 { 12809 /* vpcomq */, X86::VPCOMQmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31239 { 12816 /* vpcomub */, X86::VPCOMUBri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31239 { 12816 /* vpcomub */, X86::VPCOMUBri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31239 { 12816 /* vpcomub */, X86::VPCOMUBri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31240 { 12816 /* vpcomub */, X86::VPCOMUBmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31240 { 12816 /* vpcomub */, X86::VPCOMUBmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31241 { 12824 /* vpcomud */, X86::VPCOMUDri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31241 { 12824 /* vpcomud */, X86::VPCOMUDri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31241 { 12824 /* vpcomud */, X86::VPCOMUDri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31242 { 12824 /* vpcomud */, X86::VPCOMUDmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31242 { 12824 /* vpcomud */, X86::VPCOMUDmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31243 { 12832 /* vpcomuq */, X86::VPCOMUQri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31243 { 12832 /* vpcomuq */, X86::VPCOMUQri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31243 { 12832 /* vpcomuq */, X86::VPCOMUQri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31244 { 12832 /* vpcomuq */, X86::VPCOMUQmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31244 { 12832 /* vpcomuq */, X86::VPCOMUQmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31245 { 12840 /* vpcomuw */, X86::VPCOMUWri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31245 { 12840 /* vpcomuw */, X86::VPCOMUWri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31245 { 12840 /* vpcomuw */, X86::VPCOMUWri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31246 { 12840 /* vpcomuw */, X86::VPCOMUWmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31246 { 12840 /* vpcomuw */, X86::VPCOMUWmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31247 { 12848 /* vpcomw */, X86::VPCOMWri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31247 { 12848 /* vpcomw */, X86::VPCOMWri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31247 { 12848 /* vpcomw */, X86::VPCOMWri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31248 { 12848 /* vpcomw */, X86::VPCOMWmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31248 { 12848 /* vpcomw */, X86::VPCOMWmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31597 { 13009 /* vpermil2pd */, X86::VPERMIL2PDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi41_4, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi4 }, },
31597 { 13009 /* vpermil2pd */, X86::VPERMIL2PDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi41_4, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi4 }, },
31597 { 13009 /* vpermil2pd */, X86::VPERMIL2PDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi41_4, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi4 }, },
31597 { 13009 /* vpermil2pd */, X86::VPERMIL2PDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi41_4, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi4 }, },
31598 { 13009 /* vpermil2pd */, X86::VPERMIL2PDrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3__ImmUnsignedi41_4, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi4 }, },
31598 { 13009 /* vpermil2pd */, X86::VPERMIL2PDrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3__ImmUnsignedi41_4, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi4 }, },
31598 { 13009 /* vpermil2pd */, X86::VPERMIL2PDrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3__ImmUnsignedi41_4, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi4 }, },
31599 { 13009 /* vpermil2pd */, X86::VPERMIL2PDmr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3__ImmUnsignedi41_4, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32, MCK_ImmUnsignedi4 }, },
31599 { 13009 /* vpermil2pd */, X86::VPERMIL2PDmr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3__ImmUnsignedi41_4, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32, MCK_ImmUnsignedi4 }, },
31599 { 13009 /* vpermil2pd */, X86::VPERMIL2PDmr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3__ImmUnsignedi41_4, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32, MCK_ImmUnsignedi4 }, },
31603 { 13020 /* vpermil2ps */, X86::VPERMIL2PSrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi41_4, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi4 }, },
31603 { 13020 /* vpermil2ps */, X86::VPERMIL2PSrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi41_4, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi4 }, },
31603 { 13020 /* vpermil2ps */, X86::VPERMIL2PSrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi41_4, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi4 }, },
31603 { 13020 /* vpermil2ps */, X86::VPERMIL2PSrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi41_4, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi4 }, },
31604 { 13020 /* vpermil2ps */, X86::VPERMIL2PSrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3__ImmUnsignedi41_4, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi4 }, },
31604 { 13020 /* vpermil2ps */, X86::VPERMIL2PSrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3__ImmUnsignedi41_4, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi4 }, },
31604 { 13020 /* vpermil2ps */, X86::VPERMIL2PSrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3__ImmUnsignedi41_4, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi4 }, },
31605 { 13020 /* vpermil2ps */, X86::VPERMIL2PSmr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3__ImmUnsignedi41_4, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32, MCK_ImmUnsignedi4 }, },
31605 { 13020 /* vpermil2ps */, X86::VPERMIL2PSmr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3__ImmUnsignedi41_4, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32, MCK_ImmUnsignedi4 }, },
31605 { 13020 /* vpermil2ps */, X86::VPERMIL2PSmr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3__ImmUnsignedi41_4, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32, MCK_ImmUnsignedi4 }, },
31609 { 13031 /* vpermilpd */, X86::VPERMILPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31609 { 13031 /* vpermilpd */, X86::VPERMILPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31609 { 13031 /* vpermilpd */, X86::VPERMILPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31610 { 13031 /* vpermilpd */, X86::VPERMILPDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31610 { 13031 /* vpermilpd */, X86::VPERMILPDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31611 { 13031 /* vpermilpd */, X86::VPERMILPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31611 { 13031 /* vpermilpd */, X86::VPERMILPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31612 { 13031 /* vpermilpd */, X86::VPERMILPDmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31671 { 13041 /* vpermilps */, X86::VPERMILPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31671 { 13041 /* vpermilps */, X86::VPERMILPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31671 { 13041 /* vpermilps */, X86::VPERMILPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31672 { 13041 /* vpermilps */, X86::VPERMILPSri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31672 { 13041 /* vpermilps */, X86::VPERMILPSri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31673 { 13041 /* vpermilps */, X86::VPERMILPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31673 { 13041 /* vpermilps */, X86::VPERMILPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31674 { 13041 /* vpermilps */, X86::VPERMILPSmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
32063 { 13177 /* vpextrb */, X86::VPEXTRBrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
32065 { 13177 /* vpextrb */, X86::VPEXTRBmr, Convert__Mem85_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem8, MCK_FR32, MCK_ImmUnsignedi8 }, },
32067 { 13185 /* vpextrd */, X86::VPEXTRDrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
32069 { 13185 /* vpextrd */, X86::VPEXTRDmr, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem32, MCK_FR32, MCK_ImmUnsignedi8 }, },
32071 { 13193 /* vpextrq */, X86::VPEXTRQrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
32073 { 13193 /* vpextrq */, X86::VPEXTRQmr, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem64, MCK_FR32, MCK_ImmUnsignedi8 }, },
32075 { 13201 /* vpextrw */, X86::VPEXTRWrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
32077 { 13201 /* vpextrw */, X86::VPEXTRWmr, Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_Mem16, MCK_FR32, MCK_ImmUnsignedi8 }, },
32079 { 13209 /* vpgatherdd */, X86::VPGATHERDDrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
32079 { 13209 /* vpgatherdd */, X86::VPGATHERDDrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
32084 { 13220 /* vpgatherdq */, X86::VPGATHERDQrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
32084 { 13220 /* vpgatherdq */, X86::VPGATHERDQrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
32089 { 13231 /* vpgatherqd */, X86::VPGATHERQDYrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC2565_1__Tie1_3_3, AMFBS_None, { MCK_FR32, MCK_Mem128_RC256, MCK_FR32 }, },
32089 { 13231 /* vpgatherqd */, X86::VPGATHERQDYrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC2565_1__Tie1_3_3, AMFBS_None, { MCK_FR32, MCK_Mem128_RC256, MCK_FR32 }, },
32090 { 13231 /* vpgatherqd */, X86::VPGATHERQDrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem64_RC1285_1__Tie1_3_3, AMFBS_None, { MCK_FR32, MCK_Mem64_RC128, MCK_FR32 }, },
32090 { 13231 /* vpgatherqd */, X86::VPGATHERQDrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem64_RC1285_1__Tie1_3_3, AMFBS_None, { MCK_FR32, MCK_Mem64_RC128, MCK_FR32 }, },
32094 { 13242 /* vpgatherqq */, X86::VPGATHERQQrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
32094 { 13242 /* vpgatherqq */, X86::VPGATHERQQrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3, AMFBS_None, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
32099 { 13253 /* vphaddbd */, X86::VPHADDBDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32099 { 13253 /* vphaddbd */, X86::VPHADDBDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32100 { 13253 /* vphaddbd */, X86::VPHADDBDrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
32101 { 13262 /* vphaddbq */, X86::VPHADDBQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32101 { 13262 /* vphaddbq */, X86::VPHADDBQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32102 { 13262 /* vphaddbq */, X86::VPHADDBQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
32103 { 13271 /* vphaddbw */, X86::VPHADDBWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32103 { 13271 /* vphaddbw */, X86::VPHADDBWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32104 { 13271 /* vphaddbw */, X86::VPHADDBWrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
32105 { 13280 /* vphaddd */, X86::VPHADDDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32105 { 13280 /* vphaddd */, X86::VPHADDDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32105 { 13280 /* vphaddd */, X86::VPHADDDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32106 { 13280 /* vphaddd */, X86::VPHADDDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32106 { 13280 /* vphaddd */, X86::VPHADDDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32109 { 13288 /* vphadddq */, X86::VPHADDDQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32109 { 13288 /* vphadddq */, X86::VPHADDDQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32110 { 13288 /* vphadddq */, X86::VPHADDDQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
32111 { 13297 /* vphaddsw */, X86::VPHADDSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32111 { 13297 /* vphaddsw */, X86::VPHADDSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32111 { 13297 /* vphaddsw */, X86::VPHADDSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32112 { 13297 /* vphaddsw */, X86::VPHADDSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32112 { 13297 /* vphaddsw */, X86::VPHADDSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32115 { 13306 /* vphaddubd */, X86::VPHADDUBDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32115 { 13306 /* vphaddubd */, X86::VPHADDUBDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32116 { 13306 /* vphaddubd */, X86::VPHADDUBDrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
32117 { 13316 /* vphaddubq */, X86::VPHADDUBQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32117 { 13316 /* vphaddubq */, X86::VPHADDUBQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32118 { 13316 /* vphaddubq */, X86::VPHADDUBQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
32119 { 13326 /* vphaddubw */, X86::VPHADDUBWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32119 { 13326 /* vphaddubw */, X86::VPHADDUBWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32120 { 13326 /* vphaddubw */, X86::VPHADDUBWrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
32121 { 13336 /* vphaddudq */, X86::VPHADDUDQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32121 { 13336 /* vphaddudq */, X86::VPHADDUDQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32122 { 13336 /* vphaddudq */, X86::VPHADDUDQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
32123 { 13346 /* vphadduwd */, X86::VPHADDUWDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32123 { 13346 /* vphadduwd */, X86::VPHADDUWDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32124 { 13346 /* vphadduwd */, X86::VPHADDUWDrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
32125 { 13356 /* vphadduwq */, X86::VPHADDUWQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32125 { 13356 /* vphadduwq */, X86::VPHADDUWQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32126 { 13356 /* vphadduwq */, X86::VPHADDUWQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
32127 { 13366 /* vphaddw */, X86::VPHADDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32127 { 13366 /* vphaddw */, X86::VPHADDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32127 { 13366 /* vphaddw */, X86::VPHADDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32128 { 13366 /* vphaddw */, X86::VPHADDWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32128 { 13366 /* vphaddw */, X86::VPHADDWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32131 { 13374 /* vphaddwd */, X86::VPHADDWDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32131 { 13374 /* vphaddwd */, X86::VPHADDWDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32132 { 13374 /* vphaddwd */, X86::VPHADDWDrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
32133 { 13383 /* vphaddwq */, X86::VPHADDWQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32133 { 13383 /* vphaddwq */, X86::VPHADDWQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32134 { 13383 /* vphaddwq */, X86::VPHADDWQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
32135 { 13392 /* vphminposuw */, X86::VPHMINPOSUWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32135 { 13392 /* vphminposuw */, X86::VPHMINPOSUWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32136 { 13392 /* vphminposuw */, X86::VPHMINPOSUWrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
32137 { 13404 /* vphsubbw */, X86::VPHSUBBWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32137 { 13404 /* vphsubbw */, X86::VPHSUBBWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32138 { 13404 /* vphsubbw */, X86::VPHSUBBWrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
32139 { 13413 /* vphsubd */, X86::VPHSUBDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32139 { 13413 /* vphsubd */, X86::VPHSUBDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32139 { 13413 /* vphsubd */, X86::VPHSUBDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32140 { 13413 /* vphsubd */, X86::VPHSUBDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32140 { 13413 /* vphsubd */, X86::VPHSUBDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32143 { 13421 /* vphsubdq */, X86::VPHSUBDQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32143 { 13421 /* vphsubdq */, X86::VPHSUBDQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32144 { 13421 /* vphsubdq */, X86::VPHSUBDQrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
32145 { 13430 /* vphsubsw */, X86::VPHSUBSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32145 { 13430 /* vphsubsw */, X86::VPHSUBSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32145 { 13430 /* vphsubsw */, X86::VPHSUBSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32146 { 13430 /* vphsubsw */, X86::VPHSUBSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32146 { 13430 /* vphsubsw */, X86::VPHSUBSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32149 { 13439 /* vphsubw */, X86::VPHSUBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32149 { 13439 /* vphsubw */, X86::VPHSUBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32149 { 13439 /* vphsubw */, X86::VPHSUBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32150 { 13439 /* vphsubw */, X86::VPHSUBWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32150 { 13439 /* vphsubw */, X86::VPHSUBWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32153 { 13447 /* vphsubwd */, X86::VPHSUBWDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32153 { 13447 /* vphsubwd */, X86::VPHSUBWDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32154 { 13447 /* vphsubwd */, X86::VPHSUBWDrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
32155 { 13456 /* vpinsrb */, X86::VPINSRBrr, Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
32155 { 13456 /* vpinsrb */, X86::VPINSRBrr, Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
32156 { 13456 /* vpinsrb */, X86::VPINSRBrm, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem8, MCK_ImmUnsignedi8 }, },
32156 { 13456 /* vpinsrb */, X86::VPINSRBrm, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem8, MCK_ImmUnsignedi8 }, },
32159 { 13464 /* vpinsrd */, X86::VPINSRDrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_GR32, MCK_ImmUnsignedi8 }, },
32159 { 13464 /* vpinsrd */, X86::VPINSRDrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_GR32, MCK_ImmUnsignedi8 }, },
32160 { 13464 /* vpinsrd */, X86::VPINSRDrm, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
32160 { 13464 /* vpinsrd */, X86::VPINSRDrm, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
32163 { 13472 /* vpinsrq */, X86::VPINSRQrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_GR64, MCK_ImmUnsignedi8 }, },
32163 { 13472 /* vpinsrq */, X86::VPINSRQrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_GR64, MCK_ImmUnsignedi8 }, },
32164 { 13472 /* vpinsrq */, X86::VPINSRQrm, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, },
32164 { 13472 /* vpinsrq */, X86::VPINSRQrm, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, },
32167 { 13480 /* vpinsrw */, X86::VPINSRWrr, Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
32167 { 13480 /* vpinsrw */, X86::VPINSRWrr, Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
32168 { 13480 /* vpinsrw */, X86::VPINSRWrm, Convert__Reg1_0__Reg1_1__Mem165_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem16, MCK_ImmUnsignedi8 }, },
32168 { 13480 /* vpinsrw */, X86::VPINSRWrm, Convert__Reg1_0__Reg1_1__Mem165_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem16, MCK_ImmUnsignedi8 }, },
32225 { 13506 /* vpmacsdd */, X86::VPMACSDDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32225 { 13506 /* vpmacsdd */, X86::VPMACSDDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32225 { 13506 /* vpmacsdd */, X86::VPMACSDDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32225 { 13506 /* vpmacsdd */, X86::VPMACSDDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32226 { 13506 /* vpmacsdd */, X86::VPMACSDDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32226 { 13506 /* vpmacsdd */, X86::VPMACSDDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32226 { 13506 /* vpmacsdd */, X86::VPMACSDDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32227 { 13515 /* vpmacsdqh */, X86::VPMACSDQHrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32227 { 13515 /* vpmacsdqh */, X86::VPMACSDQHrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32227 { 13515 /* vpmacsdqh */, X86::VPMACSDQHrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32227 { 13515 /* vpmacsdqh */, X86::VPMACSDQHrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32228 { 13515 /* vpmacsdqh */, X86::VPMACSDQHrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32228 { 13515 /* vpmacsdqh */, X86::VPMACSDQHrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32228 { 13515 /* vpmacsdqh */, X86::VPMACSDQHrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32229 { 13525 /* vpmacsdql */, X86::VPMACSDQLrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32229 { 13525 /* vpmacsdql */, X86::VPMACSDQLrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32229 { 13525 /* vpmacsdql */, X86::VPMACSDQLrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32229 { 13525 /* vpmacsdql */, X86::VPMACSDQLrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32230 { 13525 /* vpmacsdql */, X86::VPMACSDQLrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32230 { 13525 /* vpmacsdql */, X86::VPMACSDQLrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32230 { 13525 /* vpmacsdql */, X86::VPMACSDQLrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32231 { 13535 /* vpmacssdd */, X86::VPMACSSDDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32231 { 13535 /* vpmacssdd */, X86::VPMACSSDDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32231 { 13535 /* vpmacssdd */, X86::VPMACSSDDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32231 { 13535 /* vpmacssdd */, X86::VPMACSSDDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32232 { 13535 /* vpmacssdd */, X86::VPMACSSDDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32232 { 13535 /* vpmacssdd */, X86::VPMACSSDDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32232 { 13535 /* vpmacssdd */, X86::VPMACSSDDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32233 { 13545 /* vpmacssdqh */, X86::VPMACSSDQHrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32233 { 13545 /* vpmacssdqh */, X86::VPMACSSDQHrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32233 { 13545 /* vpmacssdqh */, X86::VPMACSSDQHrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32233 { 13545 /* vpmacssdqh */, X86::VPMACSSDQHrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32234 { 13545 /* vpmacssdqh */, X86::VPMACSSDQHrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32234 { 13545 /* vpmacssdqh */, X86::VPMACSSDQHrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32234 { 13545 /* vpmacssdqh */, X86::VPMACSSDQHrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32235 { 13556 /* vpmacssdql */, X86::VPMACSSDQLrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32235 { 13556 /* vpmacssdql */, X86::VPMACSSDQLrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32235 { 13556 /* vpmacssdql */, X86::VPMACSSDQLrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32235 { 13556 /* vpmacssdql */, X86::VPMACSSDQLrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32236 { 13556 /* vpmacssdql */, X86::VPMACSSDQLrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32236 { 13556 /* vpmacssdql */, X86::VPMACSSDQLrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32236 { 13556 /* vpmacssdql */, X86::VPMACSSDQLrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32237 { 13567 /* vpmacsswd */, X86::VPMACSSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32237 { 13567 /* vpmacsswd */, X86::VPMACSSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32237 { 13567 /* vpmacsswd */, X86::VPMACSSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32237 { 13567 /* vpmacsswd */, X86::VPMACSSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32238 { 13567 /* vpmacsswd */, X86::VPMACSSWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32238 { 13567 /* vpmacsswd */, X86::VPMACSSWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32238 { 13567 /* vpmacsswd */, X86::VPMACSSWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32239 { 13577 /* vpmacssww */, X86::VPMACSSWWrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32239 { 13577 /* vpmacssww */, X86::VPMACSSWWrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32239 { 13577 /* vpmacssww */, X86::VPMACSSWWrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32239 { 13577 /* vpmacssww */, X86::VPMACSSWWrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32240 { 13577 /* vpmacssww */, X86::VPMACSSWWrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32240 { 13577 /* vpmacssww */, X86::VPMACSSWWrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32240 { 13577 /* vpmacssww */, X86::VPMACSSWWrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32241 { 13587 /* vpmacswd */, X86::VPMACSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32241 { 13587 /* vpmacswd */, X86::VPMACSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32241 { 13587 /* vpmacswd */, X86::VPMACSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32241 { 13587 /* vpmacswd */, X86::VPMACSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32242 { 13587 /* vpmacswd */, X86::VPMACSWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32242 { 13587 /* vpmacswd */, X86::VPMACSWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32242 { 13587 /* vpmacswd */, X86::VPMACSWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32243 { 13596 /* vpmacsww */, X86::VPMACSWWrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32243 { 13596 /* vpmacsww */, X86::VPMACSWWrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32243 { 13596 /* vpmacsww */, X86::VPMACSWWrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32243 { 13596 /* vpmacsww */, X86::VPMACSWWrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32244 { 13596 /* vpmacsww */, X86::VPMACSWWrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32244 { 13596 /* vpmacsww */, X86::VPMACSWWrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32244 { 13596 /* vpmacsww */, X86::VPMACSWWrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32245 { 13605 /* vpmadcsswd */, X86::VPMADCSSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32245 { 13605 /* vpmadcsswd */, X86::VPMADCSSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32245 { 13605 /* vpmadcsswd */, X86::VPMADCSSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32245 { 13605 /* vpmadcsswd */, X86::VPMADCSSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32246 { 13605 /* vpmadcsswd */, X86::VPMADCSSWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32246 { 13605 /* vpmadcsswd */, X86::VPMADCSSWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32246 { 13605 /* vpmadcsswd */, X86::VPMADCSSWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32247 { 13616 /* vpmadcswd */, X86::VPMADCSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32247 { 13616 /* vpmadcswd */, X86::VPMADCSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32247 { 13616 /* vpmadcswd */, X86::VPMADCSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32247 { 13616 /* vpmadcswd */, X86::VPMADCSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
32248 { 13616 /* vpmadcswd */, X86::VPMADCSWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32248 { 13616 /* vpmadcswd */, X86::VPMADCSWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32248 { 13616 /* vpmadcswd */, X86::VPMADCSWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
32303 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32303 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32303 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32304 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32304 { 13650 /* vpmaddubsw */, X86::VPMADDUBSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32325 { 13661 /* vpmaddwd */, X86::VPMADDWDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32325 { 13661 /* vpmaddwd */, X86::VPMADDWDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32325 { 13661 /* vpmaddwd */, X86::VPMADDWDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32326 { 13661 /* vpmaddwd */, X86::VPMADDWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32326 { 13661 /* vpmaddwd */, X86::VPMADDWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32347 { 13670 /* vpmaskmovd */, X86::VPMASKMOVDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32347 { 13670 /* vpmaskmovd */, X86::VPMASKMOVDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32349 { 13670 /* vpmaskmovd */, X86::VPMASKMOVDmr, Convert__Mem1285_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
32349 { 13670 /* vpmaskmovd */, X86::VPMASKMOVDmr, Convert__Mem1285_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
32351 { 13681 /* vpmaskmovq */, X86::VPMASKMOVQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32351 { 13681 /* vpmaskmovq */, X86::VPMASKMOVQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32353 { 13681 /* vpmaskmovq */, X86::VPMASKMOVQmr, Convert__Mem1285_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
32353 { 13681 /* vpmaskmovq */, X86::VPMASKMOVQmr, Convert__Mem1285_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
32355 { 13692 /* vpmaxsb */, X86::VPMAXSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32355 { 13692 /* vpmaxsb */, X86::VPMAXSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32355 { 13692 /* vpmaxsb */, X86::VPMAXSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32356 { 13692 /* vpmaxsb */, X86::VPMAXSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32356 { 13692 /* vpmaxsb */, X86::VPMAXSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32377 { 13700 /* vpmaxsd */, X86::VPMAXSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32377 { 13700 /* vpmaxsd */, X86::VPMAXSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32377 { 13700 /* vpmaxsd */, X86::VPMAXSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32378 { 13700 /* vpmaxsd */, X86::VPMAXSDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32378 { 13700 /* vpmaxsd */, X86::VPMAXSDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32435 { 13716 /* vpmaxsw */, X86::VPMAXSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32435 { 13716 /* vpmaxsw */, X86::VPMAXSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32435 { 13716 /* vpmaxsw */, X86::VPMAXSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32436 { 13716 /* vpmaxsw */, X86::VPMAXSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32436 { 13716 /* vpmaxsw */, X86::VPMAXSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32457 { 13724 /* vpmaxub */, X86::VPMAXUBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32457 { 13724 /* vpmaxub */, X86::VPMAXUBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32457 { 13724 /* vpmaxub */, X86::VPMAXUBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32458 { 13724 /* vpmaxub */, X86::VPMAXUBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32458 { 13724 /* vpmaxub */, X86::VPMAXUBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32479 { 13732 /* vpmaxud */, X86::VPMAXUDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32479 { 13732 /* vpmaxud */, X86::VPMAXUDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32479 { 13732 /* vpmaxud */, X86::VPMAXUDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32480 { 13732 /* vpmaxud */, X86::VPMAXUDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32480 { 13732 /* vpmaxud */, X86::VPMAXUDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32537 { 13748 /* vpmaxuw */, X86::VPMAXUWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32537 { 13748 /* vpmaxuw */, X86::VPMAXUWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32537 { 13748 /* vpmaxuw */, X86::VPMAXUWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32538 { 13748 /* vpmaxuw */, X86::VPMAXUWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32538 { 13748 /* vpmaxuw */, X86::VPMAXUWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32559 { 13756 /* vpminsb */, X86::VPMINSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32559 { 13756 /* vpminsb */, X86::VPMINSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32559 { 13756 /* vpminsb */, X86::VPMINSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32560 { 13756 /* vpminsb */, X86::VPMINSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32560 { 13756 /* vpminsb */, X86::VPMINSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32581 { 13764 /* vpminsd */, X86::VPMINSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32581 { 13764 /* vpminsd */, X86::VPMINSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32581 { 13764 /* vpminsd */, X86::VPMINSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32582 { 13764 /* vpminsd */, X86::VPMINSDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32582 { 13764 /* vpminsd */, X86::VPMINSDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32639 { 13780 /* vpminsw */, X86::VPMINSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32639 { 13780 /* vpminsw */, X86::VPMINSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32639 { 13780 /* vpminsw */, X86::VPMINSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32640 { 13780 /* vpminsw */, X86::VPMINSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32640 { 13780 /* vpminsw */, X86::VPMINSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32661 { 13788 /* vpminub */, X86::VPMINUBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32661 { 13788 /* vpminub */, X86::VPMINUBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32661 { 13788 /* vpminub */, X86::VPMINUBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32662 { 13788 /* vpminub */, X86::VPMINUBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32662 { 13788 /* vpminub */, X86::VPMINUBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32683 { 13796 /* vpminud */, X86::VPMINUDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32683 { 13796 /* vpminud */, X86::VPMINUDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32683 { 13796 /* vpminud */, X86::VPMINUDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32684 { 13796 /* vpminud */, X86::VPMINUDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32684 { 13796 /* vpminud */, X86::VPMINUDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32741 { 13812 /* vpminuw */, X86::VPMINUWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32741 { 13812 /* vpminuw */, X86::VPMINUWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32741 { 13812 /* vpminuw */, X86::VPMINUWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32742 { 13812 /* vpminuw */, X86::VPMINUWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32742 { 13812 /* vpminuw */, X86::VPMINUWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32811 { 13890 /* vpmovmskb */, X86::VPMOVMSKBrr, Convert__GR32orGR641_0__Reg1_1, AMFBS_None, { MCK_GR32orGR64, MCK_FR32 }, },
32951 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32951 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32952 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
32953 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
32973 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32973 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32974 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQrm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_FR32, MCK_Mem16 }, },
32975 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
32995 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32995 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
32996 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
32997 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
33017 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
33017 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
33018 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
33019 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
33039 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
33039 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
33040 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
33041 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
33061 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
33061 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
33062 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
33063 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
33191 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
33191 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
33192 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
33193 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
33213 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
33213 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
33214 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQrm, Convert__Reg1_0__Mem165_1, AMFBS_None, { MCK_FR32, MCK_Mem16 }, },
33215 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
33235 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
33235 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
33236 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
33237 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
33257 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
33257 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
33258 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
33259 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
33279 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
33279 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
33280 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
33281 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
33301 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
33301 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
33302 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
33303 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQYrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_VR256, MCK_FR32 }, },
33323 { 14184 /* vpmuldq */, X86::VPMULDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33323 { 14184 /* vpmuldq */, X86::VPMULDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33323 { 14184 /* vpmuldq */, X86::VPMULDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33324 { 14184 /* vpmuldq */, X86::VPMULDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33324 { 14184 /* vpmuldq */, X86::VPMULDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33354 { 14192 /* vpmulhrsw */, X86::VPMULHRSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33354 { 14192 /* vpmulhrsw */, X86::VPMULHRSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33354 { 14192 /* vpmulhrsw */, X86::VPMULHRSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33355 { 14192 /* vpmulhrsw */, X86::VPMULHRSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33355 { 14192 /* vpmulhrsw */, X86::VPMULHRSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33376 { 14202 /* vpmulhuw */, X86::VPMULHUWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33376 { 14202 /* vpmulhuw */, X86::VPMULHUWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33376 { 14202 /* vpmulhuw */, X86::VPMULHUWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33377 { 14202 /* vpmulhuw */, X86::VPMULHUWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33377 { 14202 /* vpmulhuw */, X86::VPMULHUWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33398 { 14211 /* vpmulhw */, X86::VPMULHWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33398 { 14211 /* vpmulhw */, X86::VPMULHWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33398 { 14211 /* vpmulhw */, X86::VPMULHWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33399 { 14211 /* vpmulhw */, X86::VPMULHWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33399 { 14211 /* vpmulhw */, X86::VPMULHWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33420 { 14219 /* vpmulld */, X86::VPMULLDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33420 { 14219 /* vpmulld */, X86::VPMULLDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33420 { 14219 /* vpmulld */, X86::VPMULLDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33421 { 14219 /* vpmulld */, X86::VPMULLDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33421 { 14219 /* vpmulld */, X86::VPMULLDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33478 { 14235 /* vpmullw */, X86::VPMULLWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33478 { 14235 /* vpmullw */, X86::VPMULLWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33478 { 14235 /* vpmullw */, X86::VPMULLWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33479 { 14235 /* vpmullw */, X86::VPMULLWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33479 { 14235 /* vpmullw */, X86::VPMULLWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33527 { 14258 /* vpmuludq */, X86::VPMULUDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33527 { 14258 /* vpmuludq */, X86::VPMULUDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33527 { 14258 /* vpmuludq */, X86::VPMULUDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33528 { 14258 /* vpmuludq */, X86::VPMULUDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33528 { 14258 /* vpmuludq */, X86::VPMULUDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33648 { 14303 /* vpor */, X86::VPORrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33648 { 14303 /* vpor */, X86::VPORrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33648 { 14303 /* vpor */, X86::VPORrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33649 { 14303 /* vpor */, X86::VPORrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33649 { 14303 /* vpor */, X86::VPORrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33706 { 14320 /* vpperm */, X86::VPPERMrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
33706 { 14320 /* vpperm */, X86::VPPERMrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
33706 { 14320 /* vpperm */, X86::VPPERMrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
33706 { 14320 /* vpperm */, X86::VPPERMrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
33707 { 14320 /* vpperm */, X86::VPPERMrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33707 { 14320 /* vpperm */, X86::VPPERMrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33707 { 14320 /* vpperm */, X86::VPPERMrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33708 { 14320 /* vpperm */, X86::VPPERMrmr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33708 { 14320 /* vpperm */, X86::VPPERMrmr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33708 { 14320 /* vpperm */, X86::VPPERMrmr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33925 { 14387 /* vprotb */, X86::VPROTBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33925 { 14387 /* vprotb */, X86::VPROTBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33925 { 14387 /* vprotb */, X86::VPROTBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33926 { 14387 /* vprotb */, X86::VPROTBri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33926 { 14387 /* vprotb */, X86::VPROTBri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33927 { 14387 /* vprotb */, X86::VPROTBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33927 { 14387 /* vprotb */, X86::VPROTBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33928 { 14387 /* vprotb */, X86::VPROTBmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33928 { 14387 /* vprotb */, X86::VPROTBmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33929 { 14387 /* vprotb */, X86::VPROTBmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33930 { 14394 /* vprotd */, X86::VPROTDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33930 { 14394 /* vprotd */, X86::VPROTDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33930 { 14394 /* vprotd */, X86::VPROTDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33931 { 14394 /* vprotd */, X86::VPROTDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33931 { 14394 /* vprotd */, X86::VPROTDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33932 { 14394 /* vprotd */, X86::VPROTDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33932 { 14394 /* vprotd */, X86::VPROTDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33933 { 14394 /* vprotd */, X86::VPROTDmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33933 { 14394 /* vprotd */, X86::VPROTDmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33934 { 14394 /* vprotd */, X86::VPROTDmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33935 { 14401 /* vprotq */, X86::VPROTQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33935 { 14401 /* vprotq */, X86::VPROTQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33935 { 14401 /* vprotq */, X86::VPROTQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33936 { 14401 /* vprotq */, X86::VPROTQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33936 { 14401 /* vprotq */, X86::VPROTQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33937 { 14401 /* vprotq */, X86::VPROTQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33937 { 14401 /* vprotq */, X86::VPROTQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33938 { 14401 /* vprotq */, X86::VPROTQmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33938 { 14401 /* vprotq */, X86::VPROTQmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33939 { 14401 /* vprotq */, X86::VPROTQmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33940 { 14408 /* vprotw */, X86::VPROTWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33940 { 14408 /* vprotw */, X86::VPROTWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33940 { 14408 /* vprotw */, X86::VPROTWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33941 { 14408 /* vprotw */, X86::VPROTWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33941 { 14408 /* vprotw */, X86::VPROTWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33942 { 14408 /* vprotw */, X86::VPROTWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33942 { 14408 /* vprotw */, X86::VPROTWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33943 { 14408 /* vprotw */, X86::VPROTWmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33943 { 14408 /* vprotw */, X86::VPROTWmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33944 { 14408 /* vprotw */, X86::VPROTWmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33945 { 14415 /* vpsadbw */, X86::VPSADBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33945 { 14415 /* vpsadbw */, X86::VPSADBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33945 { 14415 /* vpsadbw */, X86::VPSADBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33946 { 14415 /* vpsadbw */, X86::VPSADBWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33946 { 14415 /* vpsadbw */, X86::VPSADBWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33967 { 14471 /* vpshab */, X86::VPSHABrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33967 { 14471 /* vpshab */, X86::VPSHABrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33967 { 14471 /* vpshab */, X86::VPSHABrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33968 { 14471 /* vpshab */, X86::VPSHABrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33968 { 14471 /* vpshab */, X86::VPSHABrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33969 { 14471 /* vpshab */, X86::VPSHABmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33969 { 14471 /* vpshab */, X86::VPSHABmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33970 { 14478 /* vpshad */, X86::VPSHADrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33970 { 14478 /* vpshad */, X86::VPSHADrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33970 { 14478 /* vpshad */, X86::VPSHADrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33971 { 14478 /* vpshad */, X86::VPSHADrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33971 { 14478 /* vpshad */, X86::VPSHADrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33972 { 14478 /* vpshad */, X86::VPSHADmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33972 { 14478 /* vpshad */, X86::VPSHADmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33973 { 14485 /* vpshaq */, X86::VPSHAQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33973 { 14485 /* vpshaq */, X86::VPSHAQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33973 { 14485 /* vpshaq */, X86::VPSHAQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33974 { 14485 /* vpshaq */, X86::VPSHAQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33974 { 14485 /* vpshaq */, X86::VPSHAQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33975 { 14485 /* vpshaq */, X86::VPSHAQmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33975 { 14485 /* vpshaq */, X86::VPSHAQmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33976 { 14492 /* vpshaw */, X86::VPSHAWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33976 { 14492 /* vpshaw */, X86::VPSHAWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33976 { 14492 /* vpshaw */, X86::VPSHAWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33977 { 14492 /* vpshaw */, X86::VPSHAWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33977 { 14492 /* vpshaw */, X86::VPSHAWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33978 { 14492 /* vpshaw */, X86::VPSHAWmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33978 { 14492 /* vpshaw */, X86::VPSHAWmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33979 { 14499 /* vpshlb */, X86::VPSHLBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33979 { 14499 /* vpshlb */, X86::VPSHLBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33979 { 14499 /* vpshlb */, X86::VPSHLBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33980 { 14499 /* vpshlb */, X86::VPSHLBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33980 { 14499 /* vpshlb */, X86::VPSHLBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33981 { 14499 /* vpshlb */, X86::VPSHLBmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33981 { 14499 /* vpshlb */, X86::VPSHLBmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33982 { 14506 /* vpshld */, X86::VPSHLDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33982 { 14506 /* vpshld */, X86::VPSHLDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33982 { 14506 /* vpshld */, X86::VPSHLDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33983 { 14506 /* vpshld */, X86::VPSHLDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33983 { 14506 /* vpshld */, X86::VPSHLDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33984 { 14506 /* vpshld */, X86::VPSHLDmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33984 { 14506 /* vpshld */, X86::VPSHLDmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
34129 { 14564 /* vpshlq */, X86::VPSHLQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34129 { 14564 /* vpshlq */, X86::VPSHLQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34129 { 14564 /* vpshlq */, X86::VPSHLQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34130 { 14564 /* vpshlq */, X86::VPSHLQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34130 { 14564 /* vpshlq */, X86::VPSHLQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34131 { 14564 /* vpshlq */, X86::VPSHLQmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
34131 { 14564 /* vpshlq */, X86::VPSHLQmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
34132 { 14571 /* vpshlw */, X86::VPSHLWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34132 { 14571 /* vpshlw */, X86::VPSHLWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34132 { 14571 /* vpshlw */, X86::VPSHLWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34133 { 14571 /* vpshlw */, X86::VPSHLWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34133 { 14571 /* vpshlw */, X86::VPSHLWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34134 { 14571 /* vpshlw */, X86::VPSHLWmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
34134 { 14571 /* vpshlw */, X86::VPSHLWmr, Convert__Reg1_0__Mem1285_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
34279 { 14629 /* vpshufb */, X86::VPSHUFBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34279 { 14629 /* vpshufb */, X86::VPSHUFBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34279 { 14629 /* vpshufb */, X86::VPSHUFBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34280 { 14629 /* vpshufb */, X86::VPSHUFBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34280 { 14629 /* vpshufb */, X86::VPSHUFBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34313 { 14650 /* vpshufd */, X86::VPSHUFDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34313 { 14650 /* vpshufd */, X86::VPSHUFDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34314 { 14650 /* vpshufd */, X86::VPSHUFDmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34344 { 14658 /* vpshufhw */, X86::VPSHUFHWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34344 { 14658 /* vpshufhw */, X86::VPSHUFHWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34345 { 14658 /* vpshufhw */, X86::VPSHUFHWmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34366 { 14667 /* vpshuflw */, X86::VPSHUFLWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34366 { 14667 /* vpshuflw */, X86::VPSHUFLWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34367 { 14667 /* vpshuflw */, X86::VPSHUFLWmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34388 { 14676 /* vpsignb */, X86::VPSIGNBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34388 { 14676 /* vpsignb */, X86::VPSIGNBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34388 { 14676 /* vpsignb */, X86::VPSIGNBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34389 { 14676 /* vpsignb */, X86::VPSIGNBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34389 { 14676 /* vpsignb */, X86::VPSIGNBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34392 { 14684 /* vpsignd */, X86::VPSIGNDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34392 { 14684 /* vpsignd */, X86::VPSIGNDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34392 { 14684 /* vpsignd */, X86::VPSIGNDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34393 { 14684 /* vpsignd */, X86::VPSIGNDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34393 { 14684 /* vpsignd */, X86::VPSIGNDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34396 { 14692 /* vpsignw */, X86::VPSIGNWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34396 { 14692 /* vpsignw */, X86::VPSIGNWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34396 { 14692 /* vpsignw */, X86::VPSIGNWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34397 { 14692 /* vpsignw */, X86::VPSIGNWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34397 { 14692 /* vpsignw */, X86::VPSIGNWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34400 { 14700 /* vpslld */, X86::VPSLLDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34400 { 14700 /* vpslld */, X86::VPSLLDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34400 { 14700 /* vpslld */, X86::VPSLLDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34401 { 14700 /* vpslld */, X86::VPSLLDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34401 { 14700 /* vpslld */, X86::VPSLLDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34402 { 14700 /* vpslld */, X86::VPSLLDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34402 { 14700 /* vpslld */, X86::VPSLLDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34403 { 14700 /* vpslld */, X86::VPSLLDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
34451 { 14707 /* vpslldq */, X86::VPSLLDQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34451 { 14707 /* vpslldq */, X86::VPSLLDQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34459 { 14715 /* vpsllq */, X86::VPSLLQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34459 { 14715 /* vpsllq */, X86::VPSLLQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34459 { 14715 /* vpsllq */, X86::VPSLLQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34460 { 14715 /* vpsllq */, X86::VPSLLQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34460 { 14715 /* vpsllq */, X86::VPSLLQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34461 { 14715 /* vpsllq */, X86::VPSLLQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34461 { 14715 /* vpsllq */, X86::VPSLLQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34462 { 14715 /* vpsllq */, X86::VPSLLQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
34510 { 14722 /* vpsllvd */, X86::VPSLLVDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34510 { 14722 /* vpsllvd */, X86::VPSLLVDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34510 { 14722 /* vpsllvd */, X86::VPSLLVDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34511 { 14722 /* vpsllvd */, X86::VPSLLVDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34511 { 14722 /* vpsllvd */, X86::VPSLLVDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34541 { 14730 /* vpsllvq */, X86::VPSLLVQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34541 { 14730 /* vpsllvq */, X86::VPSLLVQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34541 { 14730 /* vpsllvq */, X86::VPSLLVQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34542 { 14730 /* vpsllvq */, X86::VPSLLVQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34542 { 14730 /* vpsllvq */, X86::VPSLLVQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34590 { 14746 /* vpsllw */, X86::VPSLLWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34590 { 14746 /* vpsllw */, X86::VPSLLWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34590 { 14746 /* vpsllw */, X86::VPSLLWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34591 { 14746 /* vpsllw */, X86::VPSLLWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34591 { 14746 /* vpsllw */, X86::VPSLLWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34592 { 14746 /* vpsllw */, X86::VPSLLWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34592 { 14746 /* vpsllw */, X86::VPSLLWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34593 { 14746 /* vpsllw */, X86::VPSLLWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
34632 { 14753 /* vpsrad */, X86::VPSRADrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34632 { 14753 /* vpsrad */, X86::VPSRADrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34632 { 14753 /* vpsrad */, X86::VPSRADrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34633 { 14753 /* vpsrad */, X86::VPSRADri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34633 { 14753 /* vpsrad */, X86::VPSRADri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34634 { 14753 /* vpsrad */, X86::VPSRADrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34634 { 14753 /* vpsrad */, X86::VPSRADrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34635 { 14753 /* vpsrad */, X86::VPSRADYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
34728 { 14767 /* vpsravd */, X86::VPSRAVDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34728 { 14767 /* vpsravd */, X86::VPSRAVDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34728 { 14767 /* vpsravd */, X86::VPSRAVDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34729 { 14767 /* vpsravd */, X86::VPSRAVDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34729 { 14767 /* vpsravd */, X86::VPSRAVDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34804 { 14791 /* vpsraw */, X86::VPSRAWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34804 { 14791 /* vpsraw */, X86::VPSRAWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34804 { 14791 /* vpsraw */, X86::VPSRAWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34805 { 14791 /* vpsraw */, X86::VPSRAWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34805 { 14791 /* vpsraw */, X86::VPSRAWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34806 { 14791 /* vpsraw */, X86::VPSRAWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34806 { 14791 /* vpsraw */, X86::VPSRAWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34807 { 14791 /* vpsraw */, X86::VPSRAWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
34846 { 14798 /* vpsrld */, X86::VPSRLDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34846 { 14798 /* vpsrld */, X86::VPSRLDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34846 { 14798 /* vpsrld */, X86::VPSRLDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34847 { 14798 /* vpsrld */, X86::VPSRLDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34847 { 14798 /* vpsrld */, X86::VPSRLDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34848 { 14798 /* vpsrld */, X86::VPSRLDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34848 { 14798 /* vpsrld */, X86::VPSRLDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34849 { 14798 /* vpsrld */, X86::VPSRLDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
34897 { 14805 /* vpsrldq */, X86::VPSRLDQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34897 { 14805 /* vpsrldq */, X86::VPSRLDQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34905 { 14813 /* vpsrlq */, X86::VPSRLQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34905 { 14813 /* vpsrlq */, X86::VPSRLQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34905 { 14813 /* vpsrlq */, X86::VPSRLQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34906 { 14813 /* vpsrlq */, X86::VPSRLQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34906 { 14813 /* vpsrlq */, X86::VPSRLQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34907 { 14813 /* vpsrlq */, X86::VPSRLQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34907 { 14813 /* vpsrlq */, X86::VPSRLQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34908 { 14813 /* vpsrlq */, X86::VPSRLQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
34956 { 14820 /* vpsrlvd */, X86::VPSRLVDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34956 { 14820 /* vpsrlvd */, X86::VPSRLVDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34956 { 14820 /* vpsrlvd */, X86::VPSRLVDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34957 { 14820 /* vpsrlvd */, X86::VPSRLVDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34957 { 14820 /* vpsrlvd */, X86::VPSRLVDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34987 { 14828 /* vpsrlvq */, X86::VPSRLVQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34987 { 14828 /* vpsrlvq */, X86::VPSRLVQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34987 { 14828 /* vpsrlvq */, X86::VPSRLVQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34988 { 14828 /* vpsrlvq */, X86::VPSRLVQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34988 { 14828 /* vpsrlvq */, X86::VPSRLVQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35036 { 14844 /* vpsrlw */, X86::VPSRLWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35036 { 14844 /* vpsrlw */, X86::VPSRLWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35036 { 14844 /* vpsrlw */, X86::VPSRLWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35037 { 14844 /* vpsrlw */, X86::VPSRLWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
35037 { 14844 /* vpsrlw */, X86::VPSRLWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
35038 { 14844 /* vpsrlw */, X86::VPSRLWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35038 { 14844 /* vpsrlw */, X86::VPSRLWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35039 { 14844 /* vpsrlw */, X86::VPSRLWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
35078 { 14851 /* vpsubb */, X86::VPSUBBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35078 { 14851 /* vpsubb */, X86::VPSUBBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35078 { 14851 /* vpsubb */, X86::VPSUBBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35079 { 14851 /* vpsubb */, X86::VPSUBBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35079 { 14851 /* vpsubb */, X86::VPSUBBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35100 { 14858 /* vpsubd */, X86::VPSUBDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35100 { 14858 /* vpsubd */, X86::VPSUBDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35100 { 14858 /* vpsubd */, X86::VPSUBDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35101 { 14858 /* vpsubd */, X86::VPSUBDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35101 { 14858 /* vpsubd */, X86::VPSUBDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35131 { 14865 /* vpsubq */, X86::VPSUBQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35131 { 14865 /* vpsubq */, X86::VPSUBQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35131 { 14865 /* vpsubq */, X86::VPSUBQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35132 { 14865 /* vpsubq */, X86::VPSUBQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35132 { 14865 /* vpsubq */, X86::VPSUBQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35162 { 14872 /* vpsubsb */, X86::VPSUBSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35162 { 14872 /* vpsubsb */, X86::VPSUBSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35162 { 14872 /* vpsubsb */, X86::VPSUBSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35163 { 14872 /* vpsubsb */, X86::VPSUBSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35163 { 14872 /* vpsubsb */, X86::VPSUBSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35184 { 14880 /* vpsubsw */, X86::VPSUBSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35184 { 14880 /* vpsubsw */, X86::VPSUBSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35184 { 14880 /* vpsubsw */, X86::VPSUBSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35185 { 14880 /* vpsubsw */, X86::VPSUBSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35185 { 14880 /* vpsubsw */, X86::VPSUBSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35206 { 14888 /* vpsubusb */, X86::VPSUBUSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35206 { 14888 /* vpsubusb */, X86::VPSUBUSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35206 { 14888 /* vpsubusb */, X86::VPSUBUSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35207 { 14888 /* vpsubusb */, X86::VPSUBUSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35207 { 14888 /* vpsubusb */, X86::VPSUBUSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35228 { 14897 /* vpsubusw */, X86::VPSUBUSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35228 { 14897 /* vpsubusw */, X86::VPSUBUSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35228 { 14897 /* vpsubusw */, X86::VPSUBUSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35229 { 14897 /* vpsubusw */, X86::VPSUBUSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35229 { 14897 /* vpsubusw */, X86::VPSUBUSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35250 { 14906 /* vpsubw */, X86::VPSUBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35250 { 14906 /* vpsubw */, X86::VPSUBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35250 { 14906 /* vpsubw */, X86::VPSUBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35251 { 14906 /* vpsubw */, X86::VPSUBWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35251 { 14906 /* vpsubw */, X86::VPSUBWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35326 { 14935 /* vptest */, X86::VPTESTrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
35326 { 14935 /* vptest */, X86::VPTESTrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
35327 { 14935 /* vptest */, X86::VPTESTrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
35450 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35450 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35450 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35451 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35451 { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35472 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35472 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35472 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35473 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35473 { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35503 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35503 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35503 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35504 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35504 { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35534 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35534 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35534 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35535 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35535 { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35556 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35556 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35556 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35557 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35557 { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35578 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35578 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35578 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35579 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35579 { 15074 /* vpunpckldq */, X86::VPUNPCKLDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35609 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35609 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35609 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35610 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35610 { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35640 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35640 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35640 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35641 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35641 { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35662 { 15108 /* vpxor */, X86::VPXORrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35662 { 15108 /* vpxor */, X86::VPXORrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35662 { 15108 /* vpxor */, X86::VPXORrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35663 { 15108 /* vpxor */, X86::VPXORrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35663 { 15108 /* vpxor */, X86::VPXORrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35906 { 15236 /* vrcpps */, X86::VRCPPSr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
35906 { 15236 /* vrcpps */, X86::VRCPPSr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
35907 { 15236 /* vrcpps */, X86::VRCPPSm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
35910 { 15243 /* vrcpss */, X86::VRCPSSr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35910 { 15243 /* vrcpss */, X86::VRCPSSr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35910 { 15243 /* vrcpss */, X86::VRCPSSr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35911 { 15243 /* vrcpss */, X86::VRCPSSm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
35911 { 15243 /* vrcpss */, X86::VRCPSSm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
36068 { 15338 /* vroundpd */, X86::VROUNDPDr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
36068 { 15338 /* vroundpd */, X86::VROUNDPDr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
36069 { 15338 /* vroundpd */, X86::VROUNDPDm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
36072 { 15347 /* vroundps */, X86::VROUNDPSr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
36072 { 15347 /* vroundps */, X86::VROUNDPSr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
36073 { 15347 /* vroundps */, X86::VROUNDPSm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, AMFBS_None, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
36076 { 15356 /* vroundsd */, X86::VROUNDSDr_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
36076 { 15356 /* vroundsd */, X86::VROUNDSDr_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
36076 { 15356 /* vroundsd */, X86::VROUNDSDr_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
36077 { 15356 /* vroundsd */, X86::VROUNDSDm_Int, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, },
36077 { 15356 /* vroundsd */, X86::VROUNDSDm_Int, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, },
36078 { 15365 /* vroundss */, X86::VROUNDSSr_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
36078 { 15365 /* vroundss */, X86::VROUNDSSr_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
36078 { 15365 /* vroundss */, X86::VROUNDSSr_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
36079 { 15365 /* vroundss */, X86::VROUNDSSm_Int, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
36079 { 15365 /* vroundss */, X86::VROUNDSSm_Int, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
36188 { 15462 /* vrsqrtps */, X86::VRSQRTPSr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
36188 { 15462 /* vrsqrtps */, X86::VRSQRTPSr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
36189 { 15462 /* vrsqrtps */, X86::VRSQRTPSm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
36192 { 15471 /* vrsqrtss */, X86::VRSQRTSSr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36192 { 15471 /* vrsqrtss */, X86::VRSQRTSSr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36192 { 15471 /* vrsqrtss */, X86::VRSQRTSSr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36193 { 15471 /* vrsqrtss */, X86::VRSQRTSSm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
36193 { 15471 /* vrsqrtss */, X86::VRSQRTSSm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
36364 { 15732 /* vshufpd */, X86::VSHUFPDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
36364 { 15732 /* vshufpd */, X86::VSHUFPDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
36364 { 15732 /* vshufpd */, X86::VSHUFPDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
36365 { 15732 /* vshufpd */, X86::VSHUFPDrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
36365 { 15732 /* vshufpd */, X86::VSHUFPDrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
36395 { 15740 /* vshufps */, X86::VSHUFPSrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
36395 { 15740 /* vshufps */, X86::VSHUFPSrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
36395 { 15740 /* vshufps */, X86::VSHUFPSrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
36396 { 15740 /* vshufps */, X86::VSHUFPSrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
36396 { 15740 /* vshufps */, X86::VSHUFPSrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
36426 { 15748 /* vsqrtpd */, X86::VSQRTPDr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
36426 { 15748 /* vsqrtpd */, X86::VSQRTPDr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
36427 { 15748 /* vsqrtpd */, X86::VSQRTPDm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
36460 { 15756 /* vsqrtps */, X86::VSQRTPSr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
36460 { 15756 /* vsqrtps */, X86::VSQRTPSr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
36461 { 15756 /* vsqrtps */, X86::VSQRTPSm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
36494 { 15764 /* vsqrtsd */, X86::VSQRTSDr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36494 { 15764 /* vsqrtsd */, X86::VSQRTSDr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36494 { 15764 /* vsqrtsd */, X86::VSQRTSDr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36495 { 15764 /* vsqrtsd */, X86::VSQRTSDm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
36495 { 15764 /* vsqrtsd */, X86::VSQRTSDm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
36505 { 15772 /* vsqrtss */, X86::VSQRTSSr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36505 { 15772 /* vsqrtss */, X86::VSQRTSSr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36505 { 15772 /* vsqrtss */, X86::VSQRTSSr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36506 { 15772 /* vsqrtss */, X86::VSQRTSSm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
36506 { 15772 /* vsqrtss */, X86::VSQRTSSm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
36517 { 15789 /* vsubpd */, X86::VSUBPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36517 { 15789 /* vsubpd */, X86::VSUBPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36517 { 15789 /* vsubpd */, X86::VSUBPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36518 { 15789 /* vsubpd */, X86::VSUBPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
36518 { 15789 /* vsubpd */, X86::VSUBPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
36551 { 15796 /* vsubps */, X86::VSUBPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36551 { 15796 /* vsubps */, X86::VSUBPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36551 { 15796 /* vsubps */, X86::VSUBPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36552 { 15796 /* vsubps */, X86::VSUBPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
36552 { 15796 /* vsubps */, X86::VSUBPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
36585 { 15803 /* vsubsd */, X86::VSUBSDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36585 { 15803 /* vsubsd */, X86::VSUBSDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36585 { 15803 /* vsubsd */, X86::VSUBSDrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36586 { 15803 /* vsubsd */, X86::VSUBSDrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
36586 { 15803 /* vsubsd */, X86::VSUBSDrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
36596 { 15810 /* vsubss */, X86::VSUBSSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36596 { 15810 /* vsubss */, X86::VSUBSSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36596 { 15810 /* vsubss */, X86::VSUBSSrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36597 { 15810 /* vsubss */, X86::VSUBSSrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
36597 { 15810 /* vsubss */, X86::VSUBSSrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
36607 { 15817 /* vtestpd */, X86::VTESTPDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
36607 { 15817 /* vtestpd */, X86::VTESTPDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
36608 { 15817 /* vtestpd */, X86::VTESTPDrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
36611 { 15825 /* vtestps */, X86::VTESTPSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
36611 { 15825 /* vtestps */, X86::VTESTPSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
36612 { 15825 /* vtestps */, X86::VTESTPSrm, Convert__Reg1_0__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
36615 { 15833 /* vucomisd */, X86::VUCOMISDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
36615 { 15833 /* vucomisd */, X86::VUCOMISDrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
36616 { 15833 /* vucomisd */, X86::VUCOMISDrm, Convert__Reg1_0__Mem645_1, AMFBS_None, { MCK_FR32, MCK_Mem64 }, },
36620 { 15842 /* vucomiss */, X86::VUCOMISSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
36620 { 15842 /* vucomiss */, X86::VUCOMISSrr, Convert__Reg1_0__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
36621 { 15842 /* vucomiss */, X86::VUCOMISSrm, Convert__Reg1_0__Mem325_1, AMFBS_None, { MCK_FR32, MCK_Mem32 }, },
36625 { 15851 /* vunpckhpd */, X86::VUNPCKHPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36625 { 15851 /* vunpckhpd */, X86::VUNPCKHPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36625 { 15851 /* vunpckhpd */, X86::VUNPCKHPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36626 { 15851 /* vunpckhpd */, X86::VUNPCKHPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
36626 { 15851 /* vunpckhpd */, X86::VUNPCKHPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
36656 { 15861 /* vunpckhps */, X86::VUNPCKHPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36656 { 15861 /* vunpckhps */, X86::VUNPCKHPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36656 { 15861 /* vunpckhps */, X86::VUNPCKHPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36657 { 15861 /* vunpckhps */, X86::VUNPCKHPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
36657 { 15861 /* vunpckhps */, X86::VUNPCKHPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
36687 { 15871 /* vunpcklpd */, X86::VUNPCKLPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36687 { 15871 /* vunpcklpd */, X86::VUNPCKLPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36687 { 15871 /* vunpcklpd */, X86::VUNPCKLPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36688 { 15871 /* vunpcklpd */, X86::VUNPCKLPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
36688 { 15871 /* vunpcklpd */, X86::VUNPCKLPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
36718 { 15881 /* vunpcklps */, X86::VUNPCKLPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36718 { 15881 /* vunpcklps */, X86::VUNPCKLPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36718 { 15881 /* vunpcklps */, X86::VUNPCKLPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36719 { 15881 /* vunpcklps */, X86::VUNPCKLPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
36719 { 15881 /* vunpcklps */, X86::VUNPCKLPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
36749 { 15891 /* vxorpd */, X86::VXORPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36749 { 15891 /* vxorpd */, X86::VXORPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36749 { 15891 /* vxorpd */, X86::VXORPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36750 { 15891 /* vxorpd */, X86::VXORPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
36750 { 15891 /* vxorpd */, X86::VXORPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
36780 { 15898 /* vxorps */, X86::VXORPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36780 { 15898 /* vxorps */, X86::VXORPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36780 { 15898 /* vxorps */, X86::VXORPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36781 { 15898 /* vxorps */, X86::VXORPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
36781 { 15898 /* vxorps */, X86::VXORPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, AMFBS_None, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
36899 { 16206 /* xorpd */, X86::XORPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
36899 { 16206 /* xorpd */, X86::XORPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
36900 { 16206 /* xorpd */, X86::XORPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },
36901 { 16212 /* xorps */, X86::XORPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
36901 { 16212 /* xorps */, X86::XORPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_None, { MCK_FR32, MCK_FR32 }, },
36902 { 16212 /* xorps */, X86::XORPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, AMFBS_None, { MCK_FR32, MCK_Mem128 }, },