|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/X86/X86GenAsmMatcher.inc10685 { 8143 /* valignd */, X86::VALIGNDZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10686 { 8143 /* valignd */, X86::VALIGNDZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10687 { 8143 /* valignd */, X86::VALIGNDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10712 { 8151 /* valignq */, X86::VALIGNQZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10713 { 8151 /* valignq */, X86::VALIGNQZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10714 { 8151 /* valignq */, X86::VALIGNQZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12341 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12342 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12343 { 9488 /* vdbpsadbw */, X86::VDBPSADBWZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12618 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12619 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12620 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12625 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12626 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12627 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12648 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12649 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12650 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12655 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12656 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12657 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12671 { 9767 /* vfixupimmsd */, X86::VFIXUPIMMSDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12674 { 9767 /* vfixupimmsd */, X86::VFIXUPIMMSDZrrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12680 { 9779 /* vfixupimmss */, X86::VFIXUPIMMSSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12683 { 9779 /* vfixupimmss */, X86::VFIXUPIMMSSZrrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14519 { 11137 /* vgetmantsd */, X86::VGETMANTSDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14528 { 11148 /* vgetmantss */, X86::VGETMANTSSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14547 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14548 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14549 { 11159 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14578 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14579 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14580 { 11177 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14640 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14641 { 11247 /* vinsertf32x4 */, X86::VINSERTF32x4Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14650 { 11260 /* vinsertf32x8 */, X86::VINSERTF32x8Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14658 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14659 { 11273 /* vinsertf64x2 */, X86::VINSERTF64x2Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14668 { 11286 /* vinsertf64x4 */, X86::VINSERTF64x4Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14678 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Z256rrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14679 { 11311 /* vinserti32x4 */, X86::VINSERTI32x4Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14688 { 11324 /* vinserti32x8 */, X86::VINSERTI32x8Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14696 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Z256rrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14697 { 11337 /* vinserti64x2 */, X86::VINSERTI64x2Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14706 { 11350 /* vinserti64x4 */, X86::VINSERTI64x4Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16065 { 12279 /* vpalignr */, X86::VPALIGNRZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16066 { 12279 /* vpalignr */, X86::VPALIGNRZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16067 { 12279 /* vpalignr */, X86::VPALIGNRZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19626 { 14513 /* vpshldd */, X86::VPSHLDDZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19627 { 14513 /* vpshldd */, X86::VPSHLDDZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19628 { 14513 /* vpshldd */, X86::VPSHLDDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19653 { 14521 /* vpshldq */, X86::VPSHLDQZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19654 { 14521 /* vpshldq */, X86::VPSHLDQZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19655 { 14521 /* vpshldq */, X86::VPSHLDQZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19749 { 14556 /* vpshldw */, X86::VPSHLDWZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19750 { 14556 /* vpshldw */, X86::VPSHLDWZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19751 { 14556 /* vpshldw */, X86::VPSHLDWZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19776 { 14578 /* vpshrdd */, X86::VPSHRDDZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19777 { 14578 /* vpshrdd */, X86::VPSHRDDZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19778 { 14578 /* vpshrdd */, X86::VPSHRDDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19803 { 14586 /* vpshrdq */, X86::VPSHRDQZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19804 { 14586 /* vpshrdq */, X86::VPSHRDQZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19805 { 14586 /* vpshrdq */, X86::VPSHRDQZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19899 { 14621 /* vpshrdw */, X86::VPSHRDWZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19900 { 14621 /* vpshrdw */, X86::VPSHRDWZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19901 { 14621 /* vpshrdw */, X86::VPSHRDWZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20913 { 14913 /* vpternlogd */, X86::VPTERNLOGDZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20914 { 14913 /* vpternlogd */, X86::VPTERNLOGDZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20915 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20919 { 14913 /* vpternlogd */, X86::VPTERNLOGDZ128rrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20920 { 14913 /* vpternlogd */, X86::VPTERNLOGDZ256rrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20921 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20940 { 14924 /* vpternlogq */, X86::VPTERNLOGQZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20941 { 14924 /* vpternlogq */, X86::VPTERNLOGQZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20942 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20946 { 14924 /* vpternlogq */, X86::VPTERNLOGQZ128rrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20947 { 14924 /* vpternlogq */, X86::VPTERNLOGQZ256rrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20948 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21362 { 15128 /* vrangepd */, X86::VRANGEPDZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21363 { 15128 /* vrangepd */, X86::VRANGEPDZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21364 { 15128 /* vrangepd */, X86::VRANGEPDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21392 { 15137 /* vrangeps */, X86::VRANGEPSZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21393 { 15137 /* vrangeps */, X86::VRANGEPSZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21394 { 15137 /* vrangeps */, X86::VRANGEPSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21415 { 15146 /* vrangesd */, X86::VRANGESDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21424 { 15155 /* vrangess */, X86::VRANGESSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21607 { 15270 /* vreducesd */, X86::VREDUCESDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21616 { 15280 /* vreducess */, X86::VREDUCESSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21685 { 15314 /* vrndscalesd */, X86::VRNDSCALESDZr_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21694 { 15326 /* vrndscaless */, X86::VRNDSCALESSZr_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21930 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Z256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21931 { 15688 /* vshuff32x4 */, X86::VSHUFF32X4Zrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21948 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Z256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21949 { 15699 /* vshuff64x2 */, X86::VSHUFF64X2Zrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21966 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Z256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21967 { 15710 /* vshufi32x4 */, X86::VSHUFI32X4Zrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21984 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Z256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21985 { 15721 /* vshufi64x2 */, X86::VSHUFI64X2Zrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22009 { 15732 /* vshufpd */, X86::VSHUFPDZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22010 { 15732 /* vshufpd */, X86::VSHUFPDZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22011 { 15732 /* vshufpd */, X86::VSHUFPDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22040 { 15740 /* vshufps */, X86::VSHUFPSZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22041 { 15740 /* vshufps */, X86::VSHUFPSZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22042 { 15740 /* vshufps */, X86::VSHUFPSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },