reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
12608 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 12609 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 12610 { 9743 /* vfixupimmpd */, X86::VFIXUPIMMPDZrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 12638 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 12639 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 12640 { 9755 /* vfixupimmps */, X86::VFIXUPIMMPSZrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 12668 { 9767 /* vfixupimmsd */, X86::VFIXUPIMMSDZrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 12677 { 9779 /* vfixupimmss */, X86::VFIXUPIMMSSZrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 20904 { 14913 /* vpternlogd */, X86::VPTERNLOGDZ128rri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 20905 { 14913 /* vpternlogd */, X86::VPTERNLOGDZ256rri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 20906 { 14913 /* vpternlogd */, X86::VPTERNLOGDZrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, }, 20931 { 14924 /* vpternlogq */, X86::VPTERNLOGQZ128rri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, }, 20932 { 14924 /* vpternlogq */, X86::VPTERNLOGQZ256rri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, }, 20933 { 14924 /* vpternlogq */, X86::VPTERNLOGQZrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },