reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

10548   { 8030 /* vaddpd */, X86::VADDPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10549   { 8030 /* vaddpd */, X86::VADDPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10550   { 8030 /* vaddpd */, X86::VADDPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10582   { 8037 /* vaddps */, X86::VADDPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10583   { 8037 /* vaddps */, X86::VADDPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10584   { 8037 /* vaddps */, X86::VADDPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10607   { 8044 /* vaddsd */, X86::VADDSDZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10618   { 8051 /* vaddss */, X86::VADDSSZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10743   { 8159 /* vandnpd */, X86::VANDNPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10744   { 8159 /* vandnpd */, X86::VANDNPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10745   { 8159 /* vandnpd */, X86::VANDNPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10774   { 8167 /* vandnps */, X86::VANDNPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10775   { 8167 /* vandnps */, X86::VANDNPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10776   { 8167 /* vandnps */, X86::VANDNPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10805   { 8175 /* vandpd */, X86::VANDPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10806   { 8175 /* vandpd */, X86::VANDPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10807   { 8175 /* vandpd */, X86::VANDPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10836   { 8182 /* vandps */, X86::VANDPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10837   { 8182 /* vandps */, X86::VANDPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10838   { 8182 /* vandps */, X86::VANDPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11206   { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11207   { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11208   { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11753   { 8876 /* vcvtsd2ss */, X86::VCVTSD2SSZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11810   { 8985 /* vcvtss2sd */, X86::VCVTSS2SDZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12367   { 9498 /* vdivpd */, X86::VDIVPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12368   { 9498 /* vdivpd */, X86::VDIVPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12369   { 9498 /* vdivpd */, X86::VDIVPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12401   { 9505 /* vdivps */, X86::VDIVPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12402   { 9505 /* vdivps */, X86::VDIVPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12403   { 9505 /* vdivps */, X86::VDIVPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12426   { 9512 /* vdivsd */, X86::VDIVSDZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12437   { 9519 /* vdivss */, X86::VDIVSSZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12452   { 9526 /* vdpbf16ps */, X86::VDPBF16PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12453   { 9526 /* vdpbf16ps */, X86::VDPBF16PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12454   { 9526 /* vdpbf16ps */, X86::VDPBF16PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12458   { 9526 /* vdpbf16ps */, X86::VDPBF16PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12459   { 9526 /* vdpbf16ps */, X86::VDPBF16PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12460   { 9526 /* vdpbf16ps */, X86::VDPBF16PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12700   { 9791 /* vfmadd132pd */, X86::VFMADD132PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12701   { 9791 /* vfmadd132pd */, X86::VFMADD132PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12702   { 9791 /* vfmadd132pd */, X86::VFMADD132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12706   { 9791 /* vfmadd132pd */, X86::VFMADD132PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12707   { 9791 /* vfmadd132pd */, X86::VFMADD132PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12708   { 9791 /* vfmadd132pd */, X86::VFMADD132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12734   { 9803 /* vfmadd132ps */, X86::VFMADD132PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12735   { 9803 /* vfmadd132ps */, X86::VFMADD132PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12736   { 9803 /* vfmadd132ps */, X86::VFMADD132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12740   { 9803 /* vfmadd132ps */, X86::VFMADD132PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12741   { 9803 /* vfmadd132ps */, X86::VFMADD132PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12742   { 9803 /* vfmadd132ps */, X86::VFMADD132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12759   { 9815 /* vfmadd132sd */, X86::VFMADD132SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12761   { 9815 /* vfmadd132sd */, X86::VFMADD132SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12770   { 9827 /* vfmadd132ss */, X86::VFMADD132SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12772   { 9827 /* vfmadd132ss */, X86::VFMADD132SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12790   { 9839 /* vfmadd213pd */, X86::VFMADD213PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12791   { 9839 /* vfmadd213pd */, X86::VFMADD213PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12792   { 9839 /* vfmadd213pd */, X86::VFMADD213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12796   { 9839 /* vfmadd213pd */, X86::VFMADD213PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12797   { 9839 /* vfmadd213pd */, X86::VFMADD213PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12798   { 9839 /* vfmadd213pd */, X86::VFMADD213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12824   { 9851 /* vfmadd213ps */, X86::VFMADD213PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12825   { 9851 /* vfmadd213ps */, X86::VFMADD213PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12826   { 9851 /* vfmadd213ps */, X86::VFMADD213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12830   { 9851 /* vfmadd213ps */, X86::VFMADD213PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12831   { 9851 /* vfmadd213ps */, X86::VFMADD213PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12832   { 9851 /* vfmadd213ps */, X86::VFMADD213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12849   { 9863 /* vfmadd213sd */, X86::VFMADD213SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12851   { 9863 /* vfmadd213sd */, X86::VFMADD213SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12860   { 9875 /* vfmadd213ss */, X86::VFMADD213SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12862   { 9875 /* vfmadd213ss */, X86::VFMADD213SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12880   { 9887 /* vfmadd231pd */, X86::VFMADD231PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12881   { 9887 /* vfmadd231pd */, X86::VFMADD231PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12882   { 9887 /* vfmadd231pd */, X86::VFMADD231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12886   { 9887 /* vfmadd231pd */, X86::VFMADD231PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12887   { 9887 /* vfmadd231pd */, X86::VFMADD231PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12888   { 9887 /* vfmadd231pd */, X86::VFMADD231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12914   { 9899 /* vfmadd231ps */, X86::VFMADD231PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12915   { 9899 /* vfmadd231ps */, X86::VFMADD231PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12916   { 9899 /* vfmadd231ps */, X86::VFMADD231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12920   { 9899 /* vfmadd231ps */, X86::VFMADD231PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12921   { 9899 /* vfmadd231ps */, X86::VFMADD231PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12922   { 9899 /* vfmadd231ps */, X86::VFMADD231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12939   { 9911 /* vfmadd231sd */, X86::VFMADD231SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12941   { 9911 /* vfmadd231sd */, X86::VFMADD231SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12950   { 9923 /* vfmadd231ss */, X86::VFMADD231SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12952   { 9923 /* vfmadd231ss */, X86::VFMADD231SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12988   { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12989   { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12990   { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12994   { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12995   { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12996   { 9971 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13022   { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13023   { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13024   { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13028   { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13029   { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13030   { 9986 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13056   { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13057   { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13058   { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13062   { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13063   { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13064   { 10001 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13090   { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13091   { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13092   { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13096   { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13097   { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13098   { 10016 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13124   { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13125   { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13126   { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13130   { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13131   { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13132   { 10031 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13158   { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13159   { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13160   { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13164   { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13165   { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13166   { 10046 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13204   { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13205   { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13206   { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13210   { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13211   { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13212   { 10085 /* vfmsub132pd */, X86::VFMSUB132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13238   { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13239   { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13240   { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13244   { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13245   { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13246   { 10097 /* vfmsub132ps */, X86::VFMSUB132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13263   { 10109 /* vfmsub132sd */, X86::VFMSUB132SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13265   { 10109 /* vfmsub132sd */, X86::VFMSUB132SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13274   { 10121 /* vfmsub132ss */, X86::VFMSUB132SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13276   { 10121 /* vfmsub132ss */, X86::VFMSUB132SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13294   { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13295   { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13296   { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13300   { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13301   { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13302   { 10133 /* vfmsub213pd */, X86::VFMSUB213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13328   { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13329   { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13330   { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13334   { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13335   { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13336   { 10145 /* vfmsub213ps */, X86::VFMSUB213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13353   { 10157 /* vfmsub213sd */, X86::VFMSUB213SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13355   { 10157 /* vfmsub213sd */, X86::VFMSUB213SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13364   { 10169 /* vfmsub213ss */, X86::VFMSUB213SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13366   { 10169 /* vfmsub213ss */, X86::VFMSUB213SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13384   { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13385   { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13386   { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13390   { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13391   { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13392   { 10181 /* vfmsub231pd */, X86::VFMSUB231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13418   { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13419   { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13420   { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13424   { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13425   { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13426   { 10193 /* vfmsub231ps */, X86::VFMSUB231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13443   { 10205 /* vfmsub231sd */, X86::VFMSUB231SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13445   { 10205 /* vfmsub231sd */, X86::VFMSUB231SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13454   { 10217 /* vfmsub231ss */, X86::VFMSUB231SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13456   { 10217 /* vfmsub231ss */, X86::VFMSUB231SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13474   { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13475   { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13476   { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13480   { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13481   { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13482   { 10229 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13508   { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13509   { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13510   { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13514   { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13515   { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13516   { 10244 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13542   { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13543   { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13544   { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13548   { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13549   { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13550   { 10259 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13576   { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13577   { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13578   { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13582   { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13583   { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13584   { 10274 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13610   { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13611   { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13612   { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13616   { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13617   { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13618   { 10289 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13644   { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13645   { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13646   { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13650   { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13651   { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13652   { 10304 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13708   { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13709   { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13710   { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13714   { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13715   { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13716   { 10379 /* vfnmadd132pd */, X86::VFNMADD132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13742   { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13743   { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13744   { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13748   { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13749   { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13750   { 10392 /* vfnmadd132ps */, X86::VFNMADD132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13767   { 10405 /* vfnmadd132sd */, X86::VFNMADD132SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13769   { 10405 /* vfnmadd132sd */, X86::VFNMADD132SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13778   { 10418 /* vfnmadd132ss */, X86::VFNMADD132SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13780   { 10418 /* vfnmadd132ss */, X86::VFNMADD132SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13798   { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13799   { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13800   { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13804   { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13805   { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13806   { 10431 /* vfnmadd213pd */, X86::VFNMADD213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13832   { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13833   { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13834   { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13838   { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13839   { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13840   { 10444 /* vfnmadd213ps */, X86::VFNMADD213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13857   { 10457 /* vfnmadd213sd */, X86::VFNMADD213SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13859   { 10457 /* vfnmadd213sd */, X86::VFNMADD213SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13868   { 10470 /* vfnmadd213ss */, X86::VFNMADD213SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13870   { 10470 /* vfnmadd213ss */, X86::VFNMADD213SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13888   { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13889   { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13890   { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13894   { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13895   { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13896   { 10483 /* vfnmadd231pd */, X86::VFNMADD231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13922   { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13923   { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13924   { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13928   { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13929   { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13930   { 10496 /* vfnmadd231ps */, X86::VFNMADD231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13947   { 10509 /* vfnmadd231sd */, X86::VFNMADD231SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13949   { 10509 /* vfnmadd231sd */, X86::VFNMADD231SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13958   { 10522 /* vfnmadd231ss */, X86::VFNMADD231SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13960   { 10522 /* vfnmadd231ss */, X86::VFNMADD231SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13996   { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13997   { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13998   { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14002   { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14003   { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14004   { 10575 /* vfnmsub132pd */, X86::VFNMSUB132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14030   { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14031   { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14032   { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14036   { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14037   { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14038   { 10588 /* vfnmsub132ps */, X86::VFNMSUB132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14055   { 10601 /* vfnmsub132sd */, X86::VFNMSUB132SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14057   { 10601 /* vfnmsub132sd */, X86::VFNMSUB132SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14066   { 10614 /* vfnmsub132ss */, X86::VFNMSUB132SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14068   { 10614 /* vfnmsub132ss */, X86::VFNMSUB132SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14086   { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14087   { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14088   { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14092   { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14093   { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14094   { 10627 /* vfnmsub213pd */, X86::VFNMSUB213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14120   { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14121   { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14122   { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14126   { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14127   { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14128   { 10640 /* vfnmsub213ps */, X86::VFNMSUB213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14145   { 10653 /* vfnmsub213sd */, X86::VFNMSUB213SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14147   { 10653 /* vfnmsub213sd */, X86::VFNMSUB213SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14156   { 10666 /* vfnmsub213ss */, X86::VFNMSUB213SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14158   { 10666 /* vfnmsub213ss */, X86::VFNMSUB213SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14176   { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14177   { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14178   { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14182   { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14183   { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14184   { 10679 /* vfnmsub231pd */, X86::VFNMSUB231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14210   { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14211   { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14212   { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14216   { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14217   { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14218   { 10692 /* vfnmsub231ps */, X86::VFNMSUB231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14235   { 10705 /* vfnmsub231sd */, X86::VFNMSUB231SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14237   { 10705 /* vfnmsub231sd */, X86::VFNMSUB231SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14246   { 10718 /* vfnmsub231ss */, X86::VFNMSUB231SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14248   { 10718 /* vfnmsub231ss */, X86::VFNMSUB231SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14441   { 11095 /* vgetexpsd */, X86::VGETEXPSDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14450   { 11105 /* vgetexpss */, X86::VGETEXPSSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14606   { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14607   { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14608   { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14741   { 11423 /* vmaxpd */, X86::VMAXPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14742   { 11423 /* vmaxpd */, X86::VMAXPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14743   { 11423 /* vmaxpd */, X86::VMAXPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14775   { 11430 /* vmaxps */, X86::VMAXPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14776   { 11430 /* vmaxps */, X86::VMAXPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14777   { 11430 /* vmaxps */, X86::VMAXPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14800   { 11437 /* vmaxsd */, X86::VMAXSDZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14811   { 11444 /* vmaxss */, X86::VMAXSSZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14834   { 11473 /* vminpd */, X86::VMINPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14835   { 11473 /* vminpd */, X86::VMINPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14836   { 11473 /* vminpd */, X86::VMINPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14868   { 11480 /* vminps */, X86::VMINPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14869   { 11480 /* vminps */, X86::VMINPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14870   { 11480 /* vminps */, X86::VMINPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14893   { 11487 /* vminsd */, X86::VMINSDZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14904   { 11494 /* vminss */, X86::VMINSSZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15308   { 11863 /* vmovsd */, X86::VMOVSDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15367   { 11899 /* vmovss */, X86::VMOVSSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15485   { 12021 /* vmulpd */, X86::VMULPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15486   { 12021 /* vmulpd */, X86::VMULPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15487   { 12021 /* vmulpd */, X86::VMULPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15519   { 12028 /* vmulps */, X86::VMULPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15520   { 12028 /* vmulps */, X86::VMULPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15521   { 12028 /* vmulps */, X86::VMULPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15544   { 12035 /* vmulsd */, X86::VMULSDZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15555   { 12042 /* vmulss */, X86::VMULSSZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15580   { 12088 /* vorpd */, X86::VORPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15581   { 12088 /* vorpd */, X86::VORPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15582   { 12088 /* vorpd */, X86::VORPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15611   { 12094 /* vorps */, X86::VORPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15612   { 12094 /* vorps */, X86::VORPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15613   { 12094 /* vorps */, X86::VORPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15768   { 12177 /* vpackssdw */, X86::VPACKSSDWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15769   { 12177 /* vpackssdw */, X86::VPACKSSDWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15770   { 12177 /* vpackssdw */, X86::VPACKSSDWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15796   { 12187 /* vpacksswb */, X86::VPACKSSWBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15797   { 12187 /* vpacksswb */, X86::VPACKSSWBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15798   { 12187 /* vpacksswb */, X86::VPACKSSWBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15821   { 12197 /* vpackusdw */, X86::VPACKUSDWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15822   { 12197 /* vpackusdw */, X86::VPACKUSDWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15823   { 12197 /* vpackusdw */, X86::VPACKUSDWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15849   { 12207 /* vpackuswb */, X86::VPACKUSWBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15850   { 12207 /* vpackuswb */, X86::VPACKUSWBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15851   { 12207 /* vpackuswb */, X86::VPACKUSWBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15871   { 12217 /* vpaddb */, X86::VPADDBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15872   { 12217 /* vpaddb */, X86::VPADDBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15873   { 12217 /* vpaddb */, X86::VPADDBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15896   { 12224 /* vpaddd */, X86::VPADDDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15897   { 12224 /* vpaddd */, X86::VPADDDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15898   { 12224 /* vpaddd */, X86::VPADDDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15927   { 12231 /* vpaddq */, X86::VPADDQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15928   { 12231 /* vpaddq */, X86::VPADDQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15929   { 12231 /* vpaddq */, X86::VPADDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15955   { 12238 /* vpaddsb */, X86::VPADDSBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15956   { 12238 /* vpaddsb */, X86::VPADDSBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15957   { 12238 /* vpaddsb */, X86::VPADDSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15977   { 12246 /* vpaddsw */, X86::VPADDSWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15978   { 12246 /* vpaddsw */, X86::VPADDSWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15979   { 12246 /* vpaddsw */, X86::VPADDSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15999   { 12254 /* vpaddusb */, X86::VPADDUSBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16000   { 12254 /* vpaddusb */, X86::VPADDUSBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16001   { 12254 /* vpaddusb */, X86::VPADDUSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16021   { 12263 /* vpaddusw */, X86::VPADDUSWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16022   { 12263 /* vpaddusw */, X86::VPADDUSWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16023   { 12263 /* vpaddusw */, X86::VPADDUSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16043   { 12272 /* vpaddw */, X86::VPADDWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16044   { 12272 /* vpaddw */, X86::VPADDWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16045   { 12272 /* vpaddw */, X86::VPADDWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16090   { 12294 /* vpandd */, X86::VPANDDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16091   { 12294 /* vpandd */, X86::VPANDDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16092   { 12294 /* vpandd */, X86::VPANDDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16121   { 12308 /* vpandnd */, X86::VPANDNDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16122   { 12308 /* vpandnd */, X86::VPANDNDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16123   { 12308 /* vpandnd */, X86::VPANDNDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16148   { 12316 /* vpandnq */, X86::VPANDNQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16149   { 12316 /* vpandnq */, X86::VPANDNQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16150   { 12316 /* vpandnq */, X86::VPANDNQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16175   { 12324 /* vpandq */, X86::VPANDQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16176   { 12324 /* vpandq */, X86::VPANDQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16177   { 12324 /* vpandq */, X86::VPANDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16203   { 12331 /* vpavgb */, X86::VPAVGBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16204   { 12331 /* vpavgb */, X86::VPAVGBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16205   { 12331 /* vpavgb */, X86::VPAVGBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16225   { 12338 /* vpavgw */, X86::VPAVGWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16226   { 12338 /* vpavgw */, X86::VPAVGWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16227   { 12338 /* vpavgw */, X86::VPAVGWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16944   { 12879 /* vpdpbusd */, X86::VPDPBUSDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16945   { 12879 /* vpdpbusd */, X86::VPDPBUSDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16946   { 12879 /* vpdpbusd */, X86::VPDPBUSDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16950   { 12879 /* vpdpbusd */, X86::VPDPBUSDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16951   { 12879 /* vpdpbusd */, X86::VPDPBUSDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16952   { 12879 /* vpdpbusd */, X86::VPDPBUSDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16971   { 12888 /* vpdpbusds */, X86::VPDPBUSDSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16972   { 12888 /* vpdpbusds */, X86::VPDPBUSDSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16973   { 12888 /* vpdpbusds */, X86::VPDPBUSDSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16977   { 12888 /* vpdpbusds */, X86::VPDPBUSDSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16978   { 12888 /* vpdpbusds */, X86::VPDPBUSDSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16979   { 12888 /* vpdpbusds */, X86::VPDPBUSDSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16998   { 12898 /* vpdpwssd */, X86::VPDPWSSDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16999   { 12898 /* vpdpwssd */, X86::VPDPWSSDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17000   { 12898 /* vpdpwssd */, X86::VPDPWSSDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17004   { 12898 /* vpdpwssd */, X86::VPDPWSSDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17005   { 12898 /* vpdpwssd */, X86::VPDPWSSDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17006   { 12898 /* vpdpwssd */, X86::VPDPWSSDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17025   { 12907 /* vpdpwssds */, X86::VPDPWSSDSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17026   { 12907 /* vpdpwssds */, X86::VPDPWSSDSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17027   { 12907 /* vpdpwssds */, X86::VPDPWSSDSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17031   { 12907 /* vpdpwssds */, X86::VPDPWSSDSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17032   { 12907 /* vpdpwssds */, X86::VPDPWSSDSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17033   { 12907 /* vpdpwssds */, X86::VPDPWSSDSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17053   { 12939 /* vpermb */, X86::VPERMBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17054   { 12939 /* vpermb */, X86::VPERMBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17055   { 12939 /* vpermb */, X86::VPERMBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17073   { 12946 /* vpermd */, X86::VPERMDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17074   { 12946 /* vpermd */, X86::VPERMDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17091   { 12953 /* vpermi2b */, X86::VPERMI2B128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17092   { 12953 /* vpermi2b */, X86::VPERMI2B256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17093   { 12953 /* vpermi2b */, X86::VPERMI2Brrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17097   { 12953 /* vpermi2b */, X86::VPERMI2B128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17098   { 12953 /* vpermi2b */, X86::VPERMI2B256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17099   { 12953 /* vpermi2b */, X86::VPERMI2Brrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17112   { 12962 /* vpermi2d */, X86::VPERMI2D128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17113   { 12962 /* vpermi2d */, X86::VPERMI2D256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17114   { 12962 /* vpermi2d */, X86::VPERMI2Drrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17118   { 12962 /* vpermi2d */, X86::VPERMI2D128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17119   { 12962 /* vpermi2d */, X86::VPERMI2D256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17120   { 12962 /* vpermi2d */, X86::VPERMI2Drrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17139   { 12971 /* vpermi2pd */, X86::VPERMI2PD128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17140   { 12971 /* vpermi2pd */, X86::VPERMI2PD256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17141   { 12971 /* vpermi2pd */, X86::VPERMI2PDrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17145   { 12971 /* vpermi2pd */, X86::VPERMI2PD128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17146   { 12971 /* vpermi2pd */, X86::VPERMI2PD256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17147   { 12971 /* vpermi2pd */, X86::VPERMI2PDrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17166   { 12981 /* vpermi2ps */, X86::VPERMI2PS128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17167   { 12981 /* vpermi2ps */, X86::VPERMI2PS256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17168   { 12981 /* vpermi2ps */, X86::VPERMI2PSrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17172   { 12981 /* vpermi2ps */, X86::VPERMI2PS128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17173   { 12981 /* vpermi2ps */, X86::VPERMI2PS256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17174   { 12981 /* vpermi2ps */, X86::VPERMI2PSrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17193   { 12991 /* vpermi2q */, X86::VPERMI2Q128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17194   { 12991 /* vpermi2q */, X86::VPERMI2Q256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17195   { 12991 /* vpermi2q */, X86::VPERMI2Qrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17199   { 12991 /* vpermi2q */, X86::VPERMI2Q128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17200   { 12991 /* vpermi2q */, X86::VPERMI2Q256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17201   { 12991 /* vpermi2q */, X86::VPERMI2Qrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17217   { 13000 /* vpermi2w */, X86::VPERMI2W128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17218   { 13000 /* vpermi2w */, X86::VPERMI2W256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17219   { 13000 /* vpermi2w */, X86::VPERMI2Wrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17223   { 13000 /* vpermi2w */, X86::VPERMI2W128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17224   { 13000 /* vpermi2w */, X86::VPERMI2W256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17225   { 13000 /* vpermi2w */, X86::VPERMI2Wrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17267   { 13031 /* vpermilpd */, X86::VPERMILPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17268   { 13031 /* vpermilpd */, X86::VPERMILPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17269   { 13031 /* vpermilpd */, X86::VPERMILPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17329   { 13041 /* vpermilps */, X86::VPERMILPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17330   { 13041 /* vpermilps */, X86::VPERMILPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17331   { 13041 /* vpermilps */, X86::VPERMILPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17379   { 13051 /* vpermpd */, X86::VPERMPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17380   { 13051 /* vpermpd */, X86::VPERMPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17411   { 13059 /* vpermps */, X86::VPERMPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17412   { 13059 /* vpermps */, X86::VPERMPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17437   { 13067 /* vpermq */, X86::VPERMQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17438   { 13067 /* vpermq */, X86::VPERMQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17467   { 13074 /* vpermt2b */, X86::VPERMT2B128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17468   { 13074 /* vpermt2b */, X86::VPERMT2B256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17469   { 13074 /* vpermt2b */, X86::VPERMT2Brrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17473   { 13074 /* vpermt2b */, X86::VPERMT2B128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17474   { 13074 /* vpermt2b */, X86::VPERMT2B256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17475   { 13074 /* vpermt2b */, X86::VPERMT2Brrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17488   { 13083 /* vpermt2d */, X86::VPERMT2D128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17489   { 13083 /* vpermt2d */, X86::VPERMT2D256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17490   { 13083 /* vpermt2d */, X86::VPERMT2Drrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17494   { 13083 /* vpermt2d */, X86::VPERMT2D128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17495   { 13083 /* vpermt2d */, X86::VPERMT2D256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17496   { 13083 /* vpermt2d */, X86::VPERMT2Drrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17515   { 13092 /* vpermt2pd */, X86::VPERMT2PD128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17516   { 13092 /* vpermt2pd */, X86::VPERMT2PD256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17517   { 13092 /* vpermt2pd */, X86::VPERMT2PDrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17521   { 13092 /* vpermt2pd */, X86::VPERMT2PD128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17522   { 13092 /* vpermt2pd */, X86::VPERMT2PD256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17523   { 13092 /* vpermt2pd */, X86::VPERMT2PDrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17542   { 13102 /* vpermt2ps */, X86::VPERMT2PS128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17543   { 13102 /* vpermt2ps */, X86::VPERMT2PS256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17544   { 13102 /* vpermt2ps */, X86::VPERMT2PSrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17548   { 13102 /* vpermt2ps */, X86::VPERMT2PS128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17549   { 13102 /* vpermt2ps */, X86::VPERMT2PS256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17550   { 13102 /* vpermt2ps */, X86::VPERMT2PSrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17569   { 13112 /* vpermt2q */, X86::VPERMT2Q128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17570   { 13112 /* vpermt2q */, X86::VPERMT2Q256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17571   { 13112 /* vpermt2q */, X86::VPERMT2Qrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17575   { 13112 /* vpermt2q */, X86::VPERMT2Q128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17576   { 13112 /* vpermt2q */, X86::VPERMT2Q256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17577   { 13112 /* vpermt2q */, X86::VPERMT2Qrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17593   { 13121 /* vpermt2w */, X86::VPERMT2W128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17594   { 13121 /* vpermt2w */, X86::VPERMT2W256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17595   { 13121 /* vpermt2w */, X86::VPERMT2Wrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17599   { 13121 /* vpermt2w */, X86::VPERMT2W128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17600   { 13121 /* vpermt2w */, X86::VPERMT2W256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17601   { 13121 /* vpermt2w */, X86::VPERMT2Wrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17611   { 13130 /* vpermw */, X86::VPERMWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17612   { 13130 /* vpermw */, X86::VPERMWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17613   { 13130 /* vpermw */, X86::VPERMWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17890   { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17891   { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17892   { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17896   { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17897   { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17898   { 13626 /* vpmadd52huq */, X86::VPMADD52HUQZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17917   { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17918   { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17919   { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17923   { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17924   { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17925   { 13638 /* vpmadd52luq */, X86::VPMADD52LUQZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17945   { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17946   { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17947   { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17967   { 13661 /* vpmaddwd */, X86::VPMADDWDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17968   { 13661 /* vpmaddwd */, X86::VPMADDWDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17969   { 13661 /* vpmaddwd */, X86::VPMADDWDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17997   { 13692 /* vpmaxsb */, X86::VPMAXSBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17998   { 13692 /* vpmaxsb */, X86::VPMAXSBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17999   { 13692 /* vpmaxsb */, X86::VPMAXSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18022   { 13700 /* vpmaxsd */, X86::VPMAXSDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18023   { 13700 /* vpmaxsd */, X86::VPMAXSDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18024   { 13700 /* vpmaxsd */, X86::VPMAXSDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18049   { 13708 /* vpmaxsq */, X86::VPMAXSQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18050   { 13708 /* vpmaxsq */, X86::VPMAXSQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18051   { 13708 /* vpmaxsq */, X86::VPMAXSQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18077   { 13716 /* vpmaxsw */, X86::VPMAXSWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18078   { 13716 /* vpmaxsw */, X86::VPMAXSWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18079   { 13716 /* vpmaxsw */, X86::VPMAXSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18099   { 13724 /* vpmaxub */, X86::VPMAXUBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18100   { 13724 /* vpmaxub */, X86::VPMAXUBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18101   { 13724 /* vpmaxub */, X86::VPMAXUBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18124   { 13732 /* vpmaxud */, X86::VPMAXUDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18125   { 13732 /* vpmaxud */, X86::VPMAXUDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18126   { 13732 /* vpmaxud */, X86::VPMAXUDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18151   { 13740 /* vpmaxuq */, X86::VPMAXUQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18152   { 13740 /* vpmaxuq */, X86::VPMAXUQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18153   { 13740 /* vpmaxuq */, X86::VPMAXUQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18179   { 13748 /* vpmaxuw */, X86::VPMAXUWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18180   { 13748 /* vpmaxuw */, X86::VPMAXUWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18181   { 13748 /* vpmaxuw */, X86::VPMAXUWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18201   { 13756 /* vpminsb */, X86::VPMINSBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18202   { 13756 /* vpminsb */, X86::VPMINSBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18203   { 13756 /* vpminsb */, X86::VPMINSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18226   { 13764 /* vpminsd */, X86::VPMINSDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18227   { 13764 /* vpminsd */, X86::VPMINSDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18228   { 13764 /* vpminsd */, X86::VPMINSDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18253   { 13772 /* vpminsq */, X86::VPMINSQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18254   { 13772 /* vpminsq */, X86::VPMINSQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18255   { 13772 /* vpminsq */, X86::VPMINSQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18281   { 13780 /* vpminsw */, X86::VPMINSWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18282   { 13780 /* vpminsw */, X86::VPMINSWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18283   { 13780 /* vpminsw */, X86::VPMINSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18303   { 13788 /* vpminub */, X86::VPMINUBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18304   { 13788 /* vpminub */, X86::VPMINUBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18305   { 13788 /* vpminub */, X86::VPMINUBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18328   { 13796 /* vpminud */, X86::VPMINUDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18329   { 13796 /* vpminud */, X86::VPMINUDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18330   { 13796 /* vpminud */, X86::VPMINUDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18355   { 13804 /* vpminuq */, X86::VPMINUQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18356   { 13804 /* vpminuq */, X86::VPMINUQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18357   { 13804 /* vpminuq */, X86::VPMINUQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18383   { 13812 /* vpminuw */, X86::VPMINUWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18384   { 13812 /* vpminuw */, X86::VPMINUWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18385   { 13812 /* vpminuw */, X86::VPMINUWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18968   { 14184 /* vpmuldq */, X86::VPMULDQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18969   { 14184 /* vpmuldq */, X86::VPMULDQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18970   { 14184 /* vpmuldq */, X86::VPMULDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18996   { 14192 /* vpmulhrsw */, X86::VPMULHRSWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18997   { 14192 /* vpmulhrsw */, X86::VPMULHRSWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18998   { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19018   { 14202 /* vpmulhuw */, X86::VPMULHUWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19019   { 14202 /* vpmulhuw */, X86::VPMULHUWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19020   { 14202 /* vpmulhuw */, X86::VPMULHUWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19040   { 14211 /* vpmulhw */, X86::VPMULHWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19041   { 14211 /* vpmulhw */, X86::VPMULHWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19042   { 14211 /* vpmulhw */, X86::VPMULHWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19065   { 14219 /* vpmulld */, X86::VPMULLDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19066   { 14219 /* vpmulld */, X86::VPMULLDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19067   { 14219 /* vpmulld */, X86::VPMULLDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19092   { 14227 /* vpmullq */, X86::VPMULLQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19093   { 14227 /* vpmullq */, X86::VPMULLQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19094   { 14227 /* vpmullq */, X86::VPMULLQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19120   { 14235 /* vpmullw */, X86::VPMULLWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19121   { 14235 /* vpmullw */, X86::VPMULLWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19122   { 14235 /* vpmullw */, X86::VPMULLWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19141   { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19142   { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19143   { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19172   { 14258 /* vpmuludq */, X86::VPMULUDQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19173   { 14258 /* vpmuludq */, X86::VPMULUDQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19174   { 14258 /* vpmuludq */, X86::VPMULUDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19293   { 14308 /* vpord */, X86::VPORDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19294   { 14308 /* vpord */, X86::VPORDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19295   { 14308 /* vpord */, X86::VPORDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19320   { 14314 /* vporq */, X86::VPORQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19321   { 14314 /* vporq */, X86::VPORQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19322   { 14314 /* vporq */, X86::VPORQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19404   { 14341 /* vprolvd */, X86::VPROLVDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19405   { 14341 /* vprolvd */, X86::VPROLVDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19406   { 14341 /* vprolvd */, X86::VPROLVDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19431   { 14349 /* vprolvq */, X86::VPROLVQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19432   { 14349 /* vprolvq */, X86::VPROLVQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19433   { 14349 /* vprolvq */, X86::VPROLVQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19512   { 14371 /* vprorvd */, X86::VPRORVDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19513   { 14371 /* vprorvd */, X86::VPRORVDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19514   { 14371 /* vprorvd */, X86::VPRORVDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19539   { 14379 /* vprorvq */, X86::VPRORVQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19540   { 14379 /* vprorvq */, X86::VPRORVQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19541   { 14379 /* vprorvq */, X86::VPRORVQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19680   { 14529 /* vpshldvd */, X86::VPSHLDVDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19681   { 14529 /* vpshldvd */, X86::VPSHLDVDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19682   { 14529 /* vpshldvd */, X86::VPSHLDVDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19686   { 14529 /* vpshldvd */, X86::VPSHLDVDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19687   { 14529 /* vpshldvd */, X86::VPSHLDVDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19688   { 14529 /* vpshldvd */, X86::VPSHLDVDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19707   { 14538 /* vpshldvq */, X86::VPSHLDVQZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19708   { 14538 /* vpshldvq */, X86::VPSHLDVQZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19709   { 14538 /* vpshldvq */, X86::VPSHLDVQZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19713   { 14538 /* vpshldvq */, X86::VPSHLDVQZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19714   { 14538 /* vpshldvq */, X86::VPSHLDVQZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19715   { 14538 /* vpshldvq */, X86::VPSHLDVQZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19731   { 14547 /* vpshldvw */, X86::VPSHLDVWZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19732   { 14547 /* vpshldvw */, X86::VPSHLDVWZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19733   { 14547 /* vpshldvw */, X86::VPSHLDVWZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19737   { 14547 /* vpshldvw */, X86::VPSHLDVWZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19738   { 14547 /* vpshldvw */, X86::VPSHLDVWZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19739   { 14547 /* vpshldvw */, X86::VPSHLDVWZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19830   { 14594 /* vpshrdvd */, X86::VPSHRDVDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19831   { 14594 /* vpshrdvd */, X86::VPSHRDVDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19832   { 14594 /* vpshrdvd */, X86::VPSHRDVDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19836   { 14594 /* vpshrdvd */, X86::VPSHRDVDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19837   { 14594 /* vpshrdvd */, X86::VPSHRDVDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19838   { 14594 /* vpshrdvd */, X86::VPSHRDVDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19857   { 14603 /* vpshrdvq */, X86::VPSHRDVQZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19858   { 14603 /* vpshrdvq */, X86::VPSHRDVQZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19859   { 14603 /* vpshrdvq */, X86::VPSHRDVQZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19863   { 14603 /* vpshrdvq */, X86::VPSHRDVQZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19864   { 14603 /* vpshrdvq */, X86::VPSHRDVQZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19865   { 14603 /* vpshrdvq */, X86::VPSHRDVQZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19881   { 14612 /* vpshrdvw */, X86::VPSHRDVWZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19882   { 14612 /* vpshrdvw */, X86::VPSHRDVWZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19883   { 14612 /* vpshrdvw */, X86::VPSHRDVWZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19887   { 14612 /* vpshrdvw */, X86::VPSHRDVWZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19888   { 14612 /* vpshrdvw */, X86::VPSHRDVWZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19889   { 14612 /* vpshrdvw */, X86::VPSHRDVWZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19921   { 14629 /* vpshufb */, X86::VPSHUFBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19922   { 14629 /* vpshufb */, X86::VPSHUFBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19923   { 14629 /* vpshufb */, X86::VPSHUFBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20053   { 14700 /* vpslld */, X86::VPSLLDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20054   { 14700 /* vpslld */, X86::VPSLLDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20055   { 14700 /* vpslld */, X86::VPSLLDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20112   { 14715 /* vpsllq */, X86::VPSLLQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20113   { 14715 /* vpsllq */, X86::VPSLLQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20114   { 14715 /* vpsllq */, X86::VPSLLQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20155   { 14722 /* vpsllvd */, X86::VPSLLVDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20156   { 14722 /* vpsllvd */, X86::VPSLLVDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20157   { 14722 /* vpsllvd */, X86::VPSLLVDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20186   { 14730 /* vpsllvq */, X86::VPSLLVQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20187   { 14730 /* vpsllvq */, X86::VPSLLVQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20188   { 14730 /* vpsllvq */, X86::VPSLLVQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20210   { 14738 /* vpsllvw */, X86::VPSLLVWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20211   { 14738 /* vpsllvw */, X86::VPSLLVWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20212   { 14738 /* vpsllvw */, X86::VPSLLVWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20240   { 14746 /* vpsllw */, X86::VPSLLWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20241   { 14746 /* vpsllw */, X86::VPSLLWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20242   { 14746 /* vpsllw */, X86::VPSLLWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20285   { 14753 /* vpsrad */, X86::VPSRADZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20286   { 14753 /* vpsrad */, X86::VPSRADZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20287   { 14753 /* vpsrad */, X86::VPSRADZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20330   { 14760 /* vpsraq */, X86::VPSRAQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20331   { 14760 /* vpsraq */, X86::VPSRAQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20332   { 14760 /* vpsraq */, X86::VPSRAQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20373   { 14767 /* vpsravd */, X86::VPSRAVDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20374   { 14767 /* vpsravd */, X86::VPSRAVDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20375   { 14767 /* vpsravd */, X86::VPSRAVDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20400   { 14775 /* vpsravq */, X86::VPSRAVQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20401   { 14775 /* vpsravq */, X86::VPSRAVQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20402   { 14775 /* vpsravq */, X86::VPSRAVQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20424   { 14783 /* vpsravw */, X86::VPSRAVWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20425   { 14783 /* vpsravw */, X86::VPSRAVWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20426   { 14783 /* vpsravw */, X86::VPSRAVWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20454   { 14791 /* vpsraw */, X86::VPSRAWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20455   { 14791 /* vpsraw */, X86::VPSRAWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20456   { 14791 /* vpsraw */, X86::VPSRAWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20499   { 14798 /* vpsrld */, X86::VPSRLDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20500   { 14798 /* vpsrld */, X86::VPSRLDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20501   { 14798 /* vpsrld */, X86::VPSRLDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20558   { 14813 /* vpsrlq */, X86::VPSRLQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20559   { 14813 /* vpsrlq */, X86::VPSRLQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20560   { 14813 /* vpsrlq */, X86::VPSRLQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20601   { 14820 /* vpsrlvd */, X86::VPSRLVDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20602   { 14820 /* vpsrlvd */, X86::VPSRLVDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20603   { 14820 /* vpsrlvd */, X86::VPSRLVDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20632   { 14828 /* vpsrlvq */, X86::VPSRLVQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20633   { 14828 /* vpsrlvq */, X86::VPSRLVQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20634   { 14828 /* vpsrlvq */, X86::VPSRLVQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20656   { 14836 /* vpsrlvw */, X86::VPSRLVWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20657   { 14836 /* vpsrlvw */, X86::VPSRLVWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20658   { 14836 /* vpsrlvw */, X86::VPSRLVWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20686   { 14844 /* vpsrlw */, X86::VPSRLWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20687   { 14844 /* vpsrlw */, X86::VPSRLWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20688   { 14844 /* vpsrlw */, X86::VPSRLWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20720   { 14851 /* vpsubb */, X86::VPSUBBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20721   { 14851 /* vpsubb */, X86::VPSUBBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20722   { 14851 /* vpsubb */, X86::VPSUBBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20745   { 14858 /* vpsubd */, X86::VPSUBDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20746   { 14858 /* vpsubd */, X86::VPSUBDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20747   { 14858 /* vpsubd */, X86::VPSUBDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20776   { 14865 /* vpsubq */, X86::VPSUBQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20777   { 14865 /* vpsubq */, X86::VPSUBQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20778   { 14865 /* vpsubq */, X86::VPSUBQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20804   { 14872 /* vpsubsb */, X86::VPSUBSBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20805   { 14872 /* vpsubsb */, X86::VPSUBSBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20806   { 14872 /* vpsubsb */, X86::VPSUBSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20826   { 14880 /* vpsubsw */, X86::VPSUBSWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20827   { 14880 /* vpsubsw */, X86::VPSUBSWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20828   { 14880 /* vpsubsw */, X86::VPSUBSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20848   { 14888 /* vpsubusb */, X86::VPSUBUSBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20849   { 14888 /* vpsubusb */, X86::VPSUBUSBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20850   { 14888 /* vpsubusb */, X86::VPSUBUSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20870   { 14897 /* vpsubusw */, X86::VPSUBUSWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20871   { 14897 /* vpsubusw */, X86::VPSUBUSWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20872   { 14897 /* vpsubusw */, X86::VPSUBUSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20892   { 14906 /* vpsubw */, X86::VPSUBWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20893   { 14906 /* vpsubw */, X86::VPSUBWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20894   { 14906 /* vpsubw */, X86::VPSUBWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21092   { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21093   { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21094   { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21117   { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21118   { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21119   { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21148   { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21149   { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21150   { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21176   { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21177   { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21178   { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21198   { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21199   { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21200   { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21223   { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21224   { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21225   { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21254   { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21255   { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21256   { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21282   { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21283   { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21284   { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21307   { 15114 /* vpxord */, X86::VPXORDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21308   { 15114 /* vpxord */, X86::VPXORDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21309   { 15114 /* vpxord */, X86::VPXORDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21334   { 15121 /* vpxorq */, X86::VPXORQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21335   { 15121 /* vpxorq */, X86::VPXORQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21336   { 15121 /* vpxorq */, X86::VPXORQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21486   { 15182 /* vrcp14sd */, X86::VRCP14SDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21492   { 15191 /* vrcp14ss */, X86::VRCP14SSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21523   { 15218 /* vrcp28sd */, X86::VRCP28SDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21532   { 15227 /* vrcp28ss */, X86::VRCP28SSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21768   { 15396 /* vrsqrt14sd */, X86::VRSQRT14SDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21774   { 15407 /* vrsqrt14ss */, X86::VRSQRT14SSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21805   { 15440 /* vrsqrt28sd */, X86::VRSQRT28SDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21814   { 15451 /* vrsqrt28ss */, X86::VRSQRT28SSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21836   { 15480 /* vscalefpd */, X86::VSCALEFPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21837   { 15480 /* vscalefpd */, X86::VSCALEFPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21838   { 15480 /* vscalefpd */, X86::VSCALEFPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21866   { 15490 /* vscalefps */, X86::VSCALEFPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21867   { 15490 /* vscalefps */, X86::VSCALEFPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21868   { 15490 /* vscalefps */, X86::VSCALEFPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21889   { 15500 /* vscalefsd */, X86::VSCALEFSDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21898   { 15510 /* vscalefss */, X86::VSCALEFSSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22131   { 15764 /* vsqrtsd */, X86::VSQRTSDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22142   { 15772 /* vsqrtss */, X86::VSQRTSSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22163   { 15789 /* vsubpd */, X86::VSUBPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22164   { 15789 /* vsubpd */, X86::VSUBPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22165   { 15789 /* vsubpd */, X86::VSUBPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22197   { 15796 /* vsubps */, X86::VSUBPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22198   { 15796 /* vsubps */, X86::VSUBPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22199   { 15796 /* vsubps */, X86::VSUBPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22222   { 15803 /* vsubsd */, X86::VSUBSDZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22233   { 15810 /* vsubss */, X86::VSUBSSZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22270   { 15851 /* vunpckhpd */, X86::VUNPCKHPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22271   { 15851 /* vunpckhpd */, X86::VUNPCKHPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22272   { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22301   { 15861 /* vunpckhps */, X86::VUNPCKHPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22302   { 15861 /* vunpckhps */, X86::VUNPCKHPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22303   { 15861 /* vunpckhps */, X86::VUNPCKHPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22332   { 15871 /* vunpcklpd */, X86::VUNPCKLPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22333   { 15871 /* vunpcklpd */, X86::VUNPCKLPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22334   { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22363   { 15881 /* vunpcklps */, X86::VUNPCKLPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22364   { 15881 /* vunpcklps */, X86::VUNPCKLPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22365   { 15881 /* vunpcklps */, X86::VUNPCKLPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22394   { 15891 /* vxorpd */, X86::VXORPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22395   { 15891 /* vxorpd */, X86::VXORPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22396   { 15891 /* vxorpd */, X86::VXORPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22425   { 15898 /* vxorps */, X86::VXORPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22426   { 15898 /* vxorps */, X86::VXORPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22427   { 15898 /* vxorps */, X86::VXORPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },