reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

10554   { 8030 /* vaddpd */, X86::VADDPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10555   { 8030 /* vaddpd */, X86::VADDPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10556   { 8030 /* vaddpd */, X86::VADDPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10588   { 8037 /* vaddps */, X86::VADDPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10589   { 8037 /* vaddps */, X86::VADDPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10590   { 8037 /* vaddps */, X86::VADDPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10609   { 8044 /* vaddsd */, X86::VADDSDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10620   { 8051 /* vaddss */, X86::VADDSSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10749   { 8159 /* vandnpd */, X86::VANDNPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10750   { 8159 /* vandnpd */, X86::VANDNPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10751   { 8159 /* vandnpd */, X86::VANDNPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10780   { 8167 /* vandnps */, X86::VANDNPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10781   { 8167 /* vandnps */, X86::VANDNPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10782   { 8167 /* vandnps */, X86::VANDNPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10811   { 8175 /* vandpd */, X86::VANDPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10812   { 8175 /* vandpd */, X86::VANDPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10813   { 8175 /* vandpd */, X86::VANDPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10842   { 8182 /* vandps */, X86::VANDPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10843   { 8182 /* vandps */, X86::VANDPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10844   { 8182 /* vandps */, X86::VANDPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10863   { 8189 /* vblendmpd */, X86::VBLENDMPDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10864   { 8189 /* vblendmpd */, X86::VBLENDMPDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10865   { 8189 /* vblendmpd */, X86::VBLENDMPDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10869   { 8189 /* vblendmpd */, X86::VBLENDMPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10870   { 8189 /* vblendmpd */, X86::VBLENDMPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10871   { 8189 /* vblendmpd */, X86::VBLENDMPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10890   { 8199 /* vblendmps */, X86::VBLENDMPSZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10891   { 8199 /* vblendmps */, X86::VBLENDMPSZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10892   { 8199 /* vblendmps */, X86::VBLENDMPSZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10896   { 8199 /* vblendmps */, X86::VBLENDMPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10897   { 8199 /* vblendmps */, X86::VBLENDMPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10898   { 8199 /* vblendmps */, X86::VBLENDMPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11212   { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11213   { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Z256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11214   { 8551 /* vcvtne2ps2bf16 */, X86::VCVTNE2PS2BF16Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11755   { 8876 /* vcvtsd2ss */, X86::VCVTSD2SSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11813   { 8985 /* vcvtss2sd */, X86::VCVTSS2SDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12373   { 9498 /* vdivpd */, X86::VDIVPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12374   { 9498 /* vdivpd */, X86::VDIVPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12375   { 9498 /* vdivpd */, X86::VDIVPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12407   { 9505 /* vdivps */, X86::VDIVPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12408   { 9505 /* vdivps */, X86::VDIVPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12409   { 9505 /* vdivps */, X86::VDIVPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12428   { 9512 /* vdivsd */, X86::VDIVSDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12439   { 9519 /* vdivss */, X86::VDIVSSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14444   { 11095 /* vgetexpsd */, X86::VGETEXPSDZrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14453   { 11105 /* vgetexpss */, X86::VGETEXPSSZrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14612   { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14613   { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14614   { 11192 /* vgf2p8mulb */, X86::VGF2P8MULBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14748   { 11423 /* vmaxpd */, X86::VMAXPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14749   { 11423 /* vmaxpd */, X86::VMAXPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14750   { 11423 /* vmaxpd */, X86::VMAXPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14782   { 11430 /* vmaxps */, X86::VMAXPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14783   { 11430 /* vmaxps */, X86::VMAXPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14784   { 11430 /* vmaxps */, X86::VMAXPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14803   { 11437 /* vmaxsd */, X86::VMAXSDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14814   { 11444 /* vmaxss */, X86::VMAXSSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14841   { 11473 /* vminpd */, X86::VMINPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14842   { 11473 /* vminpd */, X86::VMINPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14843   { 11473 /* vminpd */, X86::VMINPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14875   { 11480 /* vminps */, X86::VMINPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14876   { 11480 /* vminps */, X86::VMINPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14877   { 11480 /* vminps */, X86::VMINPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14896   { 11487 /* vminsd */, X86::VMINSDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14907   { 11494 /* vminss */, X86::VMINSSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15310   { 11863 /* vmovsd */, X86::VMOVSDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15314   { 11870 /* vmovsd.s */, X86::VMOVSDZrrkz_REV, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15369   { 11899 /* vmovss */, X86::VMOVSSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15373   { 11906 /* vmovss.s */, X86::VMOVSSZrrkz_REV, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15491   { 12021 /* vmulpd */, X86::VMULPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15492   { 12021 /* vmulpd */, X86::VMULPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15493   { 12021 /* vmulpd */, X86::VMULPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15525   { 12028 /* vmulps */, X86::VMULPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15526   { 12028 /* vmulps */, X86::VMULPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15527   { 12028 /* vmulps */, X86::VMULPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15546   { 12035 /* vmulsd */, X86::VMULSDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15557   { 12042 /* vmulss */, X86::VMULSSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15586   { 12088 /* vorpd */, X86::VORPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15587   { 12088 /* vorpd */, X86::VORPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15588   { 12088 /* vorpd */, X86::VORPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15617   { 12094 /* vorps */, X86::VORPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15618   { 12094 /* vorps */, X86::VORPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15619   { 12094 /* vorps */, X86::VORPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15774   { 12177 /* vpackssdw */, X86::VPACKSSDWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15775   { 12177 /* vpackssdw */, X86::VPACKSSDWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15776   { 12177 /* vpackssdw */, X86::VPACKSSDWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15802   { 12187 /* vpacksswb */, X86::VPACKSSWBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15803   { 12187 /* vpacksswb */, X86::VPACKSSWBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15804   { 12187 /* vpacksswb */, X86::VPACKSSWBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15827   { 12197 /* vpackusdw */, X86::VPACKUSDWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15828   { 12197 /* vpackusdw */, X86::VPACKUSDWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15829   { 12197 /* vpackusdw */, X86::VPACKUSDWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15855   { 12207 /* vpackuswb */, X86::VPACKUSWBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15856   { 12207 /* vpackuswb */, X86::VPACKUSWBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15857   { 12207 /* vpackuswb */, X86::VPACKUSWBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15877   { 12217 /* vpaddb */, X86::VPADDBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15878   { 12217 /* vpaddb */, X86::VPADDBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15879   { 12217 /* vpaddb */, X86::VPADDBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15902   { 12224 /* vpaddd */, X86::VPADDDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15903   { 12224 /* vpaddd */, X86::VPADDDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15904   { 12224 /* vpaddd */, X86::VPADDDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15933   { 12231 /* vpaddq */, X86::VPADDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15934   { 12231 /* vpaddq */, X86::VPADDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15935   { 12231 /* vpaddq */, X86::VPADDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15961   { 12238 /* vpaddsb */, X86::VPADDSBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15962   { 12238 /* vpaddsb */, X86::VPADDSBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15963   { 12238 /* vpaddsb */, X86::VPADDSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15983   { 12246 /* vpaddsw */, X86::VPADDSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15984   { 12246 /* vpaddsw */, X86::VPADDSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15985   { 12246 /* vpaddsw */, X86::VPADDSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16005   { 12254 /* vpaddusb */, X86::VPADDUSBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16006   { 12254 /* vpaddusb */, X86::VPADDUSBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16007   { 12254 /* vpaddusb */, X86::VPADDUSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16027   { 12263 /* vpaddusw */, X86::VPADDUSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16028   { 12263 /* vpaddusw */, X86::VPADDUSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16029   { 12263 /* vpaddusw */, X86::VPADDUSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16049   { 12272 /* vpaddw */, X86::VPADDWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16050   { 12272 /* vpaddw */, X86::VPADDWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16051   { 12272 /* vpaddw */, X86::VPADDWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16096   { 12294 /* vpandd */, X86::VPANDDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16097   { 12294 /* vpandd */, X86::VPANDDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16098   { 12294 /* vpandd */, X86::VPANDDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16127   { 12308 /* vpandnd */, X86::VPANDNDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16128   { 12308 /* vpandnd */, X86::VPANDNDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16129   { 12308 /* vpandnd */, X86::VPANDNDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16154   { 12316 /* vpandnq */, X86::VPANDNQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16155   { 12316 /* vpandnq */, X86::VPANDNQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16156   { 12316 /* vpandnq */, X86::VPANDNQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16181   { 12324 /* vpandq */, X86::VPANDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16182   { 12324 /* vpandq */, X86::VPANDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16183   { 12324 /* vpandq */, X86::VPANDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16209   { 12331 /* vpavgb */, X86::VPAVGBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16210   { 12331 /* vpavgb */, X86::VPAVGBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16211   { 12331 /* vpavgb */, X86::VPAVGBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16231   { 12338 /* vpavgw */, X86::VPAVGWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16232   { 12338 /* vpavgw */, X86::VPAVGWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16233   { 12338 /* vpavgw */, X86::VPAVGWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16247   { 12354 /* vpblendmb */, X86::VPBLENDMBZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16248   { 12354 /* vpblendmb */, X86::VPBLENDMBZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16249   { 12354 /* vpblendmb */, X86::VPBLENDMBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16253   { 12354 /* vpblendmb */, X86::VPBLENDMBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16254   { 12354 /* vpblendmb */, X86::VPBLENDMBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16255   { 12354 /* vpblendmb */, X86::VPBLENDMBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16268   { 12364 /* vpblendmd */, X86::VPBLENDMDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16269   { 12364 /* vpblendmd */, X86::VPBLENDMDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16270   { 12364 /* vpblendmd */, X86::VPBLENDMDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16274   { 12364 /* vpblendmd */, X86::VPBLENDMDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16275   { 12364 /* vpblendmd */, X86::VPBLENDMDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16276   { 12364 /* vpblendmd */, X86::VPBLENDMDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16295   { 12374 /* vpblendmq */, X86::VPBLENDMQZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16296   { 12374 /* vpblendmq */, X86::VPBLENDMQZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16297   { 12374 /* vpblendmq */, X86::VPBLENDMQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16301   { 12374 /* vpblendmq */, X86::VPBLENDMQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16302   { 12374 /* vpblendmq */, X86::VPBLENDMQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16303   { 12374 /* vpblendmq */, X86::VPBLENDMQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16319   { 12384 /* vpblendmw */, X86::VPBLENDMWZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16320   { 12384 /* vpblendmw */, X86::VPBLENDMWZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16321   { 12384 /* vpblendmw */, X86::VPBLENDMWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16325   { 12384 /* vpblendmw */, X86::VPBLENDMWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16326   { 12384 /* vpblendmw */, X86::VPBLENDMWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16327   { 12384 /* vpblendmw */, X86::VPBLENDMWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16565   { 12585 /* vpcmpeqb */, X86::VPCMPEQBZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16566   { 12585 /* vpcmpeqb */, X86::VPCMPEQBZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16567   { 12585 /* vpcmpeqb */, X86::VPCMPEQBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16584   { 12594 /* vpcmpeqd */, X86::VPCMPEQDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16585   { 12594 /* vpcmpeqd */, X86::VPCMPEQDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16586   { 12594 /* vpcmpeqd */, X86::VPCMPEQDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16606   { 12603 /* vpcmpeqq */, X86::VPCMPEQQZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16607   { 12603 /* vpcmpeqq */, X86::VPCMPEQQZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16608   { 12603 /* vpcmpeqq */, X86::VPCMPEQQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16625   { 12612 /* vpcmpeqw */, X86::VPCMPEQWZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16626   { 12612 /* vpcmpeqw */, X86::VPCMPEQWZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16627   { 12612 /* vpcmpeqw */, X86::VPCMPEQWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16645   { 12643 /* vpcmpgtb */, X86::VPCMPGTBZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16646   { 12643 /* vpcmpgtb */, X86::VPCMPGTBZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16647   { 12643 /* vpcmpgtb */, X86::VPCMPGTBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16664   { 12652 /* vpcmpgtd */, X86::VPCMPGTDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16665   { 12652 /* vpcmpgtd */, X86::VPCMPGTDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16666   { 12652 /* vpcmpgtd */, X86::VPCMPGTDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16686   { 12661 /* vpcmpgtq */, X86::VPCMPGTQZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16687   { 12661 /* vpcmpgtq */, X86::VPCMPGTQZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16688   { 12661 /* vpcmpgtq */, X86::VPCMPGTQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16705   { 12670 /* vpcmpgtw */, X86::VPCMPGTWZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16706   { 12670 /* vpcmpgtw */, X86::VPCMPGTWZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16707   { 12670 /* vpcmpgtw */, X86::VPCMPGTWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17059   { 12939 /* vpermb */, X86::VPERMBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17060   { 12939 /* vpermb */, X86::VPERMBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17061   { 12939 /* vpermb */, X86::VPERMBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17077   { 12946 /* vpermd */, X86::VPERMDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17078   { 12946 /* vpermd */, X86::VPERMDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17279   { 13031 /* vpermilpd */, X86::VPERMILPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17280   { 13031 /* vpermilpd */, X86::VPERMILPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17281   { 13031 /* vpermilpd */, X86::VPERMILPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17341   { 13041 /* vpermilps */, X86::VPERMILPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17342   { 13041 /* vpermilps */, X86::VPERMILPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17343   { 13041 /* vpermilps */, X86::VPERMILPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17387   { 13051 /* vpermpd */, X86::VPERMPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17388   { 13051 /* vpermpd */, X86::VPERMPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17415   { 13059 /* vpermps */, X86::VPERMPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17416   { 13059 /* vpermps */, X86::VPERMPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17445   { 13067 /* vpermq */, X86::VPERMQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17446   { 13067 /* vpermq */, X86::VPERMQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17617   { 13130 /* vpermw */, X86::VPERMWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17618   { 13130 /* vpermw */, X86::VPERMWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17619   { 13130 /* vpermw */, X86::VPERMWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17951   { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17952   { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17953   { 13650 /* vpmaddubsw */, X86::VPMADDUBSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17973   { 13661 /* vpmaddwd */, X86::VPMADDWDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17974   { 13661 /* vpmaddwd */, X86::VPMADDWDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17975   { 13661 /* vpmaddwd */, X86::VPMADDWDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18003   { 13692 /* vpmaxsb */, X86::VPMAXSBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18004   { 13692 /* vpmaxsb */, X86::VPMAXSBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18005   { 13692 /* vpmaxsb */, X86::VPMAXSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18028   { 13700 /* vpmaxsd */, X86::VPMAXSDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18029   { 13700 /* vpmaxsd */, X86::VPMAXSDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18030   { 13700 /* vpmaxsd */, X86::VPMAXSDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18055   { 13708 /* vpmaxsq */, X86::VPMAXSQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18056   { 13708 /* vpmaxsq */, X86::VPMAXSQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18057   { 13708 /* vpmaxsq */, X86::VPMAXSQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18083   { 13716 /* vpmaxsw */, X86::VPMAXSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18084   { 13716 /* vpmaxsw */, X86::VPMAXSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18085   { 13716 /* vpmaxsw */, X86::VPMAXSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18105   { 13724 /* vpmaxub */, X86::VPMAXUBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18106   { 13724 /* vpmaxub */, X86::VPMAXUBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18107   { 13724 /* vpmaxub */, X86::VPMAXUBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18130   { 13732 /* vpmaxud */, X86::VPMAXUDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18131   { 13732 /* vpmaxud */, X86::VPMAXUDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18132   { 13732 /* vpmaxud */, X86::VPMAXUDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18157   { 13740 /* vpmaxuq */, X86::VPMAXUQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18158   { 13740 /* vpmaxuq */, X86::VPMAXUQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18159   { 13740 /* vpmaxuq */, X86::VPMAXUQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18185   { 13748 /* vpmaxuw */, X86::VPMAXUWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18186   { 13748 /* vpmaxuw */, X86::VPMAXUWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18187   { 13748 /* vpmaxuw */, X86::VPMAXUWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18207   { 13756 /* vpminsb */, X86::VPMINSBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18208   { 13756 /* vpminsb */, X86::VPMINSBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18209   { 13756 /* vpminsb */, X86::VPMINSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18232   { 13764 /* vpminsd */, X86::VPMINSDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18233   { 13764 /* vpminsd */, X86::VPMINSDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18234   { 13764 /* vpminsd */, X86::VPMINSDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18259   { 13772 /* vpminsq */, X86::VPMINSQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18260   { 13772 /* vpminsq */, X86::VPMINSQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18261   { 13772 /* vpminsq */, X86::VPMINSQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18287   { 13780 /* vpminsw */, X86::VPMINSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18288   { 13780 /* vpminsw */, X86::VPMINSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18289   { 13780 /* vpminsw */, X86::VPMINSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18309   { 13788 /* vpminub */, X86::VPMINUBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18310   { 13788 /* vpminub */, X86::VPMINUBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18311   { 13788 /* vpminub */, X86::VPMINUBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18334   { 13796 /* vpminud */, X86::VPMINUDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18335   { 13796 /* vpminud */, X86::VPMINUDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18336   { 13796 /* vpminud */, X86::VPMINUDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18361   { 13804 /* vpminuq */, X86::VPMINUQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18362   { 13804 /* vpminuq */, X86::VPMINUQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18363   { 13804 /* vpminuq */, X86::VPMINUQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18389   { 13812 /* vpminuw */, X86::VPMINUWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18390   { 13812 /* vpminuw */, X86::VPMINUWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18391   { 13812 /* vpminuw */, X86::VPMINUWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18974   { 14184 /* vpmuldq */, X86::VPMULDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18975   { 14184 /* vpmuldq */, X86::VPMULDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18976   { 14184 /* vpmuldq */, X86::VPMULDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19002   { 14192 /* vpmulhrsw */, X86::VPMULHRSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19003   { 14192 /* vpmulhrsw */, X86::VPMULHRSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19004   { 14192 /* vpmulhrsw */, X86::VPMULHRSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19024   { 14202 /* vpmulhuw */, X86::VPMULHUWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19025   { 14202 /* vpmulhuw */, X86::VPMULHUWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19026   { 14202 /* vpmulhuw */, X86::VPMULHUWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19046   { 14211 /* vpmulhw */, X86::VPMULHWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19047   { 14211 /* vpmulhw */, X86::VPMULHWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19048   { 14211 /* vpmulhw */, X86::VPMULHWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19071   { 14219 /* vpmulld */, X86::VPMULLDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19072   { 14219 /* vpmulld */, X86::VPMULLDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19073   { 14219 /* vpmulld */, X86::VPMULLDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19098   { 14227 /* vpmullq */, X86::VPMULLQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19099   { 14227 /* vpmullq */, X86::VPMULLQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19100   { 14227 /* vpmullq */, X86::VPMULLQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19126   { 14235 /* vpmullw */, X86::VPMULLWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19127   { 14235 /* vpmullw */, X86::VPMULLWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19128   { 14235 /* vpmullw */, X86::VPMULLWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19147   { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19148   { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19149   { 14243 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19178   { 14258 /* vpmuludq */, X86::VPMULUDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19179   { 14258 /* vpmuludq */, X86::VPMULUDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19180   { 14258 /* vpmuludq */, X86::VPMULUDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19299   { 14308 /* vpord */, X86::VPORDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19300   { 14308 /* vpord */, X86::VPORDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19301   { 14308 /* vpord */, X86::VPORDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19326   { 14314 /* vporq */, X86::VPORQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19327   { 14314 /* vporq */, X86::VPORQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19328   { 14314 /* vporq */, X86::VPORQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19410   { 14341 /* vprolvd */, X86::VPROLVDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19411   { 14341 /* vprolvd */, X86::VPROLVDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19412   { 14341 /* vprolvd */, X86::VPROLVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19437   { 14349 /* vprolvq */, X86::VPROLVQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19438   { 14349 /* vprolvq */, X86::VPROLVQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19439   { 14349 /* vprolvq */, X86::VPROLVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19518   { 14371 /* vprorvd */, X86::VPRORVDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19519   { 14371 /* vprorvd */, X86::VPRORVDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19520   { 14371 /* vprorvd */, X86::VPRORVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19545   { 14379 /* vprorvq */, X86::VPRORVQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19546   { 14379 /* vprorvq */, X86::VPRORVQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19547   { 14379 /* vprorvq */, X86::VPRORVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19927   { 14629 /* vpshufb */, X86::VPSHUFBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19928   { 14629 /* vpshufb */, X86::VPSHUFBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19929   { 14629 /* vpshufb */, X86::VPSHUFBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19939   { 14637 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19940   { 14637 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19941   { 14637 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20065   { 14700 /* vpslld */, X86::VPSLLDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20066   { 14700 /* vpslld */, X86::VPSLLDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20067   { 14700 /* vpslld */, X86::VPSLLDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20124   { 14715 /* vpsllq */, X86::VPSLLQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20125   { 14715 /* vpsllq */, X86::VPSLLQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20126   { 14715 /* vpsllq */, X86::VPSLLQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20161   { 14722 /* vpsllvd */, X86::VPSLLVDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20162   { 14722 /* vpsllvd */, X86::VPSLLVDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20163   { 14722 /* vpsllvd */, X86::VPSLLVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20192   { 14730 /* vpsllvq */, X86::VPSLLVQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20193   { 14730 /* vpsllvq */, X86::VPSLLVQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20194   { 14730 /* vpsllvq */, X86::VPSLLVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20216   { 14738 /* vpsllvw */, X86::VPSLLVWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20217   { 14738 /* vpsllvw */, X86::VPSLLVWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20218   { 14738 /* vpsllvw */, X86::VPSLLVWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20252   { 14746 /* vpsllw */, X86::VPSLLWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20253   { 14746 /* vpsllw */, X86::VPSLLWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20254   { 14746 /* vpsllw */, X86::VPSLLWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20297   { 14753 /* vpsrad */, X86::VPSRADZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20298   { 14753 /* vpsrad */, X86::VPSRADZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20299   { 14753 /* vpsrad */, X86::VPSRADZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20342   { 14760 /* vpsraq */, X86::VPSRAQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20343   { 14760 /* vpsraq */, X86::VPSRAQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20344   { 14760 /* vpsraq */, X86::VPSRAQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20379   { 14767 /* vpsravd */, X86::VPSRAVDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20380   { 14767 /* vpsravd */, X86::VPSRAVDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20381   { 14767 /* vpsravd */, X86::VPSRAVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20406   { 14775 /* vpsravq */, X86::VPSRAVQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20407   { 14775 /* vpsravq */, X86::VPSRAVQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20408   { 14775 /* vpsravq */, X86::VPSRAVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20430   { 14783 /* vpsravw */, X86::VPSRAVWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20431   { 14783 /* vpsravw */, X86::VPSRAVWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20432   { 14783 /* vpsravw */, X86::VPSRAVWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20466   { 14791 /* vpsraw */, X86::VPSRAWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20467   { 14791 /* vpsraw */, X86::VPSRAWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20468   { 14791 /* vpsraw */, X86::VPSRAWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20511   { 14798 /* vpsrld */, X86::VPSRLDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20512   { 14798 /* vpsrld */, X86::VPSRLDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20513   { 14798 /* vpsrld */, X86::VPSRLDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20570   { 14813 /* vpsrlq */, X86::VPSRLQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20571   { 14813 /* vpsrlq */, X86::VPSRLQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20572   { 14813 /* vpsrlq */, X86::VPSRLQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20607   { 14820 /* vpsrlvd */, X86::VPSRLVDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20608   { 14820 /* vpsrlvd */, X86::VPSRLVDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20609   { 14820 /* vpsrlvd */, X86::VPSRLVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20638   { 14828 /* vpsrlvq */, X86::VPSRLVQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20639   { 14828 /* vpsrlvq */, X86::VPSRLVQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20640   { 14828 /* vpsrlvq */, X86::VPSRLVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20662   { 14836 /* vpsrlvw */, X86::VPSRLVWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20663   { 14836 /* vpsrlvw */, X86::VPSRLVWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20664   { 14836 /* vpsrlvw */, X86::VPSRLVWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20698   { 14844 /* vpsrlw */, X86::VPSRLWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20699   { 14844 /* vpsrlw */, X86::VPSRLWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20700   { 14844 /* vpsrlw */, X86::VPSRLWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20726   { 14851 /* vpsubb */, X86::VPSUBBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20727   { 14851 /* vpsubb */, X86::VPSUBBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20728   { 14851 /* vpsubb */, X86::VPSUBBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20751   { 14858 /* vpsubd */, X86::VPSUBDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20752   { 14858 /* vpsubd */, X86::VPSUBDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20753   { 14858 /* vpsubd */, X86::VPSUBDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20782   { 14865 /* vpsubq */, X86::VPSUBQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20783   { 14865 /* vpsubq */, X86::VPSUBQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20784   { 14865 /* vpsubq */, X86::VPSUBQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20810   { 14872 /* vpsubsb */, X86::VPSUBSBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20811   { 14872 /* vpsubsb */, X86::VPSUBSBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20812   { 14872 /* vpsubsb */, X86::VPSUBSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20832   { 14880 /* vpsubsw */, X86::VPSUBSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20833   { 14880 /* vpsubsw */, X86::VPSUBSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20834   { 14880 /* vpsubsw */, X86::VPSUBSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20854   { 14888 /* vpsubusb */, X86::VPSUBUSBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20855   { 14888 /* vpsubusb */, X86::VPSUBUSBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20856   { 14888 /* vpsubusb */, X86::VPSUBUSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20876   { 14897 /* vpsubusw */, X86::VPSUBUSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20877   { 14897 /* vpsubusw */, X86::VPSUBUSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20878   { 14897 /* vpsubusw */, X86::VPSUBUSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20898   { 14906 /* vpsubw */, X86::VPSUBWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20899   { 14906 /* vpsubw */, X86::VPSUBWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20900   { 14906 /* vpsubw */, X86::VPSUBWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20968   { 14942 /* vptestmb */, X86::VPTESTMBZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20969   { 14942 /* vptestmb */, X86::VPTESTMBZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20970   { 14942 /* vptestmb */, X86::VPTESTMBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20983   { 14951 /* vptestmd */, X86::VPTESTMDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20984   { 14951 /* vptestmd */, X86::VPTESTMDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20985   { 14951 /* vptestmd */, X86::VPTESTMDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21001   { 14960 /* vptestmq */, X86::VPTESTMQZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21002   { 14960 /* vptestmq */, X86::VPTESTMQZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21003   { 14960 /* vptestmq */, X86::VPTESTMQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21016   { 14969 /* vptestmw */, X86::VPTESTMWZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21017   { 14969 /* vptestmw */, X86::VPTESTMWZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21018   { 14969 /* vptestmw */, X86::VPTESTMWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21028   { 14978 /* vptestnmb */, X86::VPTESTNMBZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21029   { 14978 /* vptestnmb */, X86::VPTESTNMBZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21030   { 14978 /* vptestnmb */, X86::VPTESTNMBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21043   { 14988 /* vptestnmd */, X86::VPTESTNMDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21044   { 14988 /* vptestnmd */, X86::VPTESTNMDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21045   { 14988 /* vptestnmd */, X86::VPTESTNMDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21061   { 14998 /* vptestnmq */, X86::VPTESTNMQZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21062   { 14998 /* vptestnmq */, X86::VPTESTNMQZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21063   { 14998 /* vptestnmq */, X86::VPTESTNMQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21076   { 15008 /* vptestnmw */, X86::VPTESTNMWZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21077   { 15008 /* vptestnmw */, X86::VPTESTNMWZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21078   { 15008 /* vptestnmw */, X86::VPTESTNMWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21098   { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21099   { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21100   { 15018 /* vpunpckhbw */, X86::VPUNPCKHBWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21123   { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21124   { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21125   { 15029 /* vpunpckhdq */, X86::VPUNPCKHDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21154   { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21155   { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21156   { 15040 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21182   { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21183   { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21184   { 15052 /* vpunpckhwd */, X86::VPUNPCKHWDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21204   { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21205   { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21206   { 15063 /* vpunpcklbw */, X86::VPUNPCKLBWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21229   { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21230   { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21231   { 15074 /* vpunpckldq */, X86::VPUNPCKLDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21260   { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21261   { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21262   { 15085 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21288   { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21289   { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21290   { 15097 /* vpunpcklwd */, X86::VPUNPCKLWDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21313   { 15114 /* vpxord */, X86::VPXORDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21314   { 15114 /* vpxord */, X86::VPXORDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21315   { 15114 /* vpxord */, X86::VPXORDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21340   { 15121 /* vpxorq */, X86::VPXORQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21341   { 15121 /* vpxorq */, X86::VPXORQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21342   { 15121 /* vpxorq */, X86::VPXORQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21488   { 15182 /* vrcp14sd */, X86::VRCP14SDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21494   { 15191 /* vrcp14ss */, X86::VRCP14SSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21526   { 15218 /* vrcp28sd */, X86::VRCP28SDZrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21535   { 15227 /* vrcp28ss */, X86::VRCP28SSZrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21770   { 15396 /* vrsqrt14sd */, X86::VRSQRT14SDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21776   { 15407 /* vrsqrt14ss */, X86::VRSQRT14SSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21808   { 15440 /* vrsqrt28sd */, X86::VRSQRT28SDZrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21817   { 15451 /* vrsqrt28ss */, X86::VRSQRT28SSZrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21842   { 15480 /* vscalefpd */, X86::VSCALEFPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21843   { 15480 /* vscalefpd */, X86::VSCALEFPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21844   { 15480 /* vscalefpd */, X86::VSCALEFPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21872   { 15490 /* vscalefps */, X86::VSCALEFPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21873   { 15490 /* vscalefps */, X86::VSCALEFPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21874   { 15490 /* vscalefps */, X86::VSCALEFPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21891   { 15500 /* vscalefsd */, X86::VSCALEFSDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21900   { 15510 /* vscalefss */, X86::VSCALEFSSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22133   { 15764 /* vsqrtsd */, X86::VSQRTSDZr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22144   { 15772 /* vsqrtss */, X86::VSQRTSSZr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22169   { 15789 /* vsubpd */, X86::VSUBPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22170   { 15789 /* vsubpd */, X86::VSUBPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22171   { 15789 /* vsubpd */, X86::VSUBPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22203   { 15796 /* vsubps */, X86::VSUBPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22204   { 15796 /* vsubps */, X86::VSUBPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22205   { 15796 /* vsubps */, X86::VSUBPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22224   { 15803 /* vsubsd */, X86::VSUBSDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22235   { 15810 /* vsubss */, X86::VSUBSSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22276   { 15851 /* vunpckhpd */, X86::VUNPCKHPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22277   { 15851 /* vunpckhpd */, X86::VUNPCKHPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22278   { 15851 /* vunpckhpd */, X86::VUNPCKHPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22307   { 15861 /* vunpckhps */, X86::VUNPCKHPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22308   { 15861 /* vunpckhps */, X86::VUNPCKHPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22309   { 15861 /* vunpckhps */, X86::VUNPCKHPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22338   { 15871 /* vunpcklpd */, X86::VUNPCKLPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22339   { 15871 /* vunpcklpd */, X86::VUNPCKLPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22340   { 15871 /* vunpcklpd */, X86::VUNPCKLPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22369   { 15881 /* vunpcklps */, X86::VUNPCKLPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22370   { 15881 /* vunpcklps */, X86::VUNPCKLPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22371   { 15881 /* vunpcklps */, X86::VUNPCKLPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22400   { 15891 /* vxorpd */, X86::VXORPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22401   { 15891 /* vxorpd */, X86::VXORPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22402   { 15891 /* vxorpd */, X86::VXORPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22431   { 15898 /* vxorps */, X86::VXORPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22432   { 15898 /* vxorps */, X86::VXORPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
22433   { 15898 /* vxorps */, X86::VXORPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },