reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/X86/X86GenAsmMatcher.inc
 8066   { 183 /* aeskeygenassist */, X86::AESKEYGENASSIST128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
 8996   { 3617 /* kshiftlb */, X86::KSHIFTLBri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
 8997   { 3626 /* kshiftld */, X86::KSHIFTLDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
 8998   { 3635 /* kshiftlq */, X86::KSHIFTLQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
 8999   { 3644 /* kshiftlw */, X86::KSHIFTLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
 9000   { 3653 /* kshiftrb */, X86::KSHIFTRBri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
 9001   { 3662 /* kshiftrd */, X86::KSHIFTRDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
 9002   { 3671 /* kshiftrq */, X86::KSHIFTRQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
 9003   { 3680 /* kshiftrw */, X86::KSHIFTRWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
 9569   { 5406 /* pcmpestri */, X86::PCMPESTRIrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
 9571   { 5416 /* pcmpestrm */, X86::PCMPESTRMrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
 9587   { 5458 /* pcmpistri */, X86::PCMPISTRIrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
 9589   { 5468 /* pcmpistrm */, X86::PCMPISTRMrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
 9602   { 5527 /* pextrd */, X86::PEXTRDrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32 }, },
 9604   { 5534 /* pextrq */, X86::PEXTRQrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR64 }, },
 9827   { 6243 /* pshufd */, X86::PSHUFDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
 9829   { 6250 /* pshufhw */, X86::PSHUFHWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
 9831   { 6258 /* pshuflw */, X86::PSHUFLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
 9833   { 6266 /* pshufw */, X86::MMX_PSHUFWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR64, MCK_VR64 }, },
10128   { 6938 /* rorxl */, X86::RORX32ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR32, MCK_GR32 }, },
10130   { 6944 /* rorxq */, X86::RORX64ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_GR64, MCK_GR64 }, },
10132   { 6950 /* roundpd */, X86::ROUNDPDr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
10134   { 6958 /* roundps */, X86::ROUNDPSr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
10674   { 8126 /* vaeskeygenassist */, X86::VAESKEYGENASSIST128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
11544   { 8760 /* vcvtps2ph */, X86::VCVTPS2PHrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
11546   { 8760 /* vcvtps2ph */, X86::VCVTPS2PHYrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_FR32 }, },
11548   { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZ128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
11550   { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZ256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X }, },
11552   { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X }, },
12540   { 9594 /* vextractf128 */, X86::VEXTRACTF128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_FR32 }, },
12542   { 9607 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X }, },
12544   { 9607 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X }, },
12552   { 9621 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X }, },
12557   { 9635 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X }, },
12559   { 9635 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X }, },
12567   { 9649 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X }, },
12572   { 9663 /* vextracti128 */, X86::VEXTRACTI128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_FR32 }, },
12574   { 9676 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X }, },
12576   { 9676 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X }, },
12584   { 9690 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X }, },
12589   { 9704 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X }, },
12591   { 9704 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X }, },
12599   { 9718 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X }, },
12606   { 9732 /* vextractps */, X86::VEXTRACTPSZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_GR32 }, },
14270   { 10771 /* vfpclasspd */, X86::VFPCLASSPDZ128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1 }, },
14271   { 10771 /* vfpclasspd */, X86::VFPCLASSPDZ256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VK1 }, },
14272   { 10771 /* vfpclasspd */, X86::VFPCLASSPDZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1 }, },
14282   { 10782 /* vfpclasspdx */, X86::VFPCLASSPDZ128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1 }, },
14288   { 10794 /* vfpclasspdy */, X86::VFPCLASSPDZ256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VK1 }, },
14294   { 10806 /* vfpclasspdz */, X86::VFPCLASSPDZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1 }, },
14300   { 10818 /* vfpclassps */, X86::VFPCLASSPSZ128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1 }, },
14301   { 10818 /* vfpclassps */, X86::VFPCLASSPSZ256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VK1 }, },
14302   { 10818 /* vfpclassps */, X86::VFPCLASSPSZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1 }, },
14312   { 10829 /* vfpclasspsx */, X86::VFPCLASSPSZ128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1 }, },
14318   { 10841 /* vfpclasspsy */, X86::VFPCLASSPSZ256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VK1 }, },
14324   { 10853 /* vfpclasspsz */, X86::VFPCLASSPSZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1 }, },
14330   { 10865 /* vfpclasssd */, X86::VFPCLASSSDZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1 }, },
14334   { 10876 /* vfpclassss */, X86::VFPCLASSSSZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1 }, },
14456   { 11115 /* vgetmantpd */, X86::VGETMANTPDZ128rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
14457   { 11115 /* vgetmantpd */, X86::VGETMANTPDZ256rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
14458   { 11115 /* vgetmantpd */, X86::VGETMANTPDZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
14486   { 11126 /* vgetmantps */, X86::VGETMANTPSZ128rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
14487   { 11126 /* vgetmantps */, X86::VGETMANTPSZ256rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
14488   { 11126 /* vgetmantps */, X86::VGETMANTPSZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
16631   { 12621 /* vpcmpestri */, X86::VPCMPESTRIrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
16633   { 12632 /* vpcmpestrm */, X86::VPCMPESTRMrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
16711   { 12679 /* vpcmpistri */, X86::VPCMPISTRIrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
16713   { 12690 /* vpcmpistrm */, X86::VPCMPISTRMrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
17246   { 13031 /* vpermilpd */, X86::VPERMILPDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
17247   { 13031 /* vpermilpd */, X86::VPERMILPDYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
17248   { 13031 /* vpermilpd */, X86::VPERMILPDZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
17249   { 13031 /* vpermilpd */, X86::VPERMILPDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
17250   { 13031 /* vpermilpd */, X86::VPERMILPDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
17308   { 13041 /* vpermilps */, X86::VPERMILPSri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
17309   { 13041 /* vpermilps */, X86::VPERMILPSYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
17310   { 13041 /* vpermilps */, X86::VPERMILPSZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
17311   { 13041 /* vpermilps */, X86::VPERMILPSZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
17312   { 13041 /* vpermilps */, X86::VPERMILPSZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
17367   { 13051 /* vpermpd */, X86::VPERMPDYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
17368   { 13051 /* vpermpd */, X86::VPERMPDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
17369   { 13051 /* vpermpd */, X86::VPERMPDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
17425   { 13067 /* vpermq */, X86::VPERMQYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
17426   { 13067 /* vpermq */, X86::VPERMQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
17427   { 13067 /* vpermq */, X86::VPERMQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
17699   { 13185 /* vpextrd */, X86::VPEXTRDrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32 }, },
17701   { 13185 /* vpextrd */, X86::VPEXTRDZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_GR32 }, },
17703   { 13193 /* vpextrq */, X86::VPEXTRQrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR64 }, },
17705   { 13193 /* vpextrq */, X86::VPEXTRQZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_GR64 }, },
19341   { 14327 /* vprold */, X86::VPROLDZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
19342   { 14327 /* vprold */, X86::VPROLDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
19343   { 14327 /* vprold */, X86::VPROLDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19368   { 14334 /* vprolq */, X86::VPROLQZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
19369   { 14334 /* vprolq */, X86::VPROLQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
19370   { 14334 /* vprolq */, X86::VPROLQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19449   { 14357 /* vprord */, X86::VPRORDZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
19450   { 14357 /* vprord */, X86::VPRORDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
19451   { 14357 /* vprord */, X86::VPRORDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19476   { 14364 /* vprorq */, X86::VPRORQZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
19477   { 14364 /* vprorq */, X86::VPRORQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
19478   { 14364 /* vprorq */, X86::VPRORQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19559   { 14387 /* vprotb */, X86::VPROTBri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19564   { 14394 /* vprotd */, X86::VPROTDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19569   { 14401 /* vprotq */, X86::VPROTQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19574   { 14408 /* vprotw */, X86::VPROTWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19945   { 14650 /* vpshufd */, X86::VPSHUFDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19946   { 14650 /* vpshufd */, X86::VPSHUFDYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
19947   { 14650 /* vpshufd */, X86::VPSHUFDZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
19948   { 14650 /* vpshufd */, X86::VPSHUFDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
19949   { 14650 /* vpshufd */, X86::VPSHUFDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19976   { 14658 /* vpshufhw */, X86::VPSHUFHWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19977   { 14658 /* vpshufhw */, X86::VPSHUFHWYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
19978   { 14658 /* vpshufhw */, X86::VPSHUFHWZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
19979   { 14658 /* vpshufhw */, X86::VPSHUFHWZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
19980   { 14658 /* vpshufhw */, X86::VPSHUFHWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19998   { 14667 /* vpshuflw */, X86::VPSHUFLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19999   { 14667 /* vpshuflw */, X86::VPSHUFLWYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
20000   { 14667 /* vpshuflw */, X86::VPSHUFLWZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
20001   { 14667 /* vpshuflw */, X86::VPSHUFLWZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
20002   { 14667 /* vpshuflw */, X86::VPSHUFLWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20037   { 14700 /* vpslld */, X86::VPSLLDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20038   { 14700 /* vpslld */, X86::VPSLLDYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
20039   { 14700 /* vpslld */, X86::VPSLLDZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
20040   { 14700 /* vpslld */, X86::VPSLLDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
20041   { 14700 /* vpslld */, X86::VPSLLDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20083   { 14707 /* vpslldq */, X86::VPSLLDQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20084   { 14707 /* vpslldq */, X86::VPSLLDQYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
20085   { 14707 /* vpslldq */, X86::VPSLLDQZ128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
20086   { 14707 /* vpslldq */, X86::VPSLLDQZ256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
20087   { 14707 /* vpslldq */, X86::VPSLLDQZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20096   { 14715 /* vpsllq */, X86::VPSLLQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20097   { 14715 /* vpsllq */, X86::VPSLLQYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
20098   { 14715 /* vpsllq */, X86::VPSLLQZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
20099   { 14715 /* vpsllq */, X86::VPSLLQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
20100   { 14715 /* vpsllq */, X86::VPSLLQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20227   { 14746 /* vpsllw */, X86::VPSLLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20228   { 14746 /* vpsllw */, X86::VPSLLWYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
20229   { 14746 /* vpsllw */, X86::VPSLLWZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
20230   { 14746 /* vpsllw */, X86::VPSLLWZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
20231   { 14746 /* vpsllw */, X86::VPSLLWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20269   { 14753 /* vpsrad */, X86::VPSRADri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20270   { 14753 /* vpsrad */, X86::VPSRADYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
20271   { 14753 /* vpsrad */, X86::VPSRADZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
20272   { 14753 /* vpsrad */, X86::VPSRADZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
20273   { 14753 /* vpsrad */, X86::VPSRADZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20318   { 14760 /* vpsraq */, X86::VPSRAQZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
20319   { 14760 /* vpsraq */, X86::VPSRAQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
20320   { 14760 /* vpsraq */, X86::VPSRAQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20441   { 14791 /* vpsraw */, X86::VPSRAWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20442   { 14791 /* vpsraw */, X86::VPSRAWYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
20443   { 14791 /* vpsraw */, X86::VPSRAWZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
20444   { 14791 /* vpsraw */, X86::VPSRAWZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
20445   { 14791 /* vpsraw */, X86::VPSRAWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20483   { 14798 /* vpsrld */, X86::VPSRLDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20484   { 14798 /* vpsrld */, X86::VPSRLDYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
20485   { 14798 /* vpsrld */, X86::VPSRLDZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
20486   { 14798 /* vpsrld */, X86::VPSRLDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
20487   { 14798 /* vpsrld */, X86::VPSRLDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20529   { 14805 /* vpsrldq */, X86::VPSRLDQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20530   { 14805 /* vpsrldq */, X86::VPSRLDQYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
20531   { 14805 /* vpsrldq */, X86::VPSRLDQZ128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
20532   { 14805 /* vpsrldq */, X86::VPSRLDQZ256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
20533   { 14805 /* vpsrldq */, X86::VPSRLDQZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20542   { 14813 /* vpsrlq */, X86::VPSRLQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20543   { 14813 /* vpsrlq */, X86::VPSRLQYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
20544   { 14813 /* vpsrlq */, X86::VPSRLQZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
20545   { 14813 /* vpsrlq */, X86::VPSRLQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
20546   { 14813 /* vpsrlq */, X86::VPSRLQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20673   { 14844 /* vpsrlw */, X86::VPSRLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20674   { 14844 /* vpsrlw */, X86::VPSRLWYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
20675   { 14844 /* vpsrlw */, X86::VPSRLWZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
20676   { 14844 /* vpsrlw */, X86::VPSRLWZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
20677   { 14844 /* vpsrlw */, X86::VPSRLWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
21544   { 15250 /* vreducepd */, X86::VREDUCEPDZ128rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
21545   { 15250 /* vreducepd */, X86::VREDUCEPDZ256rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
21546   { 15250 /* vreducepd */, X86::VREDUCEPDZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
21574   { 15260 /* vreduceps */, X86::VREDUCEPSZ128rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
21575   { 15260 /* vreduceps */, X86::VREDUCEPSZ256rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
21576   { 15260 /* vreduceps */, X86::VREDUCEPSZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
21622   { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZ128rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
21623   { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZ256rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
21624   { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
21652   { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZ128rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
21653   { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZ256rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
21654   { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
21700   { 15338 /* vroundpd */, X86::VROUNDPDr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
21701   { 15338 /* vroundpd */, X86::VROUNDPDYr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
21704   { 15347 /* vroundps */, X86::VROUNDPSr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
21705   { 15347 /* vroundps */, X86::VROUNDPSYr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, AMFBS_None, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },