|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/X86/X86GenAsmMatcher.inc11096 { 8491 /* vcomisd */, X86::VCOMISDZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X }, },
11101 { 8499 /* vcomiss */, X86::VCOMISSZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X }, },
11461 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512 }, },
11520 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512 }, },
11854 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X }, },
11902 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
11930 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X }, },
11974 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
12008 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
12038 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512 }, },
12068 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
12098 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512 }, },
12130 { 9204 /* vcvttsd2si */, X86::VCVTTSD2SIZrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
12131 { 9204 /* vcvttsd2si */, X86::VCVTTSD2SI64Zrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, },
12136 { 9215 /* vcvttsd2sil */, X86::VCVTTSD2SIZrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
12141 { 9227 /* vcvttsd2siq */, X86::VCVTTSD2SI64Zrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, },
12146 { 9239 /* vcvttsd2usi */, X86::VCVTTSD2USIZrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
12147 { 9239 /* vcvttsd2usi */, X86::VCVTTSD2USI64Zrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, },
12150 { 9251 /* vcvttsd2usil */, X86::VCVTTSD2USIZrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
12153 { 9264 /* vcvttsd2usiq */, X86::VCVTTSD2USI64Zrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, },
12162 { 9277 /* vcvttss2si */, X86::VCVTTSS2SIZrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
12163 { 9277 /* vcvttss2si */, X86::VCVTTSS2SI64Zrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, },
12168 { 9288 /* vcvttss2sil */, X86::VCVTTSS2SIZrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
12173 { 9300 /* vcvttss2siq */, X86::VCVTTSS2SI64Zrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, },
12178 { 9312 /* vcvttss2usi */, X86::VCVTTSS2USIZrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
12179 { 9312 /* vcvttss2usi */, X86::VCVTTSS2USI64Zrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, },
12182 { 9324 /* vcvttss2usil */, X86::VCVTTSS2USIZrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
12185 { 9337 /* vcvttss2usiq */, X86::VCVTTSS2USI64Zrrb_Int, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, },
12482 { 9558 /* vexp2pd */, X86::VEXP2PDZrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
12494 { 9566 /* vexp2ps */, X86::VEXP2PSZrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
14384 { 11075 /* vgetexppd */, X86::VGETEXPPDZrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
14414 { 11085 /* vgetexpps */, X86::VGETEXPPSZrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
21498 { 15200 /* vrcp28pd */, X86::VRCP28PDZrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
21510 { 15209 /* vrcp28ps */, X86::VRCP28PSZrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
21780 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
21792 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
22251 { 15833 /* vucomisd */, X86::VUCOMISDZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X }, },
22256 { 15842 /* vucomiss */, X86::VUCOMISSZrrb, Convert__Reg1_2__Reg1_1, AMFBS_None, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X }, },