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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/X86/X86GenAsmMatcher.inc10929 { 8262 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10930 { 8262 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10962 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10963 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10964 { 8357 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10998 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10999 { 8437 /* vbroadcastsd */, X86::VBROADCASTSDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11016 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11017 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11018 { 8450 /* vbroadcastss */, X86::VBROADCASTSSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11108 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11110 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11112 { 8507 /* vcompresspd */, X86::VCOMPRESSPDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11123 { 8519 /* vcompressps */, X86::VCOMPRESSPSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11125 { 8519 /* vcompressps */, X86::VCOMPRESSPSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11127 { 8519 /* vcompressps */, X86::VCOMPRESSPSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11145 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11146 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11147 { 8531 /* vcvtdq2pd */, X86::VCVTDQ2PDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11177 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11178 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11179 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11231 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11232 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Z256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11233 { 8566 /* vcvtneps2bf16 */, X86::VCVTNEPS2BF16Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11263 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11264 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11265 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11311 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11312 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11313 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11359 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11360 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11361 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11387 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11388 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11389 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11431 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11432 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11433 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11462 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11463 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11464 { 8730 /* vcvtph2ps */, X86::VCVTPH2PSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11490 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11491 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11492 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11524 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11525 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11526 { 8750 /* vcvtps2pd */, X86::VCVTPS2PDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11576 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11577 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11578 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11606 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11607 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11608 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11636 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11637 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11638 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11666 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11667 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11668 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11694 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11695 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11696 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11858 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11859 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11860 { 9062 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11906 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11907 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11908 { 9097 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11934 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11935 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11936 { 9108 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11978 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11979 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11980 { 9146 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12012 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12013 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12014 { 9158 /* vcvttps2dq */, X86::VCVTTPS2DQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12042 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12043 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12044 { 9169 /* vcvttps2qq */, X86::VCVTTPS2QQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12072 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12073 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12074 { 9180 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12102 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12103 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12104 { 9192 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12195 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12196 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12197 { 9350 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12223 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12224 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12225 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12253 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12254 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12255 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12281 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12282 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12283 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12484 { 9558 /* vexp2pd */, X86::VEXP2PDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12496 { 9566 /* vexp2ps */, X86::VEXP2PSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12510 { 9574 /* vexpandpd */, X86::VEXPANDPDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12511 { 9574 /* vexpandpd */, X86::VEXPANDPDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12512 { 9574 /* vexpandpd */, X86::VEXPANDPDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12528 { 9584 /* vexpandps */, X86::VEXPANDPSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12529 { 9584 /* vexpandps */, X86::VEXPANDPSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12530 { 9584 /* vexpandps */, X86::VEXPANDPSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14388 { 11075 /* vgetexppd */, X86::VGETEXPPDZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14389 { 11075 /* vgetexppd */, X86::VGETEXPPDZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14390 { 11075 /* vgetexppd */, X86::VGETEXPPDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14418 { 11085 /* vgetexpps */, X86::VGETEXPPSZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14419 { 11085 /* vgetexpps */, X86::VGETEXPPSZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14420 { 11085 /* vgetexpps */, X86::VGETEXPPSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14929 { 11525 /* vmovapd */, X86::VMOVAPDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14931 { 11525 /* vmovapd */, X86::VMOVAPDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14933 { 11525 /* vmovapd */, X86::VMOVAPDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14970 { 11543 /* vmovaps */, X86::VMOVAPSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14972 { 11543 /* vmovaps */, X86::VMOVAPSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14974 { 11543 /* vmovaps */, X86::VMOVAPSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15018 { 11567 /* vmovddup */, X86::VMOVDDUPZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15019 { 11567 /* vmovddup */, X86::VMOVDDUPZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15020 { 11567 /* vmovddup */, X86::VMOVDDUPZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15047 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Z128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15049 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Z256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15051 { 11594 /* vmovdqa32 */, X86::VMOVDQA32Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15080 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Z128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15082 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Z256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15084 { 11616 /* vmovdqa64 */, X86::VMOVDQA64Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15121 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Z128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15123 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Z256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15125 { 11656 /* vmovdqu16 */, X86::VMOVDQU16Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15154 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Z128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15156 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Z256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15158 { 11678 /* vmovdqu32 */, X86::VMOVDQU32Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15187 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Z128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15189 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Z256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15191 { 11700 /* vmovdqu64 */, X86::VMOVDQU64Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15220 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Z128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15222 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Z256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15224 { 11722 /* vmovdqu8 */, X86::VMOVDQU8Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15325 { 11879 /* vmovshdup */, X86::VMOVSHDUPZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15326 { 11879 /* vmovshdup */, X86::VMOVSHDUPZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15327 { 11879 /* vmovshdup */, X86::VMOVSHDUPZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15347 { 11889 /* vmovsldup */, X86::VMOVSLDUPZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15348 { 11889 /* vmovsldup */, X86::VMOVSLDUPZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15349 { 11889 /* vmovsldup */, X86::VMOVSLDUPZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15389 { 11915 /* vmovupd */, X86::VMOVUPDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15391 { 11915 /* vmovupd */, X86::VMOVUPDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15393 { 11915 /* vmovupd */, X86::VMOVUPDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15430 { 11933 /* vmovups */, X86::VMOVUPSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15432 { 11933 /* vmovups */, X86::VMOVUPSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15434 { 11933 /* vmovups */, X86::VMOVUPSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15663 { 12149 /* vpabsb */, X86::VPABSBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15664 { 12149 /* vpabsb */, X86::VPABSBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15665 { 12149 /* vpabsb */, X86::VPABSBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15688 { 12156 /* vpabsd */, X86::VPABSDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15689 { 12156 /* vpabsd */, X86::VPABSDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15690 { 12156 /* vpabsd */, X86::VPABSDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15715 { 12163 /* vpabsq */, X86::VPABSQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15716 { 12163 /* vpabsq */, X86::VPABSQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15717 { 12163 /* vpabsq */, X86::VPABSQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15743 { 12170 /* vpabsw */, X86::VPABSWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15744 { 12170 /* vpabsw */, X86::VPABSWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15745 { 12170 /* vpabsw */, X86::VPABSWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16352 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16353 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16354 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBrZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16355 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16356 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16357 { 12413 /* vpbroadcastb */, X86::VPBROADCASTBZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16383 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16384 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16385 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDrZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16386 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16387 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16388 { 12426 /* vpbroadcastd */, X86::VPBROADCASTDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16420 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16421 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16422 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQrZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16423 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16424 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16425 { 12471 /* vpbroadcastq */, X86::VPBROADCASTQZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16451 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16452 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16453 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWrZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16454 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16455 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16456 { 12484 /* vpbroadcastw */, X86::VPBROADCASTWZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16815 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16817 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16819 { 12761 /* vpcompressb */, X86::VPCOMPRESSBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16830 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16832 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16834 { 12773 /* vpcompressd */, X86::VPCOMPRESSDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16845 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16847 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16849 { 12785 /* vpcompressq */, X86::VPCOMPRESSQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16860 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16862 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16864 { 12797 /* vpcompressw */, X86::VPCOMPRESSWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16890 { 12855 /* vpconflictd */, X86::VPCONFLICTDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16891 { 12855 /* vpconflictd */, X86::VPCONFLICTDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16892 { 12855 /* vpconflictd */, X86::VPCONFLICTDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16917 { 12867 /* vpconflictq */, X86::VPCONFLICTQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16918 { 12867 /* vpconflictq */, X86::VPCONFLICTQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16919 { 12867 /* vpconflictq */, X86::VPCONFLICTQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17629 { 13137 /* vpexpandb */, X86::VPEXPANDBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17630 { 13137 /* vpexpandb */, X86::VPEXPANDBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17631 { 13137 /* vpexpandb */, X86::VPEXPANDBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17647 { 13147 /* vpexpandd */, X86::VPEXPANDDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17648 { 13147 /* vpexpandd */, X86::VPEXPANDDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17649 { 13147 /* vpexpandd */, X86::VPEXPANDDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17665 { 13157 /* vpexpandq */, X86::VPEXPANDQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17666 { 13157 /* vpexpandq */, X86::VPEXPANDQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17667 { 13157 /* vpexpandq */, X86::VPEXPANDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17683 { 13167 /* vpexpandw */, X86::VPEXPANDWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17684 { 13167 /* vpexpandw */, X86::VPEXPANDWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17685 { 13167 /* vpexpandw */, X86::VPEXPANDWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17812 { 13488 /* vplzcntd */, X86::VPLZCNTDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17813 { 13488 /* vplzcntd */, X86::VPLZCNTDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17814 { 13488 /* vplzcntd */, X86::VPLZCNTDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17839 { 13497 /* vplzcntq */, X86::VPLZCNTQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17840 { 13497 /* vplzcntq */, X86::VPLZCNTQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17841 { 13497 /* vplzcntq */, X86::VPLZCNTQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18407 { 13838 /* vpmovdb */, X86::VPMOVDBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18409 { 13838 /* vpmovdb */, X86::VPMOVDBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18411 { 13838 /* vpmovdb */, X86::VPMOVDBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18422 { 13846 /* vpmovdw */, X86::VPMOVDWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18424 { 13846 /* vpmovdw */, X86::VPMOVDWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18426 { 13846 /* vpmovdw */, X86::VPMOVDWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18454 { 13909 /* vpmovqb */, X86::VPMOVQBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18456 { 13909 /* vpmovqb */, X86::VPMOVQBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18458 { 13909 /* vpmovqb */, X86::VPMOVQBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18469 { 13917 /* vpmovqd */, X86::VPMOVQDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18471 { 13917 /* vpmovqd */, X86::VPMOVQDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18473 { 13917 /* vpmovqd */, X86::VPMOVQDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18484 { 13925 /* vpmovqw */, X86::VPMOVQWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18486 { 13925 /* vpmovqw */, X86::VPMOVQWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18488 { 13925 /* vpmovqw */, X86::VPMOVQWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18499 { 13933 /* vpmovsdb */, X86::VPMOVSDBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18501 { 13933 /* vpmovsdb */, X86::VPMOVSDBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18503 { 13933 /* vpmovsdb */, X86::VPMOVSDBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18514 { 13942 /* vpmovsdw */, X86::VPMOVSDWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18516 { 13942 /* vpmovsdw */, X86::VPMOVSDWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18518 { 13942 /* vpmovsdw */, X86::VPMOVSDWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18529 { 13951 /* vpmovsqb */, X86::VPMOVSQBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18531 { 13951 /* vpmovsqb */, X86::VPMOVSQBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18533 { 13951 /* vpmovsqb */, X86::VPMOVSQBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18544 { 13960 /* vpmovsqd */, X86::VPMOVSQDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18546 { 13960 /* vpmovsqd */, X86::VPMOVSQDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18548 { 13960 /* vpmovsqd */, X86::VPMOVSQDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18559 { 13969 /* vpmovsqw */, X86::VPMOVSQWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18561 { 13969 /* vpmovsqw */, X86::VPMOVSQWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18563 { 13969 /* vpmovsqw */, X86::VPMOVSQWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18574 { 13978 /* vpmovswb */, X86::VPMOVSWBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18576 { 13978 /* vpmovswb */, X86::VPMOVSWBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18578 { 13978 /* vpmovswb */, X86::VPMOVSWBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18593 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18594 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18595 { 13987 /* vpmovsxbd */, X86::VPMOVSXBDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18615 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18616 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18617 { 13997 /* vpmovsxbq */, X86::VPMOVSXBQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18637 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18638 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18639 { 14007 /* vpmovsxbw */, X86::VPMOVSXBWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18659 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18660 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18661 { 14017 /* vpmovsxdq */, X86::VPMOVSXDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18681 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18682 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18683 { 14027 /* vpmovsxwd */, X86::VPMOVSXWDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18703 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18704 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18705 { 14037 /* vpmovsxwq */, X86::VPMOVSXWQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18721 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18723 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18725 { 14047 /* vpmovusdb */, X86::VPMOVUSDBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18736 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18738 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18740 { 14057 /* vpmovusdw */, X86::VPMOVUSDWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18751 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18753 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18755 { 14067 /* vpmovusqb */, X86::VPMOVUSQBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18766 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18768 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18770 { 14077 /* vpmovusqd */, X86::VPMOVUSQDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18781 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18783 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18785 { 14087 /* vpmovusqw */, X86::VPMOVUSQWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18796 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18798 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18800 { 14097 /* vpmovuswb */, X86::VPMOVUSWBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18814 { 14116 /* vpmovwb */, X86::VPMOVWBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18816 { 14116 /* vpmovwb */, X86::VPMOVWBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18818 { 14116 /* vpmovwb */, X86::VPMOVWBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18833 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18834 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18835 { 14124 /* vpmovzxbd */, X86::VPMOVZXBDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18855 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18856 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18857 { 14134 /* vpmovzxbq */, X86::VPMOVZXBQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18877 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18878 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18879 { 14144 /* vpmovzxbw */, X86::VPMOVZXBWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18899 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18900 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18901 { 14154 /* vpmovzxdq */, X86::VPMOVZXDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18921 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18922 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18923 { 14164 /* vpmovzxwd */, X86::VPMOVZXWDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18943 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18944 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18945 { 14174 /* vpmovzxwq */, X86::VPMOVZXWQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19196 { 14267 /* vpopcntb */, X86::VPOPCNTBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19197 { 14267 /* vpopcntb */, X86::VPOPCNTBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19198 { 14267 /* vpopcntb */, X86::VPOPCNTBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19217 { 14276 /* vpopcntd */, X86::VPOPCNTDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19218 { 14276 /* vpopcntd */, X86::VPOPCNTDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19219 { 14276 /* vpopcntd */, X86::VPOPCNTDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19244 { 14285 /* vpopcntq */, X86::VPOPCNTQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19245 { 14285 /* vpopcntq */, X86::VPOPCNTQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19246 { 14285 /* vpopcntq */, X86::VPOPCNTQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19268 { 14294 /* vpopcntw */, X86::VPOPCNTWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19269 { 14294 /* vpopcntw */, X86::VPOPCNTWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19270 { 14294 /* vpopcntw */, X86::VPOPCNTWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21439 { 15164 /* vrcp14pd */, X86::VRCP14PDZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21440 { 15164 /* vrcp14pd */, X86::VRCP14PDZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21441 { 15164 /* vrcp14pd */, X86::VRCP14PDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21466 { 15173 /* vrcp14ps */, X86::VRCP14PSZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21467 { 15173 /* vrcp14ps */, X86::VRCP14PSZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21468 { 15173 /* vrcp14ps */, X86::VRCP14PSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21500 { 15200 /* vrcp28pd */, X86::VRCP28PDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21512 { 15209 /* vrcp28ps */, X86::VRCP28PSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21721 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21722 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21723 { 15374 /* vrsqrt14pd */, X86::VRSQRT14PDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21748 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21749 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21750 { 15385 /* vrsqrt14ps */, X86::VRSQRT14PSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21782 { 15418 /* vrsqrt28pd */, X86::VRSQRT28PDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21794 { 15429 /* vrsqrt28ps */, X86::VRSQRT28PSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22072 { 15748 /* vsqrtpd */, X86::VSQRTPDZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22073 { 15748 /* vsqrtpd */, X86::VSQRTPDZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22074 { 15748 /* vsqrtpd */, X86::VSQRTPDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22106 { 15756 /* vsqrtps */, X86::VSQRTPSZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22107 { 15756 /* vsqrtps */, X86::VSQRTPSZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
22108 { 15756 /* vsqrtps */, X86::VSQRTPSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, AMFBS_None, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },