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|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/X86/X86GenAsmMatcher.inc 8271 { 734 /* calll */, X86::CALL32r, Convert__Reg1_1, AMFBS_Not64BitMode, { MCK__STAR_, MCK_GR32 }, },
8275 { 740 /* callq */, X86::CALL64r, Convert__Reg1_1, AMFBS_In64BitMode, { MCK__STAR_, MCK_GR64 }, },
8278 { 746 /* callw */, X86::CALL16r, Convert__Reg1_1, AMFBS_Not64BitMode, { MCK__STAR_, MCK_GR16 }, },
8617 { 2093 /* fadd */, X86::ADD_FrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
8623 { 2104 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
8658 { 2264 /* fdiv */, X86::DIVR_FrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
8664 { 2275 /* fdivp */, X86::DIVR_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
8668 { 2281 /* fdivr */, X86::DIV_FrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
8674 { 2294 /* fdivrp */, X86::DIV_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
8725 { 2687 /* fmul */, X86::MUL_FrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
8731 { 2698 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
8763 { 2865 /* fsub */, X86::SUBR_FrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
8769 { 2876 /* fsubp */, X86::SUBR_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
8773 { 2882 /* fsubr */, X86::SUB_FrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
8779 { 2895 /* fsubrp */, X86::SUB_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
8936 { 3391 /* jmpl */, X86::JMP32r, Convert__Reg1_1, AMFBS_Not64BitMode, { MCK__STAR_, MCK_GR32 }, },
8939 { 3396 /* jmpq */, X86::JMP64r, Convert__Reg1_1, AMFBS_In64BitMode, { MCK__STAR_, MCK_GR64 }, },
8941 { 3401 /* jmpw */, X86::JMP16r, Convert__Reg1_1, AMFBS_Not64BitMode, { MCK__STAR_, MCK_GR16 }, },
23145 { 1942 /* div */, X86::DIV8r, Convert__Reg1_1, AMFBS_None, { MCK_AL, MCK_GR8 }, },
23147 { 1942 /* div */, X86::DIV16r, Convert__Reg1_1, AMFBS_None, { MCK_AX, MCK_GR16 }, },
23149 { 1942 /* div */, X86::DIV32r, Convert__Reg1_1, AMFBS_None, { MCK_EAX, MCK_GR32 }, },
23151 { 1942 /* div */, X86::DIV64r, Convert__Reg1_1, AMFBS_None, { MCK_RAX, MCK_GR64 }, },
23191 { 2093 /* fadd */, X86::ADD_FST0r, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23196 { 2104 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23201 { 2132 /* fcmovb */, X86::CMOVB_F, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23202 { 2139 /* fcmovbe */, X86::CMOVBE_F, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23203 { 2147 /* fcmove */, X86::CMOVE_F, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23204 { 2154 /* fcmovnb */, X86::CMOVNB_F, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23205 { 2162 /* fcmovnbe */, X86::CMOVNBE_F, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23206 { 2171 /* fcmovne */, X86::CMOVNE_F, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23207 { 2179 /* fcmovnu */, X86::CMOVNP_F, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23208 { 2187 /* fcmovu */, X86::CMOVP_F, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23216 { 2199 /* fcomi */, X86::COM_FIr, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23224 { 2217 /* fcompi */, X86::COM_FIPr, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23232 { 2264 /* fdiv */, X86::DIV_FST0r, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23237 { 2275 /* fdivp */, X86::DIV_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23243 { 2281 /* fdivr */, X86::DIVR_FST0r, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23248 { 2294 /* fdivrp */, X86::DIVR_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23299 { 2687 /* fmul */, X86::MUL_FST0r, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23304 { 2698 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23337 { 2865 /* fsub */, X86::SUB_FST0r, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23342 { 2876 /* fsubp */, X86::SUB_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23348 { 2882 /* fsubr */, X86::SUBR_FST0r, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23353 { 2895 /* fsubrp */, X86::SUBR_FPrST0, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23361 { 2926 /* fucomi */, X86::UCOM_FIr, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23367 { 2940 /* fucompi */, X86::UCOM_FIPr, Convert__Reg1_1, AMFBS_None, { MCK_ST0, MCK_RST }, },
23404 { 3105 /* idiv */, X86::IDIV8r, Convert__Reg1_1, AMFBS_None, { MCK_AL, MCK_GR8 }, },
23406 { 3105 /* idiv */, X86::IDIV16r, Convert__Reg1_1, AMFBS_None, { MCK_AX, MCK_GR16 }, },
23408 { 3105 /* idiv */, X86::IDIV32r, Convert__Reg1_1, AMFBS_None, { MCK_EAX, MCK_GR32 }, },
23410 { 3105 /* idiv */, X86::IDIV64r, Convert__Reg1_1, AMFBS_None, { MCK_RAX, MCK_GR64 }, },