reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/X86/X86GenAsmMatcher.inc
26085   { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
26086   { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26087   { 8760 /* vcvtps2ph */, X86::VCVTPS2PHZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26938   { 9607 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26939   { 9607 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26946   { 9621 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26953   { 9635 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26954   { 9635 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26961   { 9649 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26970   { 9676 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26971   { 9676 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26978   { 9690 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26985   { 9704 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26986   { 9704 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26993   { 9718 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
28834   { 11115 /* vgetmantpd */, X86::VGETMANTPDZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28836   { 11115 /* vgetmantpd */, X86::VGETMANTPDZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
28838   { 11115 /* vgetmantpd */, X86::VGETMANTPDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
28864   { 11126 /* vgetmantps */, X86::VGETMANTPSZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28866   { 11126 /* vgetmantps */, X86::VGETMANTPSZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
28868   { 11126 /* vgetmantps */, X86::VGETMANTPSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
31636   { 13031 /* vpermilpd */, X86::VPERMILPDZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31640   { 13031 /* vpermilpd */, X86::VPERMILPDZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
31644   { 13031 /* vpermilpd */, X86::VPERMILPDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
31698   { 13041 /* vpermilps */, X86::VPERMILPSZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31702   { 13041 /* vpermilps */, X86::VPERMILPSZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
31706   { 13041 /* vpermilps */, X86::VPERMILPSZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
31748   { 13051 /* vpermpd */, X86::VPERMPDZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
31752   { 13051 /* vpermpd */, X86::VPERMPDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
31806   { 13067 /* vpermq */, X86::VPERMQZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
31810   { 13067 /* vpermq */, X86::VPERMQZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33718   { 14327 /* vprold */, X86::VPROLDZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33720   { 14327 /* vprold */, X86::VPROLDZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33722   { 14327 /* vprold */, X86::VPROLDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33745   { 14334 /* vprolq */, X86::VPROLQZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33747   { 14334 /* vprolq */, X86::VPROLQZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33749   { 14334 /* vprolq */, X86::VPROLQZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33826   { 14357 /* vprord */, X86::VPRORDZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33828   { 14357 /* vprord */, X86::VPRORDZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33830   { 14357 /* vprord */, X86::VPRORDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33853   { 14364 /* vprorq */, X86::VPRORQZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33855   { 14364 /* vprorq */, X86::VPRORQZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33857   { 14364 /* vprorq */, X86::VPRORQZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34326   { 14650 /* vpshufd */, X86::VPSHUFDZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34328   { 14650 /* vpshufd */, X86::VPSHUFDZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34330   { 14650 /* vpshufd */, X86::VPSHUFDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34354   { 14658 /* vpshufhw */, X86::VPSHUFHWZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34356   { 14658 /* vpshufhw */, X86::VPSHUFHWZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34358   { 14658 /* vpshufhw */, X86::VPSHUFHWZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34376   { 14667 /* vpshuflw */, X86::VPSHUFLWZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34378   { 14667 /* vpshuflw */, X86::VPSHUFLWZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34380   { 14667 /* vpshuflw */, X86::VPSHUFLWZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34422   { 14700 /* vpslld */, X86::VPSLLDZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34426   { 14700 /* vpslld */, X86::VPSLLDZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34430   { 14700 /* vpslld */, X86::VPSLLDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34481   { 14715 /* vpsllq */, X86::VPSLLQZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34485   { 14715 /* vpsllq */, X86::VPSLLQZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34489   { 14715 /* vpsllq */, X86::VPSLLQZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34609   { 14746 /* vpsllw */, X86::VPSLLWZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34613   { 14746 /* vpsllw */, X86::VPSLLWZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34617   { 14746 /* vpsllw */, X86::VPSLLWZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34654   { 14753 /* vpsrad */, X86::VPSRADZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34658   { 14753 /* vpsrad */, X86::VPSRADZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34662   { 14753 /* vpsrad */, X86::VPSRADZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34699   { 14760 /* vpsraq */, X86::VPSRAQZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34703   { 14760 /* vpsraq */, X86::VPSRAQZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34707   { 14760 /* vpsraq */, X86::VPSRAQZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34823   { 14791 /* vpsraw */, X86::VPSRAWZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34827   { 14791 /* vpsraw */, X86::VPSRAWZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34831   { 14791 /* vpsraw */, X86::VPSRAWZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34868   { 14798 /* vpsrld */, X86::VPSRLDZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34872   { 14798 /* vpsrld */, X86::VPSRLDZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34876   { 14798 /* vpsrld */, X86::VPSRLDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34927   { 14813 /* vpsrlq */, X86::VPSRLQZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34931   { 14813 /* vpsrlq */, X86::VPSRLQZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34935   { 14813 /* vpsrlq */, X86::VPSRLQZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35055   { 14844 /* vpsrlw */, X86::VPSRLWZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35059   { 14844 /* vpsrlw */, X86::VPSRLWZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35063   { 14844 /* vpsrlw */, X86::VPSRLWZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35922   { 15250 /* vreducepd */, X86::VREDUCEPDZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35924   { 15250 /* vreducepd */, X86::VREDUCEPDZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35926   { 15250 /* vreducepd */, X86::VREDUCEPDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35952   { 15260 /* vreduceps */, X86::VREDUCEPSZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35954   { 15260 /* vreduceps */, X86::VREDUCEPSZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35956   { 15260 /* vreduceps */, X86::VREDUCEPSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
36000   { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36002   { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36004   { 15290 /* vrndscalepd */, X86::VRNDSCALEPDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
36030   { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
36032   { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
36034   { 15302 /* vrndscaleps */, X86::VRNDSCALEPSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },