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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/X86/X86GenAsmMatcher.inc25759 { 8541 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
25851 { 8610 /* vcvtpd2dq */, X86::VCVTPD2DQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
25885 { 8642 /* vcvtpd2ps */, X86::VCVTPD2PSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
25915 { 8674 /* vcvtpd2qq */, X86::VCVTPD2QQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
25945 { 8684 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
25975 { 8719 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
26034 { 8740 /* vcvtps2dq */, X86::VCVTPS2DQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
26120 { 8770 /* vcvtps2qq */, X86::VCVTPS2QQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_AVX512RC }, },
26150 { 8780 /* vcvtps2udq */, X86::VCVTPS2UDQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
26180 { 8791 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_AVX512RC }, },
26210 { 8802 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
26240 { 8812 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
26650 { 9361 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
26680 { 9372 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
26710 { 9383 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
36454 { 15748 /* vsqrtpd */, X86::VSQRTPDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
36488 { 15756 /* vsqrtps */, X86::VSQRTPSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, AMFBS_None, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },